VIETNAM NATIONAL UNIVERSITY, HANOI

UNIVERSITY OF ENGINEERING AND TECHNOLOGY

Bui Van De

BUILDING AN EMBEDDED SYSTEM FOR

FOOTBALL MATCH APPLICATION WITH FPGA
TECHNOLOGY

Major: Electronics and Communications Engineering

HA NOI - 2014

VIETNAM NATIONAL UNIVERSITY, HANOI

UNIVERSITY OF ENGINEERING AND TECHNOLOGY

Bui Van De

BUILDING AN EMBEDDED SYSTEM FOR

FOOTBALL MATCH APPLICATION WITH FPGA
TECHNOLOGY

Major: Electronics and Communications Engineering

Supervisor: Assoc. Prof. Xuan-Tu Tran

HA NOI - 2014

AUTHORSHIP
I hereby declare that the work contained in this thesis is of my own and has not been
previously submitted for a degree or diploma at this or any other higher education
institution. To the best of my knowledge and belief, the thesis contains no materials
previously published or written by another person except where due reference or
acknowledgement is made.

Signature:

SUPERVISORS APPROVAL
I hereby approve that the thesis in its current form is ready for committee
examination as a requirement for the Bachelor of Electronics and Communications
Engineering degree at the VNU University of Engineering and Technology.

Signature:

TABLE OF CONTENTS
Abstract.............................................................................................................vi
List of Figures...................................................................................................ix
List of Tables......................................................................................................x
List of Abbreviations.........................................................................................xi
INTRODUCTION.........................................................................................1
OVERVIEW OF EMBEDDED SYSTEM AND FPGA
TECHNOLOGY.........................................................................................................3
1.1

Introduction to Real-Time Embedded Systems...............................3

1.1.1 Real-time systems............................................................................3

1.1.2 Embedded system............................................................................4
1.2 FPGA technology....................................................................................5
1.2.1 What is an FPGA?...........................................................................5
1.2.2 Main Benefits of FPGA Technology...............................................6
1.3. Summary................................................................................................7
SYSTEM OVERVIEW................................................................................8
2.1 Introduction to football match demonstration system........................8
2.2 System Analysis....................................................................................10
2.2.1. General Purpose Input Output...................................................11
2.2.2 VGA controller...............................................................................11
2.2.3 Universal Asynchronous Receiver Transmitter..........................12
2.2.4 Timer and Interrupt......................................................................14
2.3. Summary..............................................................................................14
SYSTEM DESIGN.....................................................................................15
3.1 Creating an Embedded Hardware System........................................15
3.1.2 Select a Target Board....................................................................16
3.1.3 Select The Processor To Be Used..................................................17
3.1.4 Configure The Processor..............................................................18
3.1.5 Add or Remove External Peripherals..........................................18
3.1.6 Add Peripherals.............................................................................19
3.1.7 Making Bus Connection...............................................................20

3.1.8 Assigning Addresses......................................................................21

3.1.9 Parameterize IP instances.............................................................21
3.1.10 Connecting Ports.........................................................................22
3.1.11 Make Pin Assignments................................................................23
3.2 Develop the Software Platform...........................................................24
3.2.1 Strategy thread..............................................................................28
3.2.2 Simulation thread..........................................................................36
3.2.3 Display thread................................................................................37
Chapter 4......................................................................................................38
EXPERIMENTAL RESULTS AND DISCUSSIONS........................38
CONCLUSION............................................................................................42
References........................................................................................................43

Abstract
In recent years, embedded systems have emerged at a faster rate and become
pervasive in many field from household products such as microwaves, to automotive
products such as air bags sensing and control, to industrial robots. The design of
embedded systems is now becoming increasingly difficult due to the tight constraints
on area usage, size, power consumption and performance. In addition to these
constraints, many embedded system developers are faced with tight time-to-market
deadlines. The product should be deployed when the demand for the product still
exists, if the demand ceases then the product would not yield any profit for the
company.
To develop these products, various tools and technologies have been used such as
microcontroller, DSP processor, ASIC, and FPGA. In terms of flexibility, the FPGA is
one of the most efficient methods. Informally, an FPGA can be thought of as a blank
slate on which any digital circuit can be configured in the field that is, after the
device has been manufactured, installed in a product, or, in some cases, even after the
product has been shipped to the consumer. This makes the FPGA device
fundamentally different from other Integrated Circuit (IC) devices. In short, an FPGA
provides programmable hardware to the embedded systems developer. FPGAs offer
a great deal to the embedded systems designer. They not only meet the complex and
demanding requirements of embedded systems that are becoming so universal today
but also offer a low-risk, quick time-to-market solution that designers can easily
modify when they need to make changes, fix bugs or create product derivatives at
some point in the future.
In this project we have tried to implement such powerful FPGAs in the design of
football match application. The aim of the project is to develop a 5-player soccer
system on multiple Xilinx FPGA boards using embedded processors. Besides making
us similar with FPGA technology, the project also makes us understand real-time
concepts like scheduling, handling shared resources and priority management and
some another typical embedded system requirements. The football match has been

succefully implemented on two client FPGAs (each for each football team) and a
server FPGA.

ii

Acknowledgement
This thesis was done at the Key Laboratory for Smart Integrated System (SIS
Lab), VNU University of Engineering and Technology (VNU-UET) under the
supervision of Assoc. Prof. Xuan-Tu Tran.
First of all, I want to give my sincerely thanks to the faculty members and
staffs of the Faculty of Electronics and Telecommunication, VNU-UET for their
enthusiasm to guide me to for the background of knowledge.
I would like to express special thanks to Assoc.Prof. Xuan-Tu Tran who
always guides me, points out the mistakes, and gives me the instructions and
comments during the time to realize this work. Without his supervising, I would have
many difficulties to finish this thesis.
I also thank all members of the SIS Lab who always facilitate me to do this
thesis, answer my questions in a familiar way and share their experience for me as
well as make me feel comfortable and better in studying.
Finally, I want to give the best thank to my parents, my relatives and my
friends who always encourage, take care me during the studying and researching
period.

Sincerely,
Bui Van De

iii

List of Figures
Figure 2-1 System overview.........................................................................11
Figure 2-2: Hardware architecture...................................................................13
Figure 2-3: Football ground.............................................................................14
Figure 3-1: Base System Builder Wizard.........................................................19
Figure 3-2: Name of My Project......................................................................19
Figure 3-3: Select Target Board.......................................................................20
Figure 3-4: Select Processor to Be Used..........................................................20
Figure 3-5: Configure the processor................................................................21
Figure 3-6: Add or Remove External Peripheral..............................................22
Figure 3-7: Summary Screen...........................................................................22
Figure 3-8: Add Peripherals.............................................................................23
Figure 3-9: Making Bus Connection................................................................24
Figure 3-10: Assigning Addresses....................................................................24
Figure 3-11: Parameterize IP instances............................................................25
Figure 3-12: Connecting Ports.........................................................................25
Figure 3-13: Make Pin Assignments................................................................26
Figure 3-14: Final Screen.................................................................................26
Figure 3-15: Export & Launch SDK................................................................27
Figure 3-16: EDK Start Screen........................................................................28
Figure 3-17: Xilinx Board Support Package Selection....................................29
Figure 3-18: Board Support Packet Settings....................................................30
Figure 3-19: Move_to_target function.............................................................32
Figure 3-20: Dan Bong.....................................................................................33
Figure 3-21: Goal Function..............................................................................36
Figure 3-22: Formation....................................................................................37
Figure 4-1: Build Project..................................................................................41
Figure 4-2: Program FPGA..............................................................................42
Figure 4-3: Hardware System..........................................................................43
Figure 4-4: Simulation results..........................................................................44

iv

List of Tables
Table 2-1: Initial pack......................................................................................15
Table 2-2: Update packet..................................................................................15
Table 2-3: Information packet from server to clients.......................................16
Table 3-1: Distance and corresponding speed of player 1...............................34
Table 3-2: Relationship between delta and direction of player 1.....................35

List of Abbreviations
ASIC

Application Specific Integrated Circuit

BSB

Base System Builder

DSP

Digital Signal Processing

EDK

Embedded Development Kit

FPGA

Field Programmable Gate Array

GPIO

General Purpose Input/ Output

HDL

Hardware Description Language

IC

Integrated Circuit

IP

Intellectual Property

OS

Operating System

VGA

Video Graphics Adapter

XPS

Xilinx Platform Studio

INTRODUCTION
vi

The scope and role of embedded systems are continually expanding. For example in
2003, there was an average of 8 billion embedded programmable components
worldwide. This number was doubled in 2010, or three embedded devices for every
person on earth. This rapid proliferation is predicted to rise to 24.6 billion multiprocessors based embedded systems by the year 2020[3]. Therefore, learning to
design such complex and diverse embedded computing system has become very
important.
Nowadays, designing real-time embedded systems is a difficult task. The first
problem is

that

the life cycle of embedded products is becoming increasingly

smaller. This will lead to new developments taking place more frequently to replace
the outdated products. The second demand is that the complexity of the embedded
system is rapidly increasing. With this increase in functionality and complexity of
systems, the embedded system design cycle may be longer and require more time and
manpower. The consumers demand for increasing functionality translates directly
into the increased complexity of the embedded system on a chip. FPGA technology
may alleviate the complexity gap problem and assist with the current trends in the
embedded system market.
Various tools and technologies have been used: microcontroller, DSP processor,
ASIC, and now FPGA. A key question is why FPGA should be used instead of
microprocessors, microcontrollers and ASICs in designing embedded system. The use
of FPGAs (Field Programmable Gate Arrays) and configurable processors is an
interesting new phenomenon in embedded development. The functionality of the
FPGA can be customized in the field. The ASIC cannot be changed after a certain
point in the design process is passed. The disadvantage of ASICs is that the designing
and building of the device is very time-consuming and expensive. The final design
created for the ASIC cannot be modified without going through the long process of
development again. FPGAs are of great interest when it comes to prototyping a
system due to the efficient. The development of a prototype should be efficient in
order for the final product to be marketed quickly.
In this report, we describe our process in handing a real-time embedded system using
FPGA technology . The project develop a 5-player soccer system on multiple Xilinx
FPGA boards using embedded processors. . The system comprises of two clients
vii

control players and one server to referee and display the game in real-time. we have to
design the hardware architecture of the embedded system and the software for the
strategy to control how to move the players in response to the position of all players
and the ball. They also develop a server to communicate with the two teams and
display the progress of the game on an attached VGA monitor. Besides making us
similar with real-time concepts like scheduling, handling shared resources, priority
management and the constraints in a typical embedded system, the project also makes
us understand the process in design embedded system in FPGA technology using
Xilinx tool (Embedded Development Kit 12.1).
This report is organized as follows. Chapter 1 gives a brief overview about embedded
systems and its basic concepts, FPGA technology are also discussed in this chapter.
Architecture of the system and introduction of the task of each component will be
introduced in chapter 2. More specifically, this section will answer for the question
The system consist of which peripherals and how they are works with each other.
Chapter 3 we are going to talks about hardware design process using Xilinx Platform
Studio tool. This part also discuss about the software design. We are going to talks
about some functions server for displaying and simulating the football match. Chapter
4 concludes the report with a discussion on the achievements from this project and
give the near future works which far related to the main topic.

viii

Chapter 1

OVERVIEW OF EMBEDDED SYSTEM

AND FPGA TECHNOLOGY

1.1 Introduction to Real-Time Embedded Systems

1.1.1 Real-time systems

REAL-TIME SYSTEMS: - Timeliness is the single most important aspect of a real-time
system. These systems respond to a series of external inputs, which arrive in an unpredictable
fashion. The real-time systems process these inputs, take appropriate decisions and also
generate output necessary to control the peripherals connected to them. A real-time system is
one in which the correctness of the computations not only depends upon the logical
correctness of the computation but also upon the time in which the result is produced. If the
timing constraints are not met, system failure is said to have occurred. [6]
It is essential that the timing constraints of the system are guaranteed to be met. Guaranteeing
timing behavior requires that the system be predictable. The design of a real-time system
must specify the timing requirements of the system and ensure that the system performance is
both correct and timely. There are three types of time constraints:
HARD: A late response is incorrect and implies a system failure. An example of such
a system is of medical equipment monitoring vital functions of a human body, where a late
response would be considered as a failure.

SOFT: Timeliness requirements are defined by using an average response time. If a

single computation is late, it is not usually significant, although repeated late computation can
result in system failures. An example of such a system includes airlines reservation systems.
FIRM: This is a combination of both hard and soft timeliness requirements. The
computation has a shorter soft requirement and a longer hard requirement. For example, a
patient ventilator must mechanically ventilate the patient a certain amount in a given time
period. A few seconds delay in the initiation of breath is allowed, but not more than that.
One needs to distinguish between on-line systems such as an airline reservation system,
which operates in real-time but with much less severe timeliness constraints than, say, a
missile control system or a telephone switch. An interactive system with better response time
is not a real-time system. These types of systems are often referred to as soft real time
systems. In a soft real-time system (such as the airline reservation system) late data is still
good data. However, for hard real-time systems, late data is bad data.
Most real-time systems interface with and control hardware directly. The software for such
systems is mostly custom-developed. Real-time Applications can be either embedded
applications or non-embedded (desktop) applications. Real-time systems often do not have
standard peripherals associated with a desktop computer, namely the keyboard, mouse or
conventional display monitors.

1.1.2 Embedded system

An embedded system is a combination of computer hardware, software and electromechanical parts tailored for a dedicated single or combinations of functions. The end user
cannot program it. A user can make choices concerning functionality but cannot change the
functionality of the system by adding / replacing software. Embedded systems do not provide
standard computing services and normally exist as part of a bigger system. A computerized
washing machine is an example of an embedded system where the main system provides a
non-computing feature (washing clothes) with the help of an embedded computer. Embedded
systems are usually constructed with the least powerful computers that can meet the
functional and performance requirements. This is essential to lower the manufacturing cost of
the equipment.
With an embedded system, the hardware can be identified but the software that really
supplies the systems functionality can be hidden and more difficult to analysis. The software
is already burnt into the on-chip memory and is effectively impossible to access. Other

components of the embedded system are similarly chosen, so as to lower the manufacturing
cost.
Some systems are mission critical systems which are hard real-time systems whose failure
can cause catastrophic results. The best way to deal with this situation is the use of Real-time
Embedded systems. In most of the real-life applications, real-time systems often work in an
embedded scenario and most of the embedded systems have real-time processing needs. Such
software is called Real-time Embedded Software systems.
In our project we went for the design of such kind of embedded systems by using an FPGA as
our main processing block and implementing the characteristic features of an FPGA in the
development of single purpose specifically designed embedded platforms.

1.2 FPGA technology

Field Programmable Gate Array (FPGA) technology continues to gain momentum, and the
worldwide FPGA market is expected to grow to $3.5 billion USD by 20131. Since their
invention by Xilinx in 1984, FPGAs have gone from being simple glue logic chips to actually
replacing custom application-specific integrated circuits (ASICs) and processors for signal
processing and control applications. Why has this technology been so successful? This part
provides an introduction to FPGAs and highlights some of the benefits that make FPGAs
unique.

1.2.1 What is an FPGA?

At the highest level, FPGAs are reprogrammable silicon chips. Using prebuilt logic blocks
and programmable routing resources, we can configure these chips to implement custom
hardware functionality without ever having to pick up a breadboard or soldering iron. We
develop digital computing tasks in software and compile them down to a configuration file or
bitstream that contains information on how the components should be wired together. In
addition, FPGAs are completely reconfigurable and instantly take on a brand new
personality when we recompile a different configuration of circuitry. In the past, FPGA
technology could be used only by engineers with a deep understanding of digital hardware
design. The rise of high-level design tools, however, is changing the rules of FPGA
programming, with new technologies that convert graphical block diagrams or even C code
into digital hardware circuitry.

FPGA chip adoption across all industries is driven by the fact that FPGAs combine the best
parts of ASICs and processor-based systems. FPGAs provide hardware-timed speed and
reliability, but they do not require high volumes to justify the large upfront expense of custom
ASIC design. Reprogrammable silicon also has the same flexibility of software running on a
processor-based system, but it is not limited by the number of processing cores available.
Unlike processors, FPGAs are truly parallel in nature, so different processing operations do
not have to compete for the same resources. Each independent processing task is assigned to
a dedicated section of the chip, and can function autonomously without any influence from
other logic blocks. As a result, the performance of one part of the application is not affected
when we add more processing.

1.2.2 Main Benefits of FPGA Technology

Performance: Taking advantage of hardware parallelism, FPGAs exceed the
computing power of digital signal processors (DSPs) by breaking the paradigm of sequential
execution and accomplishing more per clock cycle. BDTI, a noted analyst and benchmarking
firm, released benchmarks showing how FPGAs can deliver many times the processing
power per dollar of a DSP solution in some applications. Controlling inputs and outputs (I/O)
at the hardware level provides faster response times and specialized functionality to closely
match application requirements.
Time to market: FPGA technology offers flexibility and rapid prototyping capabilities
in the face of increased time-to-market concerns. We can test an idea or concept and verify it
in hardware without going through the long fabrication process of custom ASIC design. We
can then implement incremental changes and iterate on an FPGA design within hours instead
of weeks. Commercial off-the-shelf (COTS) hardware is also available with different types of
I/O already connected to a user-programmable FPGA chip. The growing availability of highlevel software tools decreases the learning curve with layers of abstraction and often offers
valuable IP cores (prebuilt functions) for advanced control and signal processing.
Cost: The nonrecurring engineering (NRE) expense of custom ASIC design far
exceeds that of FPGA-based hardware solutions. The large initial investment in ASICs is easy
to justify for OEMs shipping thousands of chips per year, but many end users need custom
hardware functionality for the tens to hundreds of systems in development. The very nature
of programmable silicon means We have no fabrication costs or long lead times for assembly.
Because system requirements often change over time, the cost of making incremental

changes to FPGA designs is negligible when compared to the large expense of repining an
ASIC.
Reliability: While software tools provide the programming environment, FPGA
circuitry is truly a hard implementation of program execution. Processor-based systems
often involve several layers of abstraction to help schedule tasks and share resources among
multiple processes. The driver layer controls hardware resources and the OS manages
memory and processor bandwidth. For any given processor core, only one instruction can
execute at a time, and processor-based systems are continually at risk of time-critical tasks
preempting one another. FPGAs, which do not use OSs, minimize reliability concerns with
true parallel execution and deterministic hardware dedicated to every task.
Long-term maintenance: As mentioned earlier, FPGA chips are field-upgradable and
do not require the time and expense involved with ASIC redesign. Digital communication
protocols, for example, have specifications that can change over time, and ASIC-based
interfaces

may

cause

maintenance

and

forward-compatibility

challenges.

Being

reconfigurable, FPGA chips can keep up with future modifications that might be necessary.
As a product or system matures, we can make functional enhancements without spending
time redesigning hardware or modifying the board layout.

1.3. Summary
This chapter briefly represents about real time embedded system concepts and it also gives an
introduction to FPGA technology .The advantages of using FPGA in real time embedded
system design are introduced in this chapter. However, more detail about design process will
be talk in next chapter.

Chapter 2

SYSTEM OVERVIEW

2.1 Introduction to football match demonstration system

The project is inspired by the real soccer game. The objective of the project is to develop a 5player soccer system using multiple FPGA boards. We have to design the hardware
architecture of the embedded system and software for the strategy to control how to move the
player in response to the position of all players and the ball. We also need to develop a server
to communicate with the two teams and display the progress of the game on VGA monitor.
The project is carried out on a Xilinx Spartan- 3E FPGA board from Digilent. The board
features a Xilinx Sparten-3E Start Kit with about 500k gates that can be reprogrammed. We
also offer a number of Input/ Output options to interface with other peripherals. Some of the
relevant I/O ports are two serial terminals (UART) and a VGA port. The serial port (UART)
is used in the project to connect with other FPGA boards, update information will be
transmitter and receiver from clients to server and invert. The VGA port is used to display the
progress of the game on an external screen with frequency of 25Hz.
The project is set up as shown in Figure 2-1. As can be seen, the entire setup requires three
FPGA boards - One for the server which displays the game in frequency of 25Hz and also
referees the game. Two clients for develops strategy to control the movement of players. The
teams send updates of player movements to the server periodically. More details on the tasks
are explained following.

Player movement of
team B
- Speed of player
- Direction of player

Player movement of
team A
- Speed of player
- Direction of player

Information
- Player position
- Ball position
- Goal or fault information
Figure 2-1: System overview.

A, Server tasks
The server carries out the tasks that are expected of the referee and simulate the process of
the game. Details of these tasks are provided below.
- Receive initial player co-ordinates from clients. In the initial time of the game start, clients
send initial position to the server and this information has to be processed by the server to
sure that none of player has the same position with other.
- Receive player movement updates from team - no positions, only speed and direction.
- Receive 'kick' information from the teams. When a player is close enough to the ball, it may
want to kick the ball in a particular direction. This information has to be received and
processed by the server.
- Send ball's position, direction and speed of movement.
- Send teams players' positions. Please note that the speed and direction of players is not sent
by the server since that may reveal the strategy of the other team. The server only sends the
information that is generally available to the other team in a real game.

- Referee the game. Server decides is the goal valid or not and server also makes some
punishment if player breaks the rule.
- Display the field and the flayers moving at 25Hz. The physical laws have to be respected by
the server as well. Some physic theories are going to process when a collision occurs.
B, Client tasks
- Send initial co -ordinates for all players. In the initial time of the game start, clients send
initial position to the server. If collision occurs clients will send initial position again.
- Send player movement updates. It is important to note that the client does not send the
actual positions of the players during the game, as this may result in some unrealistic
movements, e.g. the client may move a player from the center of the field to near the goal
instantly. The client, therefore, only sends the direction towards which the player intends to
move and the speed at which the movement is desired.
- Receive position of ball and players of both teams.
- Develop strategy for player movement by considering position of ball and all players.

2.2 System Analysis

The entire project setup requires three FPGA boards. However, there are not much different
between hardware in client and server so both client and server will use the same hardware
architectures. We propose the hardware consist of seven components: microblaze, bram
controller, vga controller, uart, gpios, timer, interrupt controller. We used Xilinx Platform
Studio (XPS) tool of Xilinx to build this system. Besides that, we also used VGA-2.1 IP core
(was build and developed by Smart Integrated Systems Laboratory - University of
Engineering And Technology). Hardware architecture was summarized in figure 2.
System consists of:
* MicroBlaze
* BRAM Controller
* VGA Controller
* Interrupt controller

* UART(Lite)
* GPIO
* Timer/Counter

Figure 2-2: Hardware architecture.

2.2.1. General Purpose Input Output

Button North (U4) in FPGA kit is used in both client and server. Press north (U4 button) in
client to notices that client is ready to start and send initialize information to server. Press
north (U4 button) in server to start the game. Therefore, some led in board also is used to
illustrate score or fault.

2.2.2 VGA controller

Figure 3 shows the layout of the ground to be displayed by the server. The VGA controller
was developed by Key Laboratory Smart Integrated Systems - University of Engineering and
Technology supports a maximum resolution of 640x480 pixels with 3-bit color depth. This
was taken into consideration when designing the field and also the size of players and the
ball. We attempted to make the relative sizes as realistic as possible. So the result is showing
below:
- Field: 105m by 68m - 600x400 pixels, 20x20 triangles cut off on all corners. Please note
that the co-ordinate value of player and ball will be from (20, 0) to (620, 400) as in the real
screen.
- Ball: 5- pixels radius circle
- Players: 7- pixel radius circle -Two different colors for player1 and player2. And 80 pixel
score area at the bottom of the screen was reserved for displaying score and foul information

Figure 2-3: Football ground.

2.2.3 Universal Asynchronous Receiver Transmitter

Server needs both RS232 DTE and DCE to transmitter and receiver information to clients.
Clients only need ether RS232 DTE or RS233 DCE. We need to configure UART to ensure
no packets are lost. We fix the baud rate of all serial ports to be 115,200 bps. When sending
(or receiving) the 32-bit packet into bytes, the most significant byte is sent (received) first.
For example 32-bit data to be send is 0x12345678, then 0x12 should be sent first, followed
by 0x34, 0x 56, 0x78 in that order.
A, Player to server communication.
Two kinds of data packets are sent from the player board to server board. At the start of a
game, player boards send packets that specify the team-id, player-ids, and the initial
coordinates of all players to the server. We allocated four bits for the player-id so that more
players can be easily accommodates in the future versions of the project. The server does not
start the game until it has received the details of players from both teams. Once the game has
started, the player boards send update packets to the server board that indicate the speed and
direction of individual players of their team. Players can either move or kick the ball in any of
the 8 predefined directions .The speed of a player can have 11values representing a range of
speed from 0 to 50 pixels per second, while the speed range of the ball is larger with 16
values ranging from 0 to 100 pixels per second. Two tables below summarize player to server
packet.

Table 2-1: Initial pack

Information
Packet Type
Team ID

Number of bits
1 initialize packet
0 team A

Player ID
X_position
Y_position

1 team B
4 bits
10 bits
10 bits

Table 2-2: Update packet

Information
Packet Type
Kick/ movement

Number of bits
0 update packet
1 kick

Team ID

0 movement
0 team A

Player ID
Direction
Speed

1 team B
4 bits
4 bits
4 bits

B, Server to Player Communication

The server board sends two kinds of packets to the player board: the update packet and the
control packet. The update packets to each board contain information about the current
position of players as well as of the ball. In case of a foul or a goal, the server transmits a
control packet that indicates the type of event and the team responsible for the event. Table 13 summarize server to player packets.

Table 2-3: Information packet from server to clients

Information
Info/ Control

Number of bits Information

0 info
Direction

Number of bits
4 bits

1 control
Team ID
Player/ Ball

1 bit

X_position(ball) 10 bits
Y_position(ball) 10 bits

Player ID
4 bits
X_position(player) 10 bits
Y_position(player) 10 bits

Speed

4 bits

Team ID

0 team A

Foul/ Goal Bit

1 team B
1 Foul
0 Goal

2.2.4 Timer and Interrupt

A, Timer
System will be updated after each 0.04s (25Hz) so we used timer to create 0.04s periods.
After 0.04s, interrupt will be occurred and we will transmitter, received data to update new
information and display the game.
We use 32-bit timer and the frequency of the system is 50MHz so the initial value of time is
0xFFFFFFFF-50000000*0.04 = 422967295(0x7FFFFFFF).
B, Interrupting
When transmitting or receiving process finish the UART interrupt will be occurred. We must
make sure that Timer interrupt and Uart interrupt is enabled and global interrupt has been set
high.

2.3. Summary
This chapter has represented the system overview. Next chapter will present the process in
design hardware platform using Embedded Development Kit 12.1 Tool.

Chapter 3

SYSTEM DESIGN

3.1 Creating an Embedded Hardware System

In order to design an embedded processor system, a hardware platform has to be first created.
A hardware platform consists of processors, buses and peripherals connected to the
processors. Now, we provide a step-by-step procedure to generate a simple hardware system
using Xilinx EDK 10.1. This involves assembling a system that contains a processor along
with buses and peripherals, generating an HDL netlist, and implementing the design using
ISE implementation tools to generate a bitstream.

3.1.1 Create a new XPS project

To begin, start the XPS application form Start-> Programs->Xilinx Embedded Development
Kit 10.1 -> Xilinx Platform Studio.
When XPS opens, select File ->New Project ->Base System Builder. In the dialog box,
specify the location at which we want to create our XPS project. An XPS project file has
.xmp extension, and our XPS project resides in the directory where the XMP file resides.
Once we have specified an XMP file location, click OK, Refer to Figure 3.1 and 3.2 below
for reference.

Figure 3-4: Base System Builder Wizard.

Figure 3-5: Name of My Project.

3.1.2 Select a target board

Once we click OK in the previous step, the XPS brings up its Base System Builder (BSB)
Wizard. We will now see the following screen asking for the board details. The board we are
using is Xilinx Spartan 3E Start Kit (http://www.digilentinc.com/Products/Detail.cfm?
NavPath=2,400,790&Prod=S3EBOARD) manufactured by Digilent Inc. It contains Xilinx
Spartan XC3S500E FPGA. To understand more, we can download the details from the above
website. It is important to understand more about the feature of the FPGA and the board in
terms of the available DDR memory, number of Logic Gates, Block Ram modules etc
because this information is critical while creating a hardware design on the board. Xilinx
Embedded Development Kit 12.1 no longer support for Spartan-3E Starter so we select I
would like to create a system for a custom board and Board information can be choose as
Figure 3-3 bellow

Figure 3-6: Select Target Board.

3.1.3 Select the processor to be used

We will be provided with an option to create a single processor system or dual processor
system as shown. For this project, we are developing a single Microblaze core based
processor system. We can see this option selected by default. Click NEXT to continue.

Figure 3-7: Select Processor to Be Used.

3.1.4 Configure the processor

In the next screen as shown, we will configure the processor memory and speed. We can
select the speed of 50MHz as system clock frequency and 64KB memory as the local
memory Click NEXT to continue.

Figure 3-8: Configure the processor.

3.1.5 Add or remove external peripherals

In this screen, we are given the option to add or remove external peripherals to/from the
system. For this project, we will add peripherals later. Click NEXT to continue.

Figure 3-9: Add or Remove External Peripheral.

If we want to speed up access to a particular memory device (perhaps DDR_SDRAM), then

we can associate the cache to that memory. Since we do not require caches in this system, we
will not enable caches in this system. Click NEXT to continue.
Finally, we are at the summary screen. We can see the names of peripheral and the memory
addresses to which each peripheral is mapped. Click FINISH to generate our system.

Figure 3-10: Summary Screen.

Once the system is generated, we will see the above screen. Now we add external peripheral
to the system. For this project, we require the peripherals: DDR_SDRAM, xps_intc_0,
Buttons_4Bit, , LEDs_8Bit, xps_timer_1, RS232_DCE, RS232_DTE.

3.1.6 Add peripherals

To add peripherals in a new, empty project or to an existing project, select IP Catalog tab in
XPS (1), Expand group(s) of IP in the left window (2), Select an IP and drag it to the System
Assembly View window or double-click on the selected IP to be included into the system
MHS file(3)

Figure 3-11: Add Peripherals.

3.1.7 Making bus connection

Select Bus Interface tab (1), Expand Peripherals in System View and click under Bus
Connection column, and select a bus instance to which it needs to connect (2), in this case we
choose mb_plb bus.

Figure 3-12: Making Bus Connection.

3.1.8 Assigning addresses

Microblaze communicates with external devices through registers of memories at specific
address range
Select Addresses filter (1), Click in the size column and select desired size (2), Enter base
address, XPS will calculate the high address from base address and size entries (3) or instead
of entering base address, lock addresses of instances for which we dont want XPS to change
address and then click Generate Addresses button (4).

Figure 3-13: Assigning Addresses.

3.1.9 Parameterize IP instances

We set a GPIO to a 4-bit input to connect to the 4 DIP Switches on the Board. We double
click the instance of right click on the instance and select Configure IP to list the configurable
parameters (1). Then we enter new values GPIO Data Channel Width = 4 (2).

Figure 3-14: Parameterize IP instances.

3.1.10 Connecting ports

We select Port filter (1), Click on plus sign to see available ports and then click under the Net
column and select appropriate signal. If the port is external in the design then make it
external. Verify the external pin entry in the External Ports section.

Figure 3-15: Connecting Ports.

3.1.11 Make pin assignments

We double-click the system .ucf under the Project tab and then we enter the pin location
constraints (refer to the board user manual). For more information about constraints, we can
read Spartan 3E FPGA Start Kit Board User Guide.

Figure 3-16: Make Pin Assignments.

That is the process for adding GPIO intellectual property core. We will do the same for the
other IP core. Once finish adding IP, we will see the above screen.

Figure 3-17: Final Screen.

To generate the hardware, we can select the Generate Bitstream from the menu bar or the
toolbar. This will take some time to complete. We have successfully completer hardware
design on FPGA. We can see that, just some click we have successfully build a hardware for
football match demonstration system. Software design will be described in next.

3.2 Develop the Software Platform

Now to develop the software platform by Xilinx Software Development Kit once we finish
developing the hardware base system, first of all we need to export our hardware platform
from Xilinx Platform Studio to Xilinx Software Development Kit: Go the Project of menu
bar, then select Export Hardware Design to SDK. Then select Export & Launch SDK as
shown below:

Figure 3-18: Export & Launch SDK.

After the Workspace is launched, we will see the screen for choosing the workspace folder to
be same as where our hardware system is located for simplicity. Once the SDK is launched,
we can see the following screen

Figure 3-19: EDK Start Screen.

To create a new board support package for software application development in SDK, do the
following:
1. Click File -> New -> Xilinx Board Support Package
2. In the project name field, type a name for the board support package such as
soccer_server.

3. From the Board Support Package OS drop-down list, select the type of board support
package to create. A description of the platform types displays in the box below the
drop-down list. In this field, we choose Xilkernel ( Xilkernel is a simple and
lightweight kernel that provides POSIX style services such as scheduling, threads,
synchronization, message passing and timers. The kernel requires a programmable
timer that is either built-in or attached to the processor as a peripheral)
4. Click Finish. The wizard creates a new software platform and displays it in the SDK
Navigator pane.

Figure 3-20: Xilinx Board Support Package Selection.

We now will configure the Xilkernel OS for our system. Select xilkernel under Overview
and then change the following parameters under the xilkernel subsection:
Systimer_spec:

Systmr_dev : xps_timer0

Sysmr_freq : 50000000

Systmr_interval : 100

Config_time : true
Stdin: RS232 DCE
Stdout RS232 DCE
Sysintc_spec : xps_intc_0

We still have to configure the thread management and scheduling parameters of the OS as
well. Set the following configuration:

Config_pthread_support : true(default)

Config_sched : true(default)

Sched_type : SCHED_PRIO

n_prio

max_readyq : 10(default)[3]

: 32(default)

Figure 3-21: Board Support Packet Settings.

In the main.c file, we will see a call to the XilKernel called xilkernel_main () in the
function main. When CPU starts executing this kernel, the functionmain_thread() in
the source code has to start execution. We need to configure a thread that starts this
function in Xilkernel. To do this, under the subsection config_pthread_support, select
static_pthread_table and then do a single click on its Current Value space. A window
opens up where we will add the thread calling function to be ((main_thread, 0)). The
numeric digit 0 after the comma is used to set the priority of function main_thread
(). Setting the priority to be 0 ensures that this thread gets the highest among all
threads. By doing these settings, we ensure that main_prog() get executes first and
thus can start new threads as required.

We have now completed configuring the system for priority scheduling. Now we
develop a program using Xilkernel. This program will have three threads.
-

Strategy thread: Strategy thread will generate strategy for players by controlling
speed and direction of them. Each player has their own different strategy
.However, they have to communicate with other players to get the final purpose
kick a goal. Strategy thread will read the coordinate pair of all player and ball and
return the speed, direction of players.

Simulation thread: Simulation thread will check if player came into collision with
ball or player. Simulation thread will read the coordinate pair of all player, ball
and if collision is occurred this thread will return the new speed, direction of
players to avoid two players or players and ball move on top of each other.

Display thread: Display thread will display the game. It will read the position and
direction of players, ball and draw a color filled circle, of radius 7 pixels for
players and 5 pixels for ball, with its center located at coordinate (x, y) into
screen (620x480).

3.2.1 Strategy thread

In this part, strategy is represented by changing the movement (speed, direction) and action
(support, kick) of players. As system requirements, players and ball have to move in 16
directions corresponding to 16 integer numbers from 0 to 15. However, odd directions 1, 3, 5,
7, 9, 11, 13, 15 makes calculation encountered many difficulties. Therefore, we decided to not
use those directions. We only used directions 0, 2, 4, 6, 8, 10, 12, 14. Following, we describe
some strategy which has been developed.
3.2.1.1 Move to target[5]
int move_to_target(int player_num, VGA_U32 x, VGA_U32 y).
Parameters
int player_num : define the player will do this action
VGA_U32 x

: the x target position player will move to.

VGA_U32 y

: the y target position player will move to.

Return
Return integer number demonstrate that the function work correctly or not.

This function is used to move player to any position in the football ground. The algorithm of
this function will be described following.
First of all, we calculate delta_x and delta_y between the coordinate of target and the
coordinate of player .From that function is divided into four cases corresponding to four
position of ball compare with player. If delta_x =0 or delta_y =0, player move in one of 0, 4,
8, 12 directions until it reach the target coordinate. If delta_x # 0 and delta_y # 0, and
delta_x==delta_y, player move in one of 2, 6, 10, 14 directions until it reach the target
coordinate. If delta_x # delta_y. We will divide the movement of player into two parts. We
compare the distance of x coordinate and y-coordinate between player and the target position
(delta x, and delta y) to decide the first target and move in one of 2, 6, 10, 14 directions until
it reach the first target and move in one of 0, 4, 8, 10 until it reach the final target.
For example, we are going to talk one of those four cases- ball stays in the IV quadrant
compare with player.
Case 1: In figure 4-case1, if the target position is in one of 4 direction players will go directly
to the target
Case 2: In figure 4-case2, if the target position isn't in one of 4 direction player. We will
divide the movement of player into two parts. As an example in figure 5 we will go to the 2direction until the y-coordinate value of player equal to y-coordinate value of ball and the
second part, we will go to the 0 direction until the x-coordinate value of player equal to xcoordinate value of ball.

Figure 3-22: Move_to_target function.

3.2.1.2 Dan_bong
int dan_bong(int player_num, VGA_U32 x)

Parameters
int player_num : define the player will do this action
VGA_U32 x

: the x target position player and ball will move to.

Return
Return integer number demonstrate that the function work correctly or not.
This function is used to dribbling to x target position in the football ground. By kicking the
ball will small force and following the ball, the ball will always in controls of player. The
algorithm of this function will be described following.
First of all, we check three forward direction of player to find out any obstacles-player.
If there arent any obstacles-player in the 0 direction, player will dribble in the 0 direction. If
there are obstacles-player in the 0 direction, and there arent any obstacles-player in the 2
direction player will dribbling in the 2 direction. If there are obstacles-player in the 0 and 2
direction, and there arent any obstacles-player in the 14 direction player will dribbling in the
14 direction. The figure following describe this function.

Figure 3-23: Dan bong (dn bng).

3.2.1.3 Chuyen_bong
int chuyen_bong(int player_num1, int player_num2)
Parameters
int player_num1 : define the player will do this action

int player_num2: the player target who will get the ball from player_num1.
Return
Return integer number demonstrate that the function work correctly or not.
The main task of this function is to pass the ball. Player1 will calculate, estimating and take
action to pass the ball as closest as possible to player2.
The algorithm of this function will be described following.
First of all, we will calculate the distance between player1 and player2. From this number, we
can find out the force of player1. Table 3-1 shown us the relation between distance and the
speed of player1.

Table 3-4: Distance and corresponding speed of player 1

Distance

Player 1 speed

Distance >=450

45

distance <450 && distance >= 360 40

distance <360 && distance >= 280 35
distance <280 && distance >= 210 30
distance <210 && distance >= 150 25
distance <150 && distance >= 100 20
distance <100

15

After that, we calculate delta_x and delta_y between the coordinate of player2 and the
player1. From this number, we can get the direction of player1 as the table 3-2

Table 3-5: Relationship between delta and direction of player 1

Delta_x and delta_y

player[player_num1].dir

if ((delta_x >= 0) && (delta_y > 0)) {

if (2*delta_x <delta_y)

if ((delta_x >= 0) && (delta_y > 0)){

if (2*delta_x >=delta_y && delta_x <= 2*delta_y)

else

if ((delta_x >= 0) && (delta_y <= 0)) {

12

if (2*delta_x <delta_y )
if ((delta_x >= 0) && (delta_y <= 0)) {

14

if(2*delta_x >=delta_y && delta_x<=2*delta_y)

Else

Sum of two elements: force and direction of player1 will kick the ball move as closest as
possible to the player2.
3.2.1.4 Goal
int goal3(int player_num)
Parameters
int player_num1 : define the player will do this action.
Return
Return integer number demonstrate that the function work correctly or not.
This function read the coordinate of player and calculates the best suitable direction and force
to kick the ball to the goal. The algorithm of this function will be describe following
If player.y_pos>=170 && player.y_pos<=230 player will kick the ball in 0 direction. Else if
player.y_pos <170 player will kick the ball in 2 direction. Else if player.y_pos>230 player
will kick the ball in 14 direction. The algorithm of goal function is shown in Figure 3-20.

Figure 3-24: Goal function.

From 4 basic strategy functions we build individually strategy for 5 players. The formation of
our team can be seen in Figure 3-21. It consist of
-

1 goalkeeper.
2 defender and also midfielder
2 attacker

Figure 3-25: Formation.

3.2.1.5 Goalkeeper
int thumon(int player_num)
Parameters
int player_num : define the player will do this action.
Return
Return integer number demonstrate that the function work correctly or not.
This function read the coordinate of player, ball and control the action of goalkeeper to
protect the goal. The algorithm of this function will be described following.
If the ball move into goal area goalkeeper will move forward and kick the ball out of goal
area. Else if the y coordinate of ball <= 200, goalkeeper will oscillate between y_pos = 170
and y_pos = 200. Else if the y coordinate of ball> 200, goalkeeper will oscillate between
y_pos = 200 and y_pos = 230.

3.2.1.6 Defender
int cau_thu_so_2(int player_num, int player_num2)
Parameters

int player_num : define the player will do this action.

int player_num2 :define the player who get the ball from player_num.
Return
Return integer number demonstrate that the function work correctly or not.
This function read the coordinate of player, ball and control the action of defender. The main
task of defender is get the ball and pass it to attacker. Algorithm of this function will be
described following.
If the ball moves into action area of defender, Defender come and gets the ball. After the ball
in control area of defender, Defender will drift the ball forward until it reaches a certain x
coordinate. Defender will pass the ball to the nearest attacker.
3.2.1.7 Attacker
int cau_thu_so_4(int player_num)
Parameters
int player_num : define the player will do this action.
Return
Return integer number demonstrate that the function work correctly or not.
This function read the coordinate of player, ball and control the action of attacker. The main
task of attacker is score a goal. Algorithm of this function will be described following.
If the ball moves into action area of defender, Defender come and gets the ball. After the ball
in control area of defender, Defender will quickly drift the ball to the goal area and kick the
ball to the goal.

3.2.2 Simulation thread

Simulation thread is an important part of system. It read the information of ball, player. If
collision is occurred this thread will return the new speed, direction of players to avoid two
players or players and ball move on top of each other.
3.2.2.1 Player
- When the player move near sideline player[player_num].y_pos > 400 -PLAYER_RADIUS
or player[player_num].y_pos < PLAYER_RADIUS the x coordinate of players will equal to

zero. When the player move near goal line player[player_num].x_pos > 620 PLAYER_RADIUS or player[player_num].x_pos < 20 + PLAYER_RADIUS the delta_y
coordinate of players will equal to zero. We make sure that all players will move in football
ground area.
- When the collision occurs between two players. If a moving player comes in contact with a
stationary player, the moving player will increase direction to. In the case collision occurs
between two moving player, we calculate the delta direction between them. If delta_dir ==8,
each player will increase direction to 2 to avoid player move on top of another. If delta_dir!
=8, player with smaller direction will continue going and player with bigger direction will
stop until collision is no longer occurs. After collision, all players will get the initial speed
and direction.
When a moving player comes in contact with ball (delta <=15=5+7+3) player have full
permissions to control the ball.
3.2.2.2 Ball
When the moving ball comes in contact with side line or goal line or player the perpendicular
speed of the ball is reversed.
When a moving player comes in contact with a stationary ball, the ball gets twice the speed of
the player, and follows the player's direction. Kick is only allowed in the front direction of the
player. i.e. 8 or 9 out of 16 directions. The ball gets the new velocity and the player retains the
old velocity.
Ground Friction - This reduces speed of ball 10 pixels per sec per sec.

3.2.3 Display thread

Display thread is the most important part of system because it responses to display football
match process into the monitor. This thread read the information parameter of ball, players
and displays the movement of them into screen.
In this thread we have two function display_player and display_ball with the same algorithm
so we only describe display_player function.
int display_player(int player_num, int vacham, VGA_U8 COLOR)
Parameters
int player_num : define the player will do this action.

int vacham

: collision information get from simulation thread.

VGA_U8 COLOR: color of player who do this action.

Return
Return integer number demonstrate that the function work correctly or not.
This function read the coordinate pair, speed of player and calculate the new position of
player. However, there is a problem in here. New position coordinate may not an integer
number. So in each period, we add delta coordinate with previous delta coordinate until this
number become an integer number. So we can easily display them in pixel format.

3.3 Summary
This chapter focuses on the implementation of the proposed design in both hardware and
software. Hardware has been designed and built successfully in Spartan 3E kit. Software has
been developed and gotten some basic achievement.

Chapter 4

EXPERIMENTAL RESULTS AND

DISCUSSIONS

We build an application by right click on it and select Build Project. This will create an
*.ELF file (executable and linkable format).This file can be run on the Microblaze just like
*.EXE files on Personal Computer. So build the soccer application project like Figure 4-1
below.

Figure 4-26: Build Project.

We download the bit stream to the FPGA (or program the FPGA). Firstly, we need to connect
PC to the FPGA board using the programming cable. In this case, the programming cable is
the USB cable given with the kit. Secondly, we need to connect the VGA port of monitor to
the VGA of the FPGA board so as to observe the results from the FPGA board. Now I will
download my program by selecting Program FPGA and then click Program as shown in
Figure 4-2 below.

Figure 4-27: Program FPGA.

Once the download completed, go the Run option from menu bar and select Run
Configurations. Now select the memory_test_0 project and corresponding .elf file. Now
before run the program, to see the output on the console, from the STDIO connection tab of
above window select the option Connect STDIO Console. Set the drop down Port setting to
the correct COM port ID. Finally, we set to the default communication speed of 9600.Click
Run and our display output can be seen in VGA monitor.
It can be clearly seen that, in one side, Project has succeeded in designing a real time
embedded system server for displaying a 5-players football match using Embedded
Development Kit 12.1 of Xilinx. More specifically, the achievement of this project can be list
following. First of all, we have used Xilinx Platform Studio tool to build a complete hardware
system consist of some basic peripherals such as Timer, UART, GPIOs, Interrupt controller
and VGA-2.1 IP core (was build and developed by Smart Integrated Systems Laboratory University of Engineering And Technology). A complete hardware is shown in 4-3.

Figure 4-28: Hardware System.

Secondly, I have developed a software with real time operating system combined with
hardware have developed earlier, we have a complete system. Software architecture including
three threads: Strategy thread, Simulation thread and Display thread. Each of them
performing a specific task. In strategy thread, we have generated strategy for players by
controlling speed and direction of them. . Although this strategy is in the basic level, but the
player can perform some action like a player in real football match such as kick, pass and
dribble. Those function set the stage for the development of sophisticate strategy later. In
simulation thread, we will check if there are collisions between player, ball and sides of
football ground. Whenever a collision occurs, speed, direction of players and ball will be
changed to avoid overlap. In display thread, we have shown the evolution of the game into
screen. However, we do not meet the real time requirements 25Hz frequency update.
Following, we will show some simulation results

Figure 4-29: Simulation results.

CONCLUSION

From smart phones to medical equipment, from microwaves to antilock braking systems
modern embedded systems projects develop computing machines that have become an
integral part of our society. However, designing an embedded system nowadays becomes
quite challenging because of the increasing complexity as well as real-time requirements.
Especially, many embedded system developers are faced with tight time-to-market deadlines.
The product should be deployed when the demand for the product still exists, if the demand
ceases then the product would not yield any profit for the company. FPGA technology is an
effective solution for designing embedded system in this present age. It not only meets the
requirement of complexity, but it also helps us to reduce design time, thereby reducing
production costs and time to market. In other words, FPGA technology enhances market
competitiveness of the product [7].
In this work, I designed real-time embedded systems for demonstrating a football match 5player. Thereby, I understood the process of designing an embedded system using Embedded
Development Kit 12.1 tool kit of Xilinx. In next steps, I will finish some remain module such
as UART, TIMER and develop another strategy for team two. After that, I will hold a
competition between two teams to find out which team has a better strategy? . Further, the
project can be developed to a simple football game using keyboard controls.

References
[1]

Xilinx Inc., ISE Design Suite, Website:

[2]

http://www.xilinx.com/products/design-tools/ise-design-suite/index.htm .
Xilinx Inc., Products: Spartan-3E, Website:

[3]

http://www.xilinx.com/products/silicon-devices/fpga/xa-spartan-3e/index.htm.
Wiki.nus, Real-time Embedded Systems Labs Homepage:

[4]

http://wiki.nus.edu.sg/display/ee4214
Bbc.vnu.edu.vn, Real-time Embedded Systems Course

[5]
[6]

http://bbc.vnu.edu.vn
Final_report_v2, K54D University of Technology and Engineering.
B. Daya, Rapid pototyping of embedded systems using field programmable gate

[7]

arrays, Bachelor thesis of Science in Electrical Engineering, Spring 2009.

C. Wilhelmsson, Embedded Systems and FPGAs for Implementation of Control
Oriented Models, Department of Energy Sciences Lund University

[8]

Lund, November 2009

A. Kumar, S. Fernando and M. Manoharan, Bring Soccer to the Field of Real-

[9]

Time Embedded Systems Education

XILINX,Xilkernel, EDK 8.2i, June 23, 2006 Xilinx, Inc.