Weltrend Semiconductor, Inc.

WT7527
PC POWER SUPPLY SUPERVISOR

Data Sheet
Version 1.20
June 22, 2007

The information in this document is subject to change without notice.

Weltrend Semiconductor, Inc. All Rights Reserved.
242
2F, No. 24, Industry E. 9th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan
TEL:886-3-5780241 FAX:886-3-5794278.5770419
Email:support@weltrend.com.tw

WT7527
Rev. 1.20

GENERAL DESCRIPTION
The WT7527 provides protection circuits, power good output (PGO), fault protection latch (FPOB),
and a protection detector function (PSONB) control. It can minimize external components of switching
power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors VX, V33, V5, V12A and V12B input voltage level. The
Under Voltage Detector (UVD) monitors V33, V5, V12A and V12B input voltage level. The Over Current
Detector (OCD) monitor I33&V33, I5&V5, I12A&V12A and I12B&V12B input current sense. The pin VX
provides an extra protection function. When OVD or UVD or OCD or VX detect the fault voltage level,
the FPOB is latched HIGH and PGO go low. The latch can be reset by PSONB go HIGH. There is 4 ms
delay time for PSONB turn off FPOB.
When OVD and UVD and OCD detect the right voltage level, the power good output (PGO) will be
issue.

FEATURES

The Over Voltage Detector (OVD) monitors VX, V33, V5, V12A and V12B input voltage.
The Under Voltage Detector (UVD) monitors V33, V5, V12A and V12B input voltage.
The Over Current Detector (OCD) monitors I33&33, I5&V5, I12A&V12A and I12B&V12B input pins.
The VX > 1.2V provide an extra protection.
Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output.
75 / 600 ms time delay for UVD / OCD / VX .
300 ms time delay for PGO.
38 ms for PSONB input signal Debounce.
14 us for OVD internal signal Deglitch.
60 us for UVD / VX internal signal Deglitch.
20 ms for OCD internal signal Deglitch.
73 us for PGI internal signal Deglitch.
4 ms for PSONB turn-off FPOB.

PIN ASSIGNMENT AND PACKAGE TYPE

Pin assignment
WT7527
PGI

16

PGO

GND

15

VCC

FPOB

14

V5

PSONB

13

V33

I12A

12

V12A

RI

11

I33

I12B

10

I5

V12B

VX

Weltrend Semiconductor, Inc.

Page 2

WT7527
Rev. 1.20

ORDERING INFORMATION
Part Number
WT7527NN1601D
WT7527NN1611D
WT7527SN1601D
WT7527SN1611D

Package Type

Note

16-Pin Plastic DIP, Pb-free

16-Pin Plastic SOP, Pb-free

PIN DESCRIPTION
Pin Name
PGI
GND
FPOB
PSONB
I12A
RI
I12B
V12B

I/O
I
P
O
I
I
I
I
I

VX
I5
I33
V12A

I
I
I
I

V33
V5
VCC
PGO

I
I
I
O

Description
Power good input signal pin
Ground
Fault protection output pin, open drain output
On/Off switch input
12VA over current protection sense input
Current sense adjust input
12VB over current protection sense input
12VB over voltage & under voltage & over current sense input
pin
Extra protection sense input
5V over current protection sense input
3.3V over current protection sense input
12VA over voltage & under voltage & over current sense input
pin
3.3V over voltage & under voltage & over current sense input pin
5V over voltage & under voltage & over current sense input pin
Power supply
Power good output signal pin, open drain output

Weltrend Semiconductor, Inc.

Page 3

WT7527
Rev. 1.20

BLOCK DIAGRAM
WT7527-160
VCC

PWR

Power On Reset

PWR

VCCI

38ms
debounce

PSONB
1.2V ~ 1.8V

clr

4ms
delay

clr
VREF = 1.2V
V33

75ms / 600ms
delay

Bandgap
Reference

VREF = 1.2V

Internal
Power

VCCI = 3.6V

- UN

- OV

V5

- UN

PWR
- OV

V12A

OSC

- UN

- OV

clr
60us
debounce

V12B

CLK

- UN

- OV

clr
14us
debounce

VX

FPOB

- OV

clr
73us
debounce

PGI

I33

PGO

clr

300ms
delay

V12A

V12A

IREF * 8
V12A
VREF = 1.2V

V12A
I5

V12A

IREF * 8

clr
20ms
debounce

V12A
I12B

IREF=VREF / RI
RI

IREF * 8

I12A

IREF * 8

Weltrend Semiconductor, Inc.

Page 4

WT7527
Rev. 1.20

ABSOLUTE MAXIMUM RATINGS

Parameter
Min.
Max.
Supply voltage, VCC, V12A
0.3
16
VCC + 0.3Max. 7V
PGI, PSONB
V12A + 0.3Max. 7V
Input voltage
0.3
V5, I5, V33, I33
V12A + 0.3Max. 16V
I12A, V12B, I12B
VCC + 0.3Max. 7V
PGO
0.3
Output voltage
FPOB
0.3
16
Operating temperature
-40
125
Storage temperature
-55
150
*Note: Stresses above those listed may cause permanent damage to the devices

Unit
V
V
V
V
V
V

RECOMMENDED OPERATING CONDITIONS

Parameter
Supply voltage, VCC
Input voltage
Output voltage
Output sink current
Output current for RI

Conditions

PGI, PSONB, V5, V33

V12A, V12B
PGO
FPOB
FPOB
PGO
RI

Min.
3.8

Typ.
5

0.3V
0.3V
10

Max.
16
7
16
7
16
10
10
65

Unit
V
V
V
V
V
mA
mA
uA

ELECTRICAL CHARACTERISTICS, at Ta=25C and VCC=5V.

Over Voltage Detection
Parameter

Condition

V33
V5
Over voltage threshold
V12AB
VX
ILEAKAGE Leakage current (FPOB)
VOL Low level output voltage (FPOB)

Use UVD timing

V(FPOB) = 5V
Isink =10mA

Min.
3.8
5.6
13.5
1.176

Typ.
3.9
5.8
13.85
1.20
5

Max.
4.0
6.0
14.2
1.224
0.3

Unit
V
V
V
V
uA
V

PGI and PGO

Parameter
Under voltage threshold

Condition
V33
V5
V12AB

Input threshold voltage(PGI)

ILEAKAGE Leakage current(PGO)
VOL Low level output voltage(PGO)
Offset Voltage of OCP comparators

Min.
2.8
4.2
10.3
1.176

PGO = 5V
Isink =10mA

Typ.
2.9
4.4
10.65
1.20
5

Max.
3.0
4.6
11.0
1.224
0.3
6

Unit
V
V
V
V
uA
V
mV

PSONB
Parameter
Input pull-up current
High-level input voltage
Low-level input voltage

Condition
PSONB= 0V

Min.

Typ.
150

Max.

1.8
1.2

Weltrend Semiconductor, Inc.

Page 5

Unit
uA
V
V

WT7527
Rev. 1.20
TOTAL DEVICE
Parameter
Icc Supply current
Vcc operation start up voltage
Vcc under lockout voltage

Condition
PSONB= 5V

SWITCHING CHARACTERISTICS, at Ta=-40

~125

Parameter
Condition
PGI to PGO Delay Time
Td1
Td2
For 160
Short circuit Delay Time
Td2-1
For 161
PGO to FPOB Delay Time
Td3
Under Voltage Delay Time
Td4
Over Current Delay Time
Td5
Over Voltage Delay Time
Td6
VX Delay Time
Td7
PSONB De-bounce Time
Tb1
PGI De-bounce Time
Tb2

Min.

Typ.

3.2
2.8

3.4
3.0

Min.
200
49
392

Typ.
300
75
600

4
60
20
14
60
38
73

2
40
13
9
40
24
47

Max.
1
3.6
3.2

Unit
mA
V
V

Max.
400
100
800

Unit
mS
mS
mS
mS
mS
S
mS
uS
S
mS
S

6
81
27
19
81
52
100

APPLICATION CIRCUIT
+5VSB
+5V
WT752701

+5VSB

D1
1K

PGO
R4=100

PGI
+5VSB
10K

PGI

PGO

GND

VCC

FPOB

+5VSB

V5
+3.3V

R5=300
PSONB

PSONB

V33
+5V

0.01uF
I12A

V12A

22uF
R12, 1%

30K, 1%
RI

I33

I12B

I5

V12B

VX

22uF
R10, 1%

+12VA

22uF
R14, 1%

+12VB

22uF
R16, 1%

NOTE1The series resistor R5 at PSONB can not be omitted.R5 = 300 is suggested

NOTE2The series resistor R4 = 100 and diode D1 at PGO is suggested.

Weltrend Semiconductor, Inc.

Page 6

WT7527
Rev. 1.20

APPLICATION NOTE

When the load current increased, the voltage (VL) cross the inductor is increased.
And when inductor voltage exceeds the resistor voltage (VR), the OCP is active.
Sometimes power-on or load dynamics will cause false output of over-current detection. It can be
solved by connecting a capacitor between VS pin and IS pin. In typical case, C 0.47uF is suggested.

OCP point can be calculated by the following equation:

Let VR

= VL

R IR = RL IL

Q IR = 8 IREF = 8

R =

VREF
RI

RL IL
VREF
8
RI

For example
Assume RI=30K, RL=5m, OCP IL=20A.
SolR

= ( IL * RL ) / ( 8 * IREF )
= ( 20A * 5m) / { 8 * ( 1.2V / 30K)}
= 312.5

Weltrend Semiconductor, Inc.

Page 7

WT7527
Rev. 1.20

APPLICATION TIMMING
1.) PGI (UNDER_VOLTAGE)

PSONB
td3
FPOB

tb1

td1+tb2

td1+tb2

PGO

tb1

PGI
tb2

Weltrend Semiconductor, Inc.

Page 8

WT7527
Rev. 1.20

2.) V33, V5, V12 (UNDER_VOLTAGE) or I33, I5, I12 (OVER_CURRENT) or

VX (OVER_VOLTAGE)

PSONB
td3
FPOB

tb1

td1+tb2

PGO

tb1

V33/V5/V12
I33/I5/I12/VX
td2=75mS
PSONB
td2+td4 / td5 / td7
FPOB

td3

tb1

tb1

td1+tb2

PGO

tb1

PGI
V33/V5/V12
I33/I5/I12/VX
td2-1=600mS

PSONB

tb3

td2-1+td4 / td5 / td7

FPOB

tb1

tb1

PGO

td1+tb2
tb1

PGI
V33/V5/V12
I33/I5/I12/VX

Weltrend Semiconductor, Inc.

Page 9

WT7527
Rev. 1.20

3.) V33, V5, V12 (OVER_VOLTAGE)

PSONB
td3
FPOB

tb1

td1+tb2

PGO

tb1

V33/V5/V12

PSONB
td6
FPOB

tb1

td3
tb1

PGO

td1+tb2
tb1

V33/V5/V12

Weltrend Semiconductor, Inc.

Page 10

WT7527
Rev. 1.20

MECHANICAL INFORMATION
PLASTIC DUALINLINE PACKAGE

NOTE 1All linear dimensions are in inchesmillimeters.

NOTE 2This drawing is subject to change without notice.
NOTE 3Falls within JEDEC MS001

Weltrend Semiconductor, Inc.

Page 11

WT7527
Rev. 1.20

PLASTIC SMALLOUTLINE PACKAGE

NOTE 1All linear dimensions are in inchesmillimeters.

NOTE 2This drawing is subject to change without notice.
NOTE 3Falls within JEDEC MS012

Weltrend Semiconductor, Inc.

Page 12