06ESL37 Analog Electronics Lab MANUAL

A LAB MANUAL ON
ANALOG ELECTRONICS
Subject Code: 10ESL37
(As per VTU Syllabus)
CONTENTS
EXPT.
NO.
NAME
OF THE
EXPERIMENT
PAGE
NO.
01
Half wave, full wave and bridge rectifier
01
02
Clamping circuits
10
03
Clipping circuits
16
04
RC coupled amplifier using BJT and FET
23
05
Hartley oscillator / Colpitts oscillator
31
06
Crystal oscillator
38
07
RC phase shift oscillator
41
08
Voltage series feedback amplifier using BJT
45
09
Thevenins theorem and maximum power transfer

theorem
51
10
Series and parallel resonance circuits.
55
11
Darlington emitter follower.
59
12
Class-B push pull power amplifier.
63
13
Bibliography
65
14
Vivo-voce questions
66
Analog Electronics Laboratory Manual - 10ESL37
Ex.No:01
HALF WAVE, FULL WAVE AND BRIDGE RECTIFIER

HALF WAVE RECTIFIER
AIM:
To study Half Wave Rectifier and to calculate ripple factor, efficiency and
regulation with filter and without filter.
COMPONENTS REQUIRED:
Sl. No.
Components Details
Specification
1.
Diodes
BY127
2.
Capacitor
0.1f, 470f
3.
Power Resistance Board
4.
Step down Transformer
5.
CRO, Multimeter, Milliammeter, Connecting Board
Qty
1 No.
Each 1 No.
1 No.
12 V
1 No.
THEORY:
Half wave rectifier circuit consists of resistive load, a diode and source of
ac voltage, all connected in series. In half wave rectifier, rectifying element
conducts only during positive half cycle of input ac supply. The negative half
cycles of ac supply are eliminated from the output. The dc output waveform is
expected to be a straight line but the half wave rectifier gives output in the form
of positive sinusoidal pulses. Thus the output is called pulsating dc.
CIRCUIT DIAGRAM:
HALF WAVE RECTIFIER WITHOUT FILTER CAPACITOR
Step down
Transformer
12V
Ammeter(0-250mA)
A
K
BY127
AC
(230V/50HZ)
C2
0.1UF
0
RL
VODC
VOAC
12V
Department of Electrical & Electronics Engg. NIT,Raichur
HALF WAVE RECTIFIER WITH FILTER CAPACITOR

Step down
Transformer
Ammeter(0-250mA)
12V
K
BY127
AC
(230V/50HZ)
C2
0.1UF
+
C1
RL
VODC
VOAC
470UF -
12V
DESIGN:
VINrms 12V
VINm
2VINrms 16.97V
VO DC Vm / 5.4V
Given
VO DC 5V
IO DC 100mA
R L VO DC / IO DC 50
Ripple = r = Vo rms / VO DC = 1.21

Design for the filter capacitor
Ripple = 1/(43 f C RL)
Given r = 0.25
C = 1/(43 f r RL)
RL = 50
f = 50Hz
Efficiency
= 461.88 F 470 F
2
2
= PDC /PAC
* (RL + RF)]
(I DC * RL) / [(Irms)
Regulation
VNL VFL
100
VFL
% Regulation =
PROCEDURE:
1.
Connections are made as shown in the circuit diagram
2.
Switch on the AC power supply
3.
Observe the wave form on CRO across the load resistor and measure the
o/p amplitude and frequency.
4.
Note down RL, IDC, VODC, VINAC, and VOAC in the tabular column for different
load resistances.
5.
Calculate the ripple and efficiency and Regulation for each load resistance.
6.
Repeat the above procedure with filter capacitor.
TABULAR COLUMN:
Sl.
No.
RL
IDC
VO (DC)
VIN
(AC)
VO (AC)
Ripple
Efficiency
Regulation
WAVEFORMS:
20
VIN
t
0
- 20
VO
Vo (Without Filter)
t
VC
Vo (with filter)
FULL WAVE RECTIFIER

AIM:
To study the full wave rectifier and to calculate ripple factor and efficiency
and Regulation with filter and without filter.
Sl. No.
Components Details
Specification
1.
Diodes
BY127
2.
Capacitor
0.1f, 470f
3.
4.
5.
Qty
2 Nos.
Each 1 No.
1 No.
12 V
1 No.
THEORY:
The center tapped full wave rectifier circuit is similar to a half wave
rectifier circuit, using two diodes and a center tapped transformer. Both the input
half cycles are converted into unidirectional pulsating DC.
CIRCUIT DIAGRAM:
FULL WAVE RECTIFIER WITHOUT FILTER CAPACITOR
Step down
Transformer
Ammeter(0-250mA)
12V
K
BY127
AC
(230V/50HZ)
C2
0.1UF
0
RL
A
VO(DC)
VO
(AC)
12V
BY127
FULL WAVE RECTIFIER WITH FILTER CAPACITOR

Step down
Transformer
Ammeter(0-250mA)
12V
K
BY127
AC
(230V/50HZ)
0.1UF
+
C1
A
12V
C2
RL
VO(DC)
VO(AC)
470UF -
BY127
DESIGN:
Vin rms = 12V
Vin m = 2Vin rms = 16.97V
VO DC = 2Vm/ = 10.8V
Given
VO DC = 10V
IO DC = 100mA
RL = VO DC / IO DC
= 100

Given r = .06
C = 1/(43 f r RL)
RL = 100
f = 50Hz
= 470UF
= PDC /PAC
Efficiency
Regulation
(I2DC * RL) / [(Irms)2 * (RL + RF)]
VNL VFL
100
V
FL
% Regulation =
PROCEDURE:
1.
Connections are made as shown in the circuit diagram
2.
Switch on the AC power supply
3.
Observe the wave form on CRO across the load resistor and measure the
4.
Note down RL, IDC, VODC

load resistances.
Vinac, Voac
in the tabular column for different
5.
Calculate the ripple and efficiency and regulation for each load resistance.
6.
Repeat the above procedure with filter capacitor.
TABULAR COLUMN:
Sl.
No.
RL
IDC
VO (DC)
VIN
(AC)
VO (AC)
Ripple
Efficiency
Regulation
WAVEFORMS:
t
VIN
0
-
VO
Vo (Without Filter)
t
VC
Vo (with filter)
BRIDGE RECTIFIER
AIM:
To study the bridge rectifier and to calculate ripple factor and efficiency and
regulation with filter and without filter.
Sl. No.
Components Details
Specification
1.
Diodes
BY127
2.
Capacitor
0.1f, 470f
3.
4.
5.
Qty
4 Nos.
Each 1 No.
1 No.
12 V
1 No.
THEORY:
The bridge rectifier circuit is essentially a full wave rectifier circuit, using
four diodes, forming the four arms of an electrical bridge. To one diagonal of the
bridge, the ac voltage is applied through a transformer and the rectified dc
voltage is taken from the other diagonal of the bridge. The main advantage of
this circuit is that it does not require a center tap on the secondary winding of
the transformer; ac voltage can be directly applied to the bridge.
The bridge rectifier circuit is mainly used as a power rectifier circuit for
converting ac power to dc power, and a rectifying system in rectifier type ac
meters, such as ac voltmeter in which the ac voltage under measurement is first
converted into dc and measured with conventional meter.
CIRCUIT DIAGRAM:
BRIDGE RECTIFIER WITHOUT FILTER CAPACITOR
Step down
Transformer
12V
Ammeter(0-250mA)
BRIDGE
1
AC
(230V/50HZ)
2 -
C2
0.1UF
+ 4
Vo
RL
12V
BRIDGE RECTIFIER WITH FILTER CAPACITOR

Step dow n
Transform er
12V
Am m eter(0-250m A)
BRIDGE
1
AC
(230V/50HZ)
C2
-A
0.1UF
+ 4
12V
C1
RL
Vo
470UF
DESIGN:
Vin rms = 12V
Vin m = 2Vin rms = 16.97V
VO DC = 2Vm/ = 10.8V
Given
VO DC = 10V
IO DC = 100mA
RL = VO DC / IO DC
= 100

Given r = .06
C = 1/(43 f r RL)
RL = 100
f = 50Hz
= 470UF
Efficiency
= PDC /PAC
= (I2DC * RL) / [(Irms)2 * (RL + RF)]
Regulation
VNL VFL
100
VFL
% Regulation =
PROCEDURE:
1. Connections are made as shown in the circuit diagram
2. Switch on the AC power supply
3. Observe the wave form on CRO across the load resistor and measure the
4. Note down RL, IDC, VODC
load resistances.
Vinac, Voac
in the tabular column for different
5. Calculate the ripple factor, efficiency and regulation for each load
resistance.
6. Repeat the above procedure with filter capacitor.
TABULAR COLUMN:
Sl.
No.
RL
IDC
VO (DC)
VIN
(AC)
VO (AC)
Ripple
Efficiency
Regulation
WAVEFORMS:
Vin
20
t
0
- 20
Vo
0
Vo (Without Filter)
t
Vo (with filter)
VC
t
RESULT:
Ex.No:02
CLAMPING CIRCUITS
AIM:
Design a clamping circuit for the given output.
Sl. No.
Components Details
Specification
Qty
1.
Diodes
BY127
1 No
2.
Capacitors
0.1 F
1 No
Signal generator, Cathode Ray Oscilloscope (CRO) with

Probes, Dual Power Supply, Connecting Board
THEORY:
A clamper is one, which provides a D.C shift to the input signal. The D.C
shift can be positive or negative. The clamper with positive D.C shift is called
positive clamper and clamper with negative shift is called negative clamper.
Consider a clamper circuit shown below.
0 .1 u
-
D 1
Vin
Vo
BY 127
In the positive half cycle as the diode is forward biased the capacitor charges to
the value VIN VD with the polarity as shown in the figure. In the negative half
cycle the diode is reverse biased. Hence the output is VO VIN VC .
Initially let us assume that the capacitor has charged to
VIN VD
i.e. (5 0.5) = 4.5V

Then in the positive half cycle diode is forward biased and applying KVL to
the loop,
Vin VC V0 = 0
When Vin = 0
V0 =Vin VC
V0 = 0 - 4.5 = - 4.5V
Vin = 5V
V0 = 5 4.5 = 0.5V
In the negative half cycle

When Vin = -5V
V0 = -5 4.5 = -9.5V
The output shifts between 0.5V and 9.5V.Here the output has shifted
down by 4.5V
The peak to peak voltage at the output of a clamper is the same as that of
the input.
10
CIRCUIT DIAGRAM AND DESIGN:

Given Vin = 10V (p-p)
A] In the positive half cycle:
Diode is forward biased.
Applying KVL to loop 1
Vin VC VD = 0
0 .1 u
VC = Vin VD
= 5 - 0.5 4.5V
D 1
Vin
In the negative half cycle:
Vo
BY 127
Vin VC V0 = 0
V0 = Vin VC
When Vin = 0
When Vin = 5V
V0 = - 4.5V
V0 =
0.5V
When Vin = -5V V0 = -9.5V

B]In the negative half cycle:
Diode is forward biased
0 .1 u
Applying KVL to loop 1
Vin + VC + VD = 0
Vin
VC = - ( Vin + VD)
BY127
D 1
Vo
VC = - (-5 + 0.5)
= 4.5V
In the positive half cycle:
Diode is reverse biased.
Apply KVL to the loop
Vin + VC V0 = 0
V0 = Vin + VC
When Vin = 0
V0 = 4.5V
When Vin = 5V
V0 = 5 + 4.5 = 9.5V
When Vin = - 5V
V0 = - 0.5V
11
C] Assume VR = 2V
Diode is forward biased.
Apply KVL to loop 1
Vin VC VD VR = 0
VC = Vin VD VR
0.1u
= 5 - 0.5 2
= 2.5V
D1 BY127
Vin
Vo
VR
Diode is reverse biased

Vin VC V0 = 0
V0 = Vin VC
When Vin = 0V
V0 = - 2.5V
When Vin = 5V
V0 = 2.5V
When Vin = -5V
V0 = -7.5V
D] Assume VR = 2V
0.1u
Diode is forward biased and the capacitor charges.

Apply KVL to loop 1
D1 BY127
Vin
Vin VC VD + VR = 0
Vo
VR
VC = Vin VD + VR
= 5 0.5 +2
= 6.5V
Vin VC V0 = 0
V0 = Vin VC
When Vin = 0V
V0 = - 6.5V
When Vin = 5V
V0 = - 1.5V
When Vin = -5V
V0 = - 11.5V
12
E]In the negative half cycle:

Assume VR = 2V
Diode is forward biased and capacitor charges.
Apply KVL to the loop1
Vin + VC + VD + VR = 0
0.1u
VC = - ( Vin + VR + VD)
= - (- 5 + 0.5 + 2)
= 2.5V
Vin
BY127
D1
Vo
From the fig. we see that
VR
Vin + VC V0 = 0
V0 = Vin + VC
When Vin = 0
V0 = 2.5V
When Vin = 5V
V0 = 7.5V
When Vin = -5V
V0 = -2.5V
F] VR = 2V
0.1u
Diode is forward biased and capacitor charges.

Apply KVL to loop 1
Vin
BY127
D1
Vo
VR
Vin + VC + VD - VR =0
VC = - ( Vin + VD - VR)
= - (- 5 + 0.5 2)
= 6.5V
From the circuit we see that,
Vin + VC - V0 =0
V0 = Vin VC
When Vin =0V
V0=6.5V
When Vin = 5V
V0= 11.5V
When Vin = - 5V
V0= 1.5V
PROCEDURE:
1. Rig up the circuit as shown in the circuit diagram.
2. Give a sinusoidal input of 10V peak to peak
3. Check and verify the output.
13
WAVEFORMS:
Vin
5V
- 5V
V0
0.5
0
[A]
- 4.5
- 9.5
V0
9.5
4.5
[B]
-
0
0.5
V0
[C]
2.5
0
t
- 2.5
- 7.5
14
V0
[D]
0
- 1.5
- 6.5
- 11.5
V0
7.5
2.5
[E]
- 2.5
V0
11.5
6.5
[F]
1.5
0
RESULT:
15
Ex.No:03
CLIPPING CIRCUITS
AIM:
Design a clipping circuit for the given values.
Sl. No.
Components Details
Specification
Qty
1.
Diodes
BY127
1 No
2.
Resistors
10 K
1 No
THEORY:
The process by which the shape of a signal is changed by passing the
signal through a network consisting of linear elements is called linear wave
shaping. Most commonly used wave shaping circuit is clipper. Clipping circuits
are those, which cut off the unwanted portion of the waveform or signal without
distorting the remaining part of the signal. There are two types of clippers
namely parallel and series. A series clipper is one in which the diode is
connected in series with the load and a parallel clipper is one in which the diode
is connected in parallel with the load.
CIRCUIT DIAGRAM AND DESIGN:
Assume Vin = 10V (Peak to Peak)
(a) Consider the circuit in fig. 1
(a)
Vin
D 1
BY127
In the positive half cycle D is forward biased
10k
Vo
10k
Vo
V0 = Vin 0.5 = 5 0.5 = 4.5 (0.5V is the diode drop)

In the negative half cycle D is reverse biased
V0 = 0V
(b) Consider the circuit in fig. 2
D 1
In the positive half cycle D is reverse biased

V0 = 0V
Vin
BY127
In the negative half cycle D is forward biased

Applying KVL to the loop
Vin + VD V0 = 0
V0 = Vin + VD = -5 + 0.5 = - 4.5V
16
(c) Consider the circuit in fig. 3

Given VR = 2.5V
In the positive half cycle
(i) When |Vin| > |VD + VR|, D is forward biased
Applying KVL, we get
D 1
Vin = VD + VR + V0
V0 = Vin VD VR
Vin
VR
BY127
10k
Vo
10k
Vo
V0 = 5 0.5 2.5
V0 = 2V
(ii) When |Vin| < |VD + VR|, D is reverse biased
V0 = 0V
In the negative half cycle, D is reverse biased
V0 = 0V
(d) Consider the circuit in fig. 4
Assume VR = 3V
In the positive half cycle, D is reverse biased
V0 = 0V
(i) When |Vin| > |VD + VR|, D is forward biased
D 1
Vin = - VD - VR + V0
V0 = Vin + VD + VR
VR
BY127
Vin
V0 = -5 + 0.5 + 3
V0 = -1.5V
(ii) When |Vin < |VD + VR|, D is reverse biased
V0 = 0V
17
(e) Consider the circuit in fig. 5

Assume VR1 = 2.5V and VR2 = 3V
In the positive half cycle, D2 is reverse biased
(i) When |Vin| > |VD1 + VR1|, D1 is forward biased
BY127
Vin = VD1 + VR1 + V0
VR2
D 2
V0 = Vin - VD1 - VR1

V0 = 5 - 0.5 2.5
Vin
B Y 1 2 7 D 21
V0 = 2V
10k
VR1
Vo
(ii) When |Vin < |VD1 + VR1|, D1 is reverse biased

V0 = 0V
Vin = - VD - VR + V0
V0 = Vin + VD2 + VR2
V0 = -5 + 0.5 + 3
V0 = -1.5V
(ii) When |Vin < |VD2 + VR2|, D2 is reverse biased
V0 = 0V
(f) Consider the circuit in fig. 6
During the positive half cycle, D is forward biased
V0 = VD = 0.5V
During negative half cycle, D is reverse biased
10k
B Y127
Vin
D 1
Vo
V0 = Vin
18
(g) Consider the circuit in fig. 7

During positive half cycle,
10k
D is reverse biased
V0 = Vin
Vin
D 1
BY127
Vo
During negative half cycle,

D is forward biased
V0 = -VD = -0.5V
(h)Consider the circuit in fig. 8
During positive half cycle
10k
(i) When |Vin| > |VD + VR|,

D is forward biased
D 1
BY127
Vin
Vo
V0 = VD + VR = 0.5 + 2.5
VR
V0 = 3V
(ii) When |Vin| < |VD + VR|, D is reverse biased
V0 = Vin
V0 = Vin
(i)Consider the circuit in fig. 9
Assume VR = 2.5V
During positive half cycle,
10k
D is reverse biased
V0 = Vin
During negative half cycle
D 1
BY127
Vin
(i) When |Vin| > |VD + VR|,
Vo
VR
-
D is forward biased
Applying KVL to the loop, we get
V0 = -VD - VR = - 0.5 - 2.5
V0 = -3V
(ii) When |Vin| < |VD + VR|,
D is reverse biased
V0 = Vin
V0 = Vin
19
(j) Consider the circuit in fig. 10

Assume VR1 = VR2 = 2.5V
During positive half cycle, D2 is reverse biased.
V0 = VD1 + VR1 = 0.5 + 2.5
V0 = 3V
10k
(ii) When |Vin| < |VD1 + VR1|,
D 1
BY127
D1 is reverse biased
V0 = Vin
D 2
BY127
Vin
Vo
VR1
Vo
VR2
1
(i)When |Vin| > |VD2 + VR2|, D2 is forward biased
Applying KVL to the loop, we get
V0 = -VD2 - VR2 = -0.5 - 2.5
V0 = -3V
(ii) When |Vin| < |VD2 + VR2|, D2 is reverse biased
V0 = Vin
(k) Consider the circuit in fig. 11
10k
Assume VR1 = 3.5V and VR2 = 2V

During positive half cycle
(i) When |Vin| > |VD1 + VR1|
D1
Vin
BY127
VR1
D1 is forward biased and
D2
BY127 Vo
VR2
V0 = VD1 + VR1 = 0.5 + 3.5
=4V
(ii) When |Vin| < |VR2 VD2|

D1 is reverse biased and
D2 is forward biased
V0 = -VD2 + VR2 = - 0.5 + 2 1.5V
D1 is reverse biased and D2 is forward biased
V0 = -VD2 + VR2 = - 0.5 + 2
V0 = 1.5V
PROCEDURE:
1. Rig up the circuit as shown in the fig.
2. Give a sinusoidal input of 10V peak to peak.
3. Check the output at the output terminal.
4. To plot the transfer characteristics, connect channel 1 of the CRO to
the output and channel 2 to the input and press the XY knob
5. Adjust the grounds of both the channels to the centre.
6. Measure the designed values.
20
WAVEFORMS:
Series Clipper
Vin
5
3
0
- 3.5
-5
Vo
Vo
4.5
Vin
(a)
t
Vo
Vo
(b)
Vin
- 4.5
Vo
2.0
(c)
Vin
Vo
(d)
-3.5
Vin
-1.5
Vo
2
(e)
-3.5
Vin
3
-1.5
21
Shunt Clipper
Vin
+5
0
+5
Vo
(f)
0.5
Vin
0.5
-5
Vo
4.5
(g)
Vin
0.5
Vo
VO
3
3.0
(h)
Vin
-5
Vo
+5
(i)
-3.0
Vin
-3
Vo
+3
(j)
Vin
3.0
-3
Vo
+4
1.5
(k)
Vin
RESULT:
22
Ex.No:04
RC COUPLED AMPLIFIER - BJT
AIM:
Design an RC coupled single stage BJT amplifier and determine its gain
and frequency response, input and output impedances.
Sl. No.
Components Details
Specification
Qty
1.
Transistor
SL100
1 No
2.
Capacitors
0.1 f , 47f
Each 1 No
3.
Resistors
22K, 4.7K, 1.2K, 330
Each 1 No
DC Supply, Signal Generator, CRO with Probe
Vcc = 12 v
CIRCUIT DIAGRAM:
Rc
R1
1.2 K
Cc
Vo
22K
0.1 f
CB
B
0.1 f
Vs
SL100
4.7K
330
R2
CE
RE
47 f
0
To Find Input Impedance
DRB
I/P
RC
COUPLED
AMPLIFIER
VOUT
To Find the Output Impedance
I/P
RC
COUPLED
AMPLIFIER
D
R
B
VOUT
23
DESIGN:
Given VCC = 12V, IC = 4mA, = 100.
RE: W.K.T. VRE = VCC / 10 = 12 / 10 = 1.2V ------for biasing
IE IC = 4 mA
From the fig. We see that,
IERE = VRE
RE = 1.2 / (4 x 10-3 ) = 300
Therefore RE 330
RC: VCE = VCC / 2 = 6V ----- for Q point to be in active region.
Applying KVL to output loop
VCC ICRC-VCE -VRE = 0
12 4 x 10-3 RC 6 -1.2 = 0
Therefore RC = 1.2k
R1 & R2: From biasing circuit
VB = VBE+ VRE
= 0.7 + 1.2
VB = 1.9V
Assume 10 IB flows through R1 and 9 IB flows through R2.
W.K.T. IC = IB
4 x 10-3 = 100 IB
Therefore IB = 40 A
From the fig. we see that,
R1 = VCC VB / 10 IB = 12 1.9 / (10 x 40 x 10-6 ) = 25.25k
Therefore R1 22k
R2 = VB / 9IB = 1.9 / ( 9 x 40 x 10-6 ) = 5.28k
Therefore R2 4.7k
CE, CC, CB : Let CB = CC = 0.1F
XCE = RE/10
Therefore f = 10 / (2 CE RE)
Let f = 100Hz and W.K.T RE = 330
Therefore CE = 10 / 2 f.RE = 48F
Therefore CE 47F.
24
PROCEDURE:
1) To find Q point:
Connect the circuit without Vs and capacitors. Set Vcc= 12V. Measure dc
voltages at the base VB, collector Vc and VE with respect to ground
Determine VCE = VC VE = --------- V
IC = (VCC-VC)/RC = -------- mA
Q point is Q(VCE,IC)
To check biasing conditions:
With VCC=12V; VCE should be VCC/2 = 6V
VRE should be VCC/10 = 1.2V
VBE = 0.6V
2) Connect the circuit of Fig(1)
3) Feed a sine wave of peak to peak amplitude about 40Mv from signal
generator.
4) Vary the input sine wave frequency from 10Hz
to 1MHz in steps and
measure the output voltage V O of the amplifier. Input voltage Vi should

remain constant throughout the frequency range.
5) Tabulate the results.
6) Plot the graph of frequency f versus Gain in dB and determine the GBW
product
Procedure to measure input impedance Zi:
1) Connect the circuit of Fig(2).
2) Set the following:
DRB to zero.
Input sine wave amplitude of 40Mv
Input sine wave frequency to any mid band frequency.
3) Measure Vop-p.
4) Increase DRB till VO = Vop-p/2. The corresponding DRB value gives the
input impedance Zi.
Procedure to measure output impedance:
1) Connect as in Fig(3).
2) Set the following:
DRB to maximum value.
Input sine wave amplitude to 40mv.
Input sine wave frequency to any mid band frequency
3) Measure Vop-p.
25
4) Decrease DRB till Vo = Vop-p/2. The corresponding DRB value gives the
output impedance Zo.
WAVEFORM:
Vin
V0
OBSERVATION
Vi =
Freq.
(Hz)
100
---------------- mV
Output Voltage
AV = V0 / Vi
AV (dB) = 20log AV
.
.
.
1M
26
FREQUENCY RESPONSE CURVE ( in Semilog )
AV (db)
3db
f1
f2
Bandwidth = f2 f1
RESULT:
27
Ex.No:04
RC COUPLED AMPLIFIER FET
AIM:
Design an RC coupled single stage FET amplifier and determine its gain
and frequency response, input and output impedances.
Sl. No.
Components Details
Specification
Qty
1.
FET
BFW10
1 No
2.
Capacitors
0.37 f
2 Nos.
100 f
1 No
3.
Resistors
2.2 M, 1 K, 330, 10 K
Each 1 No

CIRCUIT DIAGRAM:
VDD = 12V
RD =1 K
C2=0.3f
C1=0.37f
VINi
RG
2.2M
Vo
D
S
BFW10
RS
330
CS
100f
RL
10 K
0
To Determine Input Impedance:
47k
Vin
VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
Vout
To Determine Output Impedance:
Vin
VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
D
R
B
Vout
28
DESIGN:
Given VDD = 12V, IDss = 10 mA, VGS = - 2V, VP = -6 V
For proper biasing: VDD=12 V; VDS = 6 V;
VRS = VDD/10 = 1.2V
VGS = - 0.7 to -2V
To find RD :
Applying KVL to the output loop of the circuit
VDD = VDS + IDRD + VRS
ID = IDSS (1-VGS/ VP)2
12 = RD (5 x 10-3 ) + 6 + 1.2
= 10x10-3 (1- 2/6)2
RD = 960 1 k
= 4.4 mA 5mA
To find RS :
VRS = ISRS
RS = VRS/IS = 1.2 / 5x10
-3
240 270
Assume RS = 2 M
To find CS :
XS = 0.1 Rs = 27
XS = 1/2fCS
Let f = 50 Hz
Therefore CS = 100f
Let C1 = C2 = C
XD = 10 RD = 10K
XD = 1/2fC
therefore C = 0.318f
TABULAR COLUMN:
Vin =
Frequency
(Hz)
mV
V0 (V)
AV
AV (dB)
10
20
.
.
.
.
.
1M

29
AV (db)
3db
f1
f2
Bandwidth = f2 f1
WAVEFORM:
Vin
V0
RESULT:
30
Ex.No:05
HARTLEY OSCILLATOR / COLPITTS OSCILLATOR
AIM:
Design of Hartley/Colpitts oscillator for a given Radio frequency of
f0 =100 KHz using BJT.
Sl. No.
Components Details
1.
Transistor
2.
Capacitors
3.
Resistors
Specification
BC109
1 No
0.1 f, 1000 pf
2 No
47f, 0.0023 f
Each 1 No
18K, 1.8K, 3.9K, 4700

1 K Pot
4.
Inductors
Qty
100 H, 1mH, 5mH
Each 1 No
Each 1 No
DC Supply, CRO with Probe
THEORY:
Oscillators are devices, which generate oscillations. The frequency of
oscillations depends on the feedback network. Feedback may be of two types
namely positive and negative. In positive feedback, the feedback signal is
applied in phase with the input signal thus increasing it. In negative feedback,
the feedback signal is applied out of phase with the input thus reducing it. The
feedback used in oscillators is positive feedback. The oscillators work on the
principle of Barkhausen criteria. This states that for sustained oscillations
i) Loop gain Av must be equal to 1.
ii) The phase shift around the loop must be 0 deg of 360 deg.
Here Av is the gain of the amplifier and is the attenuation of the feedback
network. Consider the feedback network shown in the fig (1) below. Assume an
amplifier with input signal Vin. The output signal V O will be 180 deg out of phase
with Vin. So to get an in phase output, the feedback network provides 180-deg
phase shift. Therefore the output Vf from the feedback network can be made in
phase and equal in amplitude to Vin and Vin can be removed. Even then the
oscillations continue. Practical oscillations do not need any input signal to start
oscillations. They are self-starting due to thermally produced noise in resistors
and other components. Only one frequency (fo) of noise satisfies, Barkhausen
31
criteria and the circuit oscillates with that frequency. The magnitude of fo keeps
on increasing each time it goes around the loop. The amplification of fo is limited
by circuits own non-linearities. Therefore to start oscillations Av > 1 and to
sustain it, the loop gain Av = 1.
Fig 1.
Amplifier
Vin
Vo
Av
Vf
The feedback network used here consists of L and C. Consider the circuit
shown below fig 2. This circuit consists of L and C in parallel. The capacitor
stores energy in its electric field whenever there is voltage across it and the
inductor stores energy in its magnetic field whenever there is current through it.
Initially let us assume that the capacitor has charged to V volts. When S is
closed c= 0. When S is closed at t = t 0 , capacitor starts charging through the
inductor. Thus a voltage gets built up across the inductor due to the change in
current through it. If the capacitor was changed with the polarity as shown in
the fig 2 the current starts flowing from the positive plate of the capacitor to the
negativ4 plate of the capacitor. As shown the voltage across the capacitor
reduces during the discharge time v reduces and I increases. At time t1 v will be
0 and I will be maximum as c is fully discharged, the capacitor charges like
sinusoidal oscillations. Thus the circuit oscillates with the frequency
fo = 1/ 2LC
Fig.2
t = to
+
-
The Hartley oscillator consists of two inductors and a capacitor and Colpitts
oscillator consists of two capacitors and an inductor.
32
The resonant frequency fo for Hartley oscillator is

fo =1/ 2 LeqC ------where Leq = L1 + L2.
The resonant frequency fo for Colpitts oscillator is
fo = 1/ 2LCeq ------where Ceq = C1C2/(C1 + C2)
CIRCUIT DIAGRAM:
HARTLEY OSCILLATOR:
Vcc = 9 v
Rc
R1
Cc
1.8 K
VO
18K
0.1 f
CB
BC109
0.1 f
Variable
1 K Pot
3.9K
470
R2
RE
CE
47 f
L1 = 100 H
L2 = 1mH
GND
C = 0.0023 f
33
COLPITTS OSCILLATOR:
Vcc = 9 v
Rc
R1
1.8 K
Cc
VO
18K
0.1 f
CB
BC109
0.1 f
Variable
1 K Pot
3.9K
470
R2
RE
CE
47 f
C2 = 1000pf
C1 = 1000pf
GND
DESIGN:
Given VCC = 9V, IC = 2mA, = 50
L = 5mH

IE IC = 2 mA
IERE = VRE
RE = 0.9 / (2 x 10-3 ) = 450
Therefore RE 470
RC: VCE = VCC / 2 = 4.5V ----- for Q point to be in active region.
9 2 x 10-3 RC 4.5 -0.9 = 0
Therefore RC = 1.8k
34
VB = VBE+ VRE
= 0.7 + 0.9
VB = 1.6V
W.K.T. IC = IB
2 x 10-3 = 50 IB
Therefore IB = 40 A
R1 = VCC VB / 10 IB = 9 1.6 / (10 x 40 x 10-6 ) = 18.5k
Therefore R1 18k
R2 = VB / 9IB = 1.6 / ( 9 x 40 x 10-6 ) = 4.44k
Therefore R2 3.9k
XCE = RE/10
Therefore CE 47F.
35
HARTLEY OSCILLATOR:
Attenuation = Vf/Vo = IXL1/IX
L2
= XL1 / X
L2
2 foL1/2foL2 = L1/L2
For sustained oscillations Av = 1 -------- Av = 1/ = L2/L1

For oscillations to start Av > 1 -----------Av
> L2/L1
COLPITTS OSCILLATOR:
Attenuation = Vf / Vo = IXC1/IXC2 = XC1/ XC2 = (1/ 2foC1)/(1/2foC2) =
C1/C2
For sustained oscillations Av = 1 ---------- Av = C1/C2
For oscillations to start Av > 1----------Av > C1/C2
DESIGN OF TANK CIRCUIT
Assume = fo = 100 KHz
HARTLEY OSCILLATOR
fo = 1/ (2 LeqC) ------where Leq = L1 + L2.
Assume L1 = 100 H, L2 =1mH
LEQ =
fO =1/ (2 2*10-3 C)
C = 0.0023 f (Decade capacitance box)
COLPITTS OSCILLATOR
fO = 1/ (2LCeq ) ------where Ceq = (C1C2)/(C1 + C2)
Assume C1 = C2 = 1000 pF
Ceq =
fO = 1/ 2L * .05*10 - 6
L = 5 mH (Use decade inductance box)
36
PROCEDURE:
2. Before connecting the feedback network, check the circuit for biasing
conditions i.e. check VCE, and VRE.
3. After connecting the feedback network. Check the output.
4. Check for the sinusoidal waveform at output. Note down the frequency of
the output waveform and check for any deviation from the designed value
of the frequency.
5. To get a sinusoidal waveform adjust 1K potentiometer.
6. DCB/DIB can be varied to vary the frequency of the output waveform.
TABULAR COLUMN
HARTLEY OSCILLATOR
SL NO
fo
COLPITTS OSCILLATOR
SL NO
fo
WAVEFORM:
Vo
0
t
T
frequency fo = 1/T
RESULT:
37
Ex.No:06
CRYSTAL OSCILLATOR
AIM:
To design a crystal oscillator to oscillate at the specified crystal frequency.
Sl. No.
Components Details
1.
Transistor
2.
Capacitors
3.
Resistors
Specification
Qty
BC109
1 No
0.1 f
2 No
47f
1 No
18K, 1.8K, 3.9K, 470

1 K Pot
4.
Crystal
2 MHz or 1.8 MHz
Each 1 No
1 No

CIRCUIT DIAGRAM:
Vcc = 9 v
R1
Rc
1.8 K
Cc
VO
18K
0.1 f
CB
BC109
0.1 f
Variable
1 K Pot
3.9K
470
R2
RE
CE
47 f
2 MHz
1.8 MHz
38
DESIGN:
Given VCC = 9V, IC = 2mA, = 50
IE IC = 2 mA
IERE = VRE
RE = 0.9 / (2 x 10-3 ) = 450
Therefore RE 470
RC: VCE = VCC / 2 = 4.5V ----- for Q point to be in active region.
9 2 x 10-3 RC 4.5 -0.9 = 0
Therefore RC = 1.8k
VB = VBE+ VRE
= 0.7 + 0.9
VB = 1.6V
W.K.T. IC = IB
2 x 10-3 = 50 IB
Therefore IB = 40 A
R1 = VCC VB / 10 IB = 9 1.6 / (10 x 40 x 10-6 ) = 18.5k
Therefore R1 18k
R2 = VB / 9IB = 1.6 / ( 9 x 40 x 10-6 ) = 4.44k
Therefore R2 3.9k
XCE = RE/10
Therefore CE 47F.
39
PROCEDURE:
2. Before connecting the feedback network, check the circuit for biasing
conditions i.e. check VCE, and VRE.
3. After connecting the feedback network. Check the output.
4. Check for the sinusoidal waveform at output. Note down the frequency of
the output waveform and check for any deviation from the designed value
of the frequency.
5. To get a sinusoidal waveform adjust 1K potentiometer.
WAVEFORM:
Vo
0
t
T
frequency fo = 1/T
RESULT:
40
Ex.No:07
RC PHASE SHIFT OSCILLATOR
AIM:
Design a circuit, which generates repetitive waveform (Sinusoidal signal)
of frequency 7 KHz.
Sl. No.
Components Details
Specification
Qty
1.
Transistor
SL100
1 No
2.
Capacitors
0.02 f
3 NoS.
0.1 f
2 Nos.
47f
3.
Resistors
22K, 4.7K, 1.2K, 330
1 No
Each 1 No
1 K Pot
470
3 Nos.

THEORY:
RC Phase shift oscillator consists of a single transistor amplifier and a
RCphase shift network. The Phase shift network consists of three RC sections.
Here a fraction of the output of the amplifier is passed through a phase shift
network before feeding back to the input. The phase shift in each section is 60 0
so that the total phase shift is 1800.Another 1800 phase shift is provided by the
transistor amplifier and therefore the total phase shift of the oscillator is 360
.The frequency of oscillations is given by

fo
= 1 / [26(RC)]
Let us consider a RC circuit..

Let I be the current flowing through both R and C. Then using I as the
reference vector,Vo is in phase with I while Vc ,the voltage across the capacitor
is 900 behind as shown in the figure.
Vi is the sum of Vo and Vc.Hence Vc is degrees ahead of Vi and represents a
phase shift of degrees
Vo = IR,
Vc =IXc
Tan =Vc/Vo =Ixc/IR = Xc/R = 1/(2fCR)

Therefore f = 1/(2fCR Tan )
If there are 3 sections each must give approximately 60 0
i.e. = 600
Tan =3 =1.73
41
f= 1/(2CR3)
The above phase discussion ignored the additional current I that flows
through C for other sections, so that Vc is actually larger than the value
indicated,which means f is smaller.
More accurately f = 1/26(RC)
CIRCUIT DIAGRAM:
VCC(12V)
RC=1.2K
R1=22K
CC=0.1f
2
Cc
D
A
Q1
SL100
0.1u
0.02f
0.02f
0.02f
470
470
470
R2=4.7 K
1k
RE=330
CE=47f
DESIGN:
Given VCC = 12V, IC = 4mA, = 100.
IE IC = 4 mA
IERE = VRE
RE = 1.2 / (4 x 10-3 ) = 300
Therefore RE 330
12 4 x 10-3 RC 6 -1.2 = 0
Therefore RC = 1.2k
42
VB = VBE+ VRE
= 0.7 + 1.2
VB = 1.9V
W.K.T. IC = IB
4 x 10-3 = 100 IB
Therefore IB = 40 A
R1 = VCC VB / 10 IB = 12 1.9 / (10 x 40 x 10-6 ) = 25.25k
Therefore R1 22k
R2 = VB / 9IB = 1.9 / ( 9 x 40 x 10-6 ) = 5.28k
Therefore R2 4.7k
XCE = RE/10
Therefore CE 47F.
DESIGN OF TANK CIRCUIT:
We know that f=1/(2 RC6)
Given fO = 7 KHz
Assume C = 0.02 F
R = 1/(2 x 0.02 x 10-6 x 7 x 10+3 x 6) =527 470
PROCEDURE:
1. Make the connections as shown in the circuit diagram.
2. Check the circuit for biasing.
3. Adjust the 1k potentiometer to get sinusoidal waveform at the output.
4. To measure the phase shift
Method 1:
Connect the channel 1 of the CRO to point D and channel 2 to point A.
We will get two sine waves with a phase difference
Measure the difference by converting the time into angle.
43
Method 2:
a] Connect channel 1 to point D and channel 2 to point A.
Press the XY knob and measure the phase shift.
=Sin-1 (a/b)
(approx.=600)
b
a
b] Connect channel 2 to point B the graph is as shown
b
a
= Sin-1(a/b)
Phase angle =1800-
(approx. = 1200)
C] Connect channel 2 to point C

The transfer function will be almost a straight line and =00 and
therefore phase angle =1800 - 00 = 1800
WAVEFORM:
f=1/T
44
RESULT:
45
Ex.No:08
VOLTAGE SERIES FEEDBACK AMPLIFIER

USING BJT
AIM:
To design and test a two stage voltage series feedback amplifier using BJT
and to determine gain, frequency response, input and output impedance with
and without feedback.
Sl. No.
Components Details
Specification
Qty
1.
Transistor
SL100
2 Nos.
2.
Capacitors
0.47 f
3 Nos
10f
2 Nos
3.
Resistors
4.
Variable Resistor
12K, 2.7K, 2.2K, 560
Each 2 No
4.7 K, 100
Each 1 No
1K Pot
1 No.

THEORY:
The high gain amplifier is widely used in analog circuit design and will
serve as the step to the next higher level of complex analog systems. The
philosophy behind the high gain amplifier is based on the concept of feedback.
In analog circuits we must be able to precisely define transfer function. A
familiar representation of this concept is illustrated in the block diagram below:
xs
xi
x0
_
xf
Here x voltage or current

A High Gain Amplifier
Feedback Network
xs Input signal (source)
xi Input signal to amplifier
46
xf Feedback signal
The overall gain of the amplifier with feedback is given by
Af = x0 / xs = A / (1 + A)
The high gain amplifier is defined by
A = x0 / x i
The gains defined above may be current gain or voltage gain.
In the circuit shown below, the feedback signal is the voltage V f across R1
and the sampled signal is the output voltage V 0 across R. It is called voltage
series feedback amplifier because a part of the output voltage is fed back in
series with the input.
CIRCUIT DIAGRAM:
WITHOUT FEEDBACK
Vcc = 12 v
Rc
R1
2.2 K
12K
R1
Cc
Cc
0.47 f
0.47 f
CB
SL100
Rc
2.2 K
Vo
0.47 f
Vs
12K
2.7K
2.7K
560
R2
SL100
CE
RE
560
R2
10 f
CE
RE
10 f
Vcc = 12 v
WITH FEEDBACK
Rc
R1
2.2 K
R1
Cc
12K
Rc
2.2 K
Cc
Vo
12K
0.47 f
SL100
560
RE
2.7K
Vs
0.47 f
0.47 f
CB
CE
100
SL100
2.7K
R2
R2
10 K
560
RE
CE
10 f
RF
47
To Determine Input Impedance

47k
Vin
VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
Vout
To Determine Output Impedance
Vin
VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
D
R
B
Vout
DESIGN:
Given VCC = 12V, IC = 2mA,
= 25.

IE IC = 2 mA
IERE = VRE
RE = 1.2 / (2 x 10-3 )
RE 560
12 2 x 10-3 RC 6 -1.2 = 0
Therefore RC = 2.2k
VB = VBE+ VRE
= 0.7 + 1.2
VB = 1.9V
W.K.T. IC = IB
2 x 10-3 = 100 IB
Therefore IB = 20 A
48

R1 = VCC VB / 10 IB = 12 1.9 / (10 x 20 x 10-6 )
Therefore R1 12k
R2 = VB / 9IB = 1.9 / ( 9 x 20 x 10-6 )
R2 2.7k
XCE = RE/10
Therefore CE = 10 / 2 f.RE = 10f
Therefore CE 10f.
DESIGN FEED BACK CIRCUIT
Let = 0.02
= Rf/ Rf + R
Rf = R / 1
Let
R = 4.7 K
Therefore Rf = 100
PROCEDURE:
1. Rig the circuit as shown in the fig.
2. Check the circuit for biasing i.e. check VDD, VDS and VRS.
3. Give a sinusoidal input of 10kHz from signal generator. Adjust the
amplitude of this sine wave such that the output doesnt get clipped.
4. Observe the output waveform on the CRO.
5. Measure the output voltage using AC milli voltmeter.
6. Measure the output voltage for different frequencies of the input and
tabulate the readings as shown in the tabular column.
7. Plot the graph of gain vs frequency on a semilog graph sheet as shown
in the fig.
8. To measure input impedance connect a resistor of 47k in series with
the signal generator.
9. Measure the voltage at the input point (VS) and at the point after the
resistor (Vin).
10.
Current
through
the
resistor
is
given
by
the
expression
I = ( VS Vin ) / 47k
49
11.
Input impedance is given by Zin = Vin / 47k
12.
To measure output impedance connect a DRB in parallel with the
output.
13.
Adjust all the knobs of the DRB to maximum.
14.
Start reducing the resistance in the DRB from a large value until the
output reduces to half.

15.
The resistance in the DRB is the output impedance.
TABULAR COLUMN:
Without Feedback
Vin = constant
Frequen
cy (Hz)
V0 (V)
AV
AV (dB)
AV
AV (dB)
10
20
.
.
.
.
.
1M
With Feedback
Vin = constant
Frequen
cy (Hz)
V0 (V)
10
20
.
.
.
.
.
.
1M
50
EXPECTED GRAPH:
AV
Without feedback
With feedback
0
WAVEFORM:
Vin
V0
RESULT:
51
THEVININS THEOREM AND
Ex.No:09
MAXIMUM POWER TRANSFER THEOREM
AIM: To State and verify the thevenins theorem for the given circuit.
Sl. No.
Components Details
1.
Specification
Resistors
1 K
Qty
4 Nos.
DC Supply, Multimeter, Ammeter (0-10)mA

THEORY:
Any Linear, bilateral network containing energy sources and impedances
can be replaced with equivalent circuit consisting of a voltage source in series
with an impedance.
The Value of voltage source is open circuit voltage between terminals of a
network and value of impedance is the impedance measured between the two
terminal of a network with all energy sources eliminated.
Circuit diagram:
1k
R1
R2
5v
1k
R3
1k
R1
R2
1k
R3
1k
RL
1k
FIG 1
5v
RL
1k
FIG
IL
1k
Vo
0-10mA
0-10mA
1k
R1
R2
+
-
1k
R3
1k
A
+
5v
FIG 3
+
Vo
52
ZTH
0-10mA
VTH
Ith
RL
1k
Procedure:
1. Connection are made as shown in the fig(2).
2. Supply voltage is adjusted to 5v and the ammeter reading IL is noted
down.
3. Open circuit the terminal A & B , Voltmeter reading Vo is measure which is
the thevenins voltage. Vo=VTH= ___________Volts .
4. To find the Thevenins impedance, connections are made as shown in the
fig (3)
5. The reading of voltmeter V and ammeter I are noted . the thevenins
Impedance
ZTH=V/I W
ZTH=_____________ W
6. Thevenins equivalent circuit connection are made as shown in the fig (4)
7. The supply voltage is set to Vth as measured above.
8. The ammeter reading Ith is noted.
If Ith=IL, Thevenins theorem is verified.
53
(2) MAXIMUM POWER TRANSFER THEOREM:

Aim: (i) To state and verify maximum power transfer theorem.
(ii) To determine maximum power and the value of RL for Maximum power
transfer.
Sl. No.
Components Details
1.
Resistors
Specification
Qty
1 No.
1 K
DC Supply, DRB, Multimeter, Ammeter (0-10)mA
Circuit diagram:
1k
Rs
-
10v
0-10mA
Rl
10k pot
Circuit for measuring source resistance:
1k
Rs
0-10mA
A
Is
+
Vs
_
+
-
10v
54
Procedure:
1. Connection are made as shown in the fig(i).
2. Supply voltage V is set to 10V, the potentiometer RL is kept at maximum.
3. The readings of voltmeter (V) and ammeter (I) are noted down in the
table.
4. RL is decreased in steps and at each steps readings of V and I are
tabulated in the table.
5. A graph of RL versus power is plotted, the maximum power Pmax and
value of RL for maximum power transfer are noted from graph PMAX
=_______W, RL =
.
6. To measure source resistance the connection are made as shown in the fig
(2)
7. Supply is set to 10V, the ammeter reading I and voltmeter reading are
noted down.
The source resistance RS=V/I =__________
If RS = RL, MPT Theorem is verified
V (volts)
I mAmps
P = VI in W
RL= V/I
Power ,
Watts
PMAX
RL, for PMAX
RL,
RESULT :
55
Ex.No: 10
SERIES AND PARALLEL RESONANCE

SERIES RESONANCE CIRCUIT
Aim : To obtain the frequency response of an RLC series circuit and hence to
determine
a) Resonance frequency fo
b) Band width ,Upper and Lower half power frequency
c) Q-factor.
Sl. No.
Components Details
Specification
Qty
1.
Resistors
100
1 No.
2.
Capacitor
0.22f
1 No.
3.
Inductor
1 mH
1 No.
Signal generator, Multimeter
Circuit diagram:
C
R
VO
DESIGN:
fo = 1/2LC
Let L = 1mH
C = 1/42Lfo2
C = 0.22f
R = 100
Find fo
Procedure:
1. Connections are made as shown in the circuit diagram.
2. AC Supply is switched on. oscillator output voltage is adjusted to about
maximum i.e 10V P-P
3. The frequency is gradually varied from zero hertz and for different value
of f, voltage is noted down. The results are tabulated in the tabular
column.
4. Frequency response i.e a graph of frequency versus voltage is drawn.
56
5. From the graph , resonant frequency fo is noted down at which voltage

is maximum(Vo).
6. Lower half power frequency f1 and upper half power frequency f2 are
noted corresponding to a voltage of Vo/ 2
Band width=f2-f1=_____________ hertz
7. The Q-factor =fo/f2-f1
Tabular column
f in hz
V in
VOLTS

VO
VOmax
VOmax/2
BW
f1 f0
f2
f, Hz
57
PARALLEL RESONANCE CIRCUIT:

Aim : To obtain the frequency response of an RLC series circuit and hence
to determine
a) Resonance frequency fo
b) Band width ,upper and lower half power frequency
c) Q-factor.
Sl. No.
Components Details
Specification
Qty
1.
Resistors
100
1 No.
2.
Capacitor
0.22f
1 No.
3.
Inductor
1 mH
1 No.
Signal generator, Multimeter
Circuit diagram:
VO
Frequency response
Vo
Vomin x 2
Vomin
BW
0
f1
fO
f2
fin Hz
58
Procedure:
1. Connections are made as shown in the circuit diagram.
2. AC Supply is switched on. oscillator output voltage is adjusted to about
maximum i.e 10V P-P
3. The frequency is gradually varied from zero hertz and for different value
of f, voltage is noted down. The results are tabulated in the tabular
column.
4. Frequency response i.e a graph of frequency versus voltage is drawn.
5. From the graph , resonant frequency fo is noted down at which voltage
is minimum (Vo).
6. Lower half power frequency f1 and upper half power frequency f2 are
noted corresponding to a voltage of V Omin x 2.
a. Band width = f2 - f1=_____________ Hz
7. The Q-factor =fo/f2-f1
RESULT:
59
Ex.No:
11
DARLINGTON EMITTER FOLLOWER
AIM:
To design and test a Darlington emitter follower circuit with and without
boot strapping and determine the gain, input and output impedance for both the
circuits.
Sl. No.
Components Details
Specification
Qty
1.
Transistor
SL100
2 Nos.
2.
Capacitors
10 f
1 No
3.
Resistors
1 M, 2.2 M, 1.5 K, 10 K, 47K
DC
Supply, CRO
AC millivoltmeter
with
0.47f
2 Nos.
Probe,
Signal
Each 1 No
generator,
THEORY:
Normally transistors are used as amplifiers. But there are some
applications in which, matching of impedance is required between two circuits
without any gain or attenuation. In such applications emitter followers are used.
Emitter followers have large input impedance and small output impedance.
Darlington emitter follower has two transistors connected in cascade such that
the emitter of first transistor is connected to the base of second transistor. The
voltage gain of the darlington emitter follower is close to unity. The major
drawback of this circuit is that the second transistor amplifies leakage current of
the first transistor and overall leakage current becomes high. The output is
observed at the emitter terminal of the second transistor. Hence it is called an
emitter follower.
60
CIRCUIT DIAGRAM:
Darlington emitter follower without bootstrapping
Vcc = 12V
R1
1M
Cb = 0.47f
Q1
QSL100
SL100
R2
2.2 M
Vin
CE = 0.47f
RE
Vo
1.5 K
Darlington emitter follower with bootstrapping

Vcc = 12V
R1
1M
Cb = 0.47f
Q1
QSL100
R3
SL100
Vin
CE = 0.47f
R2
RE
CE = 0.47f
2.2 M
1.5 K
Vo
DESIGN:
Given IC = 4mA, VCC = 12V, VBE = 0.6V, 1 = 2 = 100
To find RE:
Applying KVL to the output loop of the second transistor, we get
VCC = VCE + VRE
Therefore VRE = VCC VCE = 12 6
Therefore VRE = 6V
W.K.T RE = VRE / IE2
Here IE2 = IC2
Therefore RE = 6 / 4 x 10-3
RE = 1.5k
61
To find R1 & R2:

From the circuit we have
VA = VBE1 + VBE2 + VRE
= 0.6 + 0.6 + 6 = 7.2V
W.K.T. IC = IB
Therefore IB = (4 x 10-3)/ 100 = 40 A
Let 10IB be the current through R1 and 9IB be the current through R2.
From the fig. we see that
R1 = (VCC VA) / 10IB
Therefore R1 = 12K
From the fig. R2 = VA / 9IB
Therefore R2 = 20 K 22K
W.K.T. CC = 10 / XRE = 10 / ( 2..f.RE)
Assume f = 50Hz
Therefore CC = 21.2F 47 F
W.K.T. Cb = 10 / XRB = 10 / ( 2..f.RB )
where RB = R1 || R2 = 7.5k
Therefore Cb = 4.2F 4.7F

Chose R3 = 10 K, CB = 10f for bootstrapping
PROCEDURE:
1. Rig up the circuit as shown in the fig.
2. Check the circuit for biasing, i.e. check VCE, VCC and VRE.
3. Give a sinusoidal input signal of 1KHz from a signal generator.
4. Set the input signal to a value such that the output doesnt get clipped.
5. For different frequencies of the input signal, read the output on the
voltmeter and verify that the gain is 1.
6. To measure input impedance, connect a resistor of 47k in series with
the signal generator.
7. Measure the voltage at the input point (V S) and at the point after the
resistor (VIN).
8. Current through the
I = (VS - VIN) / 47K.
resistor
9. Input impedance is given by
is
given
by
the
expression
ZIN = VIN / 47 K
10. To measure output impedance, connect a DRB in parallel with the

output.
11.
Adjust all the knobs of the DRB to maximum.
12. Start reducing the resistance in the DRB from a large value until the
output reduces to half.
13.
The resistance in the DRB is the output impedance.
62
TABULAR COLUMN:
VIN = __________ constant
Frequency
(Hz)
V0 (V)
AV
AV (dB)
WAVEFORM:
Vin
Vin
V0
Vin
RESULT:
63
Ex.No:
12
TRANSFORMERLESS CLASS-B PUSH PULL

POWER AMPLIFIER
Aim: Testing of a transformer less class-B push pull power amplifier and
determination of its conversion efficiency.
Sl. No.
Components Details
1.
Transistor
2.
Diode
3.
Capacitors
4.
Resistors
Specification
Qty
SL100
1 No.
SK100
1 No.
BY127
2 Nos.
47 f
2 Nos.
470 f
1 No.
220
2 No
DRB
1 No
DC
Supply, CRO
AC millivoltmeter
with
Probe,
Signal
generator,
Theory: In class B operation, to obtain output for the full cycle of signal, it is
necessary to use two transistors and have each conduct on opposite half cycle,
the combined operation providing a full cycle of output signal. Since one part of
the circuit pushes the signal high during one half cycle and the other part pulls
the signal low during the other half cycle, the circuit is referred to as a push pull
circuit.
Circuit diagram:
VCC
Ci
Ci
R1
Q1
CO
D1
D2
Vi=50mV
R2
SL100
SK100
Q2
RL
10 .
VO
64
12v
A
0-500A
SL100
SK100
DESIGN:
Given Vcc =2.5V; RL= 10 ; IDC = 3mA
Po (watts)
To Find R1 & R2:

Applying KVL at the input circuit;
We get ; Vcc = 2VR1 + 1.4
Therefore; VR1 = 0.55V;
VR1 =IDCR1 = 0.55V; R1 = 183.
Choose; R1 = R2 = 220.
To Find Ci :
Input coupling capacitor is given by, Xci >Zieff/10 >1.1K/10
Resistance()
Xci > 1/2fCi ;Ci >28F; Choose Ci = 47F
To Find CO:
Output coupling capacitor is given by, Xco = 10
Xco > 1/2fCo
Co > 318F; Choose; Co = 470F
Poac=Vo2/8RL Pidc=VccIdc
Calculate circuit efficiency, = Po (ac)/Pi(dc) = (/4)Vo/Vcc = ?
Procedure:
1. Connect the circuit as per the circuit diagram.
2. Set VI = 3V, using the signal generator.
3. Keeping the input voltage constant, vary the load resistor and note down
the readings of the ammeter and peak to peak output voltage.
4. Calculate PDC, PAC and % efficiency .
5. Draw the plot of resistance versus output power.
65
Tabulation
Vi =
RL ()
---------------VO (v)
IDC(mA)
PAC
PDC
Result:
BIBLIOGRAPHY
1.
Electronic devices and circuit theory, Robert L.Boylestad and

Louis Nashelsky.
2.
Integrated electronics, Jacob Millman and Christos C Halkias.
3.
Electronic devices and circuits, David A. Bell.
4.
Electronic devices and circuits, G.K.Mittal.
66
VIVA-VOCE QUESTIONS
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35.
36.
37.
38.
39.
40.
41.
42.
43.
44.
45.
46.
47.
48.
49.
50.
What are conductors, insulators, and semi-conductors? Give egs.

Name different types of semiconductors.
What are intrinsic semiconductors and extrinsic semiconductors?
How do you get P-wpe and N-type semiconductors?
What is doping? Name different levels of doping.
Name different types of Dopants. .
What do you understand by Donor and acceptor atoms?
What is the other name for p-type and N-type semiconductors?
What are majority carriers and minority carriers?
What is the effect of temperature on semiconductors?
What is drift current? .
What is depletion region or space charge region?
What is junction potential or potential barrier in PN junctioI).?
What is a diode? Name different types of diodes and name its applications
What is biasing? Name different types w.r.t. Diode biasing
How does a diode behave in its forward and reverse biased conditions?
What is static and dyriantic resistance of diode?
Why the current in the fo~ard biased diode takes exponential path?
What do you understand 1?y AvaJanche breakdown and zener breakdown?
Why diode is called unidirectional device.
What is PIV of a diode
What is knee voltage or cut-in voltage?
What do you mean by transition capacitance or space charge capacitor?
What do you mean by diffusion capacitance or storage capacitance?
What is a transistor? Why is it called so? .
Name different types, of transistors?
Name different configurations in which the transistor is operated
Mention the applications of transistor. Explain how transistor is used as switch
What is transistor biasing? Why is it necessary?
What are the three different regions in which the transistor works?
Why trmisistor is called current controlled device?
What is FET? Why it is called so?
What are the parameters ofFET?
What are the characteristics of FET?
Why FET is known as voltage controlled device?
What are the differences between BJT and FET?
Mention applications ofFET. What is pinch offvQltage, VGS(ofJ) and lDss
What is an amplifier? What is the need for an amplifier circuit?
How do you classify amplifiers? ,
What is faithful amplification? How do you achieve this?
What is coupling? Name different type.s of coupling
What is operating point or quiescent point?
What do you mean by frequency response of an amplifier?
What are gain, Bandwidth, lower cutoff frequency and upper cutoff frequency?
What is the figure of merit of an amplifier circuit?
What are the advantages of RC coupled amplifier?
Why a 3db point is taken to calculate Bandwidth?
What is semi-log graph sheet? Why it is used to plot frequency response?
How do you test a diode, transistor, FET?
How do you identify the tenninals of Diode, Transistor& FET? Mention the type
number of the devices used in your lab.
67

51.
52.
53.
54.
55.
56.
57.
58.
59.
60.
61.
62.
63.
64.
65.
66.
67.
68.
69.
70.
71.
72.
73.
74.
75.
76.
77.
78.
79.
80.
81.
82.
83.
84.
85.
86.
87.
88.
89.
90.
91.
92.
93.
94.
95.
96.
97.
98.
99.
100.
Describe the operation ofNPN transistor. Define reverse saturation current.

Explain Doping w.r.t. Three regions of transistor
Explain the terms hie/hib, hoelhob, hre/hrb, hre/hfb.
Explain thermal run-.taway. How it can'be prevented.
Define FET parameters and write the relation between them.
What are Drain Characteristics and transfer characteristics?
Explain the construction and working of FET
What is feedback? Name different types.
What is the effect of negative feedback on the characteristics of an amplifier?
Why common collector amplifier is known as emitter follower circuit?
What is the application of emitter follower ckt?
What is cascading and cascoding? Why do you cascade the amplifier ckts.?
How do you determine the value of capacitor?
Write down the diode current equation.
Write symbols of various passive and active components
How do you determine th~value of resistor by colour code method?
What is tolerance and power rating of resistor?
Name different types of resistors.
How do you c1assify resistors?
Name different types of capacitors..
What are clipping circuits? Classify them.
Mention the application of clipping circuits.
What are clamping circuits? Classify them
What is the other name of clamping circuits?
Mention the applications of clamping circuits.
'What is Darlington emitter follower circuit?
Can we increase the number of transistors in Darlington emitter follower circuit?
Justify your answer.
What is the different between Darlington emitter follower circuit & Voltage
follower circuit using Op-Amp. Which is better.
Name different types of Emitter follower circuits.
What is an Oscillator? Classify them.
What ar~ The Blocks, which fonns an Oscillator circuits?
What are damped & Un-damped Oscillations?
What are Barkhausen's criteria?
What type of oscillator has got frequency stability?
What is the disadvantage of Hartley & Colpiit's Oscillator?
Why RC tank Circuit Oscillator is used for AF range?
Why LC tank Circuit Oscillator is used for RF range?
What type of feedback is used in Oscillator circuit?
In a Transistor type No. SL 100 and in Diode BY 127, what does SL and BY stands
for
Classify Amplifiers based on: operating point selection.
What is the efficiency of Class B push pull amplifier?
What is the drawback of Class B Push pull Amplifier? How it is eliminated.
What is the advantage of having complimentary symmetry push pull amplifier?
What is Bootstrapping? What is the advantage of bootstrapping?
State Thevenin's Theorem and Max.power transfer theorem.
What is the figure of merit of resonance circuit?
What is the application of resonant circuit?
What is a rectifier? Classify.
What is the efficiency of half wave and full wave rectifier?
What is the advantage of Bridge rectifier of Centre tapped type FWR
68

101.
102.
103.
104.
105.
106.
107.
108.
109.
110.
111.
What is the disadvantage of Bridge rectifier?

What is a filter?
Name different types of filter ckts.
Which type of filter is used in day to day application and why?
What is ripple and ripple factor? .
What is the theoretical value of ripple for Half Wave and .Full wave rectifier?
What is need for rectifier ckts.
Why a step down transformer is used at the input of Rectifier ckt.
What is TUF? .
What is regulation w.r.t rectifier? And how it is calculated?
What is figure of merit of Rectifier ckt.
69

06ESL37 Analog Electronics Lab MANUAL

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A LAB MANUAL ON

Half wave, full wave and bridge rectifier

RC coupled amplifier using BJT and FET

Hartley oscillator / Colpitts oscillator

RC phase shift oscillator

Voltage series feedback amplifier using BJT

Thevenins theorem and maximum power transfer

Series and parallel resonance circuits.

Darlington emitter follower.

Class-B push pull power amplifier.

Analog Electronics Laboratory Manual - 10ESL37

HALF WAVE, FULL WAVE AND BRIDGE RECTIFIER

Power Resistance Board

Step down Transformer

CRO, Multimeter, Milliammeter, Connecting Board

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

HALF WAVE RECTIFIER WITH FILTER CAPACITOR

Ripple = r = Vo rms / VO DC = 1.21

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

Connections are made as shown in the circuit diagram

Switch on the AC power supply

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

FULL WAVE RECTIFIER

Power Resistance Board

Step down Transformer

CRO, Multimeter, Milliammeter, Connecting Board

FULL WAVE RECTIFIER WITH FILTER CAPACITOR

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

Ripple = r = Vo rms / VO DC = 0.48

(I2DC * RL) / [(Irms)2 * (RL + RF)]

Connections are made as shown in the circuit diagram

Switch on the AC power supply

Note down RL, IDC, VODC

in the tabular column for different

Repeat the above procedure with filter capacitor.

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

Power Resistance Board

Step down Transformer

CRO, Multimeter, Milliammeter, Connecting Board

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

BRIDGE RECTIFIER WITH FILTER CAPACITOR

Ripple = r = Vo rms / VO DC = 0.48

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37

in the tabular column for different

Analog Electronics Laboratory Manual - 10ESL37

Signal generator, Cathode Ray Oscilloscope (CRO) with

i.e. (5 0.5) = 4.5V

In the negative half cycle

Analog Electronics Laboratory Manual - 10ESL37

CIRCUIT DIAGRAM AND DESIGN:

In the negative half cycle:

When Vin = -5V V0 = -9.5V

Applying KVL to loop 1

Department of Electrical & Electronics Engg. NIT,Raichur

Analog Electronics Laboratory Manual - 10ESL37