cur mir 2

PROBLEM DESCRIPTION
Design a cascode current mirror with the following requirements: (a) Transistor at the output stage must operate in the active
region for values of output voltage to within 0.2 V of ground, (b) the output current must be 50 A, and (c) the output current
change less than 0.02 % for a 1 V change in the output voltage.
SOLUTION
Theory
The real current mirror suffers from various non-idealities. For example, The gain of current mirror is never independent of
the input frequency. The following are few of low frequency factors causing non-idealities.
The output current change with change in the voltage a the output terminal. This effect is represented by the small-signal
output resistance of current mirror. It is given that the output current changes up to 0.02% for a 1 V change in the output
1
o
voltage. So, the small signal output resistance, Ro = 4V
4Io = 0.0002 Io . This output resistance affects the performance of
many circuits that use current mirror. Higher the output resistance of a current mirror, lower is the dependence of the
output current on the output voltage. Therefore, high output resistance is desirable.
The difference between input current and output current of current mirror is the gain error. There are two parts of gain
error (a) systematic gain error, and (b) random gain error. The systematic gain error arises even when all matched elements
are matched. The random gain error is caused by the unintended mismatches between matched elements.
When input current source is connected to the input terminal of a current mirror, it creates a voltage drop VIN . This
voltage drop reduces the voltage available across the input current source. To reduce VIN , current mirrors sometimes have
more than one input terminal. Cascode current mirror have high output resistance and some provisions are incorporated
to make it high-swing cascode current mirror.
There is minimum output voltage VOU T (min) that allows the output devices to operate in the active region. Aim is to
minimizes VOU T (min) to have wider range of output voltages for which the current-mirror output resistance is constant.
Therefore, minimum systematic gain error (), higher output resistance (Ro ), minimum input voltage drop across the input
devices (VIN ) and minimizing minimum output voltage (VOU T (min) ) are the important factors to be considered while designing
a current mirror.
In practice, all transistors except M4 are identical and (W/L)4 < 14 (W/L) is selected for two main reasons. First, the output
transistor M1 should operate slightly above Vov1 by a few hundreds of millivolts to realize high incremental output resistance.
Second, body effect reduces the drain-source voltage on M1 .
VDS1 = VGS3 + VGS4 VGS2 VGS5
Since source body voltage of M5 is higher than that of M4 , Vt5 > Vt4 . Similarly, source-body voltage of M2 is higher than
that of M3 , Vt2 > Vt3 .
Advantages of MOS Cascode Current Mirror

Cascode configuration achieves a very high output resistance. Therefore, the use of cascodes for high performance current
mirrors is natural. The small-signal output resistance of a cascode current mirror is given by the following expression
Ro = ro1 + ro2 [1 + (gm + gmb )ro1 ]

where ro1 and ro2 are the output resistance of MOS transistors in the output stage.
Bipolar cascode current mirror cannot realize an output resistance larger than 0 ro /2 because 0 is finite and nonzero
small-signal base current flows in the cascode transistor. In contrast, the MOS cascode is capable of realizing arbitrarily
high output resistance by increasing the number of stacked cascode devices because 0 for MOS transistors.
However, the MOS substrate leakage current can create a resistive shunt to ground from the output node, which can
dominate the output resistance for VOU T > VOU T (min) .

Computations

The output voltage 0.2 V when both transistors M1 and M2 operate in active (saturation) region. Therefore Vov1 = Vov2 =
0.1 V
NMOS device paramter,
1
1
F
2
tox
= 450 3.9 8.864 1014 8010
kn0 = n Cox = n 3.9 8.864 1014 cm
8 = 194.5 A/V
The output current,
6
IOU T = 50 106 = 194.510
(W/Lef f )(VGS2 VT )2
2
1

Fig. 1: MOS Cascode Current Mirror

Fig. 2: MOS Cascode Current Mirror with (W/L)4 < 14 (W/L)

For Vov = VGS2 VT = 0.1V

So, (W/Lef f ) = 51.4
and p

gm = 2kn0 (W/Lef f )ID = 2 194.5 106 51.4 50 106 = 103 1

The out resistance of the cascode current mirror is given by the following expression,
Ro = ro1 + ro2 [1 + gm2 ro1 ]
= ro2 gm2 ro1
Now,
Lef f
1
12
ro1 = VIDA = I1D =
= 50106 0.0210

6 = Lef f 10
dXd /dVDS
ID (

Lef f

Given that,
4Vo
1
1
Ro = 4I
= 0.02%I
= 0.00025010
6 = 100 M
D
D
6
12
100 10 = Lef f 10 Lef f 1012 103
Lef f = 0.316 m
Ldrawn = 0.316 + 2 0.09 = 0.5 m
W = 51.4 0.5 = 16.27 m
NMOS device paramter,

Fig. 3: Simulation MOS Cascode Current Mirror

F
kn0 = n Cox = n 3.9 8.864 1014 cm

dXd /dVDS
= Lef f
= 0.02/0.316 = 0.0633

1
tox

= 450 3.9 8.864 1014

DESIGN OUTCOME
TABLE I: Circuit Components
No.
1
2
3

Component
Ldrawn
W
IIN

Value
0.5 m
16.27 m
51.85mA

ASSUMPTIONS
1) All transistors are identical.
2) Input current is adjusted to 51.85 A to get output current of 50 A.
3) Device parameter
Xd = 0
dXd /dVDS = 0.02 m/V
Ld = 0.09 m

Contact: AMiglani2014@gmail.com

1
80108

= 194.5 A/V 2