Ultralow Offset Voltage

Operational Amplifier
OP07

Data Sheet

PIN CONFIGURATION

Low VOS: 75 V maximum

Low VOS drift: 1.3 V/C maximum
Ultrastable vs. time: 1.5 V per month maximum
Low noise: 0.6 V p-p maximum
Wide input voltage range: 14 V typical
Wide supply voltage range: 3 V to 18 V
125C temperature-tested dice

VOS TRIM

OP07

VOS TRIM

IN

V+

+IN

OUT

NC

00316-001

FEATURES

NC = NO CONNECT

Figure 1.

APPLICATIONS
Wireless base station control circuits
Optical network control circuits
Instrumentation
Sensors and controls
Thermocouples
Resistor thermal detectors (RTDs)
Strain bridges
Shunt current measurements
Precision filters

The wide input voltage range of 13 V minimum combined

with a high CMRR of 106 dB (OP07E) and high input
impedance provide high accuracy in the noninverting circuit
configuration. Excellent linearity and gain accuracy can be
maintained even at high closed-loop gains. Stability of offsets
and gain with time or variations in temperature is excellent. The
accuracy and stability of the OP07, even at high gain, combined
with the freedom from external nulling have made the OP07 an
industry standard for instrumentation applications.

GENERAL DESCRIPTION

The OP07 is available in two standard performance grades. The

OP07E is specified for operation over the 0C to 70C range,
and the OP07C is specified over the 40C to +85C
temperature range.

The OP07 has very low input offset voltage (75 V maximum for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external
nulling. The OP07 also features low input bias current (4 nA for
the OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offset and high open-loop gain make the OP07
particularly useful for high gain instrumentation applications.

The OP07 is available in epoxy 8-lead PDIP and 8-lead narrow

SOIC packages. For CERDIP and TO-99 packages and standard
microcircuit drawing (SMD) versions, see the OP77.

V+
7

R2B1

R2A1
1

R1A

(OPTIONAL
NULL)

R7

C1
8

R1B
Q19
Q10

Q9

INVERTING
INPUT

R3

Q6

Q4
Q27

Q21

Q23

Q22

Q24

C2

R10

Q16

Q26

Q20
Q15

Q2

Q25
Q14

2
Q13

4
V
1 R2A

OUT
6
Q17

R5

Q1
R4

C3

Q12

AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY FOR MINIMUM INPUT OFFSET VOLTAGE.

Q18
R6

R8
00316-002

NONINVERTING
INPUT 3

Q3

Q5

R9
Q11

Q8

Q7

Figure 2. Simplified Schematic

Rev. G

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 2002-2011 Analog Devices, Inc. All rights reserved.

OP07

Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1

Absolute Maximum Ratings ............................................................6

Applications ....................................................................................... 1

Thermal Resistance .......................................................................6

General Description ......................................................................... 1

ESD Caution...................................................................................6

Pin Configuration ............................................................................. 1

Typical Performance Characteristics ..............................................7

Revision History ............................................................................... 2

Typical Applications ....................................................................... 11

Specifications..................................................................................... 3

Applications Information .......................................................... 12

OP07E Electrical Characteristics ............................................... 3

Outline Dimensions ....................................................................... 13

OP07C Electrical Characteristics ............................................... 4

Ordering Guide .......................................................................... 14

REVISION HISTORY
10/11Rev. F. to Rev G
Changes to Features Section............................................................ 1
8/10Rev. E. to Rev F
Changes to Ordering Guide .......................................................... 14
7/09Rev. D. to Rev E
Changes to Figure 29 Caption....................................................... 11
Changes to Ordering Guide .......................................................... 14
7/06Rev. C. to Rev D
Changes to Features.......................................................................... 1
Changes to General Description .................................................... 1
Changes to Specifications Section .................................................. 3
Changes to Table 4 ............................................................................ 6
Changes to Figure 6 and Figure 8 ................................................... 7
Changes to Figure 13 and Figure 14 ............................................... 8
Changes to Figure 20 ........................................................................ 9
Changes to Figure 21 to Figure 25 ................................................ 10
Changes to Figure 26 and Figure 30 ............................................. 11
Replaced Figure 28 ......................................................................... 11
Changes to Applications Information Section............................ 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14

8/03Rev. B to Rev. C
Changes to OP07E Electrical Specifications ..................................2
Changes to OP07C Electrical Specifications .................................3
Edits to Ordering Guide ...................................................................5
Edits to Figure 6 .................................................................................9
Updated Outline Dimensions ....................................................... 11
3/03Rev. A to Rev. B
Updated Package Titles ...................................................... Universal
Updated Outline Dimensions ....................................................... 11
2/02Rev. 0 to Rev. A
Edits to Features.................................................................................1
Edits to Ordering Guide ...................................................................1
Edits to Pin Connection Drawings .................................................1
Edits to Absolute Maximum Ratings ..............................................2
Deleted Electrical Characteristics .............................................. 23
Deleted OP07D Column from Electrical Characteristics ....... 45
Edits to TPCs ................................................................................ 79
Edits to High-Speed, Low VOS Composite Amplifier ...................9

Rev. G | Page 2 of 16

Data Sheet

OP07

SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS
VS = 15 V, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
TA = 25C
Input Offset Voltage 1
Long-Term VOS Stability 2
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density

Symbol

VOS
VOS/Time
IOS
IB
en p-p
en

Input Noise Current

Input Noise Current Density

In p-p
In

Input Resistance, Differential Mode 4

Input Resistance, Common Mode
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain

RIN
RINCM
IVR
CMRR
PSRR
AVO

0C TA 70C
Input Offset Voltage1
Voltage Drift Without External Trim4
Voltage Drift with External Trim3
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
OUTPUT CHARACTERISTICS
TA = 25C
Output Voltage Swing

0C TA 70C
Output Voltage Swing

VOS
TCVOS
TCVOSN
IOS
TCIOS
IB
TCIB
IVR
CMRR
PSRR
AVO

Conditions

Min

Typ

Max

Unit

30
0.3
0.5
1.2
0.35
10.3
10.0
9.6
14
0.32
0.14
0.12
50
160
14
123
5
500
400

75
1.5
3.8
4.0
0.6
18.0
13.0
11.0
30
0.80
0.23
0.17

V
V/Month
nA
nA
V p-p
nV/Hz
nV/Hz
nV/Hz
pA p-p
pA/Hz
pA/Hz
pA/Hz
M
G
V
dB
V/V
V/mV
V/mV

130
1.3
1.3
5.3
35
5.5
35

180

45
0.3
0.3
0.9
8
1.5
13
13.5
123
7
450

0.1 Hz to 10 Hz 3
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
15

VCM = 13 V
VS = 3 V to 18 V
RL 2 k, VO = 10 V
RL 500 , VO = 0.5 V, VS = 3 V4

13
106
200
150

RP = 20 k

VCM = 13 V
VS = 3 V to 18 V
RL 2 k, VO = 10 V

13
103

20

32

V
V/C
V/C
nA
pA/C
nA
pA/C
V
dB
V/V
V/mV

VO

RL 10 k
RL 2 k
RL 1 k

12.5
12.0
10.5

13.0
12.8
12.0

V
V
V

VO

RL 2 k

12

12.6

Rev. G | Page 3 of 16

OP07
Parameter
DYNAMIC PERFORMANCE
TA = 25C
Slew Rate
Closed-Loop Bandwidth
Open-Loop Output Resistance
Power Consumption

Data Sheet
Symbol

Conditions

Min

Typ

SR
BW
RO
Pd

RL 2 k3
AVOL = 1 5
VO = 0, IO = 0
VS = 15 V, No load
VS = 3 V, No load
RP = 20 k

0.1
0.4

0.3
0.6
60
75
4
4

Offset Adjustment Range

Max

120
6

Unit

V/s
MHz

mW
mW
mV

Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
Long-term input offset voltage stability refers to the averaged trend time of VOS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 V. Refer to the Typical Performance Characteristics section. Parameter is
sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
1
2

OP07C ELECTRICAL CHARACTERISTICS

VS = 15 V, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
TA = 25C
Input Offset Voltage 1
Long-Term VOS Stability 2
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Voltage Density

Symbol

VOS
VOS/Time
IOS
IB
en p-p
en

Input Noise Current

Input Noise Current Density

In p-p
In

Input Resistance, Differential Mode 4

Input Resistance, Common Mode
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain

RIN
RINCM
IVR
CMRR
PSRR
AVO

40C TA +85C
Input Offset Voltage1
Voltage Drift Without External Trim4
Voltage Drift with External Trim3
Input Offset Current
Input Offset Current Drift
Input Bias Current
Input Bias Current Drift
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain

VOS
TCVOS
TCVOSN
IOS
TCIOS
IB
TCIB
IVR
CMRR
PSRR
AVO

Conditions

Min

0.1 Hz to 10 Hz3
fO = 10 Hz
fO = 100 Hz 3
fO = 1 kHz
fO = 10 Hz
fO = 100 Hz3
fO = 1 kHz
8

VCM = 13 V
VS = 3 V to 18 V
RL 2 k, VO = 10 V
RL 500 , VO = 0.5 V, VS = 3 V4

13
100
120
100

RP = 20 k

VCM = 13 V
VS = 3 V to 18 V
RL 2 k, VO = 10 V
Rev. G | Page 4 of 16

13
97
100

Typ

Max

Unit

60
0.4
0.8
1.8
0.38
10.5
10.2
9.8
15
0.35
0.15
0.13
33
120
14
120
7
400
400

150
2.0
6.0
7.0
0.65
20.0
13.5
11.5
35
0.90
0.27
0.18

V
V/Month
nA
nA
V p-p
nV/Hz
nV/Hz
nV/Hz
pA p-p
pA/Hz
pA/Hz
pA/Hz
M
G
V
dB
V/V
V/mV
V/mV

85
0.5
0.4
1.6
12
2.2
18
13.5
120
10
400

32

250
1.8
1.6
8.0
50
9.0
50

51

V
V/C
V/C
nA
pA/C
nA
pA/C
V
dB
V/V
V/mV

Data Sheet
Parameter
OUTPUT CHARACTERISTICS
TA = 25C
Output Voltage Swing

40C TA +85C
Output Voltage Swing
DYNAMIC PERFORMANCE
TA = 25C
Slew Rate
Closed-Loop Bandwidth
Open-Loop Output Resistance
Power Consumption
Offset Adjustment Range

OP07
Symbol

Conditions

Min

Typ

Max

VO

RL 10 k
RL 2 k
RL 1 k

12.0
11.5

13.0
12.8
12.0

V
V
V

VO

RL 2 k

12

12.6

SR
BW
RO
Pd

RL 2 k3
AVOL = 1 5
VO = 0, IO = 0
VS = 15 V, No load
VS = 3 V, No load
RP = 20 k

0.1
0.4

0.3
0.6
60
80
4
4

V/s
MHz

mW
mW
mV

150
8

Unit

Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
Long-term input offset voltage stability refers to the averaged trend time of VOS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 V. Refer to the Typical Performance Characteristics section. Parameter is
sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
1
2

Rev. G | Page 5 of 16

OP07

Data Sheet

ABSOLUTE MAXIMUM RATINGS

Table 3.
Parameter
Supply Voltage (VS)
Input Voltage1
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
S and P Packages
Operating Temperature Range
OP07E
OP07C
Junction Temperature
Lead Temperature, Soldering (60 sec)
1

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Ratings
22 V
22 V
30 V
Indefinite
65C to +125C
0C to 70C
40C to +85C
150C
300C

For supply voltages less than 22 V, the absolute maximum input voltage is
equal to the supply voltage.

THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
8-Lead PDIP (P-Suffix)
8-Lead SOIC_N (S-Suffix)

JA
103
158

ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. G | Page 6 of 16

JC
43
43

Unit
C/W
C/W

Data Sheet

OP07

TYPICAL PERFORMANCE CHARACTERISTICS

1.0

MAXIMUM ERROR REFERRED TO INPUT (mV)

VS = 15V
900

700
600
500
400
300
200

0
75

50

25

25

50

75

100

125

TEMPERATURE (C)

0.6

0.4

OP07C
0.2

OP07E
0
100

00316-003

100

0.8

1k

Figure 3. Open-Loop Gain vs. Temperature

1.2

25

20

15

THERMAL
SHOCK
RESPONSE
BAND

10

DEVICE IMMERSED
IN 70C OIL BATH

0
20

20

40

60

80

100

TIME (Seconds)

1.0

0.8

0.6

0.4
OP07C
0.2
OP07E
0
100

00316-004

VS = 15V
0C TA 70C

Figure 4. Offset Voltage Change due to Thermal Shock

30

NONINVERTING INPUT BIAS CURRENT (nA)

VS = 15V
TA = 25C
20

15

OP07C
OP07E

0
1

TIME AFTER SUPPLY TURN-ON (Minutes)

00316-005

10k

100k

Figure 7. Maximum Error vs. Source Resistance

25

10

1k

MATCHED OR UNMATCHED SOURCE RESISTANCE ()

00316-007

MAXIMUM ERROR REFERRED TO INPUT (mV)

VS = 15V
TA = 25C, TA = 70C

ABSOLUTE CHANGE IN INPUT

OFFSET VOLTAGE (V)

100k

Figure 6. Maximum Error vs. Source Resistance

30

ABSOLUTE CHANGE IN INPUT

OFFSET VOLTAGE (V)

10k

MATCHED OR UNMATCHED SOURCE RESISTANCE ()

Figure 5. Warm-Up Drift

20

AT |VDIFF| 1.0V, | IB | 7nA (OP07C)

VS = 15V
TA = 25C

10

10

20

30
30

20

10

10

20

DIFFERENTIAL INPUT VALUE (V)

Figure 8. Input Bias Current vs. Differential Input Voltage

Rev. G | Page 7 of 16

30

00316-008

OPEN-LOOP GAIN (V/mV)

800

VS = 15V
TA = 25C

00316-006

1000

OP07

Data Sheet

1000

INPUT NOISE VOLTAGE (nV/ Hz)

INPUT BIAS CURRENT (nA)

VS = 15V

OP07C
2

OP07E

RS1 = RS2 = 200k

THERMAL NOISE SOURCE
RESISTORS INCLUDED
EXCLUDED
100

RS = 0

10

50

25

25

50

75

100

125

TEMPERATURE (C)

00316-009

0
75

10

Figure 9. Input Bias Current vs. Temperature

1000

Figure 12. Total Input Noise Voltage vs. Frequency

2.5

10
VS = 15V
TA = 25C

VS = 15V

RMS NOISE (V)

2.0

1.5

1.0
OP07C

0.5

75

50

25

25

50

75

100

TEMPERATURE (C)

0.1
100

00316-010

0
100

1k

10k

100k

BANDWIDTH (Hz)

Figure 10. Input Offset Current vs. Temperature

00316-013

OP07E

Figure 13. Input Wideband Noise vs. Bandwidth,

0.1 Hz to Frequency Indicated
130

REFERRED TO INPUT
5mV/CM AT OUTPUT

120
110
OP07C

CMRR (dB)

VOLTAGE (200nV/DIV)

100
90
80

TIME (1s/DIV)

60
1

10

100

1k

FREQUENCY (Hz)

Figure 14. CMRR vs. Frequency

Figure 11. Low Frequency Noise

Rev. G | Page 8 of 16

10k

100k

00316-014

70

00316-011

INPUT OFFSET CURRENT (nA)

100
FREQUENCY (Hz)

00316-012

VS = 15V
TA = 25C

Data Sheet

OP07
100

120

VS = 15V
TA = 25C

TA = 25C
110

80

CLOSED-LOOP GAIN (dB)

OP07C

90
80
70

60

40

20

60

10

100

1k

10k

FREQUENCY (Hz)

20
10

00316-015

50
0.1

Figure 15. PSRR vs. Frequency

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

00316-018

PSRR (dB)

100

Figure 18. Closed-Loop Frequency Response for Various Gain Configurations

28

1000

VS = 15V
TA = 25C

TA = 25C

PEAK-TO-PEAK AMPLITUDE (V)

24

OPEN-LOOP GAIN (V/mV)

800

600

400

200

20
16
12
8

10

15

20

POWER SUPPLY VOLTAGE (V)

0
1k

00316-016

20
VS = 15V
VIN = 10mV
TA = 25C

80

MAXIMUM OUTPUT (V)

15

60
40
20
0

POSITIVE SWING
NEGATIVE SWING

10

40
0.1

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

10M

Figure 17. Open-Loop Frequency Response

0
100

1k

10k

LOAD RESISTANCE TO GROUND ()

Figure 20. Maximum Output Voltage vs. Load Resistance

Rev. G | Page 9 of 16

00316-020

20

00316-017

OPEN-LOOP GAIN (dB)

1M

Figure 19. Maximum Output Swing vs. Frequency

VS = 15V
TA = 25C

100

100k
FREQUENCY (Hz)

Figure 16. Open-Loop Gain vs. Power Supply Voltage

120

10k

00316-019

OP07

Data Sheet
30.0

100

10

1
0

10

20

30

40

50

60

TOTAL SUPPLY VOLTAGE, V+ TO V (V)

VOS TRIMMED TO < 5V AT 25C

NULLING POT = 20k
22.5
OP07C
15.0
OP07C
OP07E
7.5
OP07E

0
100

00316-021

25

50

75

100

TOTAL DRIFT WITH TIME (V)

12

30

25
VIN (PIN 3) = +10mV, VO = 15V

VIN (PIN 3) = 10mV, VO = +15V

0.3V/MONTH
TREND LINE

0.3V/MONTH
TREND LINE

0.2V/MONTH
TREND LINE

0.3V/MONTH
TREND LINE

0.2V/MONTH
TREND LINE

0.2V/MONTH
TREND LINE

4
8
12

TIME FROM OUTPUT BEING SHORTED (Minutes)

00316-022

OUTPUT SHORT-CIRCUIT CURRENT (mA)

16

15

Figure 22. Output Short-Circuit Current vs. Time

VS = 15V
RS = 100
OP07C
63.75

42.50
OP07E

50

25

25

50

75

100

TEMPERATURE (C)

125

00316-023

21.25

0
75

16
0

TIME (Months)

Figure 25. Offset Voltage Drift vs. Time

85.00

ABSOLUTE VALUE OF OFFSET VOLTAGE (V)

25

Figure 24. Trimmed Offset Voltage vs. Temperature

VS = 15V
TA = 25C

20

50

TEMPERATURE (C)

Figure 21. Power Consumption vs. Power Supply

35

75

Figure 23. Untrimmed Offset Voltage vs. Temperature

Rev. G | Page 10 of 16

10

11

12

00316-025

POWER CONSUMPTION (mW)

TA = 25C

00316-024

ABSOLUTE VALUE OF OFFSET VOLTAGE (V)

1000

Data Sheet

OP07

TYPICAL APPLICATIONS
RF

R3
3k

V+
7

AD7115 OR
AD8510

R5
6 10k

OP07C

4
V

EIN
10V

EO

R1
10k

FD333
D1

EO = EIN RF IB RF
R1

Figure 26. Typical Offset Voltage Test Circuit

FD333
D2

R2
10k

OP07

OP07
4

R2
100k

A1
3

V+

00316-026

V+

R5
10k

R4
10k

R3
10k

V+

EO
0V TO +10V

+
4
V
00316-029

SUM MODE
BIAS

R1 R2
=
R3 R4

Figure 29. Absolute Value Circuit

RF
R1

SUM MODE
BIAS

R4
10k

E3

R2
10k

3
6

OP07C
3

OP07C

R1
6 10k

EO

R5
2.5k

4
15V

EO

+
4

R2
100k

A2

A1

R3
10k

OP07C

V+
7

EO = EIN RF + IB RF
R1

NOTES
1. PINOUT SHOWN FOR P PACKAGE

Figure 27. Typical Low Frequency Noise Circuit

Figure 30. High Speed, Low VOS Composite Amplifier

R4
10k

E1
20k
V+

E2

INPUT
+

8
7

OP07
3

E3

+15V

R2
10k

R3
10k

OP07
3

OUT

EO

R5
2.5k

R1
10k

4
15V

NOTES
1. PINOUT SHOWN FOR P PACKAGE

Figure 28. Optional Offset Nulling Circuit

Figure 31. Adjustment-Free Precision Summing Amplifier

Rev. G | Page 11 of 16

00316-031

E2

+15V

00316-027

E1

R1
10k

R3
3k

V+

00316-030

EIN

00316-028

EIN

R1

OP07

Data Sheet
R1

SENDING
JUNCTION

R3

APPLICATIONS INFORMATION

V+

The OP07 provides stable operation with load capacitance of up

to 500 pF and 10 V swings; larger capacitances should be
decoupled with a 50 decoupling resistor.

OP07

REFERENCE
JUNCTION

R2

Stray thermoelectric voltages generated by dissimilar metals at

the contacts to the input terminals can degrade drift
performance. Therefore, best operation is obtained when both
input contacts are maintained at the same temperature,
preferably close to the package temperature.

R1 R2
=
R3 R4

4
R4

EO

00316-032

NOTES
1. PINOUT SHOWN FOR P PACKAGE

Figure 32. High Stability Thermocouple Amplifier

R3
10k

R4
10k

R5
10k
V+

V+
R1
10k

FD333
D1

OP07
A2

OP07
A1
3

FD333
D2

R2
10k

EO
0V TO +10V

+
4
V

VA

NOTES
1. PINOUT SHOWN FOR P PACKAGE

00316-033

EIN
10V

Figure 33. Precision Absolute-Value Circuit

Rev. G | Page 12 of 16

Data Sheet

OP07

OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)

5
4

6.20 (0.2441)
5.80 (0.2284)

1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)

1.75 (0.0688)
1.35 (0.0532)

0.51 (0.0201)
0.31 (0.0122)

COPLANARITY
0.10
SEATING
PLANE

0.50 (0.0196)
0.25 (0.0099)

45

8
0
0.25 (0.0098)
0.17 (0.0067)

1.27 (0.0500)
0.40 (0.0157)

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

012407-A

4.00 (0.1574)
3.80 (0.1497)

Figure 34. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)

0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8

0.280 (7.11)
0.250 (6.35)
0.240 (6.10)

0.100 (2.54)
BSC

0.060 (1.52)
MAX

0.210 (5.33)
MAX
0.015
(0.38)
MIN

0.150 (3.81)
0.130 (3.30)
0.115 (2.92)

SEATING
PLANE

0.022 (0.56)
0.018 (0.46)
0.014 (0.36)

0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)

0.015 (0.38)
GAUGE
PLANE

0.005 (0.13)
MIN

0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX

COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 35. 8-Lead Plastic Dual-in-Line Package [PDIP]

P-Suffix
(N-8)
Dimensions shown in inches and (millimeters)

Rev. G | Page 13 of 16

070606-A

0.070 (1.78)
0.060 (1.52)
0.045 (1.14)

OP07

Data Sheet

ORDERING GUIDE
Model 1
OP07EPZ
OP07CPZ
OP07CSZ
OP07CSZ-REEL
OP07CSZ-REEL7
1

Temperature Range
0C to 70C
40C to +85C
40C to +85C
40C to +85C
40C to +85C

Package Description
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N

Z = RoHS Compliant Part.

Rev. G | Page 14 of 16

Package Option
N-8 (P-Suffix)
N-8 (P-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)
R-8 (S-Suffix)

Data Sheet

OP07

NOTES

Rev. G | Page 15 of 16

OP07

Data Sheet

NOTES

2002-2011 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D00316-0-10/11(G)

Rev. G | Page 16 of 16