thus achieve the change in output voltage among Vout, 0.5x Vout 'IGIII "en 1
and 0.25x Vout• The operating frequency of the resonant tank is
the same in all three cases. Therefore, the converter can be de D" D,2
signed to operate at the optimal operating point to maintain high +
1151
9781457720888/11/$26.00 mOl21EEE
former. Thus, the power density of the converter can be in Therefore, the output voltage of the converter can be described
creased. The switching frequency of the converter is designed as follow,
to be lower than the resonant frequency of the resonant tanle
The magnetizing current is used to achieve the ZVS condition. (1)
Furthermore, the converter is operated in the region where the
DC gain is insensitive to the load variations. As a result, the
converter operates in an open loop manner which allows the Whereas Vout is the output voltage of the fivelevel resonant
optimization of the transformer and converter design. It is im converter, Np and Ns are the number of turns of primary and
portant to mention that this operation mode will require an ad secondary winding of the transformer and I is the number of
ditional conversion stage which will take care of the characte levels of the modulation strategies. Therefore, the output vol
ristics demanded by the load. Due to the LLC resonant tank tages of the resonant converter are VOUb 0.5x Vout and 0. 25x Vout
characteristics, the diodes on the secondary side, Dr! to Dr4, with respect to twolevel, threelevel and fivelevel modulation
operate under ZCS condition. Thus, the reverse recovery losses strategies.
are minimized. Due to this reason, standard ultrafast Si diodes
A. Twolevel Modulation
can be used. The converter is operated with a twolevel, three
level or fivelevel modulation strategy without penalizing the Figure 2 shows the timing diagram of twolevel modulation.
performance. The converter behaves as a power electronic The operation is similar to the typical twolevel resonant con
transformer with a variable turns ratio. Figure 2, Figure 4 and verter by applying a square waveform to the resonant tank, vAB,
Figure 5 show the gate signals and the key waveforms for the with a peak value equals to Vin.
proposed modulation strategies. In order to guarantee the same
In the positive half cycle, Sl, Sz, S7 and Sg are closed. VAB
DC gain despite of the input/output voltage variations, the con
equals to Vin. Drl and Dr4 are conducting in this mode. The re
duction time of the switches S), Sz, Ss and S7 has to be equal
sonant tank is excited by the input voltage and the resonant
and constant in all given modulation strategies. Tn order to meet
tank current, iLr, is flowing in the positive direction.
this requirement, the switching frequency in each modulation
strategy is different. Tn this case, the switching frequency will In the negative half cycle, S3, S4, Ss and S6 are closed. vAB
be Is for the twolevel modulation, O.5xls for threelevel mod equals to zero. Drz and Dr3 are conducting in this mode. The
ulation and 0.25xls for fivelevel modulation. Therefore, an resonant tank is excited by the resonant capacitor voltage, vcr,
equal equivalent frequency across the resonant tanl... and trans which contains a DC component, and iLr flows in the negative
former are achieved despite of the modulation strategies. The direction.
combination of the fivelevel structure with the LLC resonant
tank allows high frequency operation with high efficiency. Tn In the twolevel modulation, four of the switches have to
this way, the power density of the DCDC converter is in share the full dc link voltage. Sl, Sz, S7 and Sg for the positive
creased when compared with the state of the art ZVS PWM half cycle and S3 to S6 for the negative half cycle. Theoretically,
converters in wide voltage range operation. four of them are switching at the same time in order to evenly
share the dc link voltage. However, the voltage balancing be
tween the MOSFETs is not guaranteed because of the tolerance
m. OPERATING PRINCIPLE
of the parasitic drainsource capacitances, Cds, and the timing
This section presents the operation principle of the pro of the gate signals. Moreover, Cds is very sensitive to drain
posed solution. As mentioned, for voltage conversion from e.g. source voltage and behave highly nonlinear. This makes diffi
a fixed input to a wide output voltage range, it can be realized cult that the drainsource voltage of MOSFETs is naturally
by a single stage resonant converter. However, due to the wide "
f'
operating range, the converter design, and thus the converter's S,S, S,.S S .s,
v. .",
efficiency and performance, can only be optimized at a single .
s.,. s� S.S S,.5
operating point. Tn order to keep a good performance through i"
out the operating range, a two stage solution with a front stage
fivelevel LLC series resonant converter cascaded by a buck
type converter is proposed. This configuration can maintain the
efficiency nearly constant throughout the operating range and
simplified the filter requirements of the buck type converter as
the duty cycle is confmed to a narrower range. In addition, the
rms current in the converter is also minimized. The following
description will be focused on the voltage conversion from a
fixed input to a wide output range. The operation mode for a
voltage conversion with the opposite characteristic, wide input
voltage range to a fixed output voltage, is the same.
The fivelevel resonant converter can provide three differ
ent output voltage levels according to the modulation strategies.
As mentioned before, the converter is designed to work with
fixed switching frequency and the DC gain is close to unity.
Figure 2: Timing diagram of the twolevel modulation strategy,
1152
before mode 1 and the drainsource voltage of S3 to S6 is equal
to a quarter of Vin respectively. The resonant tank current, iLr,
Co. flows in the positive direction.
,
1153
"
""
5,5
",
l'
S, S, s,
'.
.<
S"S, s s.
:
i" ",
S, ,s::'
1S3.1.s.l_I�.1S61
I,
i 'n, 'so,
InlrlJllo : i.l1,.i i i
,
s.. n.. ,..
.. !
1 _ _ • _ I , • • I
" �, r�,��,��T�i,���.
'". '
r�.
,
\1S).1I.....
,
ltSS. VStt
v
"2 ::i .,
   \
1154
'.j,,;."� Dd Dr1
it.. . iz... ':i:'s .
v B ... L. � CtIIIl' Rioad "DIll
t "AB L .. r'r"''; C"", RbJd V0Iif
��_,
c.
r
c, As the converter is designed to operate in open loop and in
an operating point insensitive to load variations, the turns ratio
of the transformer will be defmed by the critical output and
(b) Mode 2 [II  12], mode 4 [11  I.], mode 6 [15  10] and mode 8 [17  Is]. input voltages defined by the given specifications. For this pa
per, the critical conditions are minimum input voltage and
maximum output voltage.
S.
L• ..
"
e.u, .A
v"..
(12)
D"
J
s,
i""
j ."
t.'
L. C"'" R"; • Determination of the minimum magnetizing current,
"AB
¢ S,
v""
hm,mim and magnetizing inductance of the transformer, Lm:
D�
S,  "('f
. The maximum magnetizing current is determined based on
the need to fully charge and discharge the parasitic Cds of the
C,
MOSFETs and the transformer equivalent capacitance during
the time t2 < t < t3 as shown in Figure 2. By using Table T, one
can conclude that the magnetizing current for fivelevel mod
(c) Mode 3 [12 IJ]. 
ulation is the most demanding. It is reproduced here for con
vemence.
T, /I,.t
Irm,min =8 (13)
2 Cds + C
r
D"
• Determination of the Q factor:
it.z" �/'::jf
rs.JJ 
...
+
\'
B L"'I COlli Rb:Jd v(Mjf
" In order to minimize the circulating energy and rms current a
,JI''.
small quality factor value, Q for rated power should be set. Q =
"c.
0.2 is a desired value[10].
'·'r�f·�·
  c,
• Determination of the resonant tank, Lr and Cr:
s,
With the information of turns ratio and Lm, the transformer
(d) Mode 5 [t.  t5]. can be built. In order to increase the power density of the con
verter, the leakage inductance of the transformer is utilized as
the resonant inductor, Lr, rather than using an additional induc
1155
� III " II I � ::�:]
tor. Therefore, the resonant capacitor, C, can be determined by
the measured value of Lr and (8),
�l II II II j' ')
(14)
I I I I VQ"'�I
1''II .
Css is part of the energy source for the resonant for three
level and fivelevel modulations. The voltage variation on Css
will be reflected on the drainsource voltage of the switches in
I
those modulation modes. Therefore, by setting allowable vol
tage variation across the capacitor, L1VCs" the capacitance of Css VQ •• 8
 V; '.
can be determined as follow: 7
�lItDj
(IS)
"'J
!\ A f\ f\ Ad"V'' = :
where k is the allowable percentage of voltage variation on VCss'
'I;�� \J V V V
V. SIMULATION AND EXPERIMENTAL VERIFICATION
�lL
7 shows the simulation results of the key waveforms of the
proposed converter at an operating condition of 17k W and
ISOkHz resonant frequency. The switching pattern of the gate
:�'
signals is modified according to the modulation scheme. It is ______ 
v'" ,
I 
important to observe that the operating frequency of the reso (b)
�l II
nant tank remains unchanged. The output voltage is set to
66SV, 333V and 16SV for the twolevel, threelevel and five
�lll II 'J
 V;._
)
.. .
�l II II
V;>_$'
v�
�1
�l II II  ,
v�. 611
_v;,,jI'
=:=l
]ItII� ,..  jI
�'
f\ f\ /\ (\ f\, (\
I""
IIG
G J \ 1  Ir"
r \J VVV' VVV \J 1
•
·ltII
 v...,
1111
Il'l
IJQ
(e)
Figure 7: Simulation results of the key waveforms for the three modulations (a)
twolevel, (b) threelevel and (e) fivelevel modulations.
(a)
1156
.,./'Lr;
Table II. Design parameters and resulting component values for the resonant
converter prototype. "
\
�\ r,,
Items Value Items Value
;; 150kHz Cd, 2.04nF
n 0.58 C, l20pF ,
,, ,,
f" 0.95 LIt 600ns ,
:, :, I
i
32J.lF
I"
Dd D,.
!,,
4 x IRFP4768PbF APT2xlOIDQI20J
:
S1S, ,,
,,
i
\/ILr
,
11 1
:'
      
""'rr ,. , , . . r rr_="".=
__ _ =;]
_ ""
:, '
,,
,, .
_'Hh"'... , :
/\ _100 ..
.., "
f <...
,
i \
..
1:;
• 00'
� ..
: ! \ "\
, , \ : Figure 10: Experimental key waveforms with the proposed fivelevel modula
\ ;
1 '
tion.
�
� � i ·.......
I:
"
............ '>••"a.r
J : ,
1\
.
, :: t,t :'.� :.
.1 , I
: ; :, .  '..
: '"
1
\
,f ,
I l� �'
, r I I I "
,
,
)
, 'j:
.5 H
: .>1'
,: . I '; i
"
��� tl ;�
:�
:
: �
: , ." ,
e� ! li ,ru n,hili I' Ii..... Uf.;' j
i U:....'t
�$i 'I Ii Ii!) 'I¢Ii Il: Ii q.,.. q: * pI,�
j5l'l ; IiIi PYY
�:;I
..' ;
1.6 , B :!I !I! ,� 150
I
I) (IS ! •
.10'
FIv.ln.1 mQdulJidon. P0.1. • 5kW
Figure 8: Experimental key waveforms with the proposed twolevel modula I� " •• ; Iii "T: Till; if t1Z 1. II • :.
tion.
__ �.S,.I. 1 nl.�."_1 ::r. ,••
:
u II l I 1 l .i
(''''�.tJ,4'Qi1#_�:
ii • J.!
l\ .�'
. \
\ \'.48
Figure 11: Experimental output voltage and current waveforms of twolevel
(top), threelevel (middle) and fivelevel (bottom) modulations.
1157
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,"
9750
.r
9'00
2S.5cm
9250 , .
 .�J '
' ,
..
9000
S7 SO
 Buck type .::on'"Cl1cr
.,00 +Tow
22.0cm
(a) (b)
Figure 13: Photos of the experimental prototype (a) the proposed 5level reso
50 100 ISO 200 250 300 j50 400 HO 500 550 600 650
nant converter and (b) buck derived converter.
.;,,(\")
Figure 12: Efficiency curves of the proposed fivelevel resonant converter operations of the converter are in good agreement with theoret
with the proposed modulation strategies. ical prediction.
It is important to mention that the design of the resonant REFERENCES
converter is simple as it only operates at the optimal operating [1] M. Kheraluwala, R. Gascoigne, D. Divan, and E. Baumann,
point. Tn this way, the circulating and rms current in the con "Performance characterization of a highpower dual active bridge DC
verter are minimized allowing a positive impact in the design toDC converter," IEEE Trans. on Industry Applications, vol. 28, no. 6,
of the transformer. As mentioned, the voltage steps feature pp. 12941301, Nov.lDec. 1992.
provided by the resonant converter also result in a simplifica [2] L. Yang, T. Zhao and A. Huang, "Design and Analysis of a 270kW
tion in the design of the second stage converter. As a result, the Fivelevel DCIDC Converter for Solid State Transformer Using 19kV
SiC Power Devices," in Proc. of the IEEE Power Electronics specialists
overall system will present high efficiency as shown in Figure Conference (PESC '07), June 2007, 00. 245251.
12, and power density despite of the sever output voltage varia
[3] Y. Nomura, "Power Supply device for Electromotive Railcar," US
tions. Patent 6 399 904, 2002.
Finally, Figure 13 shows the experimental prototype. Fig [4] R. Steigerwald, "A comparison of halfbridge resonant converter
topologies," IEEE Trans. on Power Electronics, vol. 3, no. 2, pp. 174
ure 13 (a) shows the primary side of the proposed fivelevel 182, April 1988.
resonant converter and Figure 13 (b) shows the secondary side
[5] R. P. Severns, "Topologies for threeelement resonant converters," IEEE
of the output rectification and output capacitor and the second Trans. on Power Electronics, vol. 7, no. 1, pp. 8998, Jan. 1992.
stage buck type converter. The buck type is not described as it [6] J. Sabate and F. Lee, "OffLine Application of the FixedFrequency
is out of the scope of the paper. The power density of the over ClampedMode Series Resonant Converter," IEEE Trans. on Power
3
all converter is IkW/dm . ElectroniCS, vol. 6, no. I, pp. 3947, Jan. 1991.
verter with frequency control. A 17kW, 750V input, SOV to 1, pp. 1118, 2003.
600V output converter has been built and evaluated. The
1158