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Powering Your Ideas.TM
Kenneth W. Fernald
Chief Technical Officer
Zilker Labs, Inc.
Presentation Overview
What Is PMBus?
SMBus/I2C
PMBus basics
Using PMBus in the lab
Implementing PMBus
Command language
overview
Data formats
What Is PMBus?
A standard way
to communicate
with power converters
over a digital
communications bus
3
Configure
PMBus
Device
System
Configure
PMBus
Device
Configure
Control
PMBus
Device
System
Configure
Control
PMBus
Device
Configure
Control
System
Monitor
PMBus
Device
Monitor
Configure
Control
PMBus
Device
Configure
Control
System
Configure
PMBus
System Maintenance Processor
Device
Monitor
Or
Spare Gates In An FPGA
Or
Laptop Computer
Monitor
Or
PMBusIC
Dedicated Controller
Control
Or Device
General Purpose Microcontroller
Or
Automatic Test Equipment
Owned by the
System Management Interface Forum (SM-IF)
SM-IF membership is open to all
Royalty free
Released specifications freely available
Works with all types of power converters
No converter-to-converter communication
10
11
Founders
Artesyn Technologies
Emerson/Astec
Texas Instruments
Intersil
Microchip Technology
Summit Microelectronics
Volterra Semiconductor
Zilker Labs
Supporters
12
System Management
Interface Forum, Inc.
SM-IF Membership
Open To Any And All
www.powerSIG.org
13
Specification Structure
Commands
Data formats
Control, monitoring
Fault management
Status reporting
Information storage
14
Based on IC
15
16
I2C Features
17
I2C Benefits
18
The I2C-Bus
19
Key terminology
20
21
I2C Bit-Transfer
One clock pulse is generated for each data bit that is transferred
Data Validity
The data on the SDA line must be stable during the HIGH(1) period
of the clock. The data line(SDA) can change data only when the
clock signal (SCL) is LOW(0)
22
23
24
Acknowledgement Scheme
25
Acknowledgement Scheme
When receiving data, the master must signal the end of data to
the slave by NACKing the last byte
The slave must release the data line to allow the master to
generate a STOP or repeated START condition
26
7-Bit Addressing
The slave address is contained in the first byte after the START
The first 7 bits contain the address and LSB contains the
direction of transfer(R/W : 0 = write;1= read)
When an address is sent, each device compares the first seven
bits and considers itself addressed.
A slave address can be made up of a fixed and a programmable
part.
The programmable part allows multiply instances of the same
device
27
28
29
30
31
32
SMBus Improvements
33
SMBus Improvements
SMBus Limitations
Capacitance is a concern
No explicit maximum
Excessive capacitance causes a violation of bus timing by
slowing rise times
See SMBus specification for details
35
Addressing
36
ADDRESS BYTE
COMMAND BYTE
DATA BYTE 1
S 7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 A
DATA BYTE 2
DATA BYTE N
7 6 5 4 3 2 1 0 A
S Host System
7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 A P
READ/WRITE#
0 Bit
ACKNOWLEDGE
P Host System
37
7
S
SLAVE
ADDRESS
8
COMMAND
CODE
0 A
S Host System
READ/WRITE#
0 Bit
8
PACKET ERROR
CHECKING (PEC)
ACKNOWLEDGE
A P
P Host System
38
7
S
SLAVE
ADDRESS
8
COMMAND
CODE
0 A
S Host System
READ/WRITE#
0 Bit
8
PACKET ERROR
CHECKING (PEC)
ACKNOWLEDGE
A P
P Host System
39
7
S
SLAVE
ADDRESS
7
S
r
SLAVE
ADDRESS
COMMAND
CODE
0 A
1 A
READ/WRITE#
READ/WRITE#
Bit
S Host System
0 Bit
S Repeated START
Signal From
r Host System
ACKNOWLEDGE
P Host System
ACKNOWLEDGE Signal
From Host System
40
7
S
SLAVE
ADDRESS
SLAVE
ADDRESS
S Host System
COMMAND
CODE
0 A
7
S
r
1
1 A
READ/WRITE#
0 Bit
ACKNOWLEDGE
P Host System
Repeated START
SThis
Data Is
Signal From
r Host System
READ/WRITE#
ACKNOWLEDGE Signal
Being
Transmitted
1
A
Bit
From Host System
By The Slave Device
To The Host
41
C(x) = x8 + x2 + x + 1
www.smbus.org/faq/crc8Applet.htm
42
Group Commands/Operation
43
PMBus Connections
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
CONTROL
SIGNAL
SMBALERT #
CONTROL
DATA
CLOCK
SERIAL BUS
DATA
SERIAL BUS
CLOCK
UNIT #1
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #2
WP A7 A6 A5 A4 A3 A2 A1
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #N
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
44
PMBus Connections
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
CONTROL
SIGNAL
SMBALERT #
CONTROL
DATA
CLOCK
SERIAL BUS
DATA
SERIAL BUS
CLOCK
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
Data
UNIT #1
CLOCK
UNIT #2
WP A7 A6 A5 A4 A3 A2 A1
WRITE
PROTECT
PHYSICAL
ADDRESS
Clock
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #N
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
45
PMBus Connections
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
CONTROL
SIGNAL
SMBALERT #
CONTROL
DATA
CLOCK
SERIAL BUS
DATA
SERIAL BUS
CLOCK
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
Optional
CONTROL
Signal Is For
On/Off Control
UNIT #1
UNIT #2
WP A7 A6 A5 A4 A3 A2 A1
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #N
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
46
PMBus Connections
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
CONTROL
SIGNAL
SMBALERT #
CONTROL
DATA
CLOCK
SERIAL BUS
DATA
SERIAL BUS
CLOCK
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
Optional
SMBALERT#
Signal Acts As An
Interrupt Line And
Activates The
Alert Protocol
UNIT #1
CLOCK
UNIT #2
WP A7 A6 A5 A4 A3 A2 A1
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #N
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
47
PMBus Connections
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
CONTROL
SIGNAL
SMBALERT #
CONTROL
DATA
CLOCK
SERIAL BUS
DATA
SERIAL BUS
CLOCK
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
Uses
Hardwired Pins
To Set
Physical Address
UNIT #1
UNIT #2
WP A7 A6 A5 A4 A3 A2 A1
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #N
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
48
PMBus Connections
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
CONTROL
SIGNAL
SMBALERT #
CONTROL
DATA
CLOCK
SERIAL BUS
DATA
SERIAL BUS
CLOCK
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
Optional
Write Protect
Pin To Prevent
Unwanted Data
Changes
UNIT #1
UNIT #2
WP A7 A6 A5 A4 A3 A2 A1
WRITE
PROTECT
PHYSICAL
ADDRESS
SMBALERT #
CONTROL
DATA
CLOCK
UNIT #N
WP
WRITE
PROTECT
PHYSICAL
ADDRESS
49
Bus
Converter
POL w/
PMBus
VOUT1
POL w/
PMBus
VOUT2
POL w/
PMBus
VOUT3
STD
POL
VOUT4
STD
POL
VOUT5
PMBus
PMBus/
USB
Adapter
PMBus
Interface
IC
Analog Control
Lines (Sense,
Enable, Trim,
Power Good)
50
Bus
Converter
POL w/
PMBus
VOUT1
POL w/
PMBus
VOUT2
POL w/
PMBus
VOUT3
STD
POL
VOUT4
STD
POL
VOUT5
PMBus
PMBus
Interface
IC
Analog Control
Lines (Sense,
Enable, Trim,
Power Good)
51
Front End
Power
Supply A
POL w/
PMBus
VOUT1
POL w/
PMBus
VOUT2
Input
Power B
Front End
Power
Supply B
POL w/
PMBus
VOUT3
PMBus
t
Se d t
An rge
Fo
N/C
STD
POL
VOUT4
STD
POL
VOUT5
PMBus
Interface
IC
Analog Control
Lines (Sense,
Enable, Trim,
Power Good)
52
Front End
Power
Supply A
POL w/
PMBus
VOUT1
POL w/
PMBus
VOUT2
Input
Power B
Front End
Power
Supply B
POL w/
PMBus
VOUT3
System
Maintenance
Processor
PMBus
STD
POL
VOUT4
STD
POL
VOUT5
PMBus
Interface
IC
Analog Control
Lines (Sense,
Enable, Trim,
Power Good)
53
PMBus In A System
Local/On-Board
Power Bus
Input
Power A
Front End
Power
Supply A
POL w/
PMBus
VOUT1
POL w/
PMBus
VOUT2
Input
Power B
Front End
Power
Supply B
POL w/
PMBus
VOUT3
Remote System
Maintenance
Comm Bus
(IPMI, RS-485, )
Remote
Host
STD
POL
VOUT4
STD
POL
VOUT5
PMBus
System
Maintenance
Processor
PMBus
Interface
IC
Analog Control
Lines (Sense,
Enable, Trim,
Power Good)
54
PMBus In A System
Local/On-Board
Power Bus
System
Power Bus
Bus
Converter
Remote System
Maintenance
Comm Bus
(IPMI, RS-485, )
Remote
Host
POL w/
PMBus
VOUT1
POL w/
PMBus
VOUT2
POL w/
PMBus
VOUT3
STD
POL
VOUT4
STD
POL
VOUT5
PMBus
System
Maintenance
Processor
PMBus
Interface
IC
Analog Control
Lines (Sense,
Enable, Trim,
Power Good)
55
PMBus In A System
System
Power Bus
System
Host
Local/On-Board
Power Bus
VOUT1
Local/On-Board
POL w/
Bus
Power
Bus
PMBus
Converter
VOUT1
POL w/
Bus Local/On-Board
Power
Bus
PMBus
Converter
POL w/ POL w/VOUT1 VOUT2
Bus
PMBus PMBus
Converter
VOUT2
POL w/
PMBus
POL w/ POL w/VOUT2 VOUT3
PMBus PMBus
VOUT3
POL w/
PMBus
VOUT3
VOUT4
POL w/
STD
PMBus
POL
VOUT4
PMBus
STD
POL
VOUT4 VOUT5
PMBus
STD
STD
Power/
POL
POL
System
VOUT5
STD
Power/
Interface
POL
System
VOUT5
Analog Control
STD
Interface
PMBus
Lines (Sense,
PMBus
POL
Analog
Control
Enable,
Trim,
Interface
LinesPower
(Sense,
Good)
PMBus IC
Enable,
Trim,
Analog
Control
Interface
Good)
LinesPower
(Sense,
PMBus IC
Enable, Trim,
Interface
Power
Good)
IC
56
PMBus In A System
System
Power Bus
System
Maintenance
Comm Bus
(IPMI, RS-485, )
System
Host
Local/On-Board
Power Bus
VOUT1
Local/On-Board
POL w/
Bus
Power
Bus
PMBus
Converter
VOUT1
POL w/
Bus Local/On-Board
Power
Bus
PMBus
Converter
POL w/ POL w/VOUT1 VOUT2
Bus
PMBus PMBus
Converter
VOUT2
POL w/
PMBus
POL w/ POL w/VOUT2 VOUT3
PMBus PMBus
VOUT3
POL w/
PMBus
VOUT3
VOUT4
POL w/
STD
PMBus
POL
VOUT4
PMBus
STD
POL
VOUT4 VOUT5
PMBus
STD
STD
Power/
POL
POL
System
VOUT5
PMBus
STD
Power/
Interface
POL
System
VOUT5
Analog Control
STD
Pwr System/
Interface
Lines (Sense,
PMBus
POL
Host System
Analog
Control
Enable,
Trim,
Interface
Interface
LinesPower
(Sense,
Good)
PMBus IC
Enable,
Trim,
Analog
Control
Interface
Good)
LinesPower
(Sense,
PMBus IC
Enable, Trim,
Interface
Power
Good)
IC
57
PMBus In A System
System
Power Bus
System
Maintenance
Comm Bus
(IPMI, RS-485, )
System
Host
Local/On-Board
Power Bus
VOUT1
Local/On-Board
POL w/
Bus
Power
Bus
PMBus
Converter
VOUT1
POL w/
Bus Local/On-Board
Power
Bus
PMBus
Converter
POL w/ POL w/VOUT1 VOUT2
Bus
PMBus PMBus
Converter
VOUT2
POL w/
PMBus
POL w/ POL w/VOUT2 VOUT3
PMBus PMBus
VOUT3
POL w/
PMBus
VOUT3
VOUT4
POL w/
STD
PMBus
POL
VOUT4
PMBus
STD
POL
VOUT4 VOUT5
PMBus
STD
STD
Power/
POL
POL
System
VOUT5
PMBus
STD
Power/
Interface
POL
System
VOUT5
Analog Control
STD
Board Interface
Level
Lines (Sense,
PMBus
POL
Maintenance
Analog
Control
Enable,
Trim,
Interface
Processor
LinesPower
(Sense,
Good)
PMBus IC
Analog
Control
Enable,
Trim,
Interface
Lines
(Sense,
Power
Good)
PMBus IC
Enable, Trim,
Interface
Power Good)
IC
58
Bridge Device
System
Bus
System Bus Transmitter
&
Receiver
Translator
System
Language
To/From
PMBus
Language
PMBus
Transmitter
PMBus
&
Receiver
PMBus
Device
59
Bridge Device
System
Bus
System Bus Transmitter
&
Receiver
Translator
System
Language
To/From
PMBus
Language
PMBus
Transmitter
PMBus
&
Receiver
PMBus
Device
Simple Electrical
Bi-Directional Isolation
3.3 V A
3.3 V B
DATA A
DATA B
B
61
Bus Extensions
Bus
Master
SCL
SDA
Multiplexor
Repeater
Slave
Device
Slave
Device
Switch
Switch
Slave
Device
Slave
Device
Slave
Device
Slave
Device
Switch
Switch
Switch
Slave
Device
Slave
Device
Slave
Device
SELECTOR
62
Redundant Buses
Bus
Master A
PMBus A
Bus
Master B
PMBus B
Multiplexor
Switch
Switch
Tx/Rx
Tx/Rx
Tx/Rx
Internal Processor
Internal Processor
Slave
Device
Slave
Device
63
Memory
Received configuration
Device status and parametric information
64
CONTROL
SIGNAL
MEMORY BANK
SDA
SERIAL BUS
DATA (SDA)
ENABLE
TO/FROM
OTHER
CONVERTERS
WRITE
PROTECT
WP
ADDRESS
PINS
A7
A6
OUTPUT VOLTAGE
SCL
ON/OFF/MARGIN
SERIAL BUS
CLOCK (SCL)
UPPER MARGIN V
LOWER MARGIN V
OV THRESHOLD
UV THRESHOLD
OC THRESHOLD
TURN ON DELAY
RISE TIME
STATUS CODE
TEMPERATURE
OUTPUT CURRENT
MODEL #
SYSTEM HOST/
BUS MASTER
SMBALERT# SIGNAL
SERIAL #
A5
REVISION #
A4
DATE CODE
A3
USER PART #
A2
USER DEFINED
A1
USER DEFINED
65
Integrated Solution
ASSP
ASIC
Piece Part Solution
Bus Interface
ASIC
FPGA
GP Microcontroller
66
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
Pin
Programmed
Values
2
3
Operating
Memory
(Volatile)
RESTORE_
DEFAULT
STORE_DEFAULT
RESTORE_USER
STORE_USER
Default
Store
(Non-Volatile)
User
Store
(Non-Volatile)
BUS
COMMUNICATION
67
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
Pin
Programmed
Values
2
3
Operating
Memory
(Volatile)
RESTORE_
Operating
DEFAULT
Memory
Default
Store
STORE_DEFAULT
(Non-Volatile)
Conceptual
volatile
RESTORE_USER
memory
store for
User devices
Store
operating parameters
STORE_USER
(Non-Volatile)
BUS
COMMUNICATION
68
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
2
Operating
Memory
(Volatile)
Pin
Programmed
Values
Hard Coded Parameters
RESTORE_
3 DEFAULT
Default
Store up,
At device power
STORE_DEFAULT
(Non-Volatile)
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
Pin
Programmed
Values
2
RESTORE_
DEFAULT
3 Values
Pin Operating
Programmed
STORE_DEFAULT
Default
Store
(Non-Volatile)
User
Store
(Non-Volatile)
Memory
(Volatile)
BUS
COMMUNICATION
70
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
Default Values
Next, values from
2 the
non-volatile Default Store
RESTORE_
(if provided)
are loaded.
3 DEFAULT
Operating
This overwrites
any
Memory
STORE_DEFAULT
(Volatile) loaded
previously
values.4 RESTORE_USER
STORE_USER
Pin
Programmed
Values
Default
Store
(Non-Volatile)
User
Store
(Non-Volatile)
BUS
COMMUNICATION
71
Conceptual View Of
Memory And Startup
1 User Stored Values
Hard Coded
Parameters
Pin Store
Next, values from the non-volatile User
Programmed
2
(if provided) are loaded. This overwrites
Values any
RESTORE_
previouslyDEFAULT
loaded values.
Operating
Memory
(Volatile)
STORE_DEFAULT
RESTORE_USER
STORE_USER
Default
Store
(Non-Volatile)
User
Store
(Non-Volatile)
BUS
COMMUNICATION
72
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
Pin
Programmed
2 Communication
Bus
Values
RESTORE_
DEFAULT
3
Operating
Default
Next, values sent via the SMBus are
loaded.
Memory
Store
STORE_DEFAULT
This overwrites
any
previously
loaded
values.
(Volatile)
(Non-Volatile)
RESTORE_USER
STORE_USER
User
Store
(Non-Volatile)
BUS
COMMUNICATION
73
Conceptual View Of
Memory And Startup
Hard Coded
Parameters
Operating
Memory
(Volatile)
DEFAULT
STORE_DEFAULT
RESTORE_USER
STORE_USER
Default
Store
(Non-Volatile)
User
Store
(Non-Volatile)
BUS
COMMUNICATION
74
PMBusHost Interface
System Device
Translator
Human /
System
Language
To/From
PMBus
Language
Bus
Transmitter
&
Receiver
PMBus Device
PMBus
Bus
Transmitter
&
Receiver
Translator
PMBus
Language
To/From
Native
Device
Language /
Interface
Power
&
Control
Circuits
75
PMBusHost Interface
System Device
Translator
Human /
System
Language
To/From
PMBus
Language
Bus
Transmitter
&
Receiver
PMBus Device
PMBus
Bus
Transmitter
&
Receiver
Translator
PMBus
Language
To/From
Native
Device
Language /
Interface
Power
&
Control
Circuits
76
PMBusHost Interface
System Device
Translator
Human /
System
Language
To/From
PMBus
Language
Bus
Transmitter
&
Receiver
PMBus Device
PMBus
Bus
Transmitter
&
Receiver
Translator
PMBus
Language
To/From
Native
Device
Language /
Interface
Power
&
Control
Circuits
77
PMBusHost Interface
System Device
Translator
Human /
System
Language
To/From
PMBus
Language
Bus
Transmitter
&
Receiver
PMBus Device
PMBus
Bus
Transmitter
&
Receiver
Translator
PMBus
Language
To/From
Native
Device
Language /
Interface
Power
&
Control
Circuits
78
PMBus/SMBus Interface
79
Command Language
Command code
Not a register location!
Devices must map command code to
memory location themselves
Data byte(s)
Defined in the specification
80
Data Formats
81
82
7 6 5 4 3
2 1 0 7 6 5 4 3 2 1 0
MSB
MSB
Y = X2N
83
Example Conversion
Y = 3.3 V;
Calculate X and N
Divide maximum value of X
by Y
Find largest power of 2 less
than the result. This gives N
Multiply Y by 2N and round
the result
Convert to an 11 bit binary
number. This gives X.
X MAX 1023
=
= 310.0
Y
3.3
max(2 N ) < 310.0 = 256
N = 8 = 11000b
3.3 2 N = 3.3 28
= 3.3 256
= 844.8 845
845 01101001101b = X
84
Example Conversion
11000-01101001101
11.01001101b
85
Example Conversion
Result = 3.30078
11000-01101001101
11.01001101b
86
Example Conversion
Result = 3.30078
11000-01101001101
87
Example Decode
Received value:
Separate in X And N
1110001101100111
X = 01101100111b = 871
N = 11100b = -4
Calculate Y
Y = X2N = 8712-4
= 871/16 = 54.438
88
Another Example
89
2 1
YMAX
2N2
XMAX
2N3
N
2 4
Human/
Analog/
Real
World
Value
PMBus
Digital
Value
XMIN
2
1
0
YMIN
90
2 1
YMAX
2N2
XMAX
2N3
N
2 4
PMBus
Digital
Value
XMIN
2
1
0
YMIN
91
Error
Amp
V_ERROR
PMBus N
Binary
Number
D/A
OFFSET
92
Error
Amp
V_ERROR
PMBus N
Binary
Number
D/A
OFFSET
No Floating Point
computation!
Value from PMBus
is used directly
93
Where:
Y is the value transmitted to or received from the PMBus
device (16 bits, signed)
X is the human value to be encoded
m is the scaling coefficient (16 bits, signed)
b is the offset coefficient (16 bits, signed)
R is the scaling coefficient (8 bits, signed)
94
Where:
NOTICE!
R
Y =(mX + b) 10
95
96
Problem
3 unknowns (m, b, R)
2 constraints
Solution procedure
Assume R is known and fixed
Solve for m and b in terms of Xmin, Xmax, Ymin, Ymax
Use a tool like Excel to solve for m and b for several values
of R
Choose largest possible values of m and b
97
The constraints
Substituting into the Direct
Mode equation
X min Ymin = 0
X max Ymax = 2n 1
Ymin = (mX min + b) 10 R
Ymax = (mX max + b) 10 R
Ymax Ymin R
m=