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Course 4: Review
Thread single, sequential stream of execution
5.2
5.3
5.4
5.5
Basic Concepts
Process scheduling aka kernel-
computer resources
CPU scheduling:
5.6
5.7
CPU Scheduler
Selects from among the processes in memory that are ready to
5.8
Dispatcher
Dispatcher module gives control of the CPU to the process
switching context
5.9
Scheduling Criteria
CPU utilization keep the CPU as busy as possible [40
process
Waiting time amount of time a process has been waiting
5.10
Optimization Criteria
General
Max throughput
Contextual:
5.11
Scheduling Algorithms
5.12
Burst Time
24
3
P3
3
Suppose that the processes arrive in the order: P1 , P2 , P3
The Gantt Chart for the schedule is:
P1
P2
24
P3
27
30
5.13
P2
P3
P1
30
5.14
set of processes
5.15
Arrival Time
Burst Time
P1
0.0
P2
2.0
P3
4.0
P4
5.0
SJF (non-preemptive)
P1
0
P3
7
P2
8
P4
12
16
5.16
Arrival Time
Burst Time
P1
0.0
P2
2.0
P3
4.0
P4
5.0
SJF (preemptive)
P1
0
P2
2
P3
4
P2
5
P4
P1
11
16
5.17
exponential averaging
n 1 t n 1 n .
5.18
5.19
n+1 = n
Recent history does not count
=1
n+1 = tn
Only the actual last CPU burst counts
If we expand the formula, we get:
n+1 = tn+(1 - ) tn -1 +
+(1 - )j tn -j +
+(1 - )n +1 0
Since both and (1 - ) are less than or equal to 1, each
5.20
Priority Scheduling
A priority number (integer) is associated with each process
Priority may be calculated considering: time limits, memory
Preemptive
nonpreemptive
burst time
Problem Starvation low priority processes may never execute
Solution Aging as time progresses increase the priority of the
process
5.21
q large FIFO
5.22
Burst Time
53
17
P3
P4
The Gantt chart is:
P1
0
P2
20
37
68
24
P3
P4
57
P1
77
P3
97 117
P4
P1
P3
P3
5.23
5.24
5.25
Multilevel Queue
Ready queue is partitioned into separate queues:
- foreground (interactive)
- background (batch)
Each queue has its own scheduling algorithm
foreground RR
background FCFS
5.26
5.27
parameters:
number of queues
5.28
Q2 FCFS
Scheduling
5.29
5.30
Multiple-Processor Scheduling
5.31
Multiple-Processor Scheduling
CPU scheduling more complex when multiple CPUs are
available
Asymmetric multiprocessing only one processor
scheduled
5.32
Processor affinity
Most recent data in cache
5.33
Load balancing
Workload evenly distributed across all processors
Necessary on systems with multiple queues
Affects processor affinity rule
5.34
Multicore processors
Multiple processors on the same chip
Memory stall = time waiting for data to be available when
accessing memory
In order to optimize memory stall => multithreaded cores,
5.35
5.36
Windows XP scheduling
Linux scheduling
5.37
Solaris Scheduling
6 priority classes, default TS
time slices
Interactive processes higher
5.38
5.39
Windows XP Priorities
Preemptive
6 priority classes / relative priority in each class
5.40
Linux Scheduling
Two algorithms: time-sharing and real-time
Time-sharing
Soft real-time
Posix.1b compliant two classes
FCFS and RR
5.41
5.42
Algorithm Evaluation
Deterministic modeling takes a particular
5.43
5.15
5.44
End of Course 5