fully differential opamp 1

DESIGN PROBLEM
Design a high gain and high swing fully differential folded cascode operational amplifier with 1.65 V supply. Biasing
circuit should be designed for amplifier and CMFB network.
DESIGN SUMMARY
To minimize the mismatches between transistors across the same wafer and to significantly reduce the process sensitivity of
36
integrated circuit, NMOS and PMOS unit transistors are selected with 0.36
as their aspect ratio. The design of fully differential
folded cascode operational amplifier is completed with biasing circuits for amplifier and CMFB network with two differential
pairs. The VT -referenced self-biasing reference circuit with cascode devices and Sooch cascode current mirror is reused and
extended to provide supply independent and PTAT current to the amplifier and CMFB circuits. The theory and schematic
of biasing circuit is available at https://drive.google.com/file/d/0B3XWYH7da 8dS3VOa1o1TjVzRGs. The symbol and subcircuit, AM02FC, of this amplifier is created and later same was used in inverting amplifier. The performance parameters of
designed Op Amp are as follows - gain: 68.2 dB, 3dB frequency: 1.95 MHz, GBWP: 3.05 GHz, CM Gain: -250 dB, CMRR:
318 dB, PSRR+ : 308.2 dB, PSRR- : 311.2 dB, Slew Rate (Rise): 4.6 V/usec, Settling Time (Rise): 602 nsec, Slew Rate
(Fall): -4.6 V/usec and Settling Time (Fall): 432 nsec. These parameters are computed for output CM level as 0 V configured
by CMFB network.
Table I: Circuit Components, Parameters and Characteristics
No.
1

Parameter/Chatacteristics
Fully Differential:
Gain
3dB Frequency
GBWP
CM Gain
CMRR
PSRR+
PSRR+
Slew Rate Rise
Settling Time Rise
Slew Rate Fall
Settling Time Rise

Value
68.2 dB
1.95 MHz
3.05 GHz
-250 dB
68.2 - (-250) = 318 dB
68.2 - (-240) = 308.2 dB
68.2 - (-243) = 311.2 dB
4.6 V/usec
602 nsec
-4.6V/usec
432 nsec

Single-Ended:
Gain
3dB Frequency
GBWP
CM Gain
CMRR
PSRR+
PSRR+
Slew Rate Rise
Settling Time Rise
Slew Rate Fall
Settling Time Rise

62.2 dB
1.95 MHz
2.0 GHz
-11.3 dB
62.2 - (-11.3) = 73.5 dB
62.2 - (-37.9) = 100.1 dB
62.2 - (-1.9) = 74.1 dB
2.7 V/usec
483 nsec
-2.5 V/usec
576 nsec

DEVICE PARAMETERS
Table 3.1 from the book Trade-offs and Optimization in Analog CMOS Design by David M. Binkley is used to compute the
gate-oxide capacitance (Cox ) and transconductance factor (Cox ). Appendix B from the book CMOS Analog Circuit Design
by Phillip Allen and Douglas Holberg is used to compute Vt and channel length modulation factor ().

Figure 1: High Gain Folded Cascode Fully Differential Amplifier

Figure 2: CMFB Circuit

CIRCUIT DESIGN
1) The symbol and sub-circuit, AM02FC, of this amplifier is created and later same was used in inverting amplifier.
2) The effective channel length suffers from side diffusion while keeping wafer after implantation of all the doped regions.
Similarly, effective width is also affected. Therefore, active regions and W/L aspect ratio should be identical for all
the transistors. In this case, we chose PMOS and NMOS unit transistors with 36/0.36 and connect more than one

Figure 3: VT -referenced Self-biased reference (Bandgap Reference)

with cascode devices and Sooch Cascode Current Mirror

Figure 4: High Gain Folded Cascode Fully Differential Operational Amplifier (AM02FC)

transistors in series or in parallel to process transistors with different dimensions. For example, a unit transistor has
aspect ratio as (W/L)U . For another transistor with aspect ratio as 10 times that of (W/L)U , we should connect 10 unit
transistors in parallel. Similarly, 10 unit transistors should be connected in series to get another transistor with aspect ratio
1
of 10
(W/L)U . This is to minimize the mismatches between transistors across the same wafer. Therefore, the process
sensitivity of integrated circuit becomes insignificant.
3) The dimension of NMOS and PMOS transistors as units is chosen 100/1. The device parameters as per selected process
are
n Cox = 342.9V /A2

(1)

p Cox = 70.3V /A2

(2)

Figure 5: Inverting Amplifier using AM02FC

Figure 6: Output of Inverting Amplifier using AM02FC

As per the given current of 200A, the overdrive voltage of NMOS is

s
s
2ID
2 200A
VOV n =
=
= 108mV
n Cox (W/L)
342.9A/V 2 100

(3)

Similarly,
s
VOV p =

2ID
=
p Cox (W/L)

2 200A
= 238.5mV
70.3A/V 2 100

The dimension of NMOS with same overdrive as PMOS is

2ID
2 200A
100
(W/L)n =
=
= 21
2
2
2
n Cox Vov
342.9A/V 0.2385
5
4

(4)

(5)

It means that for equal overdrive for PMOS and NMOS transistors, the dimension of PMOS is five times the dimension
of NMOS. This thumb rule is applicable for the selected process only. Let us consider an example. If the dimension of

= 168.3mV , the dimension of NMOS with same overdrive would be

a PMOS is 200/1 - its overdrive voltage is 238.5
2
200
100
=
40
=
.
In
this
design,
we
are
considering
unit PMOS and NMOS transistors with dimension as 100/1. To get
5
2.5
a dimension of 200/1, we need to connect two unit transistors in parallel. In the previous example, the dimension 100
2.5
is considered as 100
3 . OR, series combination of two set of five transistors connected in parallel. It should be consistent
in the design whether we choose first or second combination of NMOS transistors to have equivalent overdrive of
238.5

= 168.3mV . In this design, we consider first method in which transistors are connected either in series or in
2
parallel combination only.
4) To bias the folded cascode with NMOS transistors as input devices and CMFB network, bandgap reference is used to
provide PTAT currents. The detailed design and analysis of biasing circuit is discussed here https://drive.google.com/file/
d/0B3XWYH7da 8dS3VOa1o1TjVzRGs. In this biasing circuit all the transistors are working in the saturation region.
5) In folded cascode differential amplifier, we used NMOS transistors because their n Cox value is higher than p Cox
for PMOS transistors. This gives larger gm for same device dimension and biasing current. As shown in Fig. 1, the
transistors M3 , M4 , M5 , M10 and M11 act as current sources. Transistors M6 M9 act as cascode devices to boost the
output resistance and also the dc voltage gain of the op amp. The common mode sense circuit is connected to transistor
M32 .