Product Specification

TYPE NUMBER

Prepared

Checked

Applied

Established

by

by

by

by

S.Miyata

M.Fujisawa

H.Shidooka

MTMF 8 2 3 10 B B F
*2

Type
Application
Structure
Outline
Absolute Maximum
Ratings
Item

Silicon Field Effect Transistors

Li-ion battery
N-Channel MOS Type
Marking
AA
SO8-F1-B
*3
PD
VDSS
VGSS
ID
Tch
IDp
Tstg
Avalanche Current
30
20
72
150
18
1.0
-55 to +150
18
(V)
(A)
(V)
(A)
(W)
(C)
(C)
(A)
Electrical characteristics (Ta=25 C 3 C )
Limit
Symbol
Measuring condition
Unit
min.
typ.
max.

Drain-Source Voltage
Drain-Source Cutoff Current
Gate-Source Cutoff Current

VDSS

ID=1mA, VGS=0V

IDSS

VDS=30V, VGS=0V

10

IGSS

VGS=16V, VDS=0V

10

2.5

Vth

Gate Threshold Voltage

Drain Resistance (ON)
Drain Resistance (ON)
Forward Transfer Admittance
Small-Signal Short-Circuit Imput Capacitance

Small-Signal Short-Circuit Output Capacitance

Small-Signal Reverse Transfer Capacitance

Single-pulse Avalanche Energy

Rise Time
Turn-off Delay Time
Fall Time

1.4

RDS(ON) ID=5.0A, VGS=4.5V

6.5

9.8

m:

RDS(ON) ID=5.0A, VGS=10V

3.0

4.2

m:

|Yfs|

ID=5.0A, VDS=10V

Ciss

VDS=10V, VGS=0V, f=1MHz

6000

pF

Coss

VDS=10V, VGS=0V, f=1MHz

690

pF

Crss

VDS=10V, VGS=0V, f=1MHz

420

pF

162

mJ

VDD=15V, VGS=0 to 10V, ID=5.0A

20

ns

VDD=15V, VGS=0 to 10V, ID=5.0A

30

ns

VDD=15V, VGS=10 to 0V, ID=5.0A

400

ns

VDD=15V, VGS=10 to 0V, ID=5.0A

420

ns

Eas
td(on)
*1
tr
*1
td(off)
*1
tf
*1

Turn-on Delay Time

ID=1.0mA, VDS=10.0V

30

VDD=24V, VGS=100V, ID=18A

L=0.5mH,Rg=25:,Tch=25C(initial)

10

Note:
Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring
methods for transistors.
Internally connected circuit
*1 See test circuit
*2 Packing
1.Source
Embossed type (thermo-compressioon sealing)
2.Source
1
8
*3 Measuring on glass epoxy board at 25.425.40.8mm.
3.Source
2
7
Absolute maximum rating PD without heat sink shall
4.Gate
be made 500mW.
5.Drain
3
6
6.Drain
7.Drain
4
5
8.Drain

2008.01.31
Established

Revised


Product Specification
TYPE NUMBER

MTMF 8 2 3 1 0 BBF
*2

Test circuit

VCC=15V

ID= 5.0A
RL=3:

Vin

Vout

10
PW = 10s
D.C. 1 %

0V

Vin

50:

%
Vin

Vout

td(on)

tr

td(off)

tf

2008.01.31
Established

Revised

Regulations No. : SC3S1512

Total Pages

Page

PACKAGE STANDARDS
Package Code

SO8-F1-B

Semiconductor Company
Panasonic Corporation

Established: 2007-01-18
Revised
: 2009-01-23

Established by

Applied by

Checked by

Prepared by

H.Shidooka

H.Yoshida

M.Okajima

M.Kametaka

PACKAGE STANDARDS
SO8-F1-B

Total Pages

Page

1. Outline Drawing

Unit:mm

Br / Sb Free

Body Material

: Epoxy Resin

Lead Material

: Cu Alloy

Lead Finish Method : SnBi Plating

Semiconductor Company, Panasonic Corporation

Established: 2007-01-18
Revised
: 2009-01-23

PACKAGE STANDARDS
SO8-F1-B

Total Pages

Page

3. Mark Drawing

Product Name
(Shortened Name)

The First Pin

Position

Date Code

Semiconductor Company, Panasonic Corporation

Established: 2007-01-18
Revised
: 2009-01-23