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Section Classification
Engineering mathematics
Networks
Analog Circuits
Digital Circuits
Signals and Systems
Control Systems
Electrical Machines
Power Systems
Measurements
Power Electronics
Field Theory
Verbal Ability
Numerical Ability
1 Mark
3
3
3
1
2
2
3
2
2
1
3
3
2
30
2 Marks
3
3
1
3
2
4
5
3
1
4
1
2
3
35
Total Number of
Questions
6
6
4
4
4
6
8
5
3
5
4
5
5
65
Key:
2.
Key:
Exp:
90
u() = sin ()
(C) no paper
1 t
u() d. If input u is sinusoidal signal
T t T
of frequency f a f b 0 then the steady state output y will lag u (in degrees) by
__________.
2f 2.
2T T
T
t T
cos
1
y t sin d
T t T
T t
t
1
cos t T cos t
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
1
cos t cos T sin t sin T cos t
2
2
y t cos t sin 90 t
x t sin t
90
3.
Wheatstone bridge shown is used to find value of resistance Rx. The Galvanometer G
indicates zero current when R1 50 , R L 65 & R 3 100 . If R3 is known with
5% tolerance on its nominal value of 100 , what is range of Rx in ohms?
R2
R1
G
R3
Rx
V
(B) 125.898, 134.12
(A)
Weins bridge is balanced, R1, Rx = R2R3
50Rx = 65100
Rx = 130
Now R3 = 1001000.05 = 1005 = 95/105
R R
65 105
Rx 2 3
136.5
R1
50
65 95
123.5
50
Rangeof R x is123.5 to136.5
Rx
4.
Key:
Exp:
1, 5 5, 1, 8, 2
2, 3 4, 2 9,3
3, 1 3, 3 10, 4
EE-GATE-2015
5.
For a given circuit the thevenin equivalent is to be determined. The thevenin voltage
VTh (in volts) seen from terminal AB is _________.
20i
1
2V
Key:
Exp:
3.36
Vth = 2i1
2 = 1[i+i1]+i = 2i+i1
i(1) = -20i + 2i1
21i = 2i1
2
i i1
21
25
2
4
2 2i i1 2 i1 i1 1 i1 i1
21
21
21
42
i1
1.68
25
Vth 2i1 3.36V
6.
Key:
7.
Key:
Exp:
f x dx 1
so a bx dx 1
b
1
2
2a b 2 ____ 1
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
given E X 2 3
x a bx dx
1
2 a b
3 2 3
3a 2b 4 ____ 2
from 1 and 2
a0
b2
p r X 0.5 f x dx 2 x dx 0.25
8.
Key:
Exp:
0.5
0.5
1
where r is distance from origin and r is is unit vector. The
r,
r2
divergence of this function over a sphere of radius R, which includes origin is.
(A) 0
(B) 2
(C) 4
(D) R.
(A)
1
F 2 ar
r
1
1
1 F
.F 2 r 2 Fr
sin F
r r
r sin
r sin
Consider a function F
1 2 1
r 2 0 0
r 2 r
r
.F 0
.F
9.
10.
Of the four characteristics given below, what are major requirements for an instrument
amplifier?
P: high common mode rejection ratio
Q: high input impedance
R: high linearity
S: high output impedance
(A) P,Q & R only
(B) P & R only
(C) P, Q & S only
(D) Q, R & S only
(A)
Key:
Exp:
Additional characteristics include very low DC offset, low drift, low noise, very high
open-loop gain, very high common-mode rejection ratio, and very high input impedances.
Instrumentation amplifiers are used where great accuracy and stability of the circuit both
short and long-term are required.
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
11.
In chopper duty ratio of switch S is 0.4. If the inductor & capacitor are sufficiently large
to ensure continuous inductor current & ripple free capacitive voltage, the charging
current (in amp) of 5V battery, under steady-state is ________.
20V
12.
If a continuous function f(x) does not have a root in the interval [a, b]. Then which one of
the following statement is true.
(A) f a .f b 0
Key:
Exp:
5V
(B) f a .f b 0
(C) f a .f b 0
(D) f a f b 0
(C)
We know that, (Intermediate value theorem)
If f a f b 0 then f x has at least one root in (a, b)
f x does not have root is (a, b) means f a f b 0
13.
14.
The voltage divided across 3 & 2 resistance shown in figure are 6V & 2V
respectively, with polarity as marked. What is the power (in W) delivered by 5V voltage
source.
6v
2v
Network 1
Network 2
5
Key:
Exp:
5v
6V
2A
3
2V
1A
2
I 1 2
I 1A
I
P 5 1 5W
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
15.
I1
4 1
MUX
I2
I3
S1
(A) 1010
Key:
Exp:
(B) 0110
S0
(C) 1000
(D) 1110
(B)
F A B AB' A'B
00
01
10
11
AB
S1S0
A 'B' I0 0
A 'B I1 1
AB' I 2 1
AB I3 0
I0 0
I1 1
I2 1
I3 0
16.
In given circuit the silicon transistor has 75 collector voltage VC 9V. The ratio of
R B & R C is _______..
15V
Key:
105.1
Exp:
IC I B
6
RC
RB
RC
VC
8.3
,
RB
75, IC I B
IB
76 IB
76
6
8.3
, IB
RC
RB
8.3
6
RB RC
R B 76 8.3
105.1
RC
6
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
17.
A(0 50A) moving coil ammeter has a voltage drop of 0.1V across its terminals at full
scale deflection. The external shunt resistance in m needed to extend its range to (0
500A) is _______.
18.
Two players A & B alternatively keep rolling a fair dice. The person to get a six first
wins the game. Given that player A starts the game, the probability that A wins the game
is _______.
(A) 5
(B) 1
11
Key:
(D)
Exp:
Probability of getting 6 is
(C) 7
13
(D) 6
11
6 1
36 6
1
6
1 5
6 6
1
6
5
6
If a starts the game, Probability A win the game
P A P A P B P A P A P B P A P B P A .....
1 551 55551
..........
6 666 66666
1 55 5555
.....
6 66 6666
2
4
1 5 5
1 .....
6 6 6
1
1
13 6
6 5 2
6 6 11
1
6
19.
In the given circuit parameter k is positive and power dissipated in 2 resistor is 12.5W.
The value of k is _________.
5
2
10
4V
5A
kV0
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
Key:
1.5
Exp:
V02
12.5
R
Vo
V0 5V,
4V
5A
7.5
1.5
5
20.
Two single phase transformers T1 & T2 each rated at 500 kVA are operated in parallel.
Percentage impedance of T1 & T2 are (1 + j6) and (0.8 + j4.8) respectively. To share a
load of 1000 kVA at 0.8 lagging power factor the contribution of T2 (in kVA) is _______.
21.
Key:
-3
Exp:
Roots, 3, 2
d 2 y 5dy
6y 0
dt 2
dt
is such that
1 3e
dy
The value of
0 is ________.
3
e
dt
y t C1e 3t C2 e 2t
y 0 C1 C2 2
1 3e
y 1 3 e 3 3e 2 C1e 3 C2 e 2
e
So, C1 1, C2 3
So,
y t e3t 3e 2t
dy t
dt
3e3t 6e2t ,
dy 0
dt
3 6 3
22.
An 8 bit unipolar successive approximation register type ADC is used to convert 3.5V to
digital equal output. The reference voltage is +5V. The output of ADC at end of 3rd clock
pulse after the start of conversion is ________.
(A) 1010 0000
(B) 1000 0000
(C) 0000 0001
(D) 0000 0011
Key:
(A)
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
Exp:
VDAC
Control logic
Start of conversion
CLOCK
1st CP 2.56 V
2nd CP 3.84 V
Output Register
3 CP 3.2 V
rd
8bit DAC
Unipolar means all the voltages will be +ve i.e. nothing is ve.
The functionality of SAR type DAC is, it will load a value to output register with MSB=1
and remaining bit=0, and it will cross check a logic as follows.
if Vin VDAC ma int ain the loaded bit
Vin VDAC clear the loaded bit.
on 1st clock the value located to output register is ' 10000000 2 ' (128)10
then VDAC 128 20mv 2.56V
So 3.5>2.56V maintain the bit
So at the end of 1st clock pulse the output is 10000000.
On second clock pulse the value loaded to output register is (10100000)2 (192)10
then VDAC 195 20mv 3.84V
So 3.5 3.84V clear the loaded bit
So at the end of 2nd clock pulse output is (10000000)2 .
On third clock pulse the value loaded to output register is (10100000)2 (160)10
then VDAC 160 20mv 3.2V
So 3.5 3.2V ma int ain the loaded bit
So at the end of 3rd clock pulse output is (10100000)2 .
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
EE-GATE-2015
23.
The circuit shown in figure has two sources connected in series. The instantaneous
voltage of AC source (in V) is given by v t 12sin t. If the circuit is in steady state,
then the value of current (in amp) flowing in circuit is ________.
vt ~
8v
1H
Key:
10
Exp:
V t 8 12sin t
z 1 jL, Here 0, and 1
i t 8 6 2 sin t 45o
i rms 64 36 10A
x
24.
Given Sgn x
Key:
Exp:
sgn(cos t) 1; cos t 0
= 1;cos t 0
cos t
sign(cos t)
t
1
it represents square wave, which is even and half wave symmetry function, it contains
cosine terms for all odd harmonics.
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
10
EE-GATE-2015
L 9.55mH
25.
Vin
Full
100V
DC
Bridge
VSI
VL
R 5
C 63.66 F
For the given 1-phase, full bridge VSI, switching frequency is 50 kHz and single pulse
modulated with modulation index m = 0.7. The fundamental output voltage is _________.
26.
1
J0
Q0
J1
Q1
J2
Q2
K2
Q2
Clk
K0
1
K1
Initially Q2Q1Q0 = 000, after how many clock cycles, Q2Q1Q1 = 000 will be appeared.
Key:
Exp:
6
First flip flop acts as mod-2 counter
Second 2 flip flops from mod (2n-1) Johnson counter = mod counter
Overall modulus = mod 6 counter
27.
Consider the following power electronic network. The switch is operating at a duty cycle
D. Under steady state VL and VC are
Vdc
D
VDC
1 D
1
VDC
(C) 0,
1 D
(A) 0,
28.
VC
D
D
VDC ,
VDC
2
1 D
D
1
VDC
(D) VDC ,
2
1 D
(B)
Key:
The incremental fuel cost in Rs/MW for a total load of 200 MW is _______.
30
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
11
EE-GATE-2015
Exp:
dC1
2 0.01P1 30 0.02 P1 30
dP1
dC2
2 0.05P2 10 0.1P2 10
dP2
dC1 dC2
dP1 dP2
0.02P1 30 30 0.1P2 10
2P1 3000 10P2 1000
2P1 2000 10P2
P1 P2 200
P2 200
P1 0
dC1
30Rs / Mwh
dP1
29.
Key:
Exp:
A DC motor has 10 hp, 37.5 A, 230V, 0.01 Wb, 4 poles, 666 conductors, 2 parallel paths
Armature resistance is 0.267, rotational loses are 600 W. At 1000 rpm, the output torque
is ________N-m.
14.14
2Np 0.01 666 4 1000
55.5
60A
60 2
Internal power =EI=55.537.5=2081.25
E
Pout=2081.25-600=1481.25
T
Pout 1481.25
14.14 Nm
1000
w
2
60
30.
10 mm
air
5 mm
Glass (r 4)
Key:
A parallel plate capacitor is separated by air and glass as shown in figure. If the dielectric
strength of air and glass is 30 kV/cm and 300 kV/cm, the max voltage (in kV) applied
across the capacitor is ________ without breaking.
165
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
12
EE-GATE-2015
Exp:
V V1 V2
V V1 V2
V E1d1 E 2 d 2
E1 30kV cm
air
5mm
E1 300kV cm
glass
4 0 .
5mm
31.
A synchronous generator has H=2 MJ/MVA and operating at synchronous speed; f=50
Hz, delivering real power = 1 p.u; initial = 5o. The value of after 0.02 sec. for a 3 fault
at the generator terminals is ________. Assuming mechanical inputs is maintaining
constant at 1 p.u.
32.
34.
If the frequency of current is increased, then the impedance of the parallel LC network is
L
i
(A)
(B)
f
c
z
(C)
(D)
L
z
f
Key:
(A)
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
13
EE-GATE-2015
35.
PR
R 1 x
V0
PR
E
(A)
36.
1 x
(B) 1/ 1 x
(C)
1
1 x
(D) 1+x
Vo
Vin
~
Key:
Exp:
Vt
SCR
SCR
Vt
Vin
Vn 1 SCR
1 SCR
VCn V V Vo
1
R
SC
SCR
SCR Vin
SCR Vin
Vin
Vo
1 SCR
1 SCR
Vo 0
0
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
14
EE-GATE-2015
37.
V1
V1 560kV
V2
V2 485kV
I 15kA
If power is to be reversed
(A) V1 500kV, V2 485kV1I 15kA
(B) V1 500kV, V2 485kV1I 15kA
(C) V1 500kV, V2 485kV1I 15kA
(D) V1 500kV, V2 485kV, I 15kA
Key:
Exp:
(D)
V1 V2
R
For power to be reversed
V1
V V1
I 2
Ve
R
V2
V1 500kV
V2 485kV
I 15kA
38.
y
is ____________.
x2
x2
x1
G1
G2
1 G1 1 G 2
Key:
(A)
Exp:
P1 G 2
(B)
(A)
G2
G1
1 G1 1 G 2
(C)
G2
1 G1 G 2
(D)
G1
G2
1 G1 1 G 2
1 G1G 2 G1 1 G1 1 G 2
TF
P11
G2
1 G1 1 G 2
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
15
EE-GATE-2015
39.
A two port network when 10V applied at input, 4A flows in output port which is shorted.
When 5V is applied, 1.25A flows into a resistance of 1 when 3V is applied, the current
flowing into a 2 resistor at port 2 is,
Key:
0.545
Exp:
I1 y11v1 y12 v1
I2 y 21v1 y 22 v 2
I2 0.4 3 0.6 2I 2
1.2 1.2I 2
Disclaimer This paper analysis and questions have been collated based on the memory of some students who
appeared in the paper and should be considered only as guidelines. GATEFORUM does not take any responsibility for
the correctness of the same.
16