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TN{S320C6713 DSK BOARD

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Pavier S,uluply

C6713DSKCode

Conrposer Sludio CD

.II.DIVISION

IIEATURtrS

C6713 DS( Soarr

Tt45320C6713 DSK

Beference

Technical

TSe-C6713rI'{ DSK builds

on T['s industry-leading line of low cost,

easy-to-use DSp Starter Kit

20C6713 floatlng.

inuoilopsl+

(DSK) development boards-

The'high-performante board features the TMS3

floating-qoilj operations p;;;;

poiht DSP- Capable of performing 13501million

the C6713 DSP makes the C6713 DSK thc nrost pou,erful bSf developrr6nt boara.

pSf is USB port interfaced platform that allows

the c6713. The DSK consists of a C6713-based

Jne

for

to efficiently develop and printed circuit bpard that

Wit[

extensive host pC

hardware reference design for T['s customers' products.

software support, including bundled TI tools, the DSK provides ease-of-use and

are attractive to DSP engineers.

test applications

',vil[ serve as a

and target DSP capabilities that

The following checklist details items that are shipped with the C6713 DSK-

External 5VDC polyver supply

IEEE 1284 compliant male-ro-fbrnale cable

Code Composer Siudio DSK tools

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Tlre. c67 13

u,itl'r Code

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DSK has a TN{S

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-I)Sp

DSK provides:

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n USB Interface

spnaHa

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and Flash Ro\{

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n (Aic)

analog ilrterface circuit for Data Converslo

an IiO Port

Ernbedded JTAG emulation suppoft

a*d peripheral

connectors on trre c6713 DSK provide DSp external memory interface.(EMIF)

sigflals rhar enableitsiunctionality

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drird partv

reference design that can

The DSK provides a c61r3 hardware

ysul ewn c6713_based

types of

productr.

*"*ories and

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p.ri;;;i;;'trc

peripheral interfaces'

uh*uor.tiati"tt

\

daughter boa.ds'

assist y-ou in the developnrent of

interfacing

the DSP to

clock' JTAG' and

prou-ioinf;;rb;;;"eior

i"'ign

aiso addresses

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circuit

power'

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parallel

The c6713 DSK includes a stereo codec. This anarog interface

(AI(

(AIC) has the follorvirrg

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Supply: c"*p"iii"".uit1r

Tl C54-x

DSP Core Voltag

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Both rI c54x DsP Buffeq

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z.1v - 3.6 v Buffer Voltages

8-kl{z

-96-klTzSarnpling Frequency Support

;,

rvare Control Via TI McBSP-Compatible Mutltgrltocol serial Port

.llC-Compatibleandi'pi-i"*patib.leSerial-PortProtocols

' Glueless Lriterface to

TI M'cBSPs

Programmibl"-t*i:

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McBSP

.ssP for

for

Audio-Data lnput/output \'ria.rr

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llS-Compatit'te

Standa

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tnterfl"" n"q"i'i"g glly One

)SP-Cornpatible

MSB' tt f-Sg Justified-DataTransfers

toizotz4l3}-Bitword Lengtl'rs

Interface

both ADc

I

floating-point DSP generation in lfJl:3ffi

The TMS3 z0e6tr3rMQSP compose the

DSp pratrorm rhe

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thar enables custom"r'' tJ;lur.,ate

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time to nrarket'

and develop applica'{

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pratform

riurTtuare reference desigrr

'lpri*tion [otes are available

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standalone developrne.t

TI C6?xx

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TMS320c67l3 DsP' Schematics,

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TI.DIViSION

Operating

at225 N4Hz, the C6713 delir,ers up to i350 milliou floatir"rg-point operations per second

up to 450 miilion rrultipll,-accurnuiate operations per second (l\4i\4ACS).Tlie DSI( uses

EMIF lor the SDRAI\4 (CEO) and daughter card expansion interface (CE2 and CE3).

(|\.{FLOPS), I800 miliion instructions per second (l\4IPS), aird u'ith dual fixed-/floating-point

rirultipiiers

the 32-bit

The Flash is attached to CEI of the EI\4IF in 8-bit urode.

An on-board AIC23 codec allorvs the DSP to transmit and receive analog signals. IvIcBSPO is used

for the codec control interface and Ir,tcBSPl is used for data. Analog audio I/O is done through four 3.5mrn audio jacks that correspond to microphone iuput, line input, line output and headphone

output- The codec can select the microphone or the line input as the active input. The analog

output is driven to both the line out (fixed gain) and headphone (adjustable gain) connectors.

McBSP I can be re-routed to the expansion connectors in softrvare

A programmable logic device called a CPLD is used to implement glue logic that ties the board

components together- The CPLD has a register based user interface that lets the user configure the

M. board byreading and writing to the CPLD registers- The registers reside at the midpoint of CEi.

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The DSK includes 4 LEDs and 4 DIP switches as a simple way to provide the user u,ith interactive

feedback. Both are accessed by reading and rwiting to the CPLD registers.

An included 5V extemal power supply is used to porver tlre board. On-board voltage regulators

provide thg i.,?_q.Il

3.3V digital and 3.3V analog voltages. A voltage supervisor

monitors the internally generated voltage, and u,ill hold the boards in reset until the supplies are

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within operating specifications and the reset button is released. If desired, JPI and JP2 can be used

as power test points fifflhe core and I/O power supplies.

Code Composer

\^.ith the DSK through an embedded JTAG emulator with a USB

"orr,rnl*i"ates

host interface. The DSK connector.

can also be'used with an external ernulator tfuough the extirnal JTAG

TMS320C6713 DSP Features

I{ighest-Perfo rmance Fio ating-Point D igitai S ignai Pro cesso r (D S P) :

Advanced Very Long Instruction Word (VLIW) Ttv{S320c67xrt\{ DSP Core

-

.

.

Trvo ALUs (Fixed-Point)

Four ALUs (Floating- and Fixed-Point)

Trvo N4ultipliers (Fioating- arld Fixed-Point)

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TI.Dl\ItSION

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* Instruction Set Featttres

' Single- and Double-Precision

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Additional L2 MaPPed RAM Device Configuration

; Boot lvlode: HPI,

8-, l6-, 32-tsit ROII'I Boot

(EMII)

32-Bit Extemal Mernory

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16-Bit

Interface

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nirnor"r, Frash, sBsRAM, and sDRAM

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Host-Port Interface (HPI)

Serial Ports (McBQfq) - ---

Rx)

Two Multichannel Buffered

; i;i;depend"'it

cto"rt Zones Each (1 TX and I

Individualty Assignable to any of the Clock Zones

,

' Programtnable Clock Generator

-

Programmable

' TDI'.{ Streams

Frarne S)'nc Generator

Fronn 2-32 Time Slots

' SuPPor-t for Slot Size:

8,- 12, 16,20,24,28,32 BitS

. Data Formatter

Wide Variety of

for Bit Manipulation

I2S pd Sirnilar Bit Strearn.U"Xff

- t 5rcptr', te,coogse-l, AEs-3' cP-430 Formats

-

Up

to 16 trdnsmit Pins

' Enhanced Ghannel Status/User Data

Circuit Bus (IiC;"';") Ir{ulti-Mastet and Slave Interfac'es

* Tv,o Inter-rntegrated

.l Trvo 32-Bit

General-Purpose Tirners

*DedicatedGPloModuleWithl.6pins(ExternallnterruptCapable)

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Frexible pt us"-r-o"t"a-loor,

(pLL)

Based

clock

Generator

Module

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Package Options:

.:. 0.13-gm/6-Level Copper Ir4etal Process

3.3-V I/Os, I .ZI -v Internal (GDP & PYP) 3-3-V I/Os, 1.4-V Internal (GDP)(300 MHz only)

TI\{S320C6713 DSK Oven,ierv Bloclc Diagram

,TI.Dt\lISION

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