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1.

How many different states does a 2-bit


asynchronous counter have?
1
Your Answer:
4
Correct Answer:

2.

How many different states does a 3-bit


asynchronous counter have?
4
Your Answer:
8
Correct Answer:

3.

A 5-bit asynchronous binary counter is made up


of five flip-flops, each with a 12 ns propagation
delay. The total propagation delay (tp(tot)) is
________.
24 ns
Your Answer:
60 ns
Correct Answer:

A modulus-10 counter must have ________.

4.

flip-flops
Your Answer:

Which is not an example of a truncated modulus?

5.

9
Your Answer:

8
Correct Answer:

6.

A 4-bit ripple counter consists of flip-flops, which


each have a propagation delay from clock to Q
output of 15 ns. For the counter to recycle from
1111 to 0000, it takes a total of ________.
30 ns
Your Answer:
60 ns
Correct Answer:

7.

Which of the following is an invalid state in an


8421 BCD counter?
0000
Your Answer:
1110
Correct Answer:

8.

Four cascaded modulus-10 counters have an


overall modulus of ________.
100
Your Answer:
10,000
Correct Answer:

9.

Which of the following is an example of a counter


with a truncated modulus?

13
Your Answer:

10.

A 4-bit counter has a maximum modulus of


________.
6
Your Answer:
16
Correct Answer:

A BCD counter is a ________.

11.

full-modulus
Your Answer: counter
decade counter
Correct Answer:

12.

Which of the following is an invalid state in an


8421 BCD counter?
1001
Your Answer:
1100
Correct Answer:

13.

Three cascaded modulus-5 counters have an


overall modulus of ________.
25
Your Answer:
125
Correct Answer:

14.

The terminal count of a modulus-11 binary


counter is ________.
1000
Your Answer:
1010
Correct Answer:

15.

A 12 MHz clock frequency is applied to a


cascaded counter of a modulus-5 counter, a
modulus-8 counter, and a modulus-10 counter.
The lowest output frequency possible is
________.
20 kHz
Your Answer:
30 kHz
Correct Answer:

16.

The designation
________.

means that the

up count is
Your Answer: active-LOW,
the down
count is
active-HIGH
up count is
Correct Answer: active-HIGH,
the down
count is
active-LOW

17.

A 4-bit up/down binary counter is in the DOWN


mode and in the 1100 state on the next clock
pulse. To what state does the counter go?
1011
Your Answer:

18.

The terminal count of a 3-bit binary counter in


the DOWN mode is ________.
111
Your Answer:
000
Correct Answer:

19.

The terminal count of a modulus-10 binary


counter is ________.
1010
Your Answer:
1001
Correct Answer:

20.

The final output of a modulus-8 counter occurs


one time for every ________.
16 clock
Your Answer: pulses
8 clock
Correct Answer: pulses

21.

A counter with a modulus of 16 acts as a


________.

divide-by-16
Your Answer: counter

22.

Three cascaded decade counters will divide the


input frequency by ________.
20
Your Answer:
1,000
Correct Answer:

23.

Using four cascaded counters with a total of 16


bits, how many states must be deleted to achieve
a modulus of 50,000?
65,536
Your Answer:
15,536
Correct Answer:

24.

The hexadecimal equivalent of 15,536 is


________.
3C66
Your Answer:
3C60
Correct Answer:

25.

An asynchronous 4-bit binary counter changes


from count 2 to count 3. How many transitional
states are possible?
One
Your Answer:

Fifteen
Correct Answer:

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