Psoc Handbook Manual Official

HANDBOOK & MANUAL
FOR PROGRAMMABLE
SYSTEM ON CHIP LAB
Dr M K Deshmukh
Aalap Tripathy
(For Use in EEE GC 415 Embedded Systems Course)
Dr M K Deshmukh
Mr A Amalin Prince
Mr M T Abhilash
Draft Copy
BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE - PILANI,

GOA CAMPUS
ZUARI NAGAR, GOA, INDIA
21st November, 2007
PSOC Lab, BITS Pilani Goa Campus
Document Version of 21st November, 2007
Created by Aalap Tripathy, 2004P3PS208
1. Introduction
2. Contents of Work Done

2.1 System Overview
2.2 Basic Functionality
2.3 Comparison with dsPIC
2.4 Digital & Analog Functional Blocks
2.5 SMP, MAC, Decimator
2.6 I2C Controller, Interrupt Controller, Address Space
2.7 Basic Module Description
2.8 Advanced Module Description
2.9 Specific Projects
2.9.1
Blinking LEDs
2.9.2
Controlling Blinking LEDs
2.9.3
LCD Interfacing
2.9.4
Digital Sine Wave Generation
2.9.5
Manchester Code (generation)
2.9.6
Single Pole IIR Filter
System overview and Special Mention
PSoC mixed-signal arrays are programmable systems-on-chips (SOCs) that integrate a

microcontroller and the analog and digital components that typically surround it in an embedded
system.
PSoC can be defined as software configurable silicon
A single PSoC device can integrate as many as 100 peripheral functions with a microcontroller,
saving design time, board space and power consumption.
The PSoC microcontroller contains everything needed to run an entire system.
Microcontroller
CPU
ROM
RAM
(program)
(data)
Bus i/f
Controls
Data bus
Adress bus
ALU
ADC
DAC
Filter
Amp
Timer
Many
more
PSoC offers a complete set of digital and analog peripherals which are easily configurable.
o Amplifiers
o ADC / DAC
o Filters
o Comparators
o Timers
o Counters
o PWM
o SPI
o UART
Flash, RAM, CPU, ports, and configurable blocks communicate with the CPU as separate
systems.
We can create Serial ports, timers, PWM generators, and other devices without adding additional
circuitry.
PSoC when compared to a Computer System:
o CPU M8C CPU core
o Cache Memory CPU registers A and X
o RAM RAM
o
Hard Drive Flash Memory (ROM)
The clock is tuned from the USB. There is no external crystal on board the Eval Kit. How is the
Clock Generation done from the USB Project Topic?
Of course there is an internal oscillator, so when used along with the USB, the PSoC can fine tune
the main oscillator. The internal oscillator is rated for 2.5% accuracy. Can we test it??
The PSoC Microcontroller has 37 basic instructions. The C compiler breaks C code into these
basic instructions.
We can configure library elements to provide
o analog functions such as amplifiers, ADCs, DACs, filters and comparators
o digital functions such as timers, counters, PWMs, SPI and UARTs.
o The PSoC family's analog features include rail-to-rail inputs, programmable gain
amplifiers and up to 14-bit ADCs with exceptionally low noise, input leakage and voltage
offset.
PSoC devices include up to 32KB of Flash memory, 2KB of SRAM, an 8x8 multiplier with 32-bit
accumulator, power and sleep monitoring circuits, and hardware I2C communications.
Comparison with dsPIC & BASIC Stamp
BASIC Stamp from Parallax, the dsPIC from Microchip, and the PSoC from Cypress
Semiconductors are potential processors for prototype implementation
These devices differ from the other in features and implementation methods
Comparison
Type
Design
dsPIC
BASIC Stamp
Uses built in peripherals + code +

visual initialization techniques
Uses native PBASIC
Compiler
http://www.mikroe.com/en/compilers/
Very Costly
Features
2 UARTs
http://www.melabs.com/products/pb
c.htm
Costly
PWM, serial communications, IC
and OWI communications
On the Flyprogramming
5
6
Pins
Development
of Custom
Blocks
Code
Protection
Uses Building Block Approach
I/O Pins Predefined
PSoC
Uses a Visual Designer PsoC
Designer what can generate
processor configuration files
http://www.cypress.com
Free
As Many UARTs as allowed by
pins and memory
There is however a maximum
limit on the number of digital
and analog blocks per part
Uses Building Block Approach
Conditional Events and
Interrupts can be used to load
alternate program blocks
User Configurable Pins
Custom Processor can be
designed on the fly
Advanced
The PSoC Core
All PSoCs share a common core.

The M8C CPU with speeds upto 12 MHz
POR and LVD means Power on Reset and Low Voltage Detection
It has configurable I2C, SPI interfaces.
With digital blocks, we can create for instance UART, PWM, SPI interfaces
Each digital block is an 8 bit resource. To configure a 16 bit PWM for instance, we would need
two digital blocks.
With two analog blocks we can create an ADC of 14 bit resolution, Programmable comparators
(COMP), Low Pass Filters (LPF)
The pinouts are configured using muxes and routing tables.
What We have
1.
CY 3210-PsoCEval1 ($70)
a. Chip is CY8C29466
b. Large number of extra chips of CY8C29466 can be used without the associated Eval
board on standard breadboards
2.
PSOC Express DK ($350)

a. Contains 4 Fan Modules
b. 2 Extension Modules
c. 1 Master PSOC CY8C29666
d. Target PSOC CY8C27443
3.
PSoC Basic Development kit - $600

a. Includes In-circuit Emulator called ICE Cube
Imagecraft C Compiler 20 Nos.
4.
Software Tools Used
PSoC Designer launched in 2001

This is a Traditional IDE and is based on user modules.
We can code in both C and Assembly to customize and integrate user modules with our projects.
The default user modules are themselves written in Assembly (sometimes C) by Cypress. They
enable functionality expected of standard electronic components which in turn can be chosen by a
programmer
That is on board resources of these components are highly configurable.
PSoC Express
This is a visual embedded system design tool and defines systems at the application layer.
There is no C or Assembly coding needed. Considers programming on board components as lower
level to be handled by the software itself based on the input and output definitions.
Design at User Module Level

C and Assembly required for programming
On Board resources are identifiable and highly
configurable
Complicated for first time users
More flexibility
Design at Application Layer

C or Assembly handled completely by the software
On Board Resources considered low level functions
and handled by software
Easy to use
Hidden flexibility
PSoC Assembly programming
PSoC Assembler is built into the PSoC Designer. No further tools or investment in compilers is
required.
Like the 8086, PSoC has 10 addressing modes
Goto Help Topics Assembly Language Reference Book Instruction Set for more
information
The basic modes can be summarized as :
o Immediate :
mov [2],65h
o Direct :
mov reg[2],15h
Any location in square brackets refers to RAM locations
When preceded by reg, it explicitly means register locations.
Reg actually also means RAM locations but without restrictions.
o Indexed : X register exclusively used. Without brackets, it means direct addressing.
mov X,20h
mov [X],15h
//Moves 15 into location 20 in RAM
//Can be used from reading from Memory as in 8086
//Called Offset Indexing
Working With PSoC Express
Design Elements in PSoC Express are :

o Drivers
o Transfer Functions
o Valuators
Drivers External devices which are to be chosen from the device catalog. (Catalog updated every
quarter by Cypress)
o Input Convert physical readings into values
Accelerometer
Temperature Sensor
Current Sensor
Airflow Sensor
Humidity Sensor
Voltage Monitor
Output require user defined logic to generate physical condition
Fans
LCD
LED
o Interface enable communication with other devices which support specific protocols
I2C
SPI
UART
Transfer Functions Use logic to generate output values. They can be :
o Table Lookup = Truth Table
o Priority Encoder
o Status Encoder
o
PSOC First Touch

Basic Introduction
Introduced by Cypress Semiconductors in 2007 as the ultimate starter kit. Combines

applications available on multiple demonstration boards on a single easy to use device. This has
native compatibility with PSoC Express Software.
Consists of two parts
o First Touch PC Bridge (FTPC)
o First Touch Multifunction Expansion Cards (FTMF)
The expansion port provides power, ground, and I2C or SPI communications to and from the
expansion card host PSoC and PC.
The FTMF Card consists of the components as shown below:
FTMF expansion card has its own PSoC, and can be removed it from the FTPC bridge and
inserted into any target hardware or other development platforms.
We must ensure that while using PSoC Programmer, the Device Family is set to 21X34 and the
Device Type is CY8C21434-24LFXI (this is the PSoC on the FTMF Expansion Card)
Programming might be done in either PSoC Express or PSoC Designer
Programming mode must be Reset
10
First Touch FTPC Bridge:
Contains CY8C24894 PSoC as the only active device on circuit.

The FTMF Expansion Card can also be used idependent of the FTPC Bridge
First Touch Expansion Bridge:
Contains a CY8C21434 PSoC which acts as the Host during programming

Due to lack of onboard voltage regulators, VEXP on Pins 1 and 4 should be always <= 5V
The 8x2 pin expansion header also includes four General Purpose IO (GPIO)connections labeled
P02-P05.
These are hard wired to four unused Port 0 IO pins on the CY8C21434 host and and allow
connection of FTMF Expansion Card to specific hardware or sensors.
These IO pins were specifically chosen because they have the ability to operate as analog outputs,
analog inputs, digital inputs, digital outputs, or any combination of the four types; this pin
selection makes them true analog or digital GPIO.
11
FTMF Pinouts
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Port
Number
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P3[3]
P3[1]
P1[7]
P1[5]
P1[3]
P1[1]
GND
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P3[0]
P3[2]
P2[0]
P2[2]
P2[4]
P2[6]
P0[0]
P0[2]
P0[4]
P0[6]
+Vdd
P0[7]
P0[5]
P0[3]
GND
Application Design Function

CapSense modulator capacitor
CapSense slider element 7
Unused/no-connect
CapSense feedback resistor
I2C clock line (SCL)
I2C data line (SDA)
Red LED drive
In system programming clock (ISSP_SCLK)
In system programming data (ISSP_DAT)
Blue LED drive
Green LED drive
Alarm/buzzer FET drive
In system programming reset pin (ISSP_XRES)
Unused / no-connect
Unused / no-connect
CapSense proximity antenna pad (PRX1)
Thermistor temperature sensor analog input
User A/D-GPIO
User A/D-GPIO
Ambient light detector analog input
Thermistor drive-voltage reference analog input
User A/D-GPIO
User A/D-GPIO
12
First Touch FTPC PinOut

13
First Touch FTMF Expansion Card PinOut

14
FTMF Expansion Card Functions

A CY8C21434 PSoC that acts as the host for various demonstrations. The FTMF Expansion Card has hardware to support the
following PSoC powered peripherals applications:
CapSense Touch Button

CapSense 7-Element Touch Slider
CapSense Non-Touch / Proximity Detection
Ambient light-level detection
Thermistor-based temperature measurement
The FTMF card also provides the following output devices:
Red-Green-Blue triple LED cluster

Audible magnet transducer or speaker, or both
I2C digital communications
Four unused A/D GPIO lines for user functions
Demonstration Projects :
Upon installing the Microsoft .net framework, PSoC Express 4.0, Express Expansion Pack 1, the following demonstration projects
can be run :
The the following input sensors are used :
CapSense slider Temperature sensor

Ambient Light sensor
CapSense proximity sensor
Document Version : 21st November , 2007, Revision A Aalap Tripathy, 2004P3PS208
15
BASIC FEATURES OF THE PSOC EXPRESS SOFTWARE

Steps in Desiging a System Illustrated using FirstTouch as Target Device
1.
a)
b)
c)
d)
2.
The Express consists of 4 design

steps available in separate windows:
Design
Simulate
Monitor
BOM/Schematic
On the left, we have the Device
Driver (Input) Selection Tree.
This enables us to quickly select design

elements and view project files in
Application Editor.
3.
We can select available

input/output/valuator/interface
devices by clicking on the link at the
bottom of the device tree.
4.
16
Controls 2 LED colors based on a hand's proximity to proximity sensor.

Rename Input Driver to
CapSenseSlider
Make number of sensor Pins = 7
Make SliderResolution = 99
(All other settings default)
Every time a CapSense Element is used

CSD Properties have to be included.
This shows up automatically.
Rename the second driver (shown as
Input2 in this screenshot) as
CSDProperties.
17
Now select output tab in the Device

Selection tree.
Navigate to Display LED TriColor Red/Green/Blue
This output device is present on the
FirstTouch Starter Kit and is therefore
being used.
We rename it to LED.
We right click the LED Driver and

select Transfer Function
We select PriorityEncoder to make the
conditional decisions.
18
Using the variable suggestions as

determined by Express, the following
conditions are added :
We have to use Enter key to move to the

else if condition
The always true state 1 is added to
ensure that we have the LED states off
at intermediate or undetermined states.
We navigate to the simulation tab and

now verify that different values in the
CapSenseSlider (0-100) give the state of
LEDs as originally expected.
19
Next we press F6 or goto Build

Generate/Build from the main menu.
A Screen as shown alongside appears
where we select CY8C21434 32 Pin
Chip because this is the chip present on
the FTMF Expansion Card.
Default parameters for Supply Voltage,
Sample Rate, Flash Interface and
Reserved ROM Size are chosen.
Assign Pins Automatically may be
chosen.
20
Introduction to PSoC moduleS
PSoC user modules (as used in Designer) have comprehensive data sheets which need to be referred before they are used in
any project.
This note merely mentions the highlights of the important modules to assist the first time user. Care has also been taken to
ensure that text book/internet references have also been given wherever possible.
Each module needs to have its start routine initialized after placement to work (with exceptions)
o Some analog blocks require arguments in the start routine to work properly
o Some digital blocks do not need to be initialized at all.
All API functions for blocks in the project are placed by the software.
A & X Registers are generally changed by API Calls. We may need to use PUSH & POP instructions to save the previous
content of the registers (as usual!!)
21
basic module
ADC
(Analog to Digital Converter)
PWM involves modification of the duty cycle of a signal or power source

ADCs have to be placed in switched capacitor digital blocks only
Please refer to Data Converters Chapter 10, Analog Electronics, L K Maheshwari and MMS Anand before
continuing with the rest of this section.
Suppose we want to convert an analog voltage range from Vss to VCC, the global parameters for the
reference mux must be set to VCC VCC
2
The following type of ADCs are available for the designer

o ADCINC12
o ADCINC14
o ADCINCVR
o DELSIG8
o DELSIG11
o DUALADC
o SAR6
o TRIADC
ADCINC12
This configures a Switched Capacitor Block as an Integrator

Input and Reference voltages are fed to the integrator alternately.
A counter determines the number of times the integrator is high
An 8 bit timer interrupts in 256 clock cycles to take the counter output.
basic module
pwm
(Pulse Width Modulator)
PWM involves modification of the duty cycle of a signal or power source

Standard PWM uses square wave whose duty cycle is varied to manage the average value of the waveform
PWM can be obtained by intersective, digital, delta and sigma-delta methods
o Intersective
Sawtooth/Triangular Wave generated by oscillator
Wave in lighter colour is reference wave
When (modulation waveform (sawtooth) < reference wave) Then (PWM Output=High)
Otherwise (Low)
22
Delta
An analog signal is approximated in a series of segments

Within a Reference
This method is not used in PSoC
In PSoC, PWM is generated using the digital method.

It uses a counter (that increments periodically)
Thus it needs to be somehow connected to the clock input
It is reset at the end of every cycle of PWM
Working: When (Counter value > Reference Value) Then (Output=High to low
transition)
23
Timer
Understanding Timer Parameteres:

o Clock
o
o
o
The clock parameter is selected from one of 15 sources.

State changes occur on the rising edge of the clock source.
Capture
A rising edge on this input causes the count register to be transferred to the
compare register.
The capture input allows us to capture the timer value at the event of this
input changing states.
TerminalCountOut
The terminal count output is an auxiliary counter output.
It provides a single pulse on this output when the timer reaches its terminal
count
CompareOut
It outputs a low on the reloading of the counter from the period register,
then changes to a high when the compare state becomes true.
This output is available to the next higher digital block. One of the input
options for digital blocks is to choose the output of the block immediately to
its left. This option applies to the clock source of the timer.
If another timer is in DBB1(place Timer16 and check), then one of the
clock options for that timer would be DBB0. The clock for that timer could
then come from the state of compare state of this timer regardless of
whether we choose none or any of the other output options.
Both timers would have to be started in order for the second timer to run
correctly.
This is how multibit asynchronous counters are designed (DECO)
Period
This parameter sets the period of the timer. Allowed values are between 0
and 255.
This value is loaded into the period register. The period is automatically
reloaded when the counter reaches zero or the timer is enabled from the
disabled state.
This value may be modified using the API.
Timer expires on (period value +1) i.e. when a carry condition is achieved
CompareValue
Sets the count point in the timer period when a compare event is triggered.
CompareType
Sets the compare function type to less than or less than or equal to.
InterruptType
This parameter specifies whether the terminal count event or the compare
event triggers the interrupt.
ClockSync
Used to control clock skew and ensure proper operation when reading and
writing PSoC block register values.
TC_PulseWidth
Whether the terminal count output pulse is one clock cycle wide or one half
clock cycle wide.
InvertEnable
This parameter determines the sense of the enable input signal.
Normal = enable input is active-high.
Invert = enable input is active-low.
24
experiments level 0
lcd interfacing and applications
5.
6.
Plug in the USB Connector to the PSoC MiniProgramming Kit. For the first time a new
driver installation will take place.
We place CY8C29466-24PXI in the dock
Programming the PSoC is a 2 step process

Develop the Code in PSoC
Designer
Download code to the device
3. Cypress Microsystems | PSoC Designer

4. Choose New Project
5. Type Project Name
25
6. Incase correct part is not chosen, use View

Catalog
7. Generate Main File using C
8. By default Assembler option is selected. In case
the C Compiler option is disabled, please goto
Tool Options Compiler and enter the
ImageCraft Serial Number available in the Lab
9. The Characters after the hyphen indicate the part
of packaging.
10
Notes :
1. Left pane shows preconfigured elements. They can be selected by highlighting the component Right Click Select
2. The resource meter on upper right side shows what part resources are used and available
11.
26
11. To interface the LCD Module (LCM

S01602DTR) from Lumex Systems, we first
need to add a LCD Module from the
Miscellaneous Digital Resources
12. Note the change in the resource meter
characteristics on the right pane.
(Pin out of the LCD Module as in datasheet)

13. Switch from the user module view to the
Interconnect view
27
14. In User Module Parameters, select LCD_1.

LCD Port Port_2
BarGraph Enable
(In case the Bar Graph feature is not required, this
can be disabled)
15. Scroll down in the pane below to see how the

pin configuration has been automatically update
it to the Oins used by the LCD Module.
Port_2 is used because in CY3210-PSoC Eval1
Board, this is the default configuration for the
J9 LCD connectors.
Make sure the LCD module is now connected.
Refer to the datasheet mentioned in the references to

verify that the LCD module is connected to the
right pins.
On the CY3210-Eval1 Board, the LCD is connected
to the J9 Connector
The same data sheet should be used for similar
projects.
The right hand legend shows an image of the chip and what each colour of the pin represents.
The middle view shows how the internal interconnects are configured and to which pins they are connected (In the screenshot
nothing has been placed yet)
To navigate the middle section use Ctrl + Click to Zoom In
Use Shift + Ctrl + Click to Zoom Out
Use Alt to navigate
You must learn to be fast with these operations by practice
28
18. Shift to Application Editor
14.
20. Of the over 15 files created, we will only be

modifying main.c
It is important to ensure that LCD_1_<function
name> is written since we have named our LCD
module as LCD_1
Otherwise we will get errors which say undefined
function
#include <m8c.h>
macros
#include "PSoCAPI.h"
User Modules
// part specific constants and

// PSoC API definitions for all
void main()
{
char str[ ] = "User Module";
string
LCD_1_Start();
hardware
LCD_1_Position(0,4);
row 0, col 4
LCD_1_PrCString("PsoC LCD");
"ROM" string
LCD_1_Position(1,2);
row 1, col 2
LCD_1_PrString(str);
string.
// Define "RAM" based

// Initialize LCD
// Position cursor @
// Print a constant
// Position cursor @
// Print "RAM" based
29
Resources Used :
1. Cypress Semiconductor: User Module Data Sheet LCD Tool Box: http://www.cypress.com/design/MR10138
2. Design Aids - CY3210 PSoCEval1 and MiniEval1 Development Board Example Projects - AN2011 Search on Cypress
Website Design Aids Section for CY3210
3. Purdy Electronics: AND721GST-LEDdatasheet: http://www.purdyelectronics.com/pdf/AND721GST.pdf
4. Purdy Electronics: Intelligent Alphanumeric Application Notes:
http://www.purdyelectronics.com/PDF/AlphanumericAppNotes.PDF
Further Experiments:
1. Perform the functions shown in this video using the PSoC and LCD - http://www.youtube.com/watch?v=uxc0U3OfbZs
30
experiments level 1
LED BLINKING
Blink an LED at a rate of 0.5 Hz
This experiment uses a timer to make LEDs blink at 0.5 Hz. Every time the timer counts down to 0, control passes to the
Timer_Interrupt_Service_Routine. A single line code in the ISR XORs the state of Pin 2 with x0001 which makes it effectively an
inverter. The timer is set on an infinite loop. So the blinking is perpetual. The timer count being used here makes it generate
interrupts once every 2 seconds.
7. Plug in the USB Connector to the
PSoC Mini-Programming Kit. For the
first time a new driver installation will
take place.
8. We place CY8C29466-24PXI in the
dock
Develop the Code in
PSoC Designer
Download code to the
device
31
6. Incase correct part is not chosen, use

View Catalog
8. By default Assembler option is selected.
In case the C Compiler option is
disabled, please goto Tool Options
Compiler and enter the ImageCraft
Serial Number available in the Lab
9. The Characters after the hyphen indicate
the part of packaging.
10
Notes :
11.
32
11. We will add an eight bit timer

Timer8_1
12. Note the change in the resource meter
characteristics on the right pane.
13. Switch from the user module view to
the Interconnect view
The right hand legend shows an image of the chip and what each colour of the pin represents.
The middle view shows how the internal interconnects are configured and to which pins they are connected (In the screenshot
nothing has been placed yet)
To navigate the middle section use Ctrl + Click to Zoom In
Use Shift + Ctrl + Click to Zoom Out
Use Alt to navigate
33
You must learn to be fast with these operations by practice

14. Global Resources Settings
32K_Select and PLL_Mode at
Internal and Disable
We are not using an external
crystal to drive the processor nor
need anything to sync it to.
CPU_Clock=SysClock/2
(=12MHz)
VC1=16
VC2=16
Effectively
VC1=24MHz/16=1.5MHz (Note
this is not CPUClock)
And VC2=1.5MHz/16=100KHz
VC3 Source = VC2
VC3 Divider=256
So VC3=366Hz
15. The Time8_1 is placed on DBB0 (Right Click Place Part)
16. User Module Parameteres
If not defined now, PSoC Designer will shorten the initialization section. This is advantageous in some cases
Clock = VC3 (=366 Hz)
Capture = Low (If selected, will allow capture of the timer value. We dont need it here)
TerminalCountOut = Row_0_Output_3
CompareOut = None
Period = 182
Compare Value = 0
Compare Type = Less Than
Interrupt Type = Terminal Count
Clock Sync = Sync To SysClk
TC Pulse Width = Full Clock
Invert Capture = Normal
(Note the change around the DBB0 block)
17. As a matter of procedure, we should
perform a Design Rule Check from the
tools menu. Since we have not explicitly
placed parts, it is not required here, but this
step should be followed for all
experiments, even if it is not explicitly
mentioned.
34
19. In application editor, Press F7 or

Build|Build All from the menu
This step generates all the files
associated with the user module
we have selected and update
header files and libraries as well.
In the left top pane, observe all
the files created and make a note.
With more components added,
more files will be created.
20. Optional Observation only
Open boot.asm
The file boot.asm is where the
chip will start executing code on
power-up.
Observe the lines as mentioned in
the right pane. This instructs jump
to the Interrupt Service Routine of
the timer
org
20h
ljmp
reti
;PSoC Block DBB00 Interrupt Vector

_Timer8_1_ISR
The files timer8_1.asm and timer8_1int.asm are associated with this timer.
The timer8_1.asm includes the routines associated with starting, stopping, and configuring the timer operation.
The file timer8_1int.asm contains the interrupt service routine for the timer.
The globalparams.inc and globalparams.h files contain equate statements associated with
the resources of the PSoC micro in general
The psocapi.inc and psocapi.h files are generated for convenience. They will include all of the module include files in a
project, so that we wont have to include them individually
m8c.inc contains often used macros
flashsecurity.txt file allows us to set the security of each block of Flash on the PSoC Default - protected.
21 Type the following code in main.c
#include <m8c.h> // part specific constants and macros

#include "PSoCAPI.h"// PSoC API definitions for all User Modules
// C Interrupt Handlers
#pragma interrupt_handler Timer8_1_ISR_C
void main()
35
{
//Enable the Global Interrupt
M8C_EnableGInt;
//Enable the Timer interrupt and Start the UM
Timer8_1_EnableInt();
Timer8_1_Start();
//infinte loop. Processing done only at Timer_ISR.
while(1);
}
// FUNCTION NAME: Timer8_1_ISR_C
// Interrupt Service routine of Timer8_1 usermodule written in
C.
void Timer8_1_ISR_C()
{
//Read Port2 and XOR it with 0x01 to change the status from
On to Off and vice-versa.
PRT2DR ^= 0x01;
}
22. Build
23 Press Program Part on the right
24.
25.
26.
27.
Select MINIProg1 in Port and connect

Select Program
Make sure you check power device icon after Programming Successed is displayed
Make sure Port2[3] is connected to an LED!!
Modifications/Exericse :
1. The blink rate is very fast. So, the intensity will appear very low. Modify the program to make perceptible blink rate of the
LEDs
2. Make multiple LEDs blink at variable rates. Same Timer may be used.
3. Make a potentiometer controlled variable blink LED rate system. That is when Potentiometer is turned in either direction, the
blink rate of the LEDs must vary.
a. The potentiometer voltage output fed to a pin
b. ADC used to convert that into a digital equivalent
36
4.
c. Make a Lookup Table which will convert it into different period values for the various digital value ranges in b
d. Change the Period value in the LED in the C Code Dynamically
e. Other settings remain the same.
Use a Pulse Width Modulator to get pulses of a certain width on a PSoC Pin. Connect this Pin externally to an LED on the
board you are using.
Additional Comments
In case we decide to make changes in boot.asm like defining extra interrupts, they will be lost as the boot.asm is
regenerated every time we build application
Changes if any can be done in boot.tpl. This will ensure that changes are reflected in the main boot.asm file every time the
file is regenerated.
Otherwise, we have to redo the changes every time a new boot.asm is generated.
37
experiments level 2
SIGNAL GENERATION
Generate a fixed frequency Sine Wave
Theoretical Analysis (AN 2086)
The fourier series of a square wave is given by :
w(t)= a0 +
a
n =1
i.e a0=
cos nw0 t + bn sin nw0 t
0.8
0.6
1
1
w(t )dt =
T0 T0
T0
+ T0 / 4
0.4
dt =1/2
0.2
T0 / 4
0
0
T0 / 4
2
n
sin
cos n0 tdt =
n 2
T0 / 4
2
an=
T0
bn=
20
40
60
80
100
120
140
160
180
10
200
T0 / 4
2
T0
sin n tdt = 0
0
T0 / 4
So, w(t) =
1
1
1
1 2
1
+ cos o t cos 3 0 t + cos 5 0 t cos 70 t + cos 9 0 t .. +

2
3
5
7
9
Assuming 0=1
1.2
1.2
1
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
-0.2
0
-0.2
0
10
1.2
1.2
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
-0.2
0
-0.2
0
t = 0:.1:10;
y = 1/2+(2/pi)*(cos(t) (1/3)*cos(3*t)+(1/5)*cos(5*t));
plot(t,y);
t = 0:.1:10;
y = 1/2+(2/pi)*(cos(t) -(1/3)*cos(3*t));
plot(t,y);
t = 0:.1:10;
y = 1/2+(2/pi)*(cos(t));
plot(t,y);
10
10
t = 0:.1:10;
y = 1/2+(2/pi)*(cos(t) (1/3)*cos(3*t)+(1/5)*cos(5*t));
plot(t,y);
38
The building of a square wave: Gibbs' effect

1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
20
40
60
80
100
120
140
160
MATLAB Code (For Verification)

t = 0:.02:3.14;
y = zeros(10,length(t));
x = zeros(size(t));
for k=1:2:19
x = x + sin(k*t)/k;
y((k+1)/2,:) = x;
end
plot(y(1:2:9,:)')
title('The building of a square wave: Gibbs'' effect')
Assuming w(t) =
1
1
1
1 2
1
+ cos o t cos 3 0 t + cos 50 t cos 7 0 t + cos 9 0 t .. +

2
3
5
7
9
And 0=2f, Let us assume f=1 unit = 1 Khz (say)

So, w(t) =
1
1
1
1 2
1
+ cos 2t cos 3t + cos 5t cos 7t + cos 9t .. +

2
3
5
7
9
To generate a sine wave from a given square wave, we need to pass this through a Band Pass Filter
The following simplification (based on AN2086) has the following features:
1. Use the BPF2 User module datasheet to determine the filter parameters such that:
Center frequency = 1Khz
Q=4
Oversampling Rate = 50
2. Two BPF2 filters are used to obtain accuracy
3. An 8 bit counter used to obtain a square wave of 1Khz frequency
4. For demonstration purpose, we are also using a 16 bit counter (fed at 24 Mhz) to implement a divide by 200. This
generates the clock input for the programmable gain amplifier
5. Output of Counter8_1 fed to pin P0[0]
6. This is externally connected (Explore advantages and disadvantages of internal connection if possible) to the input of a
programmable gain amplifier (PGA) in the analog module section
7. To avoid saturation of the output sine wave, gain of PGA set to 0.75 (Examine practical limits of PGA gain when the
final output becomes unidentifiable). Note that saturation of the square wave is meaningless because after clipping this
would still be square.
8. The Sine wave output is finally obtained at P0[5]
39
9.
Plug in the USB Connector to the

PSoC Mini-Programming Kit. For the
first time a new driver installation will
take place.
dock

Develop the Code in
PSoC Designer
device

View Catalog
8. By default Assembler option is selected.
In case the C Compiler option is
disabled, please goto Tool Options
Compiler and enter the ImageCraft
Serial Number available in the Lab
9. The Characters after the hyphen indicate
the part of packaging.
10
40
Notes :
11.
The following modules are placed :

Filters BPF2_1 & BPF2_2
Counters Counter16_1
Counters Counter8_1 & Counter8_2
41
Amplifiers PGA_1
12. Switch from the user module view to

the Interconnect view
Use standard procedure to place all blocks in the design. The following is a quick revision of the steps
13. Click on the clock input of the 16 bit counter. Select VC1 as shown. This makes it get a clock signal of SysClk=24 Mhz. You
can use VC3 to do this if you only need 8 bit divider. This will keep the digital block free for other things.
14. We will give the LSB of the 16 bit counter (divide by 8) as clock to the PGA. Scroll down to AnalogClock_0_Select and select
DBB00 (where the LSB section of the 16 bit counter is placed).
42
Note : If dividing by less than 256, then we can use an 8-bit counter. By using an 8-bit you will save digital blocks for other things.
Now select AnalogColumn_Clock_0 and select AnalogClock_0_Select. This effectively connects the output of the LSB of the 16
bit counter to the clock input of the Programmable Gain Amplifier.
Once the default experiment is over, one could try connecting the MSB of the 16 bit counter (here connected to
AnalogColumn_Clock_1) and give it as clock input to the Programmable Gain Amplifier. Note the change in the outputs.
Scroll up again to the first 8 Bit Counter (Counter8_1) This is the counter which actually is being used here to generate the square
wave of 4 Khz frequency (32 Khz/4) Select CPU_32_Khz as the clock input. Other options might be tried once the basic
experiment is over.
Note : The 32 kHz clock is not very accurate, so maybe it is not a good choice. The accuracy of the CPU_32kHz clock is from
15kHz to 64kHz. So, the 4 kHz could be anywhere from 2kHz to 8 kHz. I suggest dividing down VC1 and VC2 by the max (16
43
each) which would give you 93.275kHz. This could be divided in the Counter8 to get 4kHz (or whatever is wanted).
Connect the CompareOut to RO0[0]. Then to Global Out Even (GOE) 0 and then to Port_0_0. Other ports might be used. I have
used this for convenience of the external connections which I propose to use.
Remember to connect Port_0_0 to Port_0_1 because this is what I am assuming from the next step onwards. That is the
square wave generated will be available at Port_0_1 now.
Note: You can connect the digital output to Port0.0 and route that into the analog input. The analog connection is independent of
the digital connection, so both can be connected to the same
13. Scroll down to the AnalogColumns_InputMux0 and select Port_0_1.

This means Port_0_1 is now to be selected by PSoC Designer when configuring the blocks
44
14. Now select AnalogColumns_InputMux0 as the Input to the PGA block.

This effectively makes the input at Port_0_1 of the PSoC available as input
One can also connect the AnalogBus to AnalogOutBus_0. This can be then connected to a Pin as shown below. This step is only
for verification purposes.
45
15. Once we get a suitable analog value from the PGA, we need to feed it to the BPF.
For the first iteration, one may use the part placement as shown in the figure shown next other alternatives have their own
problems.
16. Click on the input of BPF2_1 FLIN Module and select ACB00 (it might be something different if you placed it differently)
Te opposite connection that is from PGA to BPF2_1 is not generally used (or possible!!)
Note : The way to set analog connections is by selecting which source is used for each input. Where the output goes cannot be set.
This is just the way that PSoC Designer was made to work.
You have to use this method to know obtain the square wave input signal to the first Band Pass Filter
46
17. Click on the Input of BPF2_2 module and select ASC10 (again this name might be different if your placement has been done
differently). But make sure that you connect from the BPF2_1 FLIN module.
18. To obtain the final output (now a sine wave) connect the AnalogBus of the BPF2_2 to the AnalogOutBus_1
19. You will notice that this is fed to buf1. Click on this to connect to Port0_5. Now the output can be sampled from Pin2
(Port0[5]) of the PSoC
47

32K_Select and PLL_Mode at
Internal and Disable
We are not using an external
crystal to drive the processor nor
need anything to sync it to.
(=3MHz)
VC1=1 (We dont need this)
VC2=1
VC3 Source = SysClk/1 (Default)
VC3 Divider=1
Every other parameter default
Notes : The "best" speed to set the

CPU for experimental use is 12MHz.
That is the maximum speed over the
full voltage range (using 24MHz
requires >4.75V). If projects require
minimum power, they can have their
CPU speed reduced after it gets
working.
Jeff recommends using VC1, VC2 or

VC3 as the source for the clock for the
square wave instead of the 32k Clock.
Generally, when clocks are not being

used, they should be set to the lowest
frequency (e.g. VC1 = 16, VC2 = 16,
VC3 Source = VC2, VC3 = 256). This
will use the least power.
(All Default)
48
21. Refer to the Band Pass Filter Design

Utility. The following parameters can be
used.
Note : The Wizard does not currently
work properly. Cypress plans on
having it fixed in a future release.
22. The following parameters for the

Programmable Gain Amplifier should be
used.
For secondary testing, the gain
can be varied here and
experimented
Notes :
This is prior to the filter, so only
setting gains <1 should have
an effect. Another option would
be to change the gain in the
Filter.
You can have PGA <1 (like
suggested above) and then
change the gain of the BPF
itself to see the effect on
amplitude.
The gain on the BPF is
negative (not obvious with a
sine wave output).
49
23. The User Module Parameters shown

alongside for the 8 bit counter should be
used. One can experiment with different
values once the primary result has been
obtained.
Counter8_2 is to show how broadcast buses (BC0) here can be used to take the output of one module can be fed to another. This
was actually used in AN 2086 to provide control of the frequency of the sine wave generated using a digital encoder. For more
information, refer the appendix.

header files and libraries as well.
the files created and make a note.
21 Type the following code in
; Assembly main line

50
main.asm
include "m8c.inc"
; part specific constants and macros
include "memory.inc"
; Constants & macros for SMM/LMM and
Compiler
include "PSoCAPI.inc"
; PSoC API definitions for all User
Modules
export _main
export flags, ticker, period
area
bss
(ram)
;inform assembler of
variables to follow
area text (ROM, REL)
_main:
M8C_EnableGInt
call
Counter16_1_Start
call
Counter8_1_Start
call
Counter8_2_Start ;Turn on Ticker
call
Counter8_2_EnableInt
mov
a,3;bPowerSetting to HighPower Mode. Refer
Datasheet
call
BPF2_1_Start
mov
a,3;bPowerSetting to HighPower Mode. Refer
Datasheet
call
BPF2_2_Start
mov
a,3
call
PGA_1_Start
;Turn on buffer
.terminate:
jmp .terminate
22. Build
23 Press Program Part on the right
24.
25.
26.
27.
Select MINIProg1 in Port and connect

Select Program
Make sure you check power device icon after Programming Successed is displayed
Make sure Port0[5] is connected to a CRO!!
51
Modifications/Exericse :
5. Connect the output of BPF2_1 FLIN module to the analog bus, then via the buffer to a pin of your choice. Observe the
difference if any between the outputs of the two Band Pass Filters. This will enable us to understand why at all two BPF
Filters should be used.
6. Try giving the output of the 8 bit counter directly to the Band Pass Filter (Internally and externally both). You will notice that
the input may also be given through a buffer amplifier. Try changing the gain of the buffer or PGA (to 1, then to higher
values) and observe the changes in the sine wave output waveforms.
7. Perform the application mentioned in AN2086. In case a digital encoder is not available, use a microprocessor or another
PSoC to generate the output waveforms mentioned in the Application Note.
8. An important thing to do is to add an R-C LPF on the output.
O-------/\/\/\-----o----------- output
|
----|
Gnd
The purpose of this filter is to remove the sample clock from the SC block. Its pole should be set between the pass
frequency of the BPF and the frequency of the SC blocks. The pole for the RC must be higher than the BPF frequency but
has to be low enough so that the SC clock is removed sufficiently. Look in the spreadsheet to see what the oversample
frequency of the BPF is. This will give an idea of the limits for the RC LPF.
Review of this Experiment :
1. Note : Items in italics refer to suggestions on this experiment by Jeff Dahlin, Principal Applications Engineer, Cypress
Semiconductors, San Jose. He may be reached for concrete doubts on jvy@cypress.com. Please first use the Developer
Forums at psocdeveloper.com for queries before contacting Jeff.
2. This experiment has been reviewed by Jeff Dahlin, PAE, Cypress Semiconductors.
52
53
54
55
56
57
experiments level 2
MANCHESTER CODE GENERATION
Constructing A Manchester Encoder
Theoretical Analysis (AN 2281)
Also refer Analog & Digital Communication Systems B P Lathi, 3rd Edition Text Book for EEE GC 383
Manchester encoding is a form of digital encoding where bits are represented by transitions from one logical state to another.
We can use SPIM User Module and LUT features and certain API functions to carry out encoding a single byte or a string of bytes.
Some of the necessary features in line coding (Sec 7.2) are :
o Small Transmission Bandwidth (BT)
o Adequate Timing Content possible to extract clock from signal
o Transparency - long number of 0s may cause error in timing extraction
o Error Detection and Correction Capability Bipolar codes make it possible to detect violations
o Favourable Power Spectral Density - PSD = 0 at =0
2
P ( )
1
pulses per second.

Assume a pulse p(t), its PSD, S y ( ) =
R0 + 2 Rn cos nTb where transmission rate is Rb=
Tb
Tb
n =1
Its Fourier Transform is P(). Since this contains the factor, P ( ) , we can force the PSD to have DC null by selecting p(t) such that
P() is zero at dc (=0)
P ( ) =
jt
p(t )e dt , we have P(0) =
j 0t
p(t )e dt i.e. P(0) =
p(t )dt
Given that
If we make the area under p(t) zero P(0) =0. For a rectangular pulse, one way of doing it is using split phase (twinned-binary)
signal. Using S y ( ) =
P( )
Tb
, we can claim that Manchester line code has dc null.
In Manchester encoding, logic high is represented by a high-to-low transition at mid clock and logic low is represented by a low-tohigh transition at mid clock. Please refer Figure 7.6 (Page 304) in B P Lathi for thorough understanding.
AN 2281 performs Manchester Encoding using Serial Peripheral Interface (SPI) and Lookup Table (LUT) Features available in the
Row_Output nets.
We use the SPI in Mode 0 (i.e CPOL and CPHA=0, refer to explanation at beginning of this
manual). Data is read on the clock's rising edge & Data written on the clocks falling edge.
Encoder SPIM when placed should have MISO = 0, MOSI and Clock are given to two Row
outputs. The LUT is then configured to perform MOSI XOR CLK.
Typical SPI Configuration
58
Block Diagram for Manchester Encoder
We may observe that an Exclusive OR operation over serial input (in Master Out Serial In - MOSI ) and the clock produces the
desired Manchester Coded output (shown in LUT Output).
This simplification should be tried out for different test cases of output. One such case as in the original application note is shown
above.
To generate the Manchester code of given data, we need to pass this through a Band Pass Filter
9. We have to configure the Clock, Period, and CompareValue parameters as per the desired Manchester data rate. The output of
Counter8 block should be twice the desired data rate.
10. We have to code so that the SPI Master Module sends say 16 bits encodes this and sends the result on a given pin.
11. Plug in the USB Connector to the
PSoC Mini-Programming Kit. For
the first time a new driver
installation will take place.
dock
Programming the PSoC is a 2 step
process
Develop the Code in
PSoC Designer
device
3. Cypress Microsystems | PSoC
Designer
59

View Catalog
8. By default Assembler option is
selected. In case the C Compiler
option is disabled, please goto Tool
Options Compiler and enter
the ImageCraft Serial Number
available in the Lab
9. The Characters after the hyphen
indicate the part of packaging.
10
11. The following modules are placed :

SPIM Encoder
60
Counter8 Clock
Notes :
12. Switch from the user module view
to the Interconnect view
(=24MHz)
VC1=16
VC2=8
VC3 Source = SysClk/1
VC3 Divider=1
Other settings are as shown
Here VC1 becomes 24/16 =1.5 MHz
14.
61
15. For the user module parameters of

the 8 bit Counter, the following is used :
Clock: VC1
Enable: High
ClockSync: Sync to SysClk
CompareOut: None
TerminalCountOut: None
Period: 50 (As per data rate required)
CompareValue: 25
CompareType: Less Than
InterruptType: Terminal Count
InvertEnable: Normal
16. Assuming the clock is placed on

DBB01, click on the clock source (top
left arrow) and a screen as shown
alongside appears.
Here we set the clock to VC1=1.5Mhz
62
17. Again assuming that SPIM (Encoder)

was placed DCB02, click on its clock
and select DBB01 this effectively
routes the LSB of the 8 Bit Counter as
clock source for the SPI Master.
18. Click on MOSI (Master Output) and

select routing to Row_0_Output_0.
Similarly select SClk and route it to
Row_0_Output_1
We can click on MISO and select Low
effectively driving it to the common
ground.
Clock Sync is selected as per clock
source (to synchronize with SysClock)
The same configuration can be done by
the values in the User Module
Parameters as shown in the circled
region.
63
19. Click on the Logical Operation Icon

at the end of RO0[0].
Clicking on this produces an option table
to map various outputs to Global Output
Even and Global Output Odd Lines
through logical operations
Now, click on the icon as shown by 2.
20. This produces various digital

operations that can be performed with
the two selected row inputs RO0[0] and
RO0[1] i.e. MOSI and SClk
respectively.
As described in the conceptual
description above a XOR operation
produces the desired output.
21.
We
now
select
Row_0_Output_0_Drive_0 as shown
and map this LUT output to appear on
GlobalOutEven_0 bus.
64
22.
Similarly
selecting
Row_0_Output_1, we can connect the
Digital Interconnect Row_0_Output_1 to
map into GlobalOut_Even_1
23. Finally GOE0 (which is MOSI) is

mapped to Port_2_0
And GOE1 (which is SClk) is mapped to
Port_2_1
Both the outputs are mapped so that they
can be easily observed on a CRO and the
theoretical results as described above can
be compared.
With these steps, most of the system
component placement and routing is
complete.

header files and libraries as
well.
the files created and make a
note.
65
26.
1. We have to Add
Manchester_Encoder.asm and
Manchester_Encoder.h to the project.
2. In main.c (or main.asm), we call the
SetupEncoder function to initialize the
Manchester Encoder.
3. After initialization, use the SendByte
or SendString function to perform
Manchester encoding.
The code with the step by step
explanation of each line is shown below.
27. Type the following code in main.c
//------------------------------------------------------------------// C main line

//------------------------------------------------------------------#include <m8c.h>
// part specific constants and macros
#include "PSoCAPI.h"
// PSoC API definitions for all User Modules
#include "Manchester_Encoder.h"
BYTE TxString[16]; //defines a BYTE Array of size 16
void main()
{
char x;
// Fill the Tx Buffer
for(x=0; x<16; x++)
{
TxString[x] = x;
}
// Initialize the Manchester Encoder
SetupEncoder();
while(1)
{
// Encode and Send the TxBuffer
EncodeArray(TxString, 16);
28.
This is the program description for
manchester_encoder.asm
This defines certain functions which
were used in the main.c. program.
// Send values 0 to 15 inside a for loop using EncodeByte

function
for (x=0; x<16; x++)
{
EncodeByte(x);
}
}
}
//This program effectively makes the encoder code the manchester
equivalent of decimal numbers 0 to 15.
Include "m8c.inc"
include "psocapi.inc"
include "psocgpioint.inc"
export _SetupEncoder
export SetupEncoder
66
The program contents are based on

the datasheet of SPIM.
call Encoder_SendTxData
makes a function call to a
predefined function in
encoder.h which is added to
the library headers by
default. (we have to rename
it to encoder otherwise the
default name will come in)
export _EncodeByte
export EncodeByte
export _EncodeArray
export EncodeArray
area bss(Ram)
Pointer:
BLK
1
DataCount: BLK
1
area text(rom)
;------------------------------------------------------------------; FUNCTION NAME: SetupEncoder
;
; DESCRIPTION:
;
Sets up and starts the resources for the Manchester encoder
;------------------------------------------------------------------; ARGUMENTS:
None
; RETURNS:
None
; SIDE EFFECTS: None
; PROCEDURE: The following operations are performed
;
1. The bit corresponding to DATA out pin in the PRTxDR register
;is set to 0
;
2. The DATA pin is disconnected from global bus so that the level
;is LOW
;
3. The SPIM user module is started at Mode0 and MSB_FIRST
;
4. The Counter that provides the SPIM Clock is started
;
5. A dummy byte is sent over SPIM to bring the MISO state which
;is connected to LOW to MOSI output. This is the idle level of MOSI
;output
;
6. The DATA pin is connected to Global bus thus connecting the
;output of the LUT to the DATA pin
;-------------------------------------------------------------------_SetupEncoder:
SetupEncoder:
; Clear the DATA bit in the PRTxDR register
and reg[DATA_Data_ADDR],~DATA_MASK
; Disconnect the DATA pin from Global bus
and reg[DATA_GlobalSelect_ADDR],~DATA_MASK
; Start the SPIM with Mode0 and MSB First shifting
mov A,(Encoder_SPIM_MSB_FIRST | Encoder_SPIM_MODE_0)
call Encoder_Start
; Start the SPIM clock
call Clock_Start
; Send a dummy byte to setup the MOSI level to HIGH
mov A,0xFF
; Wait till the Transmission is complete
WaitLoop:
call Encoder_bReadStatus
and A,Encoder_SPIM_SPI_COMPLETE
jz
WaitLoop
; Connect the DATA pin to Global bus
or
reg[DATA_GlobalSelect_ADDR],DATA_MASK
ret
;-------------------------------------------------------------------; FUNCTION NAME: EncodeByte
; DESCRIPTION:
;
Encodes and sends a single byte of Data
;------------------------------------------------------------------; ARGUMENTS:
A -> Byte to be encoded and sent
; RETURNS:
None
67
;-------------------------------------------------------------------_EncodeByte:
EncodeByte:
; Save the data in Accumulator to stack
push A
WaitTillTxBufferEmpty:
; Check if Tx buffer is empty before writing data
and A,Encoder_SPIM_TX_BUFFER_EMPTY
jz
WaitTillTxBufferEmpty
; Restore the data from stack to Acc
pop A
; Call the SendTxData function
ret
;-------------------------------------------------------------------; FUNCTION NAME: EncodeArray
; DESCRIPTION:
;
Encodes and sends a single bit of Data
;------------------------------------------------------------------;
; ARGUMENTS:
;
[SP-3] -> Pointer LSB to the Source Buffer
;
[SP-4] -> Pointer MSB to the Source Buffer
;
[SP-5] -> Data Count
; RETURNS:
None
;-------------------------------------------------------------------_EncodeArray:
EncodeArray:
mov X,SP
mov A,[X-5]
mov [DataCount],A
mov A,[X-3]
mov [Pointer],A
EncodeNextByte:
and A,Encoder_SPIM_TX_BUFFER_EMPTY
jz
EncodeNextByte
mvi A,[Pointer]
dec [DataCount]
jnz EncodeNextByte
ret
29.
Include Manchester_encoder.h in
the source files section
#pragma fastcall16 SetupEncoder;

#pragma fastcall16 EncodeByte;
#pragma fastcall16 EncodeArray;
extern void SetupEncoder(void);
extern void EncodeByte(BYTE DataByte);
extern void EncodeArray(BYTE *SourceBuffer, BYTE DataCount);
68
30. Build
31. Press Program Part on the right
32. Select MINIProg1 in Port and connect

33. Select Program
34. Make sure you check power device icon after Programming Successed is displayed
35. Make sure 20 Port2[0] MOSI and 8 Port2[1] SClk are connected to the two channels of a CRO. A
result similar to the one shown below will be obtained.
Modifications/Exericse (From AN2281):

1. The project API function for sending a string is actually a blocking function. It waits until all of the data is transmitted and
then it exits. If the user prefers to send data in the background only??
a. Enable the SPIM interrupt.
b. Set the interrupt mode to TxRegEmpty.
c. Inside the ISR, increment the pointer and load the Tx buffer with the subsequent data.
d. Verify that all data was sent. If all data was sent, a flag can be set by the ISR to indicate completion of the process
(this is for the main function to check).
69
2.
The SetupEncoder function initializes the SPIM in MSB_FIRST mode. If the application requires that the LSB be transmitted
first, then modify the code in the SetupEncoder function as shown below:
mov A,(Encoder_SPIM_MSB_FIRST | Encoder_SPIM_MODE_0)
call Encoder_Start
Review of this Experiment :

1. This experiment is based on AN 2281 as attached in this appendix by M. Ganesh Raaja, Applications Engineer
the first PSoC Master. He can be reached best through psocdeveloper.com forums.
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Psoc Handbook Manual Official

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Psoc Handbook Manual Official

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HANDBOOK & MANUAL

BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE - PILANI,

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

2. Contents of Work Done

Controlling Blinking LEDs

Digital Sine Wave Generation

Manchester Code (generation)

Single Pole IIR Filter

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

System overview and Special Mention

PSoC mixed-signal arrays are programmable systems-on-chips (SOCs) that integrate a

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

Comparison with dsPIC & BASIC Stamp

Uses built in peripherals + code +

Uses native PBASIC

Uses Building Block Approach

I/O Pins Predefined

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

The PSoC Core

All PSoCs share a common core.

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

The pinouts are configured using muxes and routing tables.

PSOC Express DK ($350)

PSoC Basic Development kit - $600

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

Software Tools Used

PSoC Designer launched in 2001

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

Design at User Module Level

Design at Application Layer

PSoC Assembly programming

Working With PSoC Express

Design Elements in PSoC Express are :

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

PSOC First Touch

Introduced by Cypress Semiconductors in 2007 as the ultimate starter kit. Combines

PSOC Lab, BITS Pilani Goa Campus

Document Version of 21st November, 2007

Created by Aalap Tripathy, 2004P3PS208

First Touch FTPC Bridge:

Contains CY8C24894 PSoC as the only active device on circuit.

First Touch Expansion Bridge:

Contains a CY8C21434 PSoC which acts as the Host during programming

PSOC Lab, BITS Pilani Goa Campus