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LTE-Advanced:

Overcoming Design Challenges


for 4G PHY Architectures

2011

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Copyright 2011 Agilent Technologies

Copyright 2011 Agilent Technologies

Agenda
Standards Overview
LTE-Advanced - New Features
LTE-Advanced - Channel Model
Introduction to Agilent SystemVue
Design Challenges
Working algorithmic reference
Flexible early verification & project NRE
Carrier Aggregation & RF stress
MIMO & Channel considerations
Verification increasing
Conclusion and Q&A

2011
Copyright 2011 Agilent Technologies

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2

LTE-Advanced Requirement
Performance indicators

Peak data rate


Peak spectrum
efficiency [bps/Hz]

LTE
Release 8

IMT-Advanced

LTEAdvanced
Release 10

DL
UL
DL

300 Mb/s
75 Mb/s
15 [bps/Hz]

1Gb/s
15 [bps/Hz]

1 Gb/s
500 Mb/s
30 [bps/Hz]

UL

3.75 [bps/Hz]

6.75 [bps/Hz]

15 [bps/Hz]

< 100 ms
< 5 ms
Up to 20 MHz
200 Active users per
cell in 5 MHz

100 ms
10 ms
Up to 40 MHz
Up to 200 UEs per
cell in 5 MHz

< 50 ms
< Rel 8 LTE
Up to 100 MHz
3 times higher than
that in LTE

Control plane latency


User plane latency
Scalable bandwidth support
VoIP capacity
Cell
spectrum efficiency
(bps/Hz)

DL

UL
Cell edge
spectrum efficiency
(bps/Hz)

DL

UL

2011

2x2
4x2
4x4
1x2
2x4
2x2
4x2
4x4
1x2
2x4

1.69
1.87
2.67
0.735
0.05
0.06
0.08
0.024
-

2.6

0.075

2.4
2.6
3.7
1.2
2.0
0.07
0.09
0.12
0.04
0.07

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Copyright 2011 Agilent Technologies

Release 10 Activity (LTE-Advanced)


LTE-Advanced Enhancements
(relative to Release 8/9, LTE)

Emerging Technologies
(Release 10 & beyond)

Carrier aggregation (CA)


- Contiguous and non-contiguous
- Control channel design for UL/DL

Relaying (multi-hop transmission)

Coordinated multipoint (CoMP)


transmission and reception

Enhanced multiple access scheme


- Clustered SC-FDMA
- Simultaneous Control and Data

Support for heterogeneous networks

LTE self-optimizing networks (SON)

HeNB and HeNB mobility


enhancements

CPE RF requirements

Enhanced MIMO transmission


- Downlink 8 antennas, 8 streams
- Uplink 4 antennas, 4 streams

2011
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LTE Key Parameters (review)


LTE-A builds on top of LTE Parameters and Frame Structure
UL adopts single carrier FDMA (SC-FDMA )
allows for commonality with the downlink OFDMA scheme
Access
scheme

DL

OFDMA

UL

SC-FDMA

Bandwidth

1.4, 3, 5, 10, 15, 20 MHz

Minimum TTI

1 ms

Subcarrier spacing

15 kHz

Cyclic prefix
length

Short

4.7 us

Long

16.7 us

Modulation

QPSK, 16-QAM, 64-QAM

S ti l multiplexing
Spatial
lti l i

Single
Si
l llayer ffor UL per UE
Up to 4 layers for DL per UE
MU-MIMO supported for UL and DL

REV-090003r1 IMT-Advanced Evaluation Workshop 17 18 December, 2009, Beijing

2011

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Copyright 2011 Agilent Technologies

LTE Frame Structure (review)


Supports both FDD and TDD frame structures
One radio frame 10ms
One slot

FDD

one subframe

UL

10

11

12

13

14

15

16

17

18

19

fUL

DL

10

11

12

13

14

15

16

17

18

19

fDL

15

16

17

18

19

special subframe

special subframe

UL

TDD

14

fDL/UL
DL

DWPTS

GP

10

11

12

UpPTS

Stefan Parkvall et al The Evolution of LTE towards IMT-Advanced, Journal of Communications, Vol. 4, No. 3, April 2009

2011
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LTE-A Enhancement #1: Carrier Aggregation


Wider bandwidth transmission using carrier
aggregation (CA)

support higher data rate


system bandwidths up to 100 MHz (5 component carriers
(CCs))

Backward compatible with


Rel-8 LTE when overlaid in
IMT carrier bands.
Supports both contiguous(figure a) and
non-contiguous(figure b) carrier aggregation.
LTE terminal
20 MHz

LTE terminal
20 MHz

LTE-Advanced terminal, 100MHz

LTE-Advanced terminal, 100MHz

(a) Contiguous carrier aggregation

2011

(b) Non-contiguous carrier aggregation

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Copyright 2011 Agilent Technologies

Downlink Multiple Access Scheme with CA


Downlink OFDMA with component
carrier (CC) based structure

One transport block is mapped within


one CC

Parallel-type transmission for multi-CC


transmission (in good alignment with
Release 8 specifications)

Cross-carrier scheduling is possible

DL control channels (such as PDCCH,


PCFICH, and PHICH) are updated to support
cross carrier scheduling.
cross-carrier
sched ling
Add a Carrier Indicator Field (CIF) to DCI.

Transport
block 1

Transport
block 2

Transport
block 3

Transport
block 4

Channel
coding

Channel
coding

Channel
coding

Channel
coding

HARQ

HARQ

HARQ

HARQ

Modulation

Modulation

Modulation

Modulation

Mapping

Mapping

Mapping

Mapping

20MHz CC1

20MHz CC2

20MHz CC3

20MHz CC4

One eNB

2011
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LTE-A Enhancement #2: Uplink Multiple Access Scheme


0
To
IFFT

from
DFT

Uplink adopts Clustered DFT


DFT-S-OFDM
S OFDM
allows non-contiguous (clustered) groups of
subcarriers as well as contiguous subcarriers to be
allocated for transmission by a single UE.

(a) Contiguous subcarriers allocation

support dynamic switching between Rel.8 single


cluster transmission and Rel.10 clustered
transmission

from
DFT

To
IFFT

Simultaneous PUCCH and PUSCH transmission

PUCCH
0

PUSCH

PUSCH

CC

2011

(b) non-contiguous subcarriers allocation

CC

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Copyright 2011 Agilent Technologies

Uplink Multiple Access Scheme with CA

Achieve wider bandwidth by


adopting parallel multi-CC
transmission to satisfy requirements
for peak data rate while maintaining
backward compatibility.
Each transport block is mapped to a
single component carrier.
A UE may be scheduled over
multiple component carriers
simultaneously

Transport
block 1

Transport
block 2

Transport
block 3

Transport
block 4

Channel
coding

Channel
coding

Channel
coding

Channel
coding

HARQ

HARQ

HARQ

HARQ

Modulation

Modulation

Modulation

Modulation

DFT

DFT

DFT

DFT

RB
mapping

RB
mapping

RB
mapping

RB
mapping

CC1 20MHz

CC2 20MHz

CC3 20MHz

CC4 20MHz

One UE

2011
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Uplink PUSCH Processing in LTE-Advanced


Transport block
CRC attachment

Figure (a) shows the same channel coding


procedure as LTE.

Code block segmentation


Code block CRC attachment

Channel coding

Rate matching

CQI

RI

ACK/
NACK

Code block
attachment

Channel
coding

Channel
coding

Channel
coding

Data and control multiplexing

Data arrives to the coding unit in the form of a


maximum of two transport blocks every
t
transmission
i i ti
time iinterval
t
l (TTI) per UL cell.
ll
Figure (b) shows the uplink physical channel
processing including MIMO processing.
Up to two codewords can be supported.

Channel Interleaver

(a) Transport channel processing for UL-SCH

(b) Overview of uplink physical channel processing

layers

codewords
Scrambling

Modulation
mapper

Scrambling

Modulation
mapper

antenna ports

Transform
precoder

Resource
element mapper

OFDM signal
generation

Resource
element mapper

OFDM signal
generation

Layer
Precoding
Mapper

2011

Transform
precoder

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Copyright 2011 Agilent Technologies

LTE-A Enhancement #3: multiple antenna transmission


From 4 antennas/streams to 8 antennas/streams
New for LTE-A
Baseline being 4x4 with 4 UE Receive Antennas
Peak data rate reached with 8x8 SU-MIMO
1, 2 or 4
From 1 antenna/stream to 4 antennas/streams
transmitters
and 2, 4 or 8
Baseline being 2x2 with 2 UE Transmit Antennae
receivers
Peak data rate reached with 4x4 SU-MIMO
UE
Focus is initially on downlink beamsteering
up to 4x2 antennas SM is less attractive
2, 4 or 8
Challenges of higher order antenna transmission
transmitters
Creates need for tower-mounted remote radio
and 2, 4 or 8
receivers
heads
Increased power consumption
eNodeB
Increased product costs
Physical space for the antennae at both eNB and UE

2011
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Enhanced Downlink MIMO Transmission Scheme


LTE DL MIMO uses antenna ports with cell-specific reference signals (CRS)
LTE-Advanced DL MIMO uses antenna ports with UE-specific reference
signals (DM-RS)
CRS0

Resource
element mapper

Precoding

Layer
Mapper

(a) CRS-based MIMO

Resource
element mapper
CRSN-1
DM-RS0

Resource
element mapper
DM-RSM-1

2011

Resource
element mapper

Precoding

Layer
Mapper

(b) DM-RS-based MIMO

CSI-RS0

CSI-RSN-1

CSI reference signals (CSI-RS)

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Copyright 2011 Agilent Technologies

LTE-Advanced MIMO Channel Model


Geometry-based stochastic model
Similar to WINNER II MIMO channel model
S x U, N Clusters (multipath)
Array 2
(U Rx elements)

Array 1
(S Tx elements)

2011
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LTE-Advanced MIMO Channel Model


The impulse response matrix of the U x S MIMO channel

Array 2
(U Rx
elements)

H(t ; ) = H n (t ; )

Array 1
(S Tx
elements)

n =1

H n (t ; ) = Frx ( )h n (t ; , , )FtxT ( ) d d

Where:
Ftx and Frx are antenna array response matrices
for the transmitter (Tx) and the receiver (Rx).
hn is the dual-polarized propagation channel response matrix for cluster n.

The channel from Tx antenna element s to Rx element u for cluster n


is expressed as
M
( ) T
( )

F
F

rx ,u ,V n ,m n ,m ,VV
n ,m ,VH tx , s ,V
n ,m
H u , s ,n (t ; ) =

F

(

)
(
F
a

m =1 rx ,u , H
n , m n , m , HV
n , m , HH tx , s , H
n ,m )
exp j 201 ( n ,m rrx ,u ) exp j 201 ( n ,m rtx , s )

) (

exp( j 2 n ,m t ) ( n ,m )

2011

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Copyright 2011 Agilent Technologies

LTE-Advanced MIMO Channel Model (contd)

Stage 1 of 3 consists of two steps.


1.
2.

First, the propagation scenario is selected.


Then, the network layout and the antenna configuration are determined.

In Stage 2 of 3, large-scale and small-scale parameters are defined.

90

120

2 1 gain pattern
Antenna
Antenna 2 gain60 pattern
1.5

150

30

0.5
180

Antenna pattern
330

210

240

300
270

2011
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LTE-Advanced MIMO Channel Model (contd)

In Stage 3, channel impulse responses (ChIRs) are calculated.


Please note antenna pattern should be input to ChIR generation to calculate correlation matrix.

Channel coefficient generation procedure

2011

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Copyright 2011 Agilent Technologies

Agenda
Standards Overview
LTE-Advanced - New Features
LTE-Advanced - Channel Model
Introduction to Agilent SystemVue
Design Challenges
Working algorithmic reference
Flexible early verification & project NRE
Carrier Aggregation & RF stress
MIMO & Channel considerations
Verification increasing
Conclusion and Q&A

2011
Copyright 2011 Agilent Technologies

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Greater confidence.
18

Unified architecture, verification tools for Layer 1 Comms


Augments general purpose environments, or, stands on its own

Agilent SystemVue
Cross-domain
Cross domain PHY modeling framework, for Model-Based
Model Based Design
PHY IP

Baseband Algorithms

RF Sys Architecture

Dataflow Simulation

RF Simulators

Baseband Hardware Flows

RF Hardware Flows
TEST

DSP/ASSP
GPP/ARM Software
FPGA/ASIC/SoC
Software
Hardware

RFIC / MMIC
Hardware
SiP / Board
Hardware

PHY system integration


and verification
Complete a working PHY using combinations of Software, RF/BB Hardware, Simulation, and Measurements

2011

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Copyright 2011 Agilent Technologies

Integrated, top-down Comms ESL flow


Cross-domain model-based design: RF, Comms, and C++/HDL
MEASUREMENT, ANALYSIS

Algorithms
C++, .m

System design
RF Architecture
Baseband design
PHY Reference

Dataflow Simulation
FlexDCA software

Handwritten
HDL
Custom IP

VSA software

.m/C++ ALGORITHM

HDL Simulator(s)
Target-neutral
HDL Generation

FPGA
Synthesis

Infiniium Scope

.bit
Files

SIMULATED H/W

FPGA Target

Logic Analyzer

Wideband arbs

Copyright 2011 Agilent Technologies

MXG / ESG

RF sensor

DIGITAL BITS, or MODULATED CARRIERS

REAL HARDWARE

2011

MXA / PXA

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10

Agenda
Standards Overview
LTE-Advanced - New Features
LTE-Advanced - Channel Model
Introduction to Agilent SystemVue
Design Challenges
Working algorithmic reference
Flexible early verification & project NRE
Carrier Aggregation & RF stress
MIMO & Channel considerations
Verification increasing
Conclusion and Q&A

2011

Greater insight.
Greater confidence.
21

Copyright 2011 Agilent Technologies

Design Challenge #1 Working Algorithmic Reference

As a design progresses :
System Architecture Algorithm RTL finished hardware
How many different IP references get written, used, thrown away? (NRE)
Are they compatible? Flexible? Updated?
Are they from a trusted source?
Can you re-use tests and scripting?

Are the BB and RF teams working from the same IP references?


Everyone needs some level of algorithm reference.
reference
Now able to deliver this IP throughout the design flow

2011
Copyright 2011 Agilent Technologies

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11

SystemVue W1918 LTE-Advanced baseband library


What is included?
W1918 LTE-Advance BVL includes:

Release 8
LTE

Release 10
LTE-Advanced

Compiled dataflow simulation blocks

104 parts

66 parts

Optional, add-on

not yet available

10 ref designs

4 ref designs

Testbenches / Reference Examples

16 examples

10 (to date)

Works with existing instrument H/W

Yes

Yes

Works with Agilent 89600B VSA and


SignalStudio software personalities

Yes

Yes

Yes, integrated

Yes, integrated

Yes

Yes,
extended for LTE-A

C++ exploration source code


Packaged MIMO Sources/Receivers, w/GUI

Works with Agilent W1716 DPD


Works with Agilent W1715 MIMO Channel
for simulation-based fading

2011

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W1918 LTE-Advanced baseband verification library


An open, Golden Reference for model-based design
Algorithmic Development Environment

FPGA Development
Environment

User IP
.m math code
C++
RTL
Test Vectors & scripts

SYSTEMVUE
INPUT VECTOR

Win32 DLL
C++ (special option*)

HDL test bench


HDL VECTOR

FPGA Hardware Test

Code-generation
SYSTEMVUE
INPUT VECTOR

SYSTEMVUE
OUTPUT VECTOR

SYSTEMVUE
OUTPUT VECTOR

FPGA VECTOR

*LTE source code exploration library (W1912) is a special option

2011
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12

Algorithmic lifecycle, for Model-Based Design

ALGORITHMIC MODELING
THAT STAYS IN TOUCH
WITH RF & SYSTEM-LEVEL
PERFORMANCE

2011

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SystemVue LTE-Advanced Library


Downlink Enhancement
Higher order DL MIMO: Up to 8 Tx 8 Rx Antennas
Support transmission to both R10 UEs and R8 UEs in a single source
Use DMRS to demodulate PDSCH
Precoding Codebook can be customized
Virtual Antenna Mapping: mapping matrix can be customized
Uplink Enhancement
Support Enhanced Uplink Multiple Access (clustered DFT-S-OFDM)
Support
pp Uplink
p
MIMO: up
p to 4 Tx and 4 Rx antennas
Carrier Aggregation
Support both inter and intra-band Carrier Aggregation
for both downlink and uplink

2011
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13

Design Challenge #2 Flexible early verification & NRE

How do you verify a standard that keeps Evolving? (the E in LTE-A)


Configuring standard-compliant test benches (such as TS 36.101-104)
requires
i
S
Scripting,
i ti
N
Non-Recurring
R
i E
Engineering
i
i (NRE) project
j t costs,
t
and Reference IP
Many tests also require a completed, operational system, with closed
feedback loop (e.g. for Throughput testing).
SystemVue libraries typically provide
5-15
1 off pre-configured
fi
d testbenches,
b
h
per wireless
i l
standard
d d
Complete working reference PHY to start with.
Parameterized, fully-coded, modifiable Sources, Receivers, etc
Specialized measurements for Throughput, EVM, ACLR, etc

2011

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Copyright 2011 Agilent Technologies

Dynamic Dataflow (simulation technology enhancement )


Enables dynamic MAC-like changes during simulation, while preserving timed RF

CODED
MIMO
SOURCE

Receiver requests dynamic Source changes


Link converges to highest Throughput

HARQ

CODED
MIMO
RCVR

8x8
MIMO
Channel
antennas
fading
doppler
interference

RF TX

RF RX

nonlinearity,
phase noise

nonlinearity,
noise

Updated throughput
throughput status during simulation
simulation, as the
LTE/LTE-A link adapts to an optimal PHY configuration

2011
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14

LTE-Advanced DL Throughput
Throughput measurements, up to 8x8, w/active HARQ
ACK/NACK

Up to 8x8 MIMO
Fading, RF impairments
Fully coded/decoded
Closed loop, with
Active HARQ

D1 0 {De la y @Da ta Fl ow M o d e sl }
N= 1
Ou tp u tTi m i n g = Eq ua l To n
I put

D1 {De l a y @Da ta Fl o w M o d e sl }
N= 1
Ou tp u tTim i n g = Eq u a l To Input

Tx RF

Rx RF
Fr eq

Phase
Q

Q UAD
O UT

Mod

A6
NDe ns i ty Ty p e = Con s ta n t n o i s e density
NDen s i ty = 6 .6 6 7e -1 2 W [NDe nsity]

O UT

Re

Phase
Q

N oise
D ens tiy

Fr eq

Im

Am p

D eMod

I
Am p

Re

D7
Ou tp u tTy p e = I/Q
FCa rri e r= 2 e + 9 Hz [FCa rri er]

R6 {Re c tTo Cx @Da ta Fl o w M o d e sl }

M8
In pu tTy p e = I/Q
FCa rri e r=2 e + 9 Hz [FCarri er]

C9

Fr eq
Phase

Im

MIMO
Channel

Q UAD
O UT

Mod

O UT
Am p

Re

M7
In pu tTy p e = I/Q
FCa rri e r=2 e + 9 Hz [FCarri er]

C8

LT E-A BB Source

Fr eq
Phase
Q

Im

D eMod

Mod

D eMod

A7
NDe n s i ty Ty p e =Co n s ta n t n oi s e density
NDe n s i ty = 6 .66 7 e -1 2 W [NDe n sity]

O UT

Phase
Q

I
Am p

Re

D6
Ou tp u tTy pe = I/Q
FCarri e r= 2 e + 9 Hz [FCa rri er]

Noise
D ens tiy

Q UAD
O UT

Am p

Re

Fr eq

Noise
D ens tiy
A5
NDe n s i ty Ty p e =Co n s ta n t n oi s e density
NDe n s i ty = 6 .66 7 e -1 2 W [NDe n sity]

R5 {Re c tTo Cx @Da ta Fl o w M o d e sl }

LTE-A BB Receiver

Fr eq
Phase
Q

Im

I
Am p

Re

D8
Ou tp u tTy pe = I/Q
FCarri e r= 2 e + 9 Hz [FCa rri er]

R7 {Re c tToCx @Da ta Fl ow M o d e sl }


UE1 _ T B
S

UE1 _ HARQ

_ B
ts i

Da t a
O tu
UE1 _ P
MI

M6
In pu tTy p e = I/Q
FCa rri e r=2 e + 9 Hz [FCarri er]

C7

PSS_ M

SSS_ M

O1
Freq u e n c y = 2 e+ 9 Hz [FCa rrier]
Po we r=1 W
Sa m p l eRa te = 7 .6 8 e +6 Hz [Sa m p li n gRate]

PBCH_ M

PCF I CH_ M

PHI CH_ M

11010

o d S y ms b
l
o

o d S y ms b
l
o

o d S y ms b
l
o

o d Sy m
s b
l
o

o d S y ms b
l
o

L TE_A

B4 {Da ta Pa tte rn @Da ta Fl o w M od e sl }


Da ta Pa ttern = PN15

HARQ

PDCCH_ M

Fr eq
Phase

Im

N oise
D ens tiy

O UT

Mod

MI
_ B
ts i U E 1 _ P
S C _ S t a tu
s

O UT

Re

Fr eq
Phase
Q

Q UAD

D eMod

An t 2 _ T
D

Im

I
Am p

o d S y ms b
l
o

DL
UE6 _ M

o d S y ms b
l
o

Ba s e band
An t 1 _ T
D

Re

UE5 _ M

o d S y ms b
l
o

Re c e vi er

Am p

UE4 _ M

o d S y ms b
l
o

UE3 _ M

o d S y ms b
l
o

UE2 _ M

o d S y ms b
l
o

UE1 _ M

o d S y ms b
l
o

U E 1 _ Ch a n n e B
lts i

L TE_A
U E 1 _ D a ta U E 1 _ M

DL
Src

C6

M5
In pu tTy p e = I/Q
FCa rri e r=2 e + 9 Hz [FCarri er]

o d S y ms b
l
o

f r m

D
F
_

f r m

D
T
_

A8
NDe n s i ty Ty p e= Co n s ta n t no i s e density
NDe n s i ty = 6.6 6 7 e -1 2 W [NDe n sity]

11010

D9
Ou tp u tTy p e = I/Q
FCa rri e r= 2 e + 9Hz [FCa rri er]

R8 {Re c tToCx @Da ta Fl ow M o d e sl }

LTEAdvance_Channe
l

L 3 {L TEAd v a n c e _ Ch an n e l @M IM O Ch a n n e l M odesl }
L TEAd v a n c e Sc e n a ri o Ty p e=InH
Ca rri e rFre qu e n c y = 2 .5e9Hz
Sa m p le Ra te = 5 e 6Hz
Ch a n n e l L i n k Di re c ti o n = Downn
il k
Se e d =0
Nu m b e ro fTx=2
Tx Po s i ti o n_ X= 0 ;0 [[0 , 0.0]
Tx Po s i tio n _ Y= 0 ;2 [[0, 2]
Tx An te n n a Pa tte rn Ty p e = Om ni Di re cto
i nal
Tx Ro tati o n An g e
l =0
Nu m b e ro fRx=2
Rx Po s i ti o n_ X= 0 ;0 [[0 , 0.0]
Rx Po s i ti o n_ Y= 0 ;0 .5 [[0, 0.5]
Rx An te n n a Pa tte rn Ty p e = Om ni Di re c to
i nal
Th eta Bs=0
Th eta M s=0
M SVe l o c i ty=50
M SDi re c ti o n =30
Dro p Inte rv a l = 0 .05s
Us e Fi x e d CDL Pa ra m e te r= YES
Us e Po l a ri s e = NO
Us e Sh ad o wM o d e l =NO
Us e M a n u al Pro p Co n d =NO
Us e In tra Clu s te rDe l a y s=NO
Us e Pa thL o s s M o d e =
l NO
M s Bs Di s ta n c e=10M
Ch a n n e l Co e ffi c i e n tOu tp u tFl ag=NO
Co rre l a ti o n M a tri x Ou tp u tFl a g=NO

L TE_ A_ DL _ Src _1
Us erDe fi n e d An tM a p p i n g M a trix=NO
UEs _ n _SCID= 0 ;0 ;0 ;0;0 ;0 [[0 , 0 , 0, 0 , 0 , 0]

Fr eq
Phase

Im
B2 {Da ta Pa tte rn @Da ta Fl o w M od e sl }
Da ta Pa ttern = PN9

LTEAdvanced
Downlink
MIMO source

Q UAD

Mod

I
Am p

Re

O UT

O UT

M4
In p u tTy p e = I/Q
FCa rri e r= 2 e+ 9 Hz [FCa rrier]

C5

Fr eq
Phase
Q

Im

LTELTE
Advanced
Channel
Model

Q UAD
O UT

Mod

O UT

Am p

Re
C4

M3
In p u tTy p e = I/Q
FCa rri e r= 2 e+ 9 Hz [FCa rrier]

Fr eq
Phase

Im

Mod

Q UAD
O UT

O UT

Re

Am p

C3

M2
In p u tTy p e = I/Q
FCa rri e r= 2 e + 9Hz [FCa rri er]

UE1 _ Ch a n n e B
lts i

U E 1 _ R a w B tis

Fr eq
Phase

N oise
D ens tiy

D eMod

A3
NDe n s i ty Ty p e= Co n s ta n t no i s e density
NDe n s i ty = 6.6 6 7 e -1 2 W [NDe n sity]

Q
I
Am p

D4
Ou tp u tTy p e = I/Q
FCa rri e r= 2 e + 9Hz [FCa rri er]

Re
R3 {Re c tTo Cx @Da ta Fl o w M o d e sl }

Fr eq

Noise
D ens tiy

D eMod

A4
NDe n s i ty Ty p e =Co n s ta n t n oi s e density
NDe n s i ty = 6 .66 7 e -1 2 W [NDe n sity]

Phase
Q
I
Am p

D5
Ou tp u tTy pe = I/Q
FCarri e r= 2 e + 9 Hz [FCa rri er]

m
Re
R4 {Re c tTo Cx @Da ta Fl o w M o d e sl }

Fr eq

N oise
D ens tiy

D eMod

Phase
Q
I
Am p

m
Re

Im

D2
Ou tp u tTy p e = I/Q
FCa rri e r= 2 e + 9 Hz [FCa rri er]

R1 {Re c tTo Cx @Da ta Fl o w M o d e sl }

Noise
D ens tiy

Q UAD
O UT

Re

REF

11010

D eMod

B1 {BER_ FER@Da ta Fl o w M o d e l s }
Sta rtSto pOp ti o n = Sa m pe
ls
Bi ts Pe rFra m e = 100

B3 {Da ta Pa tte rn @Da ta Fl o w M od e sl }


Da ta Pa tte rn = PN9

Phase
Q

Im

I
Am p

Re

O UT
Am p

A1
NDe n s i ty Ty p e =Co n s ta n t n oi s e density
NDe n s i ty = 6 .66 7 e -1 2 W [NDe n sity]

M1
In p u tTy p e = I/Q
FCa rri e r= 2 e + 9Hz [FCa rri er]

C2

2011

Mod

LTELTE
Advanced
BER/FER and
throughput
Downlink
MIMO
Receiver
TE ST

A2
NDe ns i ty Ty p e = Con s ta n t n o i s e density
NDen s i ty = 6 .6 6 7e -1 2 W [NDe nsity]

Fr eq
Fr eq
Phase

LTE_ A_ DL _ Rc v_1
UEs _ n _ SCID= 0 ;0 ;0 ;0 ;0 ;0 [[0 , 0 , 0 , 0 , 0, 0]

D3
Ou tp u tTy pe = I/Q
FCarri e r= 2 e + 9 Hz [FCa rri er]

R2 {Re c tTo Cx @Da ta Fl o w M o d e sl }

Greater insight.
Greater confidence.
29

Copyright 2011 Agilent Technologies

Hybrid Simulation/Test Manually closing a loop


LTE FDD UL Throughput Test (TS 36.141), or BER/BLER
STEP 1

Signal Generator

SystemVue Generates signal, then closes the loop

Customer Hardware eNodeB receiver

Filter

Filter

~
X

A/D

A/D

RU
Filter

3 4

C
P
R
I

DU
DU

DPD Gain

STEP 2
SystemVue
y
LTE decode
VSA 89600 waveform recording
Signal Analyzer

2011
Copyright 2011 Agilent Technologies

Greater insight.
Greater confidence.
30

15

Pre-configured LTE-Advanced MIMO Sources & Receivers


3 Levels of User Interaction are supported
High level GUI

or

Simplified, tabbed GUI

Detailed pieces

Scriptable
schematic

Open, parameterized,
reference design

H A R Q _ Bits U E 1 _PM I
S C _ S tatus

U E 1 _ C h a nnelBtis

LTE_A
U E 1 _ Data U E 1 _ M odSym bols

DL
f r m _FD

Src

f r m _TD

LTE_A_DL_Src_5
ShowSystemParameters=YES
FrameMode=FDD
TDD_Config=Config 0
SpecialSF_Config=Config 0
Bandwidth=BW 5 MHz
OversamplingOption= Ratio 2
CyclicPrefix=Normal
CellID_Sector=0
CellID_Group=0
UEs_RevMode=1;1;1;0;0;0 [[1, 1, 1, 0, 0, 0]]
RB_MappingType=Localized
SS_PerTxAnt=NO
ShowMIMO_Parameters=YES
UEs_MIMO_Mode=0;0;0;0;0;0 [[0,0,0,0,0,0]]
UEs CDD Mode=1;1;1;1;1;1 [[1
UEs_CDD_Mode=1;1;1;1;1;1
[[1,1,1,1
1 1 111
,1,1]]
UEs_CdBlk_Index=0;0;0;0;0;0 [[0,0,0,0,0,0]]
UEs_NumOfCWs=2;2;2;2;2;2 [[2,2,2,2,2,2]]
UEs_NumOfLayers=8;8;8;2;2;2 [[8,8,8,2,2,2]]
ShowUE1_Parameters=YES
UE1_HARQ_Enable=NO
UE1_NumHARQ=8
UE1_MaxHARQTrans=4
UE1_CL_Precoding_Enable=NO
UE1_PMI_Granularity=25
UE1_PMI_Delay=6
UE1_Config=Transport block size
555;2555;2555;2555;2555;2555;25... [[2555,2555,2555,2555,2555,2555,255
UE1_MappingType=0;0;0;0;0;0;0;0;0;0 [[0,0,0,0,0,0,0,0,0,0]]

2011

MIMO DL Source subnetwork

Greater insight.
Greater confidence.
31

Copyright 2011 Agilent Technologies

Inside the SystemVue LTE-Advanced Downlink Source


LTE

LTE PHI CH

DL_HI

LayM apPr ecoder

I n p u tP
rs
o

MI
P

Tx _ An
a
te

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

LTE_A DL

LTE_A
n
i p
t
u

M I M O M apper

PDSCHs--->UE2~6

LayM ap
Pr ecoder

I n p u tP
rs
o

o u tp
u

PHI CH_Vir t ualAnt M apping


HI
PHI CH_LayM apPr ecoder
UE_RevMode=0
Fr am eM ode=FDD [ Fr am eMode]
Fr am eM ode=FDD [ Fr am eM ode]
Num TxAnt s=Tx8 [ NumTxAnt s]
Bandwidt h=BW 5 M Hz [ Bandwidt h]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]
Ant MappingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ Ant M appingMatx]ri
PDCCH_SymsPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPer SF]
Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
HI =1; - 1; - 1; - 1; - 1; - 1; - 1; 1
- [H
I]
CelIl D_G r oup=0 [ CelIl D_G r oup]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]

T x _ A n te
a
n

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

UE6_LayM apPr ecoder


UE6_Vri t ualAnt M apping
UE_RevMode=0 [ UEs_RevM ode( 6) ]
UE_RevM ode=0 [ UEs_RevMode( 6) ]
M I MO _Mode=Spat a
i_
l M ux [ UEs_M I M O _M ode( 6)]
NumTxAnt s=Tx8 [ Num TxAnt s]
CDD_Mode=Zer o- Delay [ UEs_CDD_M ode( 6) ]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
CdBkl _I ndex=0 [ UEs_CdBkl _I ndex( 6) ]
Ant M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ UE6_Ant M appingMat rx] i
NumO f CWs=2[ UEs_NumO f CWs( 6) ]
Num O f Layer s=2[ UEs_NumO f Layer s( 6) ]
CL_Pr ecoding_Enable=NO
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
User Def n
i edPr ecoder =NO [ User Def n
i edPr ecoder ( 6) ]

UE6_Mapper
UE_RevM ode=Release_8 [ UEs_RevM ode( 6) ]
CW1_Dat aPat t er n=PN9
CW2_Dat aPat t er n=PN9
CW1_M appingType=Q PSK [ UE6_CW1_M appingType]
CW2_M appingType=Q PSK [ UE6_CW2_M appingType]
Fr am eM ode=FDD [ Fr am eMode]
Bandwidt h=BW 5 M Hz [ Bandwidt h]
Num TxAnt s=Tx8 [ Num TxAnt s]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
RB_Alo
l cType=St ar t RB + Num RBs [ RB_Alo
l cType]

Control Channels

MI
P

LTE DL
LTE
LTE

M
In

m
y
S
d
o

n
i p
t
u

PCFI CH

DL_CFI

RB_Ao
l c=0; 0 [ UE6_RB_Alo
l c]
Num O f Layer s=2[ UEs_NumO f Layer s( 6) ]

I n p u tP
rs
o

o u tp
u

LayMap
Pr ecoder

Tx _ An
a
te

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

O tu

Scr ambler
PCFI CH_Vri t ualAnt Mapping
UE_RevMode=0
Num TxAnt s=Tx8 [ NumTxAnt s]

PCFI CH_LayMapPr ecoder


Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]

PDCCH_SymsPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPer SF]


L4
Fr am eM ode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]

DL_CFI
Fr am eM ode=FDD [ Fr am eMode]
Bandwidt h=BW 5 M Hz [ Bandwidt h]
PDCCH_SymsPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPer SF]

CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]


Ant MappingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ Ant M appingMatx]ri

MI
P
MI
P

LTE_A DL

LTE_A
n
i p
t
u

M I M O Mapper

LayMap

I n p u tP
rs
o

o u tp
u

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

M I M O M apper

UE3_Vir t ualAnt Mapping


UE_RevM ode=1 [ UEs_RevM ode( 3) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Num O f Layer s=8[ UEs_Num O f Layer s( 3) ]
Ant M appingM at r xi =Real Ar r ay ( 1x64)

W1 { WaveFor m@Dat a Flow M odels}


Explci ti Values=240; 0; 0; 0; 0; 0; 0; 0; 0; 0V [ BCH_Bti s]

LTE_A DL

LTE_A

T x _ A n te
a
n

n
i p
t
u

Pr ecoder
UE3_LayM apPr ecoder
UE3_M apper
UE_RevMode=1 [ UEs_RevM ode( 3) ]
UE_RevMode=Release_10 [ UEs_RevM ode( 3) ]
MI M O _M ode=Spat a
i_
l M ux[ UEs_M I M O _M ode( 3)]
CW1_Dat aPat t er n=PN9
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 3) ]
CW2_Dat aPat t er n=PN9
CW1_M appingType=Q PSK [ UE3_CW1_M appingType]
NumO f CWs=2[ UEs_Num O f CWs( 3) ]
Num O f Layer s=8[ UEs_Num O f Layer s( 3) ]
CW2_M appingType=Q PSK [ UE3_CW2_M appingType]
Fr am eM ode=FDD [ Fr am eM ode]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
User Def n
i edPr ecoder =YES [ User Def n
i edPr ecoder ( 3) ]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Num TxAnt s=Tx8 [ NumTxAnt s]
Pr ecodingM at r xi =Real Ar r ay ( 8x8)
CRS_NumAnt Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]
RB_Ao
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
RB_Alo
l c=0; 0 [ UE3_RB_Ao
l c]
Num O f Layer s=8[ UEs_Num O f Layer s( 3) ]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]

LayM ap
Pr ecoder

I n p u tP
rs
o

o u tp
u

T x _ A n te
a
n

O f f set =0
V
Per o
i dic =YES

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

UE5_LayM apPr ecoder


UE5_Vri t ualAnt M apping
UE_RevMode=0 [ UEs_RevM ode( 5) ]
UE_RevMode=0 [ UEs_RevM ode( 5) ]
M I MO _Mode=Spat a
i_
l M ux [ UEs_M I M O _M ode( 5)]
NumTxAnt s=Tx8 [ Num TxAnt s]
CDD_Mode=Zer o- Delay [ UEs_CDD_M ode( 5) ]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
CdBkl _I ndex=0 [ UEs_CdBkl _I ndex( 5) ] Ant M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ UE5_Ant M appingM at rx] i
NumO f CWs=2[ UEs_NumO f CWs( 5) ]
Num O f Layer s=2[ UEs_NumO f Layer s( 5) ]
CL_Pr ecoding_Enable=NO
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
User Def n
i edPr ecoder =NO [ User Def n
i edPr ecoder ( 5) ]

UE5_M apper
UE_RevM ode=Release_8 [ UEs_RevM ode( 5) ]
CW1_Dat aPat t er n=PN9
CW2_Dat aPat t er n=PN9
CW1_M appingType=Q PSK [ UE5_CW1_M appingType]
CW2_M appingType=Q PSK [ UE5_CW2_M appingType]
Fr am eM ode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Num TxAnt s=Tx8 [ Num TxAnt s]
CRS_NumAnt Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
RB_Ao
l cType=St ar t RB + NumRBs [ RB_Ao
l cType]
RB_Alo
l c=0; 0 [ UE5_RB_Ao
l c]
Num O f Layer s=2[ UEs_Num O f Layer s( 5) ]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]

MI
P

Im

#r ows

Im

Table(n)

Re

Dynamic

Re
PCFI CH_M apper 1

C9 { CxToRect @Dat a Flow M odels}

R6 { Rect ToCx@Dat a Flow Models}

# cols

LTE DL

[ ]

n
i p
t
u

PBCH_ConvCoder
ChannelType=BCH
I nf oBit sSzi e=40 [ 24+16]

MI
P

LTE_A DL

LTE_A
n
i p
t
u

M I M O M apper

UE2_Mapper
UE_RevM ode=Release_10 [ UEs_RevM ode( 2) ]
CW1_Dat aPat t er n=PN9
CW2_Dat aPat t er n=PN9
CW1_M appingType=Q PSK [ UE2_CW1_M appingType]
CW2_M appingType=Q PSK [ UE2_CW2_M appingType]
Fr ameM ode=FDD [ Fr am eMode]
Bandwd
i t h=BW 5 M Hz [ Bandwidt h]
NumTxAnt s=Tx8 [ Num TxAnt s]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
RB_Alo
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
RB_Ao
l c=0; 0 [ UE2_RB_Alo
l c]
Num O f Layer s=8[ UEs_NumO f Layer s( 2) ]
PDCCH_SymsPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]

HARQ_Bits UE1_PMI
SC_Status

MI
P

LayM ap
Pr ecoder

T x _ A n te
a
n

n
i p
t
u

M I M O M apper
L T E _ A _ D L _ V ri tn
Mu
A
g
l
ia
p

UE2_Vri t ualAnt M apping


UE_RevM ode=1 [ UEs_RevM ode( 2) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Num O f Layer s=8[ UEs_Num O f Layer s( 2) ]
Ant M appingM at r xi =Real Ar r ay ( 1x64)

LayM ap
Pr ecoder

I n p u tP
rs
o

o u tp
u

T x _ A n te
a
n

Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Num TxAnt s=Tx8 [ NumTxAnt s]

CL_Pr ecoding_Enable=NO
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
User Def n
i edPr ecoder =NO [ User Def n
i edPr ecoder ( 4) ]

PBCH_CRC

PBCH_CRC
Num TxAnt s=Tx2
BCH_BlockSzi e=24

I n p u tP
rs
o

o u tp
u

T x _A n
a
te

L T E _ A _ D L _ V ri tn
Mu
A
g
l
ia
p

PBCH_LayM apPr ecoder


Num TxAnt s=Tx2 [ CRS_NumAnt Por t s]

PBCH_Vri t ualAnt Mapping


UE_RevM ode=0
Num TxAnt s=Tx8 [ Num TxAnt s]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Ant M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ Ant M appingM atx] ri

PBCH_Scr am bler
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]

LTE

[ ]

BCH G ener at or

BCH_Bti s { LTE_BCH_G en@LTE 8. 9 M odels }


Bandwidt h=BW 5 M Hz [ Bandwd
i t h]
Fr ameNum=0
Fr am eI ncr eased=YES
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

UE4_Vir t ualAnt M apping


UE4_LayM apPr ecoder
UE_RevMode=0 [ UEs_RevM ode( 4) ]
UE_RevMode=0 [ UEs_RevM ode( 4) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
M I MO _Mode=Spat a
i_
l M ux [ UEs_M I M O _M ode( 4)]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CDD_Mode=Zer o- Delay [ UEs_CDD_M ode( 4) ]
CdBkl _I ndex=0 [ UEs_CdBkl _I ndex( 4) ]Ant M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ UE4_Ant M appingM at rx]i
NumO f CWs=2[ UEs_NumO f CWs( 4) ]
Num O f Layer s=2[ UEs_NumO f Layer s( 4) ]

UE4_M apper
UE_RevM ode=Release_8 [ UEs_RevM ode( 4) ]
CW1_Dat aPat t er n=PN9
CW2_Dat aPat t er n=PN9
CW1_M appingType=Q PSK [ UE4_CW1_M appingType]
CW2_M appingType=Q PSK [ UE4_CW2_M appingType]
Fr am eMode=FDD [ Fr am eM ode]

CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]


Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]
RB_Ao
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
RB_Ao
l c=0; 0 [ UE4_RB_Ao
l c]
Num O f Layer s=2[ UEs_Num O f Layer s( 4) ]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]

User Def n
i edPr ecoder =YES [ User Def n
i edPr ecoder ( 2) ]
Pr ecodingM at r xi =Real Ar r ay ( 8x8)

LTE

LTE_A DL

LTE_A
I n p u tP
rs
o

o u tp
u

UE2_LayMapPr ecoder
UE_RevM ode=1 [ UEs_RevM ode( 2) ]
M I M O _M ode=Spat a
i_
l Mux[ UEs_M I M O _M ode( 2)]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 2) ]
Num O f CWs=2[ UEs_Num O f CWs( 2) ]
Num O f Layer s=8[ UEs_Num O f Layer s( 2) ]
CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]

LTE

LayMap
Pr ecoder

D3 { Dynam ci Pack_M @Dat a Flow Models}


For mat =ColumnM ajor

B2
Num Bti s=2

LTE

[]

ConvCoder

P11 { Pack_M @Dat a Flow M odels}


Num Rows=40 [ 24+16]
NumCols =1
For m at =Colum nM ajor

U1 { Unpack_M @Dat a Flow M odels}


Num Rows=120 [ 3*( 24+16) ]
NumCols =1
For m at =Colum nM ajor

L20 { LTE_ConvCoder @LTE 8. 9 Models }


Fr am eM ode=FDD [ Fr ameM ode]
Bandwidt h=BW 5 MHz [ Bandwd
i t h]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPer SF]

LTE

PBCH_Rat eM at ch

PBCH_Scr am bler

PBCH_Rat eM at ch
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
BCH_BlockSzi e=24

L22 { LTE_PDCCH_Mux@LTE 8. 9 M odels}


Fr am eM ode=FDD [ Fr am eM ode]
Bandwidt h=BW 5 M Hz [ Bandwd
i t h]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
DisplayPor t Rat es=NO
MI
P

LTE DL

LTE
LTE

LTE

LTE

LTE

LTE

M o
m
y
S
d
D a ta
In

DL_DCI _G en

DL_DCI _CRC

ConvCoder

DL_DCI _Rat eM at ch

n
i p
t
u

PDCCH

PDCCH_M ux

LayMap
Pr ecoder

LTE PDCCH
I n p u tP
rs
o

o u tp
u

T x _ A te
a
n

I nt er e
l aver
L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

D a ta
O tu

Scr ambler

UE1_HARQ _Bit s { DATAPO RT}


PO RT=7
Dat a Type=I nt eger
Bus=YES

UE1_Data UE1_ModSymbols

DL

DCI { LTE_DL_DCI _G en@LTE 8. 9 M odels}


Fr am eM ode=FDD [ Fr am eMode]
Bandwidt h=BW 5 M Hz [ Bandwidt h]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
PDCCH_SymsPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_SymsPer SF]
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]
PDCCH_UE_Aggr eLevel=1 [ PDCCH_UE_Aggr eLevel]
PDCCH_UE_DCI _For mat s=0; - 1; - 1; - 1; - 1; - 1 [ PDCCH_UE_DCI _For m at s]
PDCCH_Com m on_Aggr eLevel=4 [ PDCCH_Com m on_Aggr eLevel]
PDCCH_Com mon_DCI _For m at s=- 1; - 1; - 1; - 1 [ PDCCH_Com m on_DCI _For m at s]
UE_n_RNTI =1 [ UE1_n_RNTI ]

UE1_CW2_ChannelCoder
UE_RevM ode=Release_10 [ UEs_RevM ode( 1) ]
HARQ _Enable=NO [ UE1_HARQ _Enable]
Payload_Conf g
i =Tr anspor t block siz e [ UE1_Conf g
i]
Payload=2555; 2555; 2555; 2555; 2555; 2555; 2555; 25. . . [ UE1_CW2_Payload]
M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0 [ UE1_CW2_M appingType]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
DM RS_Num Ant Por t s=8 [ UEs_Num O f Layer s( 1) ]
NumO f Layer s=4 [ UE1_CW2_NumO f Layer s]
UE_Cat egor y=Cat egor y 1 [ UE1_Cat egor y]
RV_Sequence=0; 1; 2; 3 [ UE1_RV_Sequence]
q=1
ChBti _Conf g
i =REs per subf r am e
m
Q
RB_Ao
l cType=St ar t RB + Num RBs [ RB_Alo
l cType]
MI MO _Mode=Spat a
i_
l M ux[ UEs_M I M O _M ode( 1)]

PDSCHs--->UE1

UE1_ChannelBits

LTE_A

HA RQ

_
ts B
i

D a ta
In

LTE_A
DL
ChannelD a taO tu
Coder

UE1_Dat a { DATAPO RT}


PO RT=1
Dat a Type=I nt eger
Bus=YES

L30 { LTE_PDCCH_Scr am bler @LTE 8. 9 M odels }


Fr am eMode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]

L21 { LTE_DL_DCI _Rat eM at ch@LTE 8. 9 Models}


Fr am eMode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Dsi playPor t Rat es=NO

PDCCH_LayM apPr ecoder


Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]

Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]


CelIl D_Sect or =0 [ CelIl D_Sect or ]

UE_TxAnt Select o
i n=Non_conf g
i
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]
DisplayPor t Rat es=NO

CelIl D_G r oup=0 [ CelIl D_G r oup]


PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]

L5
Fr am eM ode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]

PDCCH_Vir t ualAnt M apping1


UE_RevM ode=0
NumTxAnt s=Tx8 [ Num TxAnt s]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Ant M appingMat r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ Ant M appingM atx]ri

PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]


PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]

m
Q

m
Q

UE1_PM I { DATAPO RT}


PO RT=8
Dat aType=I nt eger M at r xi
Bus=NO

LTE
D a ta
In

D a ta
O tu

M apper

Range check
Displaymessages

UE1_CW2_M apper
M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0[ [ 0, 0, 0, 0, 0, 0, 0, 0,0
,]

frm_FD

MI
P

LTE_A DL

C SI _
S
R

m
Q

Src

L19 { LTE_DL_DCI _CRC@LTE 8. 9 M odels}


Fr am eM ode=FDD [ Fr ameM ode]
Bandwidt h=BW 5 M Hz [ Bandwd
i t h]
Num TxAnt s=Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]

n
i p
t
u

LayM ap
Pr ecoder

I n p u tP
rs
o

o u tp
u

T x _ A n te
a
n
D M

RS_
1
E
U

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a
m
Q

HA RQ

_
ts B
i

D a ta
In

LTE_A
DL
ChannelD a taO tu
Coder

m
Q

D a ta
O tu

Mapper

UE1_CW1_M apper
M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0[ [ 0, 0, 0, 0, 0, 0, 0, 0,0
,]

UE1_CW1_ChannelCoder
UE_RevM ode=Release_10 [ UEs_RevM ode( 1) ]
HARQ _Enable=NO [ UE1_HARQ _Enable]
n_RNTI =1 [ UE1_n_RNTI ]
Payload_Conf g
i =Tr anspor t block size [ UE1_Conf g
i]

frm_TD

UE1_LayM apPr ecoder


UE_RevMode=1 [ UEs_RevM ode( 1) ]
MI M O _M ode=Spat a
i_
l M ux[ UEs_M I M O _M ode( 1)]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 1) ]
Num O f CWs=2[ UEs_Num O f CWs( 1) ]
Num O f Layer s=8[ UEs_Num O f Layer s( 1) ]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
User Def n
i edPr ecoder =YES [ User Def n
i edPr ecoder ( 1) ]
Pr ecodingM at r xi =Real Ar r ay ( 8x8)

LTE
D a ta
In

UE1_Vir t ualAnt Mapping


UE_RevM ode=1 [ UEs_RevM ode( 1) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Num O f Layer s=8[ UEs_Num O f Layer s( 1) ]
Ant M appingM at r xi =Real Ar r ay ( 1x64)

RS_
2
E
U

RS_
3
E
U

D M

RS_
4
E
U

D M

RS_
5
E
U

D M

RS_
6
E
U

RangeCheck
SC_St at us { DATAPO RT}
PO RT=6
Dat a Type=I nt eger
Bus=YES

D at a_
1
E
U

CRS_NumAnt Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]


DM RS_Num Ant Por t s=8 [ UEs_Num O f Layer s( 1) ]
Num O f Layer s=4 [ UE1_CW1_Num O f Layer s]
UE_Cat egor y=Cat egor y 1 [ UE1_Cat egor y]
RV_Sequence=0; 1; 2; 3 [ UE1_RV_Sequence]
q=0
ChBit _Conf g
i =REs per subf r am e

LTE_A_DL_Src_1 {LTE_A_DL_Src@LTE Advanced Models}

D M

D M

LTE_A DL Sr c

LTE_DL_M I M O _4Ant _Sr c_RangeCheck

Payload=2555; 2555; 2555; 2555; 2555; 2555; 2555; 25. . . [ UE1_CW1_Payload]


M appingType=0; 0; 0; 0; 0; 0; 0; 0; 0; 0 [ UE1_CW1_M appingType]

D at a_
2
E
U
S C _ S ta
s
u

LTE_A

D at a_
3
E
U

St O
d tu

DL_M uxO FDM Sym


D at a_
4
E
U

LTE_A

RB_Ao
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
M I M O _M ode=Spat a
i_
l M ux[ UEs_M I MO _M ode( 1)]

LTE

D a ta
O tu

DL_M uxSlot

D at a_
5
E
U

SpecShaping

D at a_
6
E
U

P DC C
H

LTE_A_DL_O FDM _M odulat or


Bandwd
i t h=BW 5 M Hz [ Bandwidt h]
O ver sampln
i gO pt o
i n=Rat o
i 2 [ Pr e_O ver sam p]
NumTxAnt s=Tx8 [ Num TxAnt s]

P HI C
H

L6 { LTE_A_DL_M uxSo
l t @LTE Advanced M odels}
Bandwidt h=BW 5 MHz [ Bandwd
i t h]
O ver sam pln
i gO pt o
i n=Rat o
i 2 [ Pr e_O ver sam p]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
Num TxAnt s=Tx8 [ Num TxAnt s]

P C F IC
H

P BH
C

LTE_A
DL DM RS
LTE
SSCH

L1
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]

[ ]
P1 { Pack_M @Dat a Flow Models}
Num Rows=72
NumCols =1
For m at =Colum nM ajor

LTE_A
MI
P

DL DM RS

LTE_A
Lay er _S
mb
y
l M
o

I M

m
y
S
_b
l
o

I n p u tP
rs
o

T x _ A n te
a
n

LTE
PSCH

[ ]

DL DM RS

MI
P

DL DM RS

LTE_A
I M

LTE
DL DM RS

m
y
S
_b
l
o

I n p u tP
rs
o

T x _ A n te
a
n

MI
P

L ay er _ y
m
Sb
l M I M
o

OS
m
y
_b
l
o

I n p u tP
rs
o

T x _ A n te
a
n

DL_M I M O
DM RS5
Disabled: O PEN
Fr am eM ode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]
RB_Ao
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
RB_Alo
l c=0; 0 [ UE5_RB_Ao
l c]
Num O f Layer s=2[ UEs_Num O f Layer s( 5) ]
n_SCI D=0 [ UE5_n_SCI D]
User Def n
i edO O C=YES [ User Def n
i edO O C]
DM RS_O O C=Real Ar r ay ( 8x4)
DisplayPor t Rat es=NO

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

DM RS2_Vir t ua
ualAntt M appi
appng
UE_RevM ode=1 [ UEs_RevM ode( 2) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Num O f Layer s=8[ UEs_Num O f Layer s( 2) ]
Ant M appingM at r xi =Real Ar r ay ( 1x64)

UE1_ChannelBti s { DATAPO RT}


PO RT=5
Dat aType=I nt eger M at r xi
Bus=YES

P o
li ts

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

Pr ecoder
DM RS5_
5 Pr ecode
ecoder
DMRS
S5_
5 Vri t ua
ualAntt M appi
appng
Dsi abled: O PEN
Dsi abled: O PEN
UE_RevMode=0 [ UEs_RevM ode( 5) ]
UE_RevMode=0 [ UEs_RevM ode( 5) ]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
Num TxAnt s=Tx8 [ Num TxAnt s]
MI M O _M ode=Spat a
i_
l M ux[ UEs_M I M O _M ode( 5)]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 5)Ant
] M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ UE5_Ant M appingM at rx] i
CdBkl _I ndex=0 [ UEs_CdBlk_I ndex( 5) ]
Num O f Layer s=2[ UEs_Num O f Layer s( 5) ]
CL_Pr ecoding_Enable=NO
User Def n
i edPr ecoder =NO [ User Def n
i edPr ecoder ( 5) ]

L3 { LTE_A_DL_MuxO FDMSym @LTE Advanced M odels}


Fr ameMode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwidt h]
NumTxAnt s=Tx8 [ Num TxAnt s]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]
UEs_RevM ode=1; 1; 1; 0; 0; 0 [ UEs_RevM ode]
UEs_M I M O _M ode=0; 0; 0; 0; 0; 0[ UEs_MI M O _Mod
]
e
UEs_Num O f Layer s=8; 8; 8; 2; 2; 2[ UEs_Num O f Layer s]
RB_MappingType=Localzi ed [ RB_M appingType]
SS_Per TxAnt =NO [ SS_Per TxAnt ]
RB_Alo
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
UE1_RB_Alo
l c=0; 8 [ UE1_RB_Ao
l c]
UE2_RB_Alo
l c=0; 0 [ UE2_RB_Ao
l c]
UE3_RB_Alo
l c=0; 0 [ UE3_RB_Ao
l c]
UE4_RB_Alo
l c=0; 0 [ UE4_RB_Ao
l c]
UE5_RB_Alo
l c=0; 0 [ UE5_RB_Ao
l c]
UE6_RB_Alo
l c=0; 0 [ UE6_RB_Ao
l c]
PDCCH_Sym sPer SF=2; 2; 2; 2; 2; 2; 2; 2; 2; 2 [ PDCCH_Sym sPer SF]
PHI CH_Dur at o
i n=Nor m al_Dur at o
i n [ PHI CH_Dur at o
i n]
PHI CH_Ng=Ng 1/ 6 [ PHI CH_Ng]
RS_EPRE=- 25 [ RS_EPRE]
PCFI CH_Rb=0 [ PCFI CH_Rb]
PHI CH_Ra=0 [ PHI CH_Ra]
PHI CH_Rb=0 [ PHI CH_Rb]
PBCH_Ra=0 [ PBCH_Ra]
PBCH_Rb=0 [ PBCH_Rb]
PDCCH_Ra=0 [ PDCCH_Ra]
CCH_Rb=0
b 0 [ PDCCH_Rb]
PDC
PDSCH_Power Rat o
i =p_B/ p_A = 1 [ PDSCH_Power Rat o
i]
UEs_Pa=0; 0; 0; 0; 0; 0 [ UEs_Pa]
PSS_Ra=0 [ PSS_Ra]
SSS_Ra=0 [ SSS_Ra]
DM RS_Ra=0; 0; 0; 0; 0; 0 [ DM RS_Ra]
Dsi playPor t Rat es=NO
Ant M appingMat r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ Ant M appingM atx]ri

f r m _FD { DATAPO RT}


PO RT=3
Dat a Type=Complex
Bus=YES

Multiplexer, OFDM Modulator, Framing and Spectrum Shaping

LTE_A
MI
P

DL DM RS

LTE_A
Lay er _S
mb
y
l M
o

I M

MI
P

LTE_A
O

m
y
S
_b
l
o

DL_M I M O
Ref er enceSymbol
Bandwidt h=BW 5 M Hz [ Bandwidt h]
NumTxAnt s=Tx2 [ CRS_Num Ant Por t s]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]
Dsi playPor t Rat es=NO

Physical Signals

LTE_A
O

DL_M I M O
DM RS2
Pr ecoder
Fr am eM ode=FDD [ Fr am eMode]
Bandwidt h=BW 5 MHz [ Bandwidt h]
DM RS
S2_Pr ecode
ecoder
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
UE_RevM ode=1 [ UEs_RevM ode( 2) ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CelIl D_G r oup=0 [ CelIl D_G r oup]
M I M O _M ode=Spat a
i_
l Mux[ UEs_M I M O _M ode( 2)]
RB_Alo
l cType=St ar t RB + Num RBs [ RB_Alo
l cType]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 2) ]
RB_Ao
l c=0; 0 [ UE2_RB_Alo
l c]
Num O f Layer s=8[ UEs_Num O f Layer s( 2) ]
Num O f Layer s=8[ UEs_Num O f Layer s( 2) ]
CL_Pr ecoding_Enable=NO
n_SCI D=0 [ UE2_n_SCI D]
User Def n
i edPr ecoder =YES [ User Def n
i edPr ecoder ( 2) ]
User Def n
i edO O C=YES [ User Def n
i edO O C]
Pr ecodingM at r xi =Real Ar r ay ( 8x8)
DM RS_O O C=Real Ar r ay ( 8x4)
Dsi playPor t Rat es=NO

LTE_A

DL_Pio
lt

T x _ A n te
a
n

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

DM RS6_Pr ecoder
DMRS6_Vri t ualAnt M apping
Dsi abled: O PEN
Dsi abled: O PEN
UE_RevMode=0 [ UEs_RevM ode( 6) ]
UE_RevMode=0 [ UEs_RevM ode( 6) ]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
Num TxAnt s=Tx8 [ Num TxAnt s]
MI M O _M ode=Spat a
i_
l M ux[ UEs_M I M O _M ode( 6)]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 6)Ant
] M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ UE6_Ant M appingM at rx] i
CdBkl _I ndex=0 [ UEs_CdBlk_I ndex( 6) ]
Num O f Layer s=2[ UEs_Num O f Layer s( 6) ]
CL_Pr ecoding_Enable=NO
User Def n
i edPr ecoder =NO [ User Def n
i edPr ecoder ( 6) ]

LTE_A

Lay er _S
mb
y
l M
o

P2 { Pack_M @Dat a Flow Models}


Num Rows=72
Nu
umCol
Coss =1
For m at =Colum nM ajor

I n p u tP
rs
o

Pr ecoder

LTE_A

L2
Ce
elIl D_S
Sect o
or =0
0 [ Cel
eIl D_S
Sect o
or ]

OS
m
y
_b
l
o

DL_M I M O

DM RS6
Disabled: O PEN
Fr am eM ode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]
RB_Ao
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
RB_Alo
l c=0; 0 [ UE6_RB_Ao
l c]
Num O f Layer s=2[ UEs_Num O f Layer s( 6) ]
n_SCI D=0 [ UE6_n_SCI D]
User Def n
i edO O C=YES [ User Def n
i edO O C]
DM RS_O O C=Real Ar r ay ( 8x4)
DisplayPor t Rat es=NO

Dat a Type=Com plex


Bus=YES

UE1_M odSym bols { DATAPO RT}


PO RT=4
Dat a Type=Com plex Mat r xi
Bus=YES

P SH
C

L ay er _ y
m
Sb
l M I M
o

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

DM RS3_Vir t ualAnt M apping


UE_RevM ode=1 [ UEs_RevM ode( 3) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Num O f Layer s=8[ UEs_Num O f Layer s( 3) ]
Ant M appingM at r xi =Real Ar r ay ( 1x64)

f r m _TD { DATAPO RT}


PO RT=2

S SH
C

MI
P

LTE_A
O

DL_M I M O
DM RS3
Pr ecoder
Fr am eM ode=FDD [ Fr am eMode]
Bandwidt h=BW 5 MHz [ Bandwidt h]
DM RS3_Pr ecoder
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
UE_RevM ode=1 [ UEs_RevM ode( 3) ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CelIl D_G r oup=0 [ CelIl D_G r oup]
M I M O _M ode=Spat a
i_
l Mux[ UEs_M I M O _M ode( 3)]
RB_Alo
l cType=St ar t RB + Num RBs [ RB_Alo
l cType]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 3) ]
RB_Ao
l c=0; 0 [ UE3_RB_Alo
l c]
Num O f Layer s=8[ UEs_Num O f Layer s( 3) ]
Num O f Layer s=8[ UEs_Num O f Layer s( 3) ]
CL_Pr ecoding_Enable=NO
n_SCI D=0 [ UE3_n_SCI D]
User Def n
i edPr ecoder =YES [ User Def n
i edPr ecoder ( 3) ]
User Def n
i edO O C=YES [ User Def n
i edO O C]
Pr ecodingM at r xi =Real Ar r ay ( 8x8)
DM RS_O O C=Real Ar r ay ( 8x4)
Dsi playPor t Rat es=NO

Spect r um Shaper
Bandwidt h=BW 5 M Hz [ Bandwd
i t h]
O ver sam pln
i gO pt o
i n=Rat o
i 2 [ O ver sam pln
i gO pt o
i n]
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Spect r um ShapingType=Tim eWindown
i g [ Spect r um ShapingType]
WindowType=Tukey [ WindowType]
Cyclci I nt er val=6 [ Cyclci I nt er val]
CI _St ar t Pos=- 3[ CI _St ar t Pos]

DM RS1
Pr ecoder
Fr am eM ode=FDD [ Fr am eMode]
Bandwidt h=BW 5 MHz [ Bandwidt h]
DM RS1_Pr ecoder
Cyclci Pr ef xi =Nor m al [ Cyclci Pr ef xi ]
UE_RevM ode=1 [ UEs_RevM ode( 1) ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CRS_NumAnt Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CelIl D_G r oup=0 [ CelIl D_G r oup]
M I M O _M ode=Spat a
i_
l Mux[ UEs_M I M O _M ode( 1)]
RB_Alo
l cType=St ar t RB + Num RBs [ RB_Alo
l cType]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 1) ]
RB_Ao
l c=0; 8 [ UE1_RB_Alo
l c]
Num O f Layer s=8[ UEs_Num O f Layer s( 1) ]
Num O f Layer s=8[ UEs_Num O f Layer s( 1) ]
CL_Pr ecoding_Enable=NO
n_SCI D=0 [ UE1_n_SCI D]
User Def n
i edPr ecoder =YES [ User Def n
i edPr ecoder ( 1) ]
User Def n
i edO O C=YES [ User Def n
i edO O C]
Pr ecodingM at r xi =Real Ar r ay ( 8x8)
DM RS_O O C=Real Ar r ay ( 8x4)
Dsi playPor t Rat es=NO

I n p u tP
rs
o

L ay er _ y
m
Sb
l M I M
o

T x _ A n te
a
n

OS
m
y
_b
l
o

DL_M I M O

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

DM RS4
Disabled: O PEN
Fr am eM ode=FDD [ Fr am eM ode]
Bandwd
i t h=BW 5 M Hz [ Bandwd
i t h]
Cyclci Pr ef xi =Nor mal [ Cyclci Pr ef xi ]
CelIl D_Sect or =0 [ CelIl D_Sect or ]
CelIl D_G r oup=0 [ CelIl D_G r oup]
RB_Ao
l cType=St ar t RB + Num RBs [ RB_Ao
l cType]
RB_Alo
l c=0; 0 [ UE4_RB_Ao
l c]
Num O f Layer s=2[ UEs_Num O f Layer s( 4) ]
n_SCI D=0 [ UE4_n_SCI D]
User Def n
i edO O C=YES [ User Def n
i edO O C]
DM RS_O O C=Real Ar r ay ( 8x4)
DisplayPor t Rat es=NO

DM RS1_Vir t ualAnt M apping


UE_RevM ode=1 [ UEs_RevM ode( 1) ]
Num TxAnt s=Tx8 [ Num TxAnt s]
Num O f Layer s=8[ UEs_Num O f Layer s( 1) ]
Ant M appingM at r xi =Real Ar r ay ( 1x64)

I n p u tP
rs
o

T x _ A n te
a
n

L T E _ A _ D L _ V ri tn
Mu
A
g
il
p
a

Pr ecoder
DM RS4_Pr ecoder
DMRS4_Vri t ualAnt M apping
Dsi abled: O PEN
Dsi abled: O PEN
UE_RevMode=0 [ UEs_RevM ode( 4) ]
UE_RevMode=0 [ UEs_RevM ode( 4) ]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
Num TxAnt s=Tx8 [ Num TxAnt s]
MI M O _M ode=Spat a
i_
l M ux[ UEs_M I M O _M ode( 4)]
CRS_Num Ant Por t s=CRS_Tx2 [ CRS_NumAnt Por t s]
CDD_M ode=Zer o- Delay [ UEs_CDD_Mode( 4)Ant
] M appingM at r xi =1; 0; 0; 0; 0; 0; 0; 0; 0; 1; 0; 0; 0; 0; 0; 0[ UE4_Ant M appingM at rx] i
CdBkl _I ndex=0 [ UEs_CdBlk_I ndex( 4) ]
Num O f Layer s=2[ UEs_Num O f Layer s( 4) ]
CL_Pr ecoding_Enable=NO
User Def n
i edPr ecoder =NO [ User Def n
i edPr ecoder ( 4) ]

Up to 2 codewords in input
Up to 8 layers (antenna ports)

2011
Copyright 2011 Agilent Technologies

Greater insight.
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32

16

Tabbed GUI of the SystemVue LTE-Advanced DL Source

2011

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33

Copyright 2011 Agilent Technologies

SystemVue LTE-Advanced Downlink TX


Mixed allocation of Rel10 and Rel8 RBs
RB 5-14
allocated for R8 UE

RB 0-4
allocated for R10 UE

2011
Copyright 2011 Agilent Technologies

RB 15-24
not allocated to any UE

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34

17

Enhanced Uplink Multiple Access


Design and test challenges
Clustered SC-FDMA increases PAR by a few dB adding to
transmitter linearity challenges
Simultaneous PUCCH and PUSCH also increases PAR
Both feature create multi-carrier signals within the channel
bandwidth
High power narrow PUCCH plus single or clustered SC-FDMA
creates large opportunity for in-channel and adjacent channel spur
generation
May require 3 to 4 dB power amp backoff for Rel-8
Rel 8 PA
Some scenarios may require 10 dB backoff.

2011

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35

Copyright 2011 Agilent Technologies

Inside the SystemVue LTE-Advanced Uplink Source

HARQ_Bits
SC_Status

CQI_In PUSCH_ChannelBits

LTE_A

HARQACK_In
PUSCH_ModSymbols

UL
RI_In

Data_FD

Src
DataIn

FRM_FD

Frame

LTE_A_UL_Src_1 {LTE_A_UL_Src@LTE Advanced Models}

Up to 2 codewords in input
Up to 4 layers (antenna ports)
Clustered DFT-S-OFDM

2011
Copyright 2011 Agilent Technologies

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36

18

Tabbed UI of the SystemVue LTE-Advanced Uplink Source

2011

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37

Copyright 2011 Agilent Technologies

SystemVue LTE-Advanced Uplink TX, w/2-layer MIMO


Clustered SC-FDMA

Cluster 1
PUSCH

PUCCH

Cluster 2
PUSCH

CCDF ~ 8dB
At 0.001%

2011
Copyright 2011 Agilent Technologies

The use of clustered SC-FDMA increases the PAPR above


non-clustered SC-FDMA, but not as much as full OFDM
which can exceed the PAPR of Gaussian noise

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38

19

Design Challenge #3 Carrier Aggregation stressing RF

Increased bandwidth of Carrier Aggregation drives PAPR to extreme


levels
Crest-Factor
C t F t Reduction
R d ti strategies
t t i are essential
ti l to
t offset
ff t this
thi iincrease
Increased RF bandwidth also exposes frequency-dependence and other
analog degradations, which crosses multiple CCs
Combinations of several factors: Non-contiguous Carrier Aggregation,
the multitude of possible RF Bands, and number of MIMO layers make
these RF designs
g a true challenge.
g
How do you translate real RF limitations back up to system-level
performance? Can you correlate PHY simulations with measurements?

2011

Greater insight.
Greater confidence.
39

Copyright 2011 Agilent Technologies

Using SystemVue to make LTE-Advanced CA signals


Scenario
number
1
2

TransmissionBWs
ofLTEAcarriers

Deploymentscenario

Singlebandcontiguousspec. UL:40MHz
alloc.@3.5GHzbandforFDD DL:80MHz
Singlebandcontiguousspec.
100MHz
alloc.@Band40forTDD
Singleband,noncontiguous
spec.alloc.@3.5GHzband
forFDD

UL:40MHz
DL:80MHz
HARQ _Bit s

11010

#ofLTEAcomponentcarriers

UL:Contiguous 2x20MHzCCs
DL:Contiguous 4x20MHzCCs
Contiguous5x20MHzCCs
UL:Noncontiguous 1x20+1x20MHzCCs
DL:Noncontiguous 2x20+2x20MHzCCs

BandsforLTEA
carriers

Duplex
modes

3.5GHzband

FDD

Band40
(2.3GHz)

TDD

3.5GHzband

FDD

UE1_PM I
SC_St at us

UE1_ChannelBti s

LTE_A
UE1_Dat a

UE1_M odSym bols

DL

f r m _FD

Src

11010

Im

Fre q
Ph a s e
Q

QUAD
OUT

CCDF

Mod

f r m _TD

LTE_A_DL_Src_1
UserDefinedAntMappingMatrix=NO

Re

I
Am p

OUT

UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]

CCDF

WoCA
Start=0s
Stop=10ms

11010

UE1_PM I
SC_St at us

HARQ _Bit s

CCDF_CA
Start=0s
Stop=10ms

UE1_ChannelBti s

LTE_A
UE1_Dat a

20 MHz
CCs

UE1_M odSym bols

DL
f r m _FD

11010

Src

Im

Fre q
Ph a s e
Q

QUAD
OUT

Mod

f r m _TD

LTE_A_DL_Src_2

Re

I
Am p

OUT

UserDefinedAntMappingMatrix=NO
UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]

11010

HARQ _Bit s

UE1_PM I
SC_St at us

Fc
Change

UE1_ChannelBti s

LTE_A
UE1_Dat a

Env

UE1_M odSym bols

DL
f r m _FD

Src

11010

Im

Fre q
Ph a s e
Q

Mod

f r m _TD

LTE_A_DL_Src_3

Re

I
Am p

QUAD
OUT

Spect r um Anal yzer

80 MHz
total

OUT

UserDefinedAntMappingMatrix=NO
UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]

11010

HARQ _Bit s

UE1_PM I
SC_St at us

UE1_ChannelBti s

LTE_A
UE1_Dat a

11010

UE1_M odSym bols

DL

Src

f r m _FD

Im

Fre q
Ph a s e
Q

QUAD
OUT

Mod

f r m _TD

LTE_A_DL_Src_4
UserDefinedAntMappingMatrix=NO

Re

I
Am p

OUT

UEs_n_SCID=0;0;0;0;0;0 [[0, 0, 0, 0, 0, 0]]

2011
Copyright 2011 Agilent Technologies

Greater insight.
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40

20

FDD and TDD LTE-Advanced Carrier Aggregation (DL)


Scenario 1 FDD DL

Scenario 4 FDD DL

Scenario 4 FDD UL

Scenario 2 TDD DL
Link

Configuration

PAPR of single CC,


before aggregation

S
Scenario
i 1

FDD DL

4 20 MH
4x20
MHz CC
CCs

8 45 dB
8.45

9 98 dB
9.98

Scenario 2

TDD DL

5x20 MHz CCs

9.17 dB

11.71 dB

FDD DL

2x20+2x20MHz

8.38 dB

9.58 dB

FDD UL

20 + 20MHz

5.79 dB

6.86 dB

Scenario

PAPR with CCs,


after aggregation

Scenario 4

2011

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Greater confidence.
41

Copyright 2011 Agilent Technologies

Validating early Standards proposals (such as CA)


Leverage a system/algorithm tool for early architecture reality check
How far away is my existing design? Can I fix it cheaply in software?

Early Algorithm validation


Early RF architecture validation
Trusted 3rd party IP reference

Software defined
Software-defined
instruments help with
emerging standards
support

2011
Copyright 2011 Agilent Technologies

Greater insight.
Greater confidence.
42

21

Digital Pre-Distortion (DPD)


Models/corrects for
PA nonlinearities and
memory effects

6C-GSM
Memory Effects

Works with test equipment


equipment,
and RF circuit co-simulation

LTE

Achieves 15-20dB for


20MHz LTE; now being
evaluated for LTE-A

LTE-A

Quickly assesses the


correctability of a PA
Can model the dirty PA
for inclusion in Layer 1 link-level architecture studies

2011

Greater insight.
Greater confidence.
43

Copyright 2011 Agilent Technologies

Digital Pre-Distortion (DPD)

Additional DPD considerations


Wizard-based or manual UI
Built-in signal generation
LTE/LTE-A Crest-Factor Reduction
Iterative model extraction, convergence
Built-in links to calibrated test equip,
AWGs, up/down converters, digitizers
Memory Effect PA model based on
measurements

Additional capabilities for the DPD Modeler


Modeling & Code Generation Develop & deploy your own algorithms
Scriptable, with external API links
Encapsulate a methodology, create a custom UI

2011
Copyright 2011 Agilent Technologies

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44

22

DPD of LTE-Advanced, using M9330A/M9392A


2x20MHz + 2x20MHz non-contiguous CCs, (100MHz signal BW)
For BW 140-250 MHz,
Agilent M9392A is available
- 12bits ADC
- up to 250MHz bandwidth
- over 2
2.5GHz
5GHz
- may require wideband AWG
For BW < 140 MHz:
Agilent PXA is recommended
- 14bits ADC
- can reach down to -100dBm
- greater DPD improvements

Sampling rate=245.76MHz

2011

Greater insight.
Greater confidence.
45

Copyright 2011 Agilent Technologies

Simulation vs. Measurement DPD Extraction Approaches


SIMULATION-BASED DPD
ADS
(predictive)

ADS & GoldenGate Circuits as simulated RF DUTs


- Complex loading, memory FX, dynamic behaviors
NVNA X-parameter measurement model,
- Great for smaller solid-state devices

GG
CO-SIM, MODELS

CO-SIM,
CO
SIM, MODELS

X-parameters

MODEL

N5241,2 PNA-X

MEASUREMENT-BASED DPD

RF DUT

M9392A PXI VSA (>140MHz)


or N9030A PXA (<140 MHz)

89600
VSA
External Trigger

I,Q

RF
Attenuator

M9330A AWG if > 100 MHz

2011
Copyright 2011 Agilent Technologies

N5182 MXG
or E8257D PSG
as external modulator

RF DUT

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46

23

Design Challenge #4 MIMO and Channel considerations


MIMO multiplicity is adding to the verification effort;
Do 8x4 and 8x8 provide the performance for an ROI?
Virtual techniques (Agilent MIMO OTA approach,
approach and simulation links
from bottom-up EDA flows) can bridge gaps
A surprising level of accuracy is attainable at the algorithm/architecture
stage of a design
Comparable algorithms can be used in both simulation and at-speed
hardware faders; this symmetry can ease the transition to verification

2011

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47

Copyright 2011 Agilent Technologies

LTE-Advanced Channel Modelling in SystemVue


Predictive, simulation-based fading, from 3DEM analyses
FILES

PHYSICAL ANTENNA
PATTERNS
from Agilent EMPro simulations

W1715 MIMO CHANNEL MODEL

LTEAdvance_Channel

antenna
pattern file 1

L2 {LTEAdvance_Channel@MIMO Channel Models}


LTEAdvanceScenarioType=InH
CarrierFrequency=2e+9Hz [FCarrier]
SampleRate=15.36e+6Hz [SamplingRate]
ChannelLinkDirection=Downlink
RxAntennaPatternType=UserDefine3D
MSVelocity=5.4e-3 [MsVelocity]

antenna
pattern file 2

from Anechoic measurements


...

antenna
pattern file N

2011
Copyright 2011 Agilent Technologies

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48

24

LTE-Advanced Channel Modelling in SystemVue


Antenna Patterns, loaded by human

2011

Throughput % vs. array rotation angle


(with/without human)

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49

Copyright 2011 Agilent Technologies

SystemVue 2x2 MIMO Downlink Throughput


Experimental & Simulated results vs. Angle-of-Arrival
1.02

It is possible to get early, realistic systemlevel results for MIMO

2x2 LTE-A
Throughput %

Throughput Factor

0.98

Incorporate preliminary designs for


- Baseband PHY, and user IP
- Industrial design & Antenna placement
- RF transceivers (pre-tapeout)
- Interference, and signaling environment

0.96
0.94
0.92
0.9
0.88
Experiment Results
Simulation Results

0.86
0.84
0

50

100

150
200
AoA in degree

250

300

350

Challenge: Simulation speed, and amount


of actual coverage testing

Transition from Simulations to Test


DUT

2011
Copyright 2011 Agilent Technologies

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50

25

Design Challenge #5 Verification increasing dramatically


Verification dimensionality expanding vs.
BB PHY operating modes of LTE-Advanced, LTE, 3G, WLAN, MIMO
RF Spectral allocations/bands, and analog control settings
Semiconductor processes,
processes battery
battery, and environmental conditions

Scripting, regressions, IP exchange, and testbenches across domains


RF models have been simplistic in Baseband in order to be fast
Baseband Algorithms are dumbed down to static modes for CW RF
no frequency response, no memory effects, noise, or dynamic phenomena

The next generation of tools are addressing these challenges

2011

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51

Copyright 2011 Agilent Technologies

Fast Circuit Envelope (FCE) Verification Modeling


FCE behavioral model is exported
from RFIC circuit tools

1000s of analog transistors

Runs native at the system-level in


seconds, without needing EDA licenses
Accounts for

Power-dependence
Frequency-dependence
Nonlinear memory effects
Frequency translation
ZeroIF/DC and RF carriers
Multiple I/O ports
Internal nodes

2011
Copyright 2011 Agilent Technologies

FastCircuitEnvelope

PA {FastCircuitEnvelope@Data Flow Models}


File='SIM_PA_2p505GHz_m7dBm_level1_ampaccu...

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52

26

Fast Circuit Envelope (FCE) Verification Modeling


Example: FCE model used in an LTE Uplink test
Coded LTE UL

5 MHz source
S t V W1910/W1918 lib
SystemVue
library
11010

Adjust input signal magnitude


TUNE
MODE
O1
Frequency =2.505GHz
Power=0.01W
SampleRate=15.36e+6Hz [SamplingRate]

HARQ_Bits
SC_Status

B2 {DataPattern@Data Flow Models}


DataPattern=PN9

NomGain = -15

CQI_In PUSCH_ChannelBtis

LTE

HARQACK_In
PUSCH_ModSymbols

-50

-15

Manage-Model
1. GoldenGate Cosim
2. FCE level 1, amplitude accuracy 5
2. FCE level 3, amplitude accuracy 5, frequency accuracy 1
2. FCE level 3, amplitude accuracy 5, frequency accuracy 2

UL

11010

RI_In

B3 {DataPattern@Data Flow Models}


DataPattern=PN9

11010

Data_FD

Src
DataIn

Im

FRM_FD

Freq
Phase
Q

Frame

LTE_UL_Src_1 {LTE_UL_Src@LTE 8.9 Models}


FrameMode=FDD
Bandwidth=BW 5 MHz [Bandwidth]
Ov ersamplingOption=Ratio 2 [Ov ersamplingOption]
Cy clicPref ix=Normal
CellID _Sector=0
CellID_Group=0
n_RNTI=0
FrameNum=0

Re
G1 {Gain@Data Flow Models}
Gain=0.178 [10^(NomGain/20)]

SCRIPTABLE ENVIRONMENT
SCRIPTABLE PARAMETERS

2011

CxToRect

I
Amp

QUAD
OUT

Mod
OUT

VSA_89600_Sink

FastCircuitEnvelope

Modulator
InputTy pe=I/Q

PA {FastCircuitEnv elope@Data Flow Models}


File='SIM_PA_2p505GHz_m7dBm_lev el1_ampaccu...

RFIC CMOS PA

V1 {VSA_89600_Sink@Data Flow Models}


VSATitle='Simulation output

89600 VSA

FastCircuitEnvelope model LTE demod


Exported from GoldenGate

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53

Copyright 2011 Agilent Technologies

Reliable system-level performance in seconds.


Nominal LTE result (0.4% EVM)

LTE result Compressing PA (20% EVM)

Pout = +10.6dBm, ACLR=37dBc


CPU time = 3 sec (150k points)

2011
Copyright 2011 Agilent Technologies

Pout = +19.3dBm, ACLR=23dBc


CPU time = 3 sec (150k points)

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54

27

Deepest Insights: Direct circuit envelope co-simulation


LTE FDD Uplink Closed-Loop HARQ Cosimulation with Two GoldenGate Instances
11010

CLOSED-LOOP
LTE UL
Throughput

B1 {DataPattern@Data Flow Models}


DataPattern=PN9

D1 {Delay @Data Flow Models}


N=7
OutputTiming=BeforeInput

11010
HARQ_Bits
SC_Status

B2 {DataPattern@Data Flow Models}


DataPattern=PN9

LTE

HARQACK_In
PUSCH_M od Symbols

UL

11010

RI_In

Da ta _FD

Im

TBS

HARQ_ Bits
F RM _FD

PUCCH_Sym

Freq
Phase
Q

BB_Q _I n

Frame

Noise
Density

S Y S TEM _O UTPUT

Gol den GateCosim

BB_I _I n

Re
S1 {SetSampleRate@Data Flow Models }
SampleRate=1.92e+6Hz [SamplingRate]

G1 {Gain@Data Flow Models}


Gain=0.05

CxToRect

GoldenGateCosim

GG_mix er {GoldenGateCos im@Data Flow Models}


AWGN
Path='GG_ex ample_mixer
Bloc k Siz e=192 [Cos imBloc k Size]
NDens ity Ty pe=Cons tant nois e density
NDens ity =584.2e-15W [NDensity]

GG_LNA {GoldenGateCosim@Data Flow Models}


Path='GG_ex ample_LNA
Bloc k Siz e=192 [Cos imBloc k Size]

DeMod

I
Amp

PUSCH_M odSymbosl

LTE

Im
Frame

Re

Demodulator
OutputTy pe=I/Q
FCarrier=2.625GHz

CQI_Out

UL
Rec eiv er

HARQACK_ Out

Rec tToCx

For cosim demo purpose:


Attenuate signal to fit the
operation range of mixer
and LNA

Dynamic RF behavior
Standards-compliant
High
Hi h accuracy
Directly uses the
I,Q
design databases
(not an indirect model)

2011

LTE
Throughput

PUSCH_ FD
FRM _FD

UL_Src
ShowSy s temParameters =YES
FrameMode=FDD [FrameMode]
Bandwidth=BW 1.4 MHz [Bandwidth]
Ov ers amplingOption=Ratio 1 [Ov ers amplingOpto
i n]
Cy c lic Prefix =Normal [Cy c lic Prefxi ]
CellID_Sec tor=0
CellID_Group=0
B4 {DataPattern@Data Flow Models}
HalfCarrierShift_Enable=YES
DataPattern=PN9
Printf_RB_SF_Alloc =NO
ShowPUSCH_Parameters =YES
PUCCH_PUSCH=PUSCH
HARQ_Enable=YES [HARQ_Enable]
NumHARQ=8
Max HARQTrans=4
Pay load_Config=Code rate [Pay load_Confg
i]
Pay load=0.75 [Pay load]
Enable64QAM=YES
MappingTy pe=1 [MappingType]
RV_Sequenc e=0;1;2;3 [[0,1,2,3]]
RB_Alloc Ty pe=StartRB + NumRBs [RB_Alloc Ty pe]
RB_Alloc =0;6 [RB_Alloc ]

11010

CRC

L1 {LTE_Throughput@LTE 8.9 Models}


SubframeStart=1
SubframeStop=1 [SubframeStop]
Status UpdatePeriod=1

GoldenGate
Receiver LNA
Cosim

Src
DataIn

B3 {DataPattern@Data Flow Models}


DataPattern=PN9

TBS

GoldenGate
Transmitter Mixer
2.625GHz Cosim

CQI_In PUSCH_Cha nnelBts


i

RI_Out

PUSCH_ Chan nelBts


i

UE_ RawBts
i

UL_Rec eiver
ShowSy s temParameters =YES
FrameMode=FDD [FrameMode]
Bandwidth=BW 1.4 MHz [Bandwidth]
Ov ers amplingOption=Ratio 1 [Ov ers amplingOpto
i n]
Cy c lic Prefix =Normal [Cy c lic Prefxi ]
CellID_Sec tor=0
CellID_Group=0
HalfCarrierShift_Enable=YES
ShowPUSCH_Parameters =YES
PUCCH_PUSCH=PUSCH
HARQ_Enable=YES [HARQ_Enable]
NumHARQ=8
Max HARQTrans=4

RFIC environmt
(remote Linux)

RFIC environmt
(remote Linux)

LowNoise Amp RFIC

Upconvert/TX RFIC

RF

RF

RF

Greater insight.
Greater confidence.
55

Copyright 2011 Agilent Technologies

Other approaches: Native RF System modeling


Bringing RF System Architectures up to the PHY-level
From
X-parameters

Dedicated simulator for RF system architecture


Local RF analog effects (e.g. - X-parameters)
Drag &drop the whole RF chain into Dataflow
dZ
IF architectures
hit t
Abl
Able tto d
do MIMO and
ZeroIF
To PHY system
performance

To RF System
Architectures

Drag & Drop

To PHY-level Systems

2011

Dataflow modeling on the fly

Greater insight.
Greater confidence.

Copyright 2011 Agilent Technologies

28

Agenda
Standards Overview
LTE-Advanced - New Features
LTE-Advanced - Channel Model
Introduction to Agilent SystemVue
Design Challenges
Working algorithmic reference
Flexible early verification & project NRE
Carrier Aggregation & RF stress
MIMO & Channel considerations
Verification increasing
Conclusion and Q&A

2011

Greater insight.
Greater confidence.
57

Copyright 2011 Agilent Technologies

System-level tools and LTE-Advanced algorithmic library


Flexible PHY algorithm reference from Concept to R&D Test
Accelerate your Physical Layer
(PHY) design process
trusted open
Save time with a trusted,
open,
independent IP reference
Validate BB & RF integration early
Streamline verification and NRE
Fill strategic gaps using simulation
Interoperate with test equipment,
even while
hil th
the St
Standard
d d evolves
l
Re-use the same Agilent assets
throughout process

2011
Copyright 2011 Agilent Technologies

Greater insight.
Greater confidence.
58

29

Conclusion
LTE-Advanced PHY presents significant new BB and RF design challenges
The EDA tools are also providing significant new capabilities to address
these challenges. What was shown today is already available.
Seen today:
instrument grade Standards IP reference, usable throughout the design process
Modular top-down ESL design approach across both Baseband and RF domains
High-performance measurement and modeling techniques
Open SW/HW platform, with single-vendor worldwide apps & support

Visitit us att regional


Vi
i
l Agilent
A il t seminar
i
ttours and
d iindustry
d t ttrade
d shows,
h
or on
the web at http://www.agilent.com/find/eesof-systemvue-lte-advanced

2011

Greater insight.
Greater confidence.
59

Copyright 2011 Agilent Technologies

Thanks!

2011
Copyright 2011 Agilent Technologies

Greater insight.
Greater confidence.
60

30

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