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Features
NOTE:
EXTERNAL
TANK
CIRCUIT
BIAS POINT
OUTPUT
VEE
VEE
8
SOIC8
D SUFFIX
CASE 751
8
1
K1648
ALYW
G
1
8
TSSOP8
DT SUFFIX
CASE 948R
8
1
1648
ALYWG
G
14
SOEIAJ14
M SUFFIX
CASE 965
14
1
KEL1648
ALYWG
1
DFN8
MN SUFFIX
CASE 506AA
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= PbFree Package
ORDERING INFORMATION
AGC
MARKING
DIAGRAMS*
A
L
Y
W
M
G or G
VCC
TANK
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6L M G
G
MC100EL1648
BIAS
VEE
VEE
14
13
12
11
10
VCC
OUT
VCC
NC
OUT
NC
AGC
NC
VEE
TANK VCC
AGC
VCC
NC TANK NC BIAS NC
8 Lead
VEE
14 Lead
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
8 Lead
14 Lead
Symbol
Description
12
TANK
2, 3
1, 14
VCC
Positive Supply
OUT
ECL Output
AGC
6, 7
7, 8
VEE
Negative Output
10
BIAS
2, 4, 7, 9, 11, 13
NC
No Connect
EP
Thermal
Exposed
Pad
Table 2. ATTRIBUTES
Characteristic
Value
N/A
N/A
ESD Protection
Oxygen Index: 23 to 34
Transistor Count
> 1 kV
> 100 V
> 1 kV
Pb Pkg
PbFree Pkg
Level 1
Level 1
Level 3
Level 1
Level 1
Level 3
Level 3
Level 1
UL 94 V0 @ 0.125 in
11
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2
MC100EL1648
Table 3. MAXIMUM RATINGS
Rating
Unit
VCC
Symbol
Parameter
VEE = 0 V
Condition 1
7 to 0
VEE
VCC = 0 V
7 to 0
VI
VEE = 0 V
VCC = 0 V
6 to 0
6 to 0
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
TA
40 to +85
Tstg
65 to +150
qJA
0 lfpm
500 lfpm
SOIC8
SOIC8
190
130
C/W
C/W
qJC
Standard Board
SOIC8
41 to 44
C/W
qJA
0 lfpm
500 lfpm
TSSOP8
TSSOP8
185
140
C/W
C/W
qJC
Standard Board
TSSOP8
41 to 44
C/W
qJA
0 lfpm
500 lfpm
SOIC14
SOIC14
150
110
C/W
C/W
qJC
Standard Board
SOIC14
41 to 44
C/W
qJA
0 lfpm
500 lfpm
DFN8
DFN8
129
84
C/W
C/W
Tsol
Wave Solder
265
265
qJC
35 to 40
C/W
Pb
PbFree
(Note 1)
Condition 2
VI VCC
VI VEE
DFN8
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
MC100EL1648
Table 4. PECL DC CHARACTERISTICS VCC = 5.0 V; VEE = 0.0 V +0.8 / 0.5 V (Note 2)
40C
Symbol
Characteristic
25C
85C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
13
19
25
13
19
25
13
19
25
mA
IEE
VOH
3950
4170
4610
3950
4170
4610
3950
4170
4610
mV
VOL
3040
3410
3600
3040
3410
3600
3040
3410
3600
mV
AGC
1690
1980
1690
1980
1690
1980
mV
VBIAS
1650
1800
1650
1800
1650
1800
mV
VIL
1.5
1.35
VIH
IL
1.2
2.0
Input Current
1.85
5.0
1.7
5.0
5.0
V
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Output parameters vary 1:1 with VCC.
3. 1.0 MW impedance.
4. This measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
Table 5. NECL DC CHARACTERISTICS VCC = 0.0 V; VEE = 5.0 V +0.8 / 0.5 V (Note 5)
40C
Symbol
Characteristic
25C
85C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
13
19
25
13
19
25
13
19
25
mA
IEE
VOH
1050
830
399
1050
830
399
1050
830
399
mV
VOL
1960
1590
1400
1960
1590
1400
1960
1590
1400
mV
AGC
3310
3020
3310
3020
3310
3020
mV
VBIAS
3350
3200
3350
3200
3350
3200
mV
VIL
3.5
3.65
VIH
IL
3.8
3.0
Input Current
5.0
3.15
5.0
3.3
5.0
V
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Output parameters vary 1:1 with VCC.
6. 1.0 MW impedance.
7. This measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
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4
MC100EL1648
GENERIC TEST CIRCUITS: Bypass to Supply Opposite GND
VCC
0.1 mF
0.1 mF
3 (1)
8 (10)
2 (14)
VIN
1 KW
*
Tank #1
4 (3)
**
FOUT
L = Micro Metal torroid #T2022, 8 turns #30
Enameled Copper wire (@ 40 nH)
C = MMBV609
1 (12)
6 (7) 7 (8)
VEE
100 mF
0.01 mF
5 (5)
0.1 mF
0.1 mF
0.1 mF
8 (10)
0.1mF
Test Point
0.1 mF
3 (1)
2 (14)
4 (3)
FOUT
Tank #2
1 (12)
6 (7) 7 (8)
VEE
100 mF
0.01 mF
5 (5)
0.1 mF
0.1 mF
50%
VP-P
ta
PRF = 1.0MHz
t
Duty Cycle (Vdc) - a
tb
tb
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5
MC100EL1648
OPERATION THEORY
Q2 and Q3, in conjunction with output transistor Q1,
provide a highly buffered output that produces a square
wave. The typical output waveform can be seen in Figure 4.
The bias drive for the oscillator and output buffer is provided
by Q9 and Q11 transistors. In order to minimize current, the
output circuit is realized as an emitterfollower buffer with
an on chip pulldown resistor RE.
800 W
VCC 3 (1)
1.36 KW
3.1 KW
660 W
167 W
Q9
Q1
Q3
1.6 KW
Q2
OUTPUT
4 (3)
Q4
Q11
Q10
Q7 Q6
D1
330 W
Q8
D2
400 W
Q5
16 KW
VEE
7 (8)
BIAS
8 (10)
TANK
1 (12)
VEE
6 (7)
82 W
AGC
5 (5)
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6
400 W
660 W
510 W
MC100EL1648
30
Measured Frequency (MHz)
FREQUENCY (MHz)
25
20
15
10
5
0
300
500
1000
2000
10000
0.1mF
CAPACITANCE (pF)
2 (14)
8 (10)
10mF
3(1)
1200*
0.1mF
4 (3)
SIGNAL
UNDER
TEST
1 (12)
Tank #3
6 (7) 7 (8)
VEE
100 mF
0.01 mF
5 (5)
0.1 mF
0.1 mF
FREQUENCY (MHZ)
80
60
40
20
0.2
0.3
0.1mF
CAPACITANCE (pF)
2 (14)
8 (10)
10mF
3(1)
1200*
0.1mF
Tank #3
4 (3)
1 (12)
6 (7) 7 (8)
VEE
100 mF
0.01 mF
0.1 mF
5 (5)
0.1 mF
SIGNAL
UNDER
TEST
MC100EL1648
FIXED FREQUENCY MODE
capacitors should have very low dielectric loss (highQ). At
a minimum, the capacitors selected should be operating at
100 MHz below their series resonance point. As the desired
frequency of operation increases, the values of the tank
capacitor will decrease since the series resonance point is a
function of the capacitance value. Typically, the inductor is
realized as a surfacemount chip or a wound coil. In
addition, the lead inductance and board inductance and
capacitance also have an impact on the final operating point.
The following equation will help to choose the appropriate
values for your tank circuit design.
f0 +
570
FREQUENCY (MHz)
LT = Total Inductance
CT = Total Capacitance
Figure 9 and Figure 10 represent the ideal curve of
inductance/capacitance versus frequency with one known
tank component. This helps the designer of the tank circuit
to choose desired value of inductor/capacitor component for
the wanted frequency. The lead inductance and board
inductance and capacitance will also have an impact on the
tank component values (inductor and capacitor).
50
0.3
300
500
1000
2000
45
10000
INDUCTANCE (nH)
CAPACITANCE (pF)
VCC
0.1 mF
8 (10)
0.1 mF
3 (1)
2 (14)
Tank #2
35
30
Inductance vs. Frequency with 5 pF Cap
25
20
15
FOUT
0
400
1 (12)
700
1000
1300
160
FREQUENCY (MHz)
6 (7) 7 (8)
VEE
100 mF
40
10
4 (3)
5 (5)
50
0.01 mF
0.1 mF
45
0.1 mF
40
CAPACITANCE (F)
0.1 mF
Test
Point
LT * CT
Where
470
2p
35
30
25
20
15
10
QL 100
400
700
1000
FREQUENCY (Hz)
1300
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8
160
MC100EL1648
VOLTAGE CONTROLLED MODE
The tank circuit configuration presented in Figure 11,
Voltage Controlled Varactor Mode, allows the VCO to be
tuned across the full operating voltage of the power supply.
Deriving from Figure 6, the tank capacitor, C, is replaced
with a varactor diode whose capacitance changes with the
voltage applied, thus changing the resonant frequency at
which the VCO tank operates as shown in Figure 3, tank
option #1. The capacitive component in Equation 1 also
needs to include the input capacitance of the device and
other circuit and parasitic elements.
190
FREQUENCY (MHz)
170
150
130
110
CD(max) ) CS
f max
+
f min
CD(min) ) CS
90
70
50
Where
0
10
f min +
Where
CS = Shunt Capacitance (input plus external
capacitance)
VCC
0.1 mF
8 (10)
2 (14)
VIN
4 (3)
L*
0.1 mF
3 (1)
1 KW
Tank #1
1 (12)
6 (7) 7 (8)
VEE
100 mF
0.01 mF
0.1 mF
2p L(CD(max) ) CS
5 (5) **
0.1 mF FOUT
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9
MC100EL1648
WAVEFORM CONDITIONING SINE OR SQUARE WAVE
Figure 13. At frequencies above 100 MHz typical, it may be
desirable to increase the tank circuit peaktopeak voltage
in order to shape the signal into a more square waveform at
the output of the MC100EL1648. This is accomplished by
tying a series resistor (1.0 kW minimum) from the AGC to
the most positive power potential (+5.0 V if a positive volt
supply is used, ground if a 5.2 V supply is used). Figure 14
illustrates this principle.
+5.0Vdc
14
10
1
3
14
10
Output
Output
1.0k min
12
5
7
12
5
7
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10
MC100EL1648
10 dB / DEC
SPECTRAL PURITY
99.8
99.9
100.0
100.1
100.2
0.1 mF
2 (14)
8 (10)
10 mF
3(1)
1200*
0.1 mF
4 (3)
SIGNAL
UNDER
TEST
1 (12)
Tank #3
6 (7) 7 (8)
VEE
100 mF
0.01 mF
0.1 mF
5 (5)
0.1 mF
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
Zo = 50 W
50 W
50 W
VTT
VTT = VCC 2.0 V
Figure 17. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
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11
MC100EL1648
ORDERING INFORMATION
Package
Shipping
MC100EL1648D
98 Units / Rail
MC100EL1648DG
98 Units / Rail
MC100EL1648DR2
MC100EL1648DR2G
MC100EL1648DT
TSSOP8
MC100EL1648DTG
TSSOP8
(PbFree)
MC100EL1648DTR2
TSSOP8
MC100EL1648DTR2G
TSSOP8
(PbFree)
MC100EL1648M
SOEAIJ14
50 Units / Rail
MC100EL1648MG
SOEAIJ14
(PbFree)
50 Units / Rail
MC100EL1648MEL
SOEAIJ14
MC100EL1648MELG
SOEAIJ14
(PbFree)
MC100EL1648MNR4
DFN8
DFN8
(PbFree)
Device
MC100EL1648MNR4G
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
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12
MC100EL1648
PACKAGE DIMENSIONS
SOIC8 NB
CASE 75107
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
A
8
0.25 (0.010)
1
4
G
C
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
0.10 (0.004)
H
D
0.25 (0.010)
Z Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm
inches
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13
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
MC100EL1648
PACKAGE DIMENSIONS
TSSOP8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R02
ISSUE A
8x
0.15 (0.006) T U
0.10 (0.004)
S
2X
L/2
5
1
PIN 1
IDENT
0.15 (0.006) T U
K REF
M
T U
0.25 (0.010)
B
U
A
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
F
DETAIL E
C
0.10 (0.004)
T SEATING
PLANE
G
DETAIL E
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14
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0_
6_
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0_
6_
MC100EL1648
PACKAGE DIMENSIONS
SOEIAJ14
CASE 96501
ISSUE A
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
Q1
E HE
M_
DETAIL P
Z
D
VIEW P
A1
b
0.13 (0.005)
0.10 (0.004)
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15
DIM
A
A1
b
c
D
E
e
HE
0.50
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
--2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
--1.42
INCHES
MIN
MAX
--0.081
0.002
0.008
0.014
0.020
0.004
0.008
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
--0.056
MC100EL1648
PACKAGE DIMENSIONS
DFN8
CASE 506AA01
ISSUE D
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
PIN ONE
REFERENCE
2X
0.10 C
2X
TOP VIEW
0.10 C
0.08 C
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.20
0.30
2.00 BSC
1.10
1.30
2.00 BSC
0.70
0.90
0.50 BSC
0.20
0.25
0.35
0.10 C
8X
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
(A3)
SIDE VIEW
A1
D2
e
e/2
4
1
8X
E2
K
5
8X
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
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16
MC100EL1648/D