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Data Sheet No.

PD60163-P

IR2109(4) (S)
HALF-BRIDGE DRIVER
Features

Floating channel designed for bootstrap operation

Fully operational to +600V


Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High side output in phase with IN input
Logic and power ground +/- 5V offset.
Internal 540ns dead-time, and programmable
up to 5us with one external RDT resistor (IR21094)
Lower di/dt gate driver for better noise immunity
Shut down input turns off both channels.

Product Summary
VOFFSET
IO+/VOUT
ton/off (typ.)
Dead Time

600V max.
120 mA / 250 mA
10 - 20V
750 & 200 ns
540 ns

(programmable up to 5uS for IR21094)

Packages

Description

14 Lead SOIC

The IR2109(4)(S) are high voltage, high speed power


MOSFET and IGBT drivers with dependent high and
8 Lead SOIC
low side referenced output channels. Proprietary HVIC
14 Lead PDIP
and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output,
8 Lead PDIP
down to 3.3V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver
cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.

Typical Connection
up to 600V
VCC

VCC

VB

IN

IN

HO

SD

SD

VS

COM

LO

TO
LOAD

up to 600V

IR21094
IR2109

(Refer to Lead Assignments for correct


configuration). This/These diagram(s) show
electrical connections only. Please refer to our
Application Notes and DesignTips for proper
circuit board layout.

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HO
V CC

V CC

VB

IN

IN

VS

SD

SD

TO
LOAD

DT
V SS

RDT

V SS

COM
LO

IR2109(4) (S)

Absolute Maximum Ratings


Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.

Symbol

Definition

Min.

Units

VB

High side floating absolute voltage

-0.3

625

VS

High side floating supply offset voltage

VB - 25

VB + 0.3

VHO

High side floating output voltage

VS - 0.3

VB + 0.3

VCC

Low side and logic fixed supply voltage

-0.3

25

VLO

Low side output voltage

-0.3

VCC + 0.3

DT

Programmable dead-time pin voltage (IR21094 only)

VSS - 0.3

VCC + 0.3

VIN

Logic input voltage (IN & SD)

VSS - 0.3

VCC + 0.3

VSS

Logic ground (IR21094/IR21894 only)

VCC - 25

VCC + 0.3

dVS/dt
PD

Allowable offset supply voltage transient


Package power dissipation @ TA +25C

50

1.0

(8 Lead SOIC)

0.625

(14 lead PDIP)

1.6

1.0

(8 Lead PDIP)

125

(8 Lead SOIC)

200

(14 lead PDIP)

75

(14 lead SOIC)

(8 Lead PDIP)

(14 lead SOIC)


RthJA

Max.

Thermal resistance, junction to ambient

120

TJ

Junction temperature

150

TS

Storage temperature

-50

150

TL

Lead temperature (soldering, 10 seconds)

300

V/ns

C/W

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IR2109(4) (S)

Recommended Operating Conditions


The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.

Symbol

Definition

VB

High side floating supply absolute voltage

VS

High side floating supply offset voltage

Min.

Max.

VS + 10

VS + 20

Note 1

600

VHO

High side floating output voltage

VS

VB

VCC

Low side and logic fixed supply voltage

10

20

VLO

Low side output voltage

VCC

VIN

Logic input voltage (IN & SD)

VSS

VCC

DT

Programmable dead-time pin voltage (IR21094 only)

VSS

VCC

VSS

Logic ground (IR21094 only)

-5

Ambient temperature

-40

125

TA

Units

Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).

Dynamic Electrical Characteristics


VBIAS (V CC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25C, DT = VSS unless otherwise specified.

Symbol

Min.

Typ.

ton

Turn-on propagation delay

750

950

VS = 0V

toff
tsd

Turn-off propagation delay

200

280

VS = 0V or 600V

Shut-down propagation delay


Delay matching, HS & LS turn-on/off

200

280

70

tr

Turn-on rise time

150

220

VS = 0V

tf

Turn-off fall time

50

80

VS = 0V

Deadtime: LO turn-off to HO turn-on(DT LO-HO) &


HO turn-off to LO turn-on (DTHO-LO)

400
4

540
5

680
6

Deadtime matching = DTLO - HO - DTHO-LO

60

600

MT

DT
MDT

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Definition

Max. Units Test Conditions

nsec

usec
nsec

RDT= 0
RDT = 200k (IR21094)
RDT=0
RDT = 200k (IR21094)

IR2109(4) (S)
Static Electrical Characteristics
VBIAS (VCC , VBS) = 15V, VSS = COM, DT= VSS and TA = 25C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol

Definition

VIH

Logic 1 input voltage for HO & logic 0 for LO

VIL

Min. Typ. Max. Units Test Conditions


2.9

VCC = 10V to 20V

Logic 0 input voltage for HO & logic 1 for LO

0.8

VCC = 10V to 20V

SD input positive going threshold

2.9

SD input negative going threshold

0.8

VOH

High level output voltage, VBIAS - VO

0.8

1.4

IO = 20 mA

VOL

Low level output voltage, VO

0.3

0.6

IO = 20 mA

VSD,TH+
VSD,TH-

ILK

Offset supply leakage current

50

IQBS

Quiescent VBS supply current

20

60

150

IQCC

Quiescent VCC supply current

0.4

1.0

1.6

IIN+

Logic 1 input bias current

20

IIN-

Logic 0 input bias current

VCC and VBS supply undervoltage positive going

8.0

8.9

9.8

7.4

8.2

9.0

0.3

0.7

A
mA

VCC = 10V to 20V


VCC = 10V to 20V

VB = VS = 600V
VIN = 0V or 5V
VIN = 0V or 5V
RDT = 0

VCCUV+
VBSUV+
VCCUV-

IN = 5V, SD = 0V
A

IN = 0V, SD = 5V

threshold
VCC and VBS supply undervoltage negative going

VBSUV-

threshold

VCCUVH

Hysteresis

VBSUVH

IO+

Output high short circuit pulsed vurrent

120

200

IO-

Output low short circuit pulsed current

250

350

mA

VO = 0V, PW 10 s
VO = 15V,PW 10 s

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IR2109(4) (S)
Functional Block Diagrams

VB

IR2109

UV
DETECT

HO

VSS/COM
LEVEL
SHIFT

IN

HV
LEVEL
SHIFTER

PULSE
FILTER

VS

PULSE
GENERATOR

VCC

DEADTIME
UV
DETECT

+5V

VSS/COM
LEVEL
SHIFT

SD

LO

DELAY

COM

VB

IR21094

UV
DETECT

HO

VSS/COM
LEVEL
SHIFT

IN

HV
LEVEL
SHIFTER

PULSE
FILTER

VS

PULSE
GENERATOR

VCC

DEADTIME

DT

UV
DETECT

+5V

SD

VSS/COM
LEVEL
SHIFT

DELAY

LO

COM

VSS

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IR2109(4) (S)
Lead Definitions
Symbol Description
IN

Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2109 and VSS for IR21094)

Logic input for shutdown (referenced to COM for IR2109 and VSS for IR21094)

SD
DT

Programmable dead-time lead, referenced to VSS. (IR21094 only)

VSS

Logic Ground (21094 only)

VB

High side floating supply

HO

High side gate drive output

VS

High side floating supply return

VCC

Low side and logic fixed supply

LO

Low side gate drive output

COM

Low side return

Lead Assignments
VCC

VCC

VB

IN

HO

IN

HO

SD

VS

SD

VS

COM

LO

COM

LO

8 Lead PDIP

8 Lead SOIC

IR2109

IR2109S

14

VCC

14

VCC
IN

VB

13
12
11

IN

VB

13

SD

HO

12

SD

HO

DT

VS

11

DT

VS

VSS

10

VSS

10

COM

COM

LO

LO

VB

14 Lead PDIP

14 Lead SOIC

IR21094

IR21094S
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IR2109(4) (S)
Case Outlines

01-6014
01-3003 01 (MS-001AB)

8 Lead PDIP

DIM

B
5

F OOT PRINT

5
H

0.25 [.010]
1

6.46 [.255]

MIN

.0532

.0688

1.35

1.75

A1 .0040

3X 1.27 [.050]

8X 1.78 [.070]

e1

MAX

.0098

0.10

0.25

.013

.020

0.33

0.51

.0075

.0098

0.19

0.25

.189

.1968

4.80

5.00

.1497

.1574

3.80

4.00

.050 BAS IC

1.27 BAS IC

.025 BAS IC

0.635 BAS IC

e1

6X e

MILLIMETERS

MAX

8X 0.72 [.028]

INCHES
MIN

.2284

.2440

5.80

6.20

.0099

.0196

0.25

0.50

.016

.050

0.40

1.27

K x 45
A
C

y
0.10 [.004]

8X b
0.25 [.010]

A1

8X L

C A B

NOT ES:
1. DIMENS IONING & T OLERANCING PE R ASME Y14.5M-1994.
2. CONT ROLLING DIMENSION: MILLIMET ER
3. DIMENS IONS ARE SHOWN IN MILLIME TE RS [INCHES].
4. OUT LINE CONF ORMS T O JEDEC OUTLINE MS-012AA.

8 Lead SOIC
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8X c

7
5 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS.
MOLD PROTRUSIONS NOT T O E XCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS.
MOLD PROTRUSIONS NOT T O E XCEED 0.25 [.010].
7 DIMENSION IS T HE LE NGTH OF LEAD FOR SOLDE RING TO
A SUBS TRAT E.

01-6027
01-0021 11 (MS-012AA)

IR2109(4) (S)

14 Lead PDIP

14 Lead SOIC (narrow body)


8

01-6010
01-3002 03 (MS-001AC)

01-6019
01-3063 00 (MS-012AB)

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IR2109(4) (S)

IN(LO)

IN

50%

50%

SD

IN(HO)
ton

toff

tr
90%

HO

LO
HO

LO

Figure 1. Input/Output Timing Diagram

tf

90%

10%

10%

Figure 2. Switching Time Waveform Definitions

SD
50%

50%

50%

IN
tsd

HO
LO

90%

90%
HO
LO

Figure 3. Shutdown Waveform Definitions

DT LO-HO

10%
DT HO-LO

90%

10%

IN (LO)
50%

MDT=

50%

DT LO-HO

- DT HO-LO

IN (HO)

Figure 4. Deadtime Waveform Definitions


LO

HO
10%
MT

MT
90%

LO

HO

Figure 5. Delay Matching Waveform Definitions

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 5/18/2001

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