Академический Документы
Профессиональный Документы
Культура Документы
DE SISTEMAS DIGITALES
Profesores:
MSc. Gonzalo Lpez
MSc. Jorge Duque
Integrantes:
_________________________________________
_________________________________________
_________________________________________
_________________________________________
_________________________________________
Firma:
Firma:
Firma:
Firma:
Firma:
____________
____________
____________
____________
____________
3.
Materiales:
Cantid
ad
Descripcin
1
Fuente de voltaje regulada a 5 Volt
1
Protoboard de doble cuerpo con base metlica
1 de
74LS00
,
74LS02,
c/u
74LS06,74LS14,74LS32,74LS86
10
Resistencias de 470 - 1/4W
10
LEDS
2
Resistencias de 10K, 100 - 1/4W
MSc. Jorge Duque
1
DIP Switch de 4
74LS04,
6. Marco terico:
S2
U1
74LS08
R1
470
D1
LED1
0
0
1
1
Salidas
AND
OR
NOT NAND NOR
XOR
74LS0 74LS3 74LS0 74LS0 74LS0 74LS8
8
2
4
0
2
6
0
1
0
1
Tabla 3. Tablas de verdad para las compuertas bsicas familia
TTL
7.1.3 Mida los voltajes de salida y entrada en cada una de las compuertas,
para cada una de las combinaciones lgicas de la tabla 4.
0
0
1
1
Entradas
(Volt)
b S1 S2
AND
74LS
08
OR
74LS
32
Salidas
(Volt)
NOT NAND NOR
74LS 74LS 74LS
04
00
02
XOR
74LS
86
0
1
0
1
7.2.1 La entradas de las compuertas TTL pueden aceptar voltajes que van
de 0 a 5 volts. Cul es el rango de voltaje que se considerara con
nivel lgico bajo (LO)? Cul es el rango que se considera un nivel
lgico alto (H)I?
____________________________________________________________________________
____________________________________________________________________________
______________________________________________________________________
Vout
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Entrada
(volt)
Salida (volt)
Nivel (L o H)
Vin
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Vout
Vout
Compuerta TTL:
Medido
Especifica
(nS)
do
(nS)
tPLH
tPHL
Tabla 9. Retardo de propagacin en compuertas TTL
7.4
Corrientes de entrada
1K
74LS04
II
Vout
H
Figura 10. Circuito para
medir la corriente de entrada a nivel alto
IIHmedida:
_________________
IIHtpica:
_____________________
7.4.2 Mida el voltaje de entrada y determine la corriente de entrada a nivel
bajo IIL de una compuerta tpica de la familia 74LSxx (Figura 10).
Compare sus resultados con las especificaciones del fabricante
74LS04
IIL
100
Vout
_________________
IIL tpica:
_____________________
Conclusiones:
8.1.__________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
_____________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
8.2.__________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
____________________________________________________________________________
8.3.__________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
8.4.__________________________________________________________________________
8.5.__________________________________________________________________________
__________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
MSc. Jorge Duque ______________________________________________________________________________
8
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
____________________________________________
_____________________________________________________________________