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Introduction:
The aim of GRAF is to develop an environment for research in FPGAs, FPGA Based
System Design and SoC/SoPC. The group conducts research in many aspects of
FPGAs including FPGA architecture exploration, high level design tools,
reconfigurable computer architectures, and applications of FPGAs and
reconfigurable hardware in a number of domains such as Video and Image
Processing, DSP and Communication System Engineering and Networks-on-Chip. We
are also keen in collaborative research with companies and academic groups who
share common interest in state-of-the-art research in the area of digital integrated
circuits.
Objectives
Mr. Jameel Nawaz Malik, successfully completed his MS and has been
appointed as a faculty member at NUST-SEECS, EE Dept
Mr. Jamshaid Sarwar, has successfully completed his time period at NUSTSEECS as a PhD Student. He is currently at KTH, Sweden (since August 2011)
to complete his PhD thesis (a split PhD Program between NUST-SEECS and
KTH Sweden)
Two research papers were published in 2010 in international conferences held
in Spain (http://ieeexplore.ieee.org/xpls/abs_all.jsp?
arnumber=5629097&tag=1) and in Egypt
(http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?
arnumber=5711731&reason=concurrency)
Tab 2: People:
Dr. N. D. Gohar
Group Leader
Professor EE Deptt
PhD, Imperial College London, UK
Email: nasir.gohar@ seecs.edu.pk
URL: http://ndgohar.seecs.nust.edu.pk/
SDR Group
Nust Team
Past Members
Tab 3: Research
Current Projects
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The project has been successfully completed and a prototype developed for it which
is ready for field testing or deployment in a system.
This project was funded by Higher Education Commission.
2- FPGA based Portable Spectrum Analyzer
FPGA based Spectrum Analyzer will be a signal analysis gadget with the maximum
input signal frequency of 100 MHz. The offshoots of the project include
Vibration Spectrum analysis in mechanical Testing
Video Spectrum Analysis for various defense and commercial applications
Spectral analysis of defense communications by Intel agencies
Lab usage by various universities and developers
3- FPGA Based Remotely Controlled Internet Enabled Digital Signage
System
FPGA based Remote Advertisement System will be connected to the internet
through which it will receive the configurations and data which will then be stored in
EEPROM. The system will then accesses this data, decode it and display it onto an
LCD monitor or an electronic billboard.
Professor Dr. N. D. Gohar at NUST Institute of Information Technology (NIIT) has won
a grant of Rs. 14.66 million from ICT Research and Development Fund for the design
and development of a Software-Defined-Radio (SDR), using dynamically
reconfigurable resource array (DRRA) based Rapid Prototyping Platform. This
project, to be completed over a period of 4 years, aims to provide not only an NOCbased solution to SDR realization problem but also to develop research
infrastructure and skilled manpower in this cutting-edge research area. The
research and development stages will involve, besides three PhDs and six MS
students, a number of Bachelor students working on certain sub-modules of an SDR
as their final year projects. The successful design and development of a complete
Network on Chip-based platform will also enable SDR computations at mobile base
stations. In addition to ICT R&D Fund financial support, KTH will also provide Rs. 10
million for this project.
Software-Defined-Radio is a technology that is still in a state of infancy. The project
focuses on developing a Scalable, Flexible and Modular Radio Systems
Experimentation and Prototyping Platform (REXAPP) based on NOC (developed at
KTH, Sweden), to provide basic foundation for SDR digital processing-a step forward
in the development of future wireless communication systems.
The project has been
http://www.ictrdf.org.pk/.
funded
by
ICT
Proposal
Research
&
Development
Fund
Presentation
Literature
Miscellaneous
Deliverables
Presentations
Literature
Tab 4 : Publications
Journal Papers
N. D. Gohar, et. al., RAVI: A New Fast Area Routing Algorithm for Integrated
Placement and Routing Environment in Analog Cell Layout, European Conference
on Circuit Theory and Design (ECCTD), Davos, Switzerland, Aug-Sep. 1993.
N. D. Gohar, A New Schematic-Driven Approach for Analogue Cell Layout
Automation with Iterative Improvement, Special Seminar, UET, Lahore, Nov. 1993.
N. D. Gohar et. al. WAPDA Annual Confidential Report (ACR) System: Reasons Of Its
Failure and How To Improve The System, WAPDA Distribution Training Academy,
Research Report submitted as part of the Management Course Evaluation, March
1994.
N. D. Gohar, Upgrading EWR Speech Communication Network, IEEE TEM-4,
KFUPM, Dhahran, KSA, May 1997.
N. D. Gohar, Power Utilities in the Telecom and Other Energy-Related Businesses,
IEEE TEM-6, KFUPM, Dhahran, KSA,, April 1999.
N. D. Gohar, Y. Jamal, Features and Functionality of Power Application Software
(PAS) in EWR Upgraded EMS/SCADA System, IEEE TEM-2000, KFUPM, Dhahran,
KSA, April 2000.
N. D. Gohar, FPGA based ASIC Design Using Verilog HDL, an Invited Paper, IBCAST2002, Islamabad, IROP, July, 2002.
N. D. Gohar, S. Baig, Home Networking: Delivering Internet and Multi-Media from
Every Home-Plug, IEEE INMIC-2002, Karachi, IROP, Dec.27-28, 2002.
Y. Zafar, N. D. Gohar, Re-Configurable Computing Where it Stands now?, IEEE
INMIC-2002, Karachi, IROP, Dec.27-28, 2002.
Y. Zafar, N. D. Gohar, Self-Controlling Asynchronous Processor with Paging (SCAP),
IEEE INMIC-2002, Karachi, IROP, Dec.27-28, 2002.
A. Latif, N. D. Gohar, Peak-to-Average Power (PAPR) reduction in OFDM Systems,
IEEE INMIC-2002, Karachi, IROP, Dec.27-28, 2002.
S. Baig, N. D. Gohar, Discrete Multi-Tone (DMT) Transceiver with Water-filling Bitloading Technique for in-home Power-Line Communication Networks, IEEE ISPLC
2003, Kyoto, Japan.
S. Baig, N.D. Gohar, Discrete Multi-Tone (DMT) Transceiver for In-Home Power-Line
Communications, International Signal Processing Conference (ISPC)-2003, pp. 8489, Dallas, Texas USA.
A. Latif, N. D. Gohar, Reducing Peak-to-Average Power Ratio (PAPR) in OFDM
Systems Using Partial Transmit Sequence and Selected Mapping, International
Signal Processing Conference (ISPC)-2003 at Dallas, Texas USA.
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Mr. Jameel Nawaz successfully completed his MS and has been appointed as a
faculty member at NUST-SEECS, EE Dept
Mr. Jamshaid Sarwar has successfully completed his time period in NUSTSEECS as a (PhD Student). He is in KTH, Sweden since August 2011 to
complete his thesis and Split PhD Program
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Tab 6 : Collaborations
GRAF has collaboration with
KTH Royal Institute of Technology, Sweden
Department of Electronic Systems
Professor Ahmed Hemani
http://web.it.kth.se/~hemani/
Tab 7: Facilities/Inventory
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Qty
Precision Synthesis
Analoge/Mix Sig
Calibre
Leonardo Spectrum
ModelSim SE
Formal Pro
IC Flow Products
10
Expedition Flow
11
12
O-In
13
19
14
15
IC Flow 2006.1
16
Questa SV/FV
17
System Architect
18
19
Seamless CVE
16
20
Visual Elite - MD
21
Perspecta 3.2.3
22
23
24
I/O Designer
ICX & TAU
3
3
25
Icanalyst
26
inFact
27
Platform Express
28
Bridge Point
29
XlibCreator 2008a
30
31
32
2
1
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Tab 8: Training
Three day workshop on "RF ASIC Design" held on 5th - 7th January 2009 at
NUST-SEECS. The guest speaker was Mr. Jamshaid Sarwar Malik. The
workshop was attended by the senior students of BICSE.
One day workshop on PCB Design Using OrCAD held on 16th January, 2008 at
Seminar Hall, NIIT Rawalpindi.
One day workshop on PCB Design and Manufacturing held on 6th November,
2006 at Seminar Hall, NIIT Rawalpindi.
Tab 9: Contact us
Postal Address:
Group for Research in ASIC and FPGA (GRAF)
C/O NUST School of Electrical Engineering and Computer Science (SEECS),
NUST Campus,Sector H-12, Islamabad, Pakistan.
Phone: +92-51-9085 2086
http://cefar.seecs.nust.edu.pk/
Contact Person
Prof. Dr. N. D. Gohar
Professor EE Dept
NUST School of Electrical Engineering and Computer Science (SEECS),
H-12, Islamabad, Pakistan
Tel: +92-51-9085 2263
Email: nasir.gohar@seecs.edu.pk
URL: http://seecs.nust.edu.pk/faculty/ndgohar.html
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