Esd Manual With Viva Question

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT
ANNA UNIVERSITY, CHENNAI

(R 2008)
EC2404 - ELECTRONIC SYSTEM DESIGN LABORATORY
SYLLABUS
1. Design of a 4-20 mA transmitter for a bridge type transducer.
Design the Instrumentation amplifier with the bridge type transducer (Thermistor or any
resistance variation transducers) and convert the amplified voltage from the
instrumentation amplifier to 4 20 mA current using op-amp. Plot the variation of the
temperature Vs output current.
2. Design of AC/DC voltage regulator using SCR
Design a phase controlled voltage regulator using full wave rectifier and SCR, vary the
conduction angle and plot the output voltage.
3. Design of process control timer
Design a sequential timer to switch on & off at least 3 relays in a particular sequence using
timer IC.
4. Design of AM / FM modulator / demodulator
Design AM signal using multiplier IC for the given carrier frequency and modulation index
and demodulate the AM signal using envelope detector.Design FM signal using VCO IC
NE566 for the given carrier frequency and demodulate the same using PLL NE 565.
5. Design of Wireless data modem.
Design a FSK modulator using 555/XR 2206 and convert it to sine wave using filter and
transmit the same using IR LED and demodulate the same PLL NE 565/XR 2212.
6. PCB layout design using CAD
Drawing the schematic of simple electronic circuit and design of PCB layout using CAD
7. Microcontroller based systems design
Design of microcontroller based system for simple applications like security systems
combination lock.
8. DSP based system design
Design a DSP based system for echo cancellation, using TMS/ADSP DSP kit.
9. Psuedo-random Sequence Generator
10. Arithmetic Logic Unit Design
LIST OF EXPERIMENTS
Exp.No
EXPERIMENTS
Page
No
CYCLE 1
1.
DESIGN OF AN INSTRUMENTATION AMPLIFIER
2.
DESIGN OF AC/DC VOLTAGE REGULATOR USING SCR
17
3.
DESIGN OF PROCESS CONTROL TIMER
27
4.
DESIGN OF AM MODULATOR AND DEMODULATOR
35
5.
DESIGN OF FM MODULATOR AND DEMODULATOR
43
6.
DESIGN OF WIRELESS DATA MODEM
51
CYCLE 2
7.
MICROCONTROLLER BASED SYSTEMS DESIGN
59
8.
DSP BASED SYSTEM DESIGN
65
9.
PSUEDO RANDOM SEQUENCE GENERATOR
71
10.
ARITHMETIC LOGIC UNIT DESIGN
77
11.
PCB LAYOUT DESIGN USING ULTIBOARD
83
INDEX
EXP.NO
EXPERIMENTS
PAGE NO.
MARKS
SIGNATURE
OF THE STAFF
SIGNATURE OF THE STAFF
MARKS (OUT OF _________)
CIRCUIT DIAGRAM:
BRIDGECIRCUIT:
V1
V2
INSTRUMENTATION AMPLIFIER:
Ex. No.1
Date :
DESIGN OF AN INSTRUMENTATION AMPLIFIER
AIM:
To design, construct and test an instrumentation amplifier using IC 741 and vary its
gain from 1 to 100.
APPARATUS REQUIRED:
S.No
1
2
3
4
Name of the Apparatus

Operational Amplifier
Resistor
Range
IC 741
10k
5k
1k
50 k
250k
12 k
DRB
Bread Board
&Connecting wires
Quantity
3
4
3
each 1
1
As required
5
6
Dual Power Supply

Rheostat
7.
Multimeter
(0-100)
1
1
1
THEORY:
INSTUMENTATION AMPLIFIER:
Instrumentation amplifier is generally required in any measurement
system using electrical transducers to enhance signal levels often in low voltage less
than mV. Also it is required to provide impedance matching and isolation. When the
desired input rides over a common mode signal special amplifier are needed so that
difference signals get amplified to an acceptable level while the common mode signals
get attenuated.
The physical quantities can be converted into electrical quantities by
using transducer. The output of the transducer needs to be amplified to get the meter
readings. This amplification is done by using instrumentation amplifier. The output
of instrumentation amplifier drives of indicator or display system. The important
features of an instrumentation amplifier are high gain accuracy, high CMRR, high gain
stability with low temperature
co-efficient, low dc offset, low output impedance.
Low input impedance may load the signal source heavily. Therefore high
resistance buffer is used preceding each input to avoid this loading effect. For V1 =V2
under common mode condition. If V 2 =V2 and V 1 =V1 both the operational
amplifiers act as voltage follower. If V1 V2 the circuit has differential gain by the
formula VO/ (V2-V1)=1+(2R/R).
DESIGN:
Output voltage
VO
= (1 + ( 2R / R)) (V2 -V1)
Differential gain Ad = VO / (V2 - V1)

= 1 + (2R / R) Choose R = 10k
For Ad max = 100
100 = 1 + (20k /R)
R = 20K /99
R max = 200.
For Ad min = 10
10 = 1 + (20k /R)
R min = 2.2K.
IL = I1+I2
I1 = (V-(V0/2)) / R
I2 = (V0-(V0/2)) / R
IL = (V-(V0/2) + (V0-(V0/2)) / R = (V-V0+V0) / R = V/R
IL is independent of RL. If R is constant then ILV
PROCEDURE:
1. The connections are made as per the circuit diagram.
2. The bridge circuit was balanced by varying 100 Rheostat.
3. The output voltage V1 and V2 of balanced circuit were given as input
to the op-amp A1 and A2.
1
4. Varying the resistance R the bridge circuit the voltage V1 and V2
were varied.
5. Varying the R the output voltage was measured then the differential
gain was calculated using formula,
=20 log (VO/(V2-V1)).
10
MODEL GRAPH:
11
TABU
S.NO
LAR COLUMN:
Vin =
Output Voltage
(volt)
Output Current (mA)
VIVA QUESTION:
1. Write application of Instrumentation amplifier.
2. Define Ideal Op-Amp.
3. Write the gain formula for Instrumentation amplifier.
4. Define CMRR.
5. Compare linear and non liner device.
12
Gain =
20 log (VO / (V2 -V1)) in dB
6. What are the areas of application of non-linear op- amp circuits?

7. What is meant by transducer?
8. Mention some areas where PLL is widely used.
9. Define capture range of PLL.
10. What are the main features of Ic 741?
13
14
15
16
RESULT:
Thus the physical quantities are converted into electrical quantities and by
using electrical quantities instrumentation amplifier was designed, constructed and
outputs were verified.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
17
CIRCUIT DIAGRAM:
AC VOLTAGE REGULATOR:
PIN DETAILS:
DC VOLTAGE REGULATOR:
18
Ex.No.2
Date :
AC/DC VOLTAGE REGULATOR USING SCR
AIM:
(i)To design, construct and test a AC voltage regulator using SCR. (ii)To design,
construct and test a DC voltage regulator using SCR.
APPARATUS REQUIRED:
S.No
Range
Quantity
Transformer
230V/12V
SCR
2P4M
Diode
BY 127
Resistor
100K
12 K
Bread Board
2
1
1
Connecting Wires
As required
CRO
DRB
S.No
1
2
3

Transformer
SCR
Diode
Range
230V/24V
TYN 604
1N4001
Quantity
1
1
4
Resistor
10 K
1k
Bread Board
2
1
1
Connecting Wires
As required
CRO
DRB
IC
7812
10
Capacitors
1000f
19
100f
MODEL GRAPH:
20
THEORY:
The SCR is switched ON and OFF to regulate the output voltage in AC and DC
voltage regulator.
If the SCR is connected to AC supply and load, the power flow can be
controlled by varying the RMS value of AC voltage applied to the load and this type of
power circuit is caused as AC voltage regulator. Applications of AC voltage regulator
are in heating on load transformers for changing light controls, speed controls and
polyphase controls, induction motors and AC magnet controls for power transfer. Two
types of power control are normally used.
(1) ON-OFF control
(2) Polyphase Angle control
AC regulators are those converter which converts fixed ac voltage directly to
variable ac voltage of the same frequency. The load voltage is regulated by
controlling the firing angle of SCRs. AC voltage controllers are thyristor based
devices.
The most common circuit is the inverse parallel SCR pair in which two
isolated gate signals are applied. Each of the two SCRs are triggered at alternate half
cycles of the supply and the load voltage is part of input sine wave. The SCR is an
unidirectional device like diode, it allows current flow in only one direction but unlike
diode, it has built-in feature to switch ON and OFF. The switching of SCR is
controlled by gate and biasing condition. This switching property of SCR allows to
control the ON periods thus controlling average power delivered to the load.
In this circuit SCR1 is forward biased during positive half cycle and SCR2 is
forward biased during negative half cycle. SCR1 is triggered at the firing angle t= and
supply voltage is impressed on the load resistance(RL). It conducts from the remaining
positive half cycle, turning OFF when the anode voltage becomes zero at t=.
SCR2 is triggered at the firing angle t=+ and conducts till t=2. Hence the
load is alternating in polarity and is part of sine wave. The firing angle of both SCRs is
controlled by gate circuit. The conduction period of SCR is controlled by varying gate
signals within specified values of maximum and minimum gate currents.
For gate triggering, a signal is applied between the gate and cathode of the
device. AC sources are normally used as gate signals. This provides proper isolation
between power.
21
If SCRs are used to convert an AC voltage into DC voltage then they are
known as DC voltage regulators. Eg. Battery changes for high current capacity
batteries in DC voltage control only phase control is used.
The transformer is used to step down the voltage from 230V to 24V. This is given as input
to bridge rectifier. The bridge rectifier converts incoming ac signal to unidirectional wave.
Therefore we get full wave rectifier output at the output of bridge rectifier. This is given as
input to SCR. The gate of SCR is triggered with firing angle of . During positive half
cycle, diode D1 and D2
TABULAR COLUMN:
DRB 1 value(K)
Amplitude (V)
TON(ms)
DRB 2 value(K)
TOFF(ms)
Amplitude (V)
DRB value(K) Amplitude (V) TON(ms)
22
Resistance RL(K)
Output (V)
conducts and during negative half cycle, diode D3 and D4 conducts. The full wave
rectified output is given to capacitive filter. The output of capacitor is dc that it eliminates
ripple contents of bridge rectifier output. The dc input is given to regulator IC. The
unregulated output must be 2V greater than regulated output voltage. The load
current may vary from 0 to rated maximum output current. The output voltage is
regulated dc.
PROCEDURE:
AC VOLTAGE REGULATOR USING SCR:
1. Connections are made as shown in the circuit diagram. 2. The supply is given by
means of step down transformer.
3. Anode terminal of SCR1 is connected to the anode terminal of diode, is
connected to cathode of SCR1 by means of resistor as the load.
4. Hence the voltage regulation is verified at load terminal.
DC VOLTAGE REGULATOR USING SCR:
1. Connect the two terminals at the top of bridge rectifier.
2. The positive terminal of the bridge rectifier is connected to one
terminal
at the load and at the other terminal to anode terminal of SCR.
3. The pin 15 connected from the power supply to the load.
4. Then the DC voltage regulation is checked and verified.
DESIGN:
AC VOLTAGE REGULATOR USING
SCR: Triggering circuit for SCR:
23
12 V ac is rectified by diode BY 127. SCR 2P4M is used to trigger. Let the

current be 1mA. R=V/I=12V/1mA=12K.
DC VOLTAGE REGULATOR USING
SCR: Triggering circuit for SCR:
24 V ac is rectified by diode 1N4001. SCR TYN604 is used to trigger. Let the
current be 1mA. R=V/I=12V/1mA=12K.
24
25
VIVA QUESTION:
1.Define regulator.
2 .Compare the full wave rectifier and bridge rectifier.
3. Write the application of SCR.
4. What is purpose of IC7812.
5. Mention methods of triggering or firing of SCR?
6. Write the terminals of SCR.
7. Write the efficiency of full rectifier.
8. Give the methods to trigger the SCR?
9.What is meant by phase controlled voltage regulator?
10.Explain the operation of the circuit.
26
27
RESULT:
Thus both AC and DC voltage regulators were designed, constructed and the
output waveforms were drawn.
28
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
CIRCUIT DIAGRAM:
29
Ex.No.3
Date:
PROCESS CONTROL TIMER / SEQUENTIAL TIMER
AIM:
To design sequential timer to switch ON and OFF at least three delays in a particular
sequence using IC 555 timer.
APPARATUS REQUIRED:
S.No
1
2
3

IC
Bread Board
Resistors
4
5
6
RPS
Connecting wires
Capacitors
Trainer kit
Range
555
33k
100k
220
10uf
0.01uf
Quantity
3
1
3
3
3
1
As required
3
6
1
THEORY:
Sequential timer is the simplest form of the process control timer in which
many timing operations carried out sequentially one by one. Each timing operation is kept
in active condition for a predefined amount of time and then goes to off condition.
Similarly the controller activates all the operations as per the defined timings.
This type of sequential controller is required for injection moulding machine, back
sealing experiments where it required to activate solenoids, relays other activating
mechanism for a predefined time sequentially one by one.
Sequential timer is used for control process. The timer IC 555 is operated in
30
monostable mode. The mode monostable multivibrator circuit is useful for generating
single output pulse of adjustable data form in response to a trigger signal. The width of
the output pulse depends only on external component connected to the op-amp. The output
of first multivibrator is given to the trigger input of the second one. Similarly it is
connected in sequential order. The time period of each timer determine the
triggering period of LED.
PIN DIAGRAM:
MODEL GRAPH:
Amplitude(V)
LED 1
OBSERVATION: 1s
LED 2
LED 1 ON Time
t (ms)
=1s
LED 3
t (ms)
1s
t (ms)
31
LED 2 ON Time
LED 3 ON Time
DESIGN:
This relay should be energised for 1 sec. ON Time TH=1.1*R*C
Here we design for 1 sec.
By choosing the value of R=100k
The value of C approximated to C=10uf Similarly we have
RA=RB=RC=R=100kCA=CB=CC=C=10uf
PROCEDURE:
1. The circuit connections were given as shown in circuit diagram.
2. The triggering is given to pin 2 of timer 1.
3. When the trigger pulse is given the LED glows one by one sequentially.
Viva question:
1. What is meant by process control timer.
2. What is the purpose of 555 timer IC.
3. Write application of process control timer.
4. Differentiate sequential circuit and combinational circuit.
5. What is the function of the comparators in the 555 timer circuit?
6. List out the advantages of comparator.
7. What is a relay and give its uses?
8. Why is monostable multivibrator used in the circuit?
9. Explain the circuit operation.
10. Define threshold.
32
33
34
35
36
RESULT:
Thus the circuits for sequential timer was designed, constructed and outputs were
verified.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
37
CIRCUIT DIAGRAM:
AM MODULATION
AM DEMODULATION:
38
Ex. No.4
Date:
DESIGN OF AM MODULATION AND DEMODULATION
AIM:
To design AM signal using multiplier IC for the given carrier frequency
and modulation index and demodulate
APPARATUS REQUIRED:
S.No
1
2
3

Transistor
Bread Board
Resistors
4
5
6
7
8
9
10
RPS
Connecting wires
Capacitors
Inductance Box
CRO
FG
Diode
Range
BC 107
4.7K,
270,100K,
33K
4.7uf
(0-20)MHz
(0-30) MHz
1N4001
Quantity
1
1
4,1,1,1
1
As required
4
1
1
2
1
PROCEDURE:
Connections are made as per the circuit diagram
Give the modulating signal to pin no 10 through the FG.
Give the carrier signal to pin no 10 through the capacitor of 0.1f
using another FG.
Note down the AM signal at pin no 6.
Choose the amplitude level of converter keeping frequency at constant
depth of modulation was calculated.
Give AM signal to pin no 1 of demodulator circuit.
Note down the demodulator signal at pin no 2 of IC 1496.
39
MODELGRAPH
TABULATION:
Signal
Amplitude(volts)
40
Time(ms)
Carrier
Message
Modulated o/p
Emax=
Emin=
Demodulated o/p
THEORY:
Modulation: It is the process in which the characteristics of high frequency carrier
wave is varied in accordance with instantaneous value of other wave.
Amplitude Modulation: The amplitude of carrier wave is varied in accordance with the
instantaneous values of message signal is called amplitude modulation.The
bandwidth of the AM is twice the bandwidth of the base band signal. The amplitude
modulation wave also produces two sidebands(Upper and Lower).
The extent of amplitude variation in AM about unmodulated carrier amplitude is
measured in terms of a factor called modulation index defined as the ratio of modulating
signal amplitude to carrier amplitude. This factor also known as depth of modulation,
degree of modulation and modulation factor(ma).
If ma<1 then the modulation is called under modulation, ma>1 then the modulation
is called over modulation, ma=1 then the modulation is called critical modulation.
AM Demodulation: It is the process of extracting the message signal by using a same
carrier that was used for modulation from the modulated signal.
The most commonly used AM detector is simple diode detector. The signal at the
secondary is half wave rectified by diode D. This diode is the detector diode the
resistance R is the load resistance to rectifier and C is the filter capacitor. In the positive
half cycle of the AM signal diode conducts and current flows through R, where as in
negative half cycle, the diode is reverse biased and no current flows. Therefore only
positive half of the AM signal appears across R. Capacitor reconstructs the original
modulating signal and high frequency carrier is removed.
41
42
43
VIVA QUESTIONS:
1. Define Amplitude modulation.
2. What are the types of AM.
3. What is the Bandwidth of AM..
4 .State application of AM.
5. What type of modulation used in this circuit..
6. Differentiate AM and FM modulation.
7. Compare PAM,PWM and PPM.
8. What is modulation index.
9.How will you convert AM to FM.
10.Draw the spectra for AM signal.
44
45
RESULT:
Thus the AM modulation and demodulation circuits were constructed and modulation index
was calculated.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
46
CIRCUIT DIAGRAM
FM MODULATION
FM DEMODULATION
47
Ex. No.5
Date:
DESIGN OF FM MODULATION AND DEMODULATION
AIM:
To design FM signal using IC 566 for the given carrier frequency and demodulate
the FM using PLLNE 565.
APPARATUS REQUIRED:
S.
No
1
IC
2
Bread Board
3
Resistors
4
5
6
7
8
9
RPS
Connecting wires
Capacitors
FG
Transistor
CRO
48
Range
Quantity
565, 7490
10K,12K,2K,20K,4.7K
2,1
1
Each 1
0.01uf, 0.001uf,10uf
(0-30)MHz
2N2222
(0-20)MHz
1
As required
2,2,2
1
1
1
THEORY:
Modulation:
It is the process in which the characteristics of high frequency carrier wave are varied
in accordance with instantaneous value of other wave.
Frequency Modulation:
Frequency modulation is the process of varying the frequency of a carrier wave in
proportion to the instantaneous amplitude of the modulating signal without any
variation in the amplitude of the carrier wave. Because the amplitude of the wave
remains unchanged, the power associated with an FM wave is constant.When the
modulating signal is zero, the output frequency equals fc (centre frequency).When
the modulating signal reaches its positive peak, the frequency of the modulated
signal is maximum and equals(fc + fm). At negative peaks of the modulating signal, the
frequency of the FM wave becomes minimum and equal to
(fc - fm).Thus, the
process of frequency modulation makes the frequency of the FM wave to deviate from
its centre frequency(fc).By an amount ( + or - f) where f is termed as the frequency
deviation of the system. During this process, the total power in the wave does not
change but a part of the carrier power is transferred to the side bands. There are two types
of FM they are
1.Narrow band FM
2.Wide band FM
Frequency demodulation
It is a process which is used to receive the origin of signals.
MODEL GRAPH
49
Amplitude(V)
Modulating Signal
t (ms)
t (ms)
Carrier Signal
t (ms)
FM Signal
Demodulated Signal
t (ms)
50
PROCEDURE:
Connections are made as per the circuit diagram
Give the modulating signal to pin no 5 through the FG.
Note down the corresponding amplitude and time period of the FM
modulated signal.
Apply the modulated signal as input to the PLL.
51
52
53
VIVA QUESTION:
1.Define Frequency modulation?
2.What are the types of FM.
3.Define Modulation index.
4.What are the advantages of FM.
5. List the disadvantages of FM.
6. Define WBFM.
7. Define NBFM.
8. What is the Bandwidth of FM?
9. What are the types of FM.?
10. Draw the block diagram for Conversion of AM to FM and vice versa.
54
55
RESULT:
Thus the frequency modulation and its demodulation circuits were designed and
waveforms are plotted.
56
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
57
Ex.No.6
Date :
WIRELESS DATA MODEM
AIM:
To design, construct and test wireless data modem using FSK modulator(555) and FSK
demodulator (565).
APPARATUS REQUIRED:
S.No
Range
Quantity
Transistor
BC557
IC
555 , 565 , 741
Each one
Resistors
58K
47K1
K
10K6
00
1
2
1
5
2
58
0.01f , 0.1f
0.02f
Capacitors
2
5
AFO & CRO
6
7
RPS & Dual RPS

Bread board & Connecting wires
1
As required
THEORY:
FREQUENCY SHIFT KEYING:
It is a digital-to-analog modulation technique. Data is transmitted by shifting between
two close frequencies with ones represented by one frequency and zeroes by the other.
Frequency-shift keying (FSK) is a method of transmitting digital signals. The two binary
states, logic 0 (low) and 1 (high), are each represented by an analog waveform. Logic 0 is
represented by a wave at a specific frequency, and logic 1 is represented by a wave at a
different frequency.
A modem converts the binary data from a computer to FSK for transmission over
telephone lines, cables, optical fiber, or wireless media. The modem also converts incoming
FSK signals to digital low and high states, which the computer can understand. Whenever
the message or information signal rides over the carrier it is called modulation. In electrical
sense the operation of riding over the amplitude of carrier means to alter the amplitude of
carrier. This is called amplitude modulation of the carrier. Thus the message signal becomes
the modulating signal and it is transmitted by variations in the amplitude of the carrier.The
transmission media suffers three major problems
A. Attenuation B. Distortion C. Noise
Due to these inherent problems, it is very difficult to have wide range of frequency in
the signals that are transmitted. Therefore to transmit data over wireless medium, it is
necessary to use a modulator which restore the number of frequency in the transmitted signal
CIRCUIT DIAGRAM
FSK DEMODULATOR:
FS
K
10 8
2 IC565
I/P
7
4
5
O/P DIGITAL
DATA
6
1
59
MODEL GRAPH
Amplitude(V)
Message
signal
t(ms)
FSK
signal
t(ms)
demodulated
signal
t(ms)
by employing digital modulation techniques like ASK, FSK or PSK. Also Binary PSK with
non-coherent detection can also be employed.
A modem is a device that takes the digital electrical pulses from a terminal or
computer and converts them into continuous analog signal that is used for transmission. The
binary FSK technique is employed for modulating the digital signals. IC 555 timer and
transistor acting as switch, when the device acts as transformer. PLL IC 565 can be used for
demodulator. It consists of phase detection LPF amplifier.
PROCEDURE:
FSK Modulator:
1. Connections are given as per the circuit diagram.
60
2. The digital input was applied at the input of FSK modulator.

3. The square wave output was noted in astable mode by CRO.
FSK Demodulator:
1. Connections are given as per the circuit diagram.
2. The FSK modulated output is given as a input in the demodulation circuit.
3. The output of the demodulator gives a modulating signal by using voltage comparator was
noted.
61
62
VIVA QUESTION:
1. Define FSK.
2. What is meant by OOK.
3. Compare ASK AND FSK.
4. Compare IC 565 and IC 555.
5. Why we go for FSK instead of FM.
6. Difference between PSK and FSK.
7. What are the advantages of PSK?
8. What is maximum likelihood detector?
9. What is digital transmission?
10. What is Baud rate for ASK?
63
64
65
RESULT:
Thus the circuit for wireless data modem using FSK modulator (555) and
demodulator (NE 656) were designed, constructed and outputs were verified.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
FLOW CHART
66
Start
Enter the password from keyboard in system
Read the password from the keyboard.
Get the option from keyboard to open the door in system or change passw
No
If option = 1
Yes
Run the stepper motor to open the door

Introduce delay in the system
Run the stepper motor to close the door
Stop
67
Ex.No.7
Date:
MICROCONTROLLER BASED SYSTEMS DESIGN
AIM:
To design microcontroller based system for simple applications like
security systems combination lock etc. using 89c series flash micro controller.
APPARATUS REQUIRED:
1. PC with windows operating system, RIDE IDE software, WINISP
software
2. 8051microcontroller
3. RS 232C SerialCable
4. Home Security System
PROCEDURE:
1. Use RS 232C Serial Cable to connect 8051 microcontroller through serial port.
2. Set the DIP switch as follows DIP switch1: RS 232 DIP switch2: PGM for
Programming Flash mode, EXE for execution Mode DIP switch3: INT
3. Write the ALP program (text document) in notepad, save as ASM
language (ASM format) in
Micro 51.
4. Set the DIP switch2 in PGM for Programming Flash.
5. Run WINISP.
6. Set the parameter for the following fields in WINISP window A CHIP:
P89C51RD2 B PORT: Select Serial port connected to RS 232C Serial Cable
C OSC: 12MHz
7. If flash is not blanked, perform erase operation.
8. Load hexa file containing the object code to be programmed into flash from
Micro 51 by clicking load file.
9. Program the flash by clicking program part.
10. Set the DIP switch2 in EXE for execution mode.
11. Enter the password in Home Security
System. 12. If a valid password is given, door
will open.
68
69
VIVA QUESTION:
1. Compare microcontroller and microprocessor.
2. Write the internal RAM memory of the 8051.
3. List the features of 8051.
4. Give the interrupt priorities of 8051.
5. List the addressing modes of 8051.
6. What is hardware and software interface?
7. What is stack.
8. Draw the block diagram of 8051?
9. Define CLR instruction?
10. What is the capacity of RAM on chip with 8051?
70
71
RESULT:
Thus microcontroller based system for simple applications like security
systems combination lock etc. using 89c series flash micro controller was
designed and executed.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
72
CIRCUIT DIAGRAM
73
Ex.No.8
Date:
PSUEDO-RANDOM SEQUENCE GENERATOR
AIM:
To generate the pseudo random sequence generator using linear feedback shift register
and verify the output using truth table.
APPARATUS REQUIRED:
SR FF(IC 7484), XOR (IC 7486), Digital Trainer kit, connecting wires
THEORY:
Pseudo random binary sequence is essentially a random sequence of binary numbers.
So PRBS generator is nothing but random binary number generator. It is random in a sense
that the value of an element of the sequence is independent of the values of any of the other
elements. It is 'pseudo' because it is deterministic and after N elements it starts to repeat itself,
unlike real random sequences.
The implementation of PRBS generator is based on the linear feedback shift register
(LFSR). The PRBS generator produces a predefined sequence of 1's and 0's, with 1 and 0
occurring with the same probability. A sequence of consecutive n*(2^n -1) bits comprise one
data pattern, and this pattern will repeat itself over time. It has multiple uses in digital
systems as data Encryption/Decryption, Built-in Self Test (BIST), Scrambler/Descrambler.
74
TRUTH TABLE:
STATE
S1
S8
S4
S2
S9
S12
S6
S11
S5
S10
S13
S14
S15
S7
S3
S1
D+C D
F= C
A
0
1
0
0
1
1
0
1
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
1
1
1
0
0
0
1
75
OUTPUT
B
C
0
0
0
0
1
0
0
1
0
0
1
0
1
1
0
1
1
0
0
1
1
0
1
1
1
1
1
1
0
1
0
0
D
1
0
0
0
1
0
0
1
1
0
1
0
1
1
1
1
PROCEDURE:
Connections are made as per the circuit diagram.

1 is initially made 0 and then switched to logic 1.
The switch SW
Other logic inputs are given as per the circuit diagram.
Observe the output and verify the truth table.
VIVA QUESTION:
1. What are all the universal gates.
2. Write the truth table for EX-OR gates.
3. Define Pseudo random sequence generator.
4. Write the logic diagram of SR Flip flop.
5. Differentiate synchronous circuit and Asynchronous circuits.
6. Write the truth table for SR Flip flop.
7. Write the transition table for SR FF.
8. List out the application of PRBS.
9. Write the types of shift register.
10.Differentiate Moore model and mealy model.
76
77
RESULT:
78
Thus the pseudo random sequence was generated using linear feedback shift register
and the output was verified using truth table.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
ALU Program:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity ALU is
port( A: in std_logic_vector(1 downto0);
B: in std_logic_vector(1 downto 0);
SEL: in std_logic_vector(1 downto 0);
R: out std_logic_vector(1 downto 0); );
end ALU;
architecture behv of ALU is begin
process(A,B,SEL)
begin
case SEL is
when 00 =>R <= A + B;
when 01 =>R <= A - B;
when 10 => R <= A and B;
79
when 11 => R <= A or B;

when others => R <= XX;
end case;
end process;
end behv;
Ex. No.9
Date:
DESIGN OF ARITEMETIC LOGIC UNIT
AIM:
To write HDL program for designing arithmetic logic unit and simulate it using xilinx
ISE14.5.
SOFTWARE USED:
1.PC
2.Xilinx 14.5.
THEORY:
The arithmetic logic unit (ALU) is a digital circuit that calculates arithmetic
operations (addition, subtraction, etc.) and logic operations (Exclusive OR, AND, OR etc.)
between two numbers. The ALU is a fundamental building block of the central processing
unit of a computer.
Many types of electronic circuits need to perform some type of arithmetic operation,
so even the circuit inside a digital watch will have a tiny ALU that keeps adding 1 to the
current time and keeps checking if it should beep timer etc.
ALU units typically need to be able to perform the basic logical operations (AND,
OR) including the addition operation. The inclusion of inverters on the inputs enables the
same ALU hardware to perform the subtraction operation (adding an inverted operand) and
the operations NAND and NOR. A basic ALU design involves a collection of ALU Slices,
which each can perform the specified operation on a single bit. There is one ALU slice for
every bit in the operand.
PROCEDURE:
1.Open the Xilinx software.
80
2.Create a VHDL program and write the entity and the architecture of ALU and save t
he file with extension .vhd.
3.In the program the output is result (R) and the inputs are A,B and selection input is
SEL.
4.Inside the architecture write the expression of ALU for addition, subtraction, AND
operation and OR operation. These operations are selected by the selection input.
5.Simulate program and verify the output with different combination of inputs.
81
VIVA QUESTION:
1. Define ALU.
2. Subtract the 11010 from 11111.
3. What is meant by HDL.
4. Compare VHDL and Verilog.
5. Differentiate the behavioral model and structural model.
6. Add the 101012 and 010102.
7. Write verilog program for EX-OR gate.
8. What is meant by 9s complement.
9. Multiply the 11012 and 10102.
10. Use BCD addition,10112 and 11012.
82
83
84
RESULT:
Thus the HDL program was written for arithmetic logic unit and simulated using
xilinx.
MARKS ALLOCATION
10
Experimental Setup
10
Execution
10
Viva
30
Total
PROGRAM:
clear all;
mule = .01; % Larger values for fast conv
max_run = 200;
for run=1:max_run;
taps = 20; %Adaptive Filter Taps #
freq = 2000;%Signal Freq
w = zeros(1,taps);%state of adaptive filter
time = .2;%lenght of simulation (sec)
samplerate = 8000;%samples/sec
samples = time*samplerate;
max_iterations = samples-taps+1;
iterations = 1:max_iterations;%Vector of iterations
t=1/samplerate:1/samplerate:time;
rand('state',sum(100*clock));%Reset Randome Generator
noise=.02*rand(1,samples);%noise added to signal
85
s=.4*sin(2*pi*freq*t);%Pure Signal
x=noise+s;%input to adaptive filter
echo_amp_per = .4; %Echo percent of signal
%rand('state',sum(100*clock));%Reset Randome Generator
echo_time_delay = .064;
echo_delay=echo_time_delay*samplerate;
echo = echo_amp_per*[zeros(1,echo_delay) x(echo_delay+1:samples)];
%LMS
for i=1:max_iterations;
y(i)=w*x(i:i+taps-1)';
e(run,i)=echo(i)-y(i);
%mule(i) = .5/(x(i:i+taps-1)*x(i:i+taps-1)'+ .01);
w = w + 2*mule*e(run,i)*x(i:i+taps-1);
end
end
%%Mean Square Error
mse=sum(e.^2,1)/max_run;
b=x+echo;
%Ouput of System
out=b(1:length(y))-y;
subplot(3,1,1),plot(b);
title('Signal and Echo');
ylabel('Amp');
xlabel('Time sec');
subplot(3,1,2),plot(out);
title('Output of System');
ylabel('Amp');
xlabel('Time sec');
subplot(3,1,3),semilogy(mse);
grid
Ex.No:10
DESIGN A DSP BASED SYSTEM FOR ECHO CANCELLATION
Date:
AIM:
To write MATlab program for echo cancellation.
SOFTWARE USED:
MATLab
86
title('LEARNING CURVE mu=.01 echo delay=64ms runs=200');

ylabel('Estimated MSE, dB');
xlabel('Number of Iterations');
%subplot(3,1,2),semilogy(iterations,e(1,:).^2);
%grid
%subplot(3,1,3),semilogy(iterations,e(2,:).^2);
%grid
OUTPUT:
87
Signal and Echo
Amp
0.5
0
-0.5
-1
200
400
600
1200
1400
1600
200
400
600
800
1000
1200
Time sec
LEARNING CURVE mu=.01 echo delay=64ms runs=200
1400
1600
800
1000
Time sec
Output of System
Amp
0.5
0
-0.5
-1
0
Estimated MSE, dB
10
-5
10
-10
10
-15
10
400
600
800
1000
Number of Iterations
1200
Fig. 4.
VIVA QUESTION:
1.What is meant by echo cancellation.
2. Why we go for echo cancellation.
3. Define LMS algorithm.
4. Where should an echo canceller be placed?
5. How echo cancellation is done?
6. Explain what is MatLab? Where MatLab can be applicable?
88
1400
1600
7. What does MatLab consist of?

8. What are the types of loops does Matlab provides?
9 .Define Equalization.
10.Write the real time application for echo cancellation.
89
90
RESULT:
Thus the LMS Algorithm based Echo cancellation System has been designed and
verified using MATLAB.
MARKS ALLOCATION
10
Program
10
Execution
10
Viva
30
Total
91
CIRCUIT DIAGRAM:
92
Ex.No:11
Date:
PCB LAYOUT DESIGN USING ULTIBOARD
AIM:
To design Component/Board layout, PCB layout of the given circuit using Ultiboard.
SOFTWARE USED
Multisim
Ultiboard
PROCEDURE:
Designing PCB in Ultiboard
After you have finished and tested your circuit design in Multisim, it is ready for Ultiboard.
1. Transferring to Ultiboard
In Multisim, select Transfer Transfer to Ultiboard
The save prompt dialog should open and point to the same location as your Multisim
circuit is. Save it according to what version youre working on. In case you need to
return to a past design.
If you have virtual components, like Ground, it will tell you that your virtual elements
will not be exported, click OK.
Ultiboard starts automatically and a dialog asks if you with to accept the Default
Track Width and Clearance. 10.00 or 20.00 mil is recommended for the default Trace
width. To be cautious and avoid traces cross talking, choose 20.00 mil for the
clearances. Later, you can change the individual trace width if needed. Click OK.
The next dialog is the Forward Annotation Action Selection, it displays the
components and the nets that will be transferred into Ultiboard.
You can Exit Multisim once the transfer is complete if you want
2. Board Outline
You can edit the size and orientation of the Board Outline to suit your needs. In the
Design Toolbox click Board Outline. This allows you to edit items on a particular
layer.
Select or delete the Yellow rectangle. You can then change the size or you can draw a
new outline depending on your casing. Drawing is quite similar to Multisim.
Also, if you need to add holes for screws, you can add those too. We will discuss this
further later to match the holes with the drill bits we have for the milling machine.
3. Layout of Your Design
A good idea to do before laying out the board is to draw out the major and critical
components on paper. This will help you determine the overall orientation of the
design.
93
We used to prefer single sided boards. The reason was our old way of creating PCBs
was a very delicate process. It was fairly difficult to create a complex single sided
board. Creating a complex double sided board was not enjoyable. Making sure all of
the drill holes were perfectly lined up and the traces didnt wash away. Wasted
multiple boards.
Now, it doesnt matter. Its just as easy to create a double sided board as a single.
In the Design Toolbox, unclick the Copper Inner 1 and Copper Inner 2. This only
leaves Copper Top and Copper Bottom. 2 Layers.
Grouping similar components is an easy way to lower noise and power losses.
1. Place individual systems in separate locations on the board.
2. Separate sensitive components away from noisy components. Keep analog away
from power supplies.
PCB LAYOUT:
94
4.
5.
3. Separate components with different frequencies. Analog and Digital.

4. The same goes for different input/output components. Analog and Digital.
5. Different problems that systems can have: Grouping Components
Use Ground planes instead of intertwining traces. However, dont place a component
smack in the middle of one. Try to create one in a large open section of your board.
Ground traces should be as short and thick as possible.
Major Power traces can be thick if possible, but not as necessary as Grounds.
Ground and Power planes and traces should be in close proximity to each other if
possible, dont send them in opposite directions around the board. This lowers loop
inductance of your power system.
Editing Individual Component Pads
Make sure your component pads and your actual components in your hand are the
same size. Print out a 1:1 ratio of the component and stick it through the paper to
be sure.
If its not, click on the component, then select Edit In-Place Part Edit. This allows
you to select the individual pieces of the component. Move or edit the pads or
whatever to where they need to be. Unselect Edit In-Place Part Edit when done.
You can also go Tools Component Wizard and create a component.
Traces Make them look GOOD
If you want to try the Autoroute, go for it. Then you can adjust the traces if you dont
like them.
Double click on the Copper layer in the Design Toolbox you want to place the traces
in.
Then select Place Line and draw your connections to your components.
1. Try to keep the distance as short as possible. The longer your traces are the greater
its resistance, capacitance and inductance.
2. Traces should only have angles 45 degrees. Try to avoid right angles and under no
circumstances use an angle greater than 90 degrees. This is important to give a
professional and neat appearance to your board. Thats really the only major reason
for this.
3. Forget nice rounded trace corners, they are harder and slower to place and have no
real advantage.
95
6.
4. Make sure the traces go through the exact center of the pads and components.
Again, looks and gives you the most clearance.
5. Neck down: between pads where possible. Changing your trace from large to
small and then back to large again if you need to go between pads.
If you Power and Ground traces are critical, then lay them down first.
Symmetry is very professional. Its all about the looks.
Dont place vias under components.
Try to use through hole components to connect top tracks to bottom tracks. This cuts
down the number of vias needed. Less holes, less time to assemble.
Creating multiple power planes
If your design requires separate power/ground planes, use the next steps:
Go to Place->Shapes-> Rectangle (or polygon), specify its size/location/layer,
Select shape, go to Design->Convert Shape to Area,
Select created area, go to Parameters, specify the Net to which it must be connected,
and connection style. For the last power plane you can simply use Power Plane c
command, that will add plane to the entire PCB.
96
7.
Finishing
Review all of the traces and connections. Make any changes that may need it.
Is there anything that could be done better?
8. Exporting
Select File Export
Select Gerber RS-274X
Click Properties
Select from Available Layers:
o Copper Top,
o Copper Bottom,
o Board Outline (Optional)
o Drill-----The available sizes of the drill bits we have in stock
(mm): 0.5,0.6,0.8,0.9,1.0,1.1,1.2,1.4 1.5,1.8,2.0,2.95 & 3.0.Please make sure
your drill hole size is available.Otherwise change the hole size according to
the availability.
Move them to Export Layers. Click OK.
then Export.
Create aperture mapping - Copper Top. This is the details of the components in each
layer. Click OK.
Save export file. The file name should be already be something like:
BCI(Example) - Copper Top.gbr
Save each of the files as they are listed.
VIVA QUESTION:
97
1. What is the advantages of layout.

2. Write the flow of complete PCB design.
3. How do you define design rules ?
4. How do place components ?
5. How do you plan routing and what are the parameters you consider while routing ?
6. What are the errors you got while importing netlist ?
7. What are the inputs you need to design a PCB ?
8. Write the different types of layout design rules.
9. Name different software for PCB design.
10. State advantage and Disadvantage of PCB design.
98
99
RESULT:
Thus the Component/Board layout, PCB layout of the given circuit using Ultiboard
was designed.
MARKS ALLOCATION
10
Program
10
Execution
10
Viva
30
Total
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EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

ANNA UNIVERSITY, CHENNAI

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

DESIGN OF AN INSTRUMENTATION AMPLIFIER

DESIGN OF AC/DC VOLTAGE REGULATOR USING SCR

DESIGN OF PROCESS CONTROL TIMER

DESIGN OF AM MODULATOR AND DEMODULATOR

DESIGN OF FM MODULATOR AND DEMODULATOR

DESIGN OF WIRELESS DATA MODEM

MICROCONTROLLER BASED SYSTEMS DESIGN

DSP BASED SYSTEM DESIGN

PSUEDO RANDOM SEQUENCE GENERATOR

ARITHMETIC LOGIC UNIT DESIGN

PCB LAYOUT DESIGN USING ULTIBOARD

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

SIGNATURE OF THE STAFF

MARKS (OUT OF _________)

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

DESIGN OF AN INSTRUMENTATION AMPLIFIER

Name of the Apparatus

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

Dual Power Supply

= (1 + ( 2R / R)) (V2 -V1)

Differential gain Ad = VO / (V2 - V1)

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

Output Current (mA)

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

6. What are the areas of application of non-linear op- amp circuits?

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

AC/DC VOLTAGE REGULATOR USING SCR

Name of the Apparatus

Name of the Apparatus

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

12 V ac is rectified by diode BY 127. SCR 2P4M is used to trigger. Let the

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

PROCESS CONTROL TIMER / SEQUENTIAL TIMER

Name of the Apparatus

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT

EC2404- ELECTRONIC SYSTEM DESIGN LABORATORY, DGCT