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Department of E&TC
Laboratory Notebook
RCPIT, Shirpur
Department of E&TC
-20 .
Date:
/ / 20
Place: Shirpur
Principal
Head of Department
RCPIT, Shirpur
Department of E&TC
CONTENTS
Expt No
Experiment Title
Page No
For a half wave rectifier with capacitor filter find line and load
regulation and ripple factor.
For full wave rectifier with capacitor filter find line and load
regulation and ripple factor.
13
For Bridge wave rectifier with capacitor filter find line and load
regulation and ripple factor.
23
31
36
43
49
55
61
10
Determine I/P and O/P impedances and voltage gain and current
gain for CSFET.
67
11
72
12
Determine H-parameters
78
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No.1
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
___________
3) Oral [1]
___________
Overall Marks
___________
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Department of E&TC
Experiment No.1
Objective: To plot regulation characteristics of Half Wave Rectifier.
Pre-lab:
What is a rectifier?
Definition of Ripple factor, TUF, Rectification efficiency
Equipments needed:
Sr.No
1
2
3
4
5
Name of Equipments
Experiment kit
Power Supply
Auto transformer
CRO
Specifications
Digital Multimeter
0-30V DC
20 MHz Dual
channel
Quantity
1
1
1
1
1
Theory:
Rectifier is defined as an electronic device used for converting AC voltage to DC
voltage.
Half Wave Rectifier: It converts an AC voltage to pulsating DC voltage, using only
one half cycle of the applied AC voltage. The rectifying diode conducts only during
one half of the AC cycle only.
Let Vi be the voltage of the primary of the transformer and given by equationVi = Vm sinwt
Vm>>Vr
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Department of E&TC
it allows to pass only AC components present in o/p and blocks the DC.
As the o/p across the load resistor is not constant but it contains Positive half cycles
only, during positive half cycle capacitor charges and when the Negative half cycle
appears for which no o/p is obtained, due to charged capacitor Voltage across capacitor
remains always constant.
Procedure:
A) For with capacitor filter: (Short points A & C)
1. Trace and draw the circuit diagram.
2. For load regulation ammeter is connected between points A and B.Voltmeter is
Connected between point B and Ground. Vary load resistor RL and note readings
Of voltage VL and current IL.
3. For line regulation, Voltmeter is connected between point B and ground. Vary
Supply voltage through auto-transformer and note readings of supply voltage Vi
And o/p voltage Vo. At that time keep RL constant.
4. For ripple factor, short A and B, connect CRO between B to ground at constant
load and measure Vm on CRO.
5. Draw the waveforms on the graph paper.
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Observation Table:
Line Regulation (Without Capacitor Filter):
Sr.NO.
Vi(volts)
Vo(volts)
1
2
3
4
5
6
7
8
9
10
Line Regulation (With Capacitor Filter):
Sr.NO.
Vi(volts)
Vo(volts)
1
2
3
4
5
6
7
8
9
10
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Department of E&TC
IL(mA)
VL(volts)
1
2
3
4
5
6
7
8
9
10
IL(mA)
VL(volts)
2
3
4
5
6
7
8
9
10
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Calculations:
Load regulation=
Line regulation=
Vo/Vi *100
Load Regulation:
1) (Without Capacitor Filter):
Line Regulation:
1) (Without Capacitor Filter):
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Result:
Type of Regulation
% Load Regulation
% Line Regulation
Conclusion:
_________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
10
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Department of E&TC
11
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Department of E&TC
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Conclusion:
_________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
12
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No. 2
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
--------------
Overall Marks
----------------
13
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Department of E&TC
Experiment No. 2
Name of Equipments
Experiment kit
Power Supply
Auto transformer
CRO
Specification
0-30V DC
20 MHz Dual
channel
Digital Multimeter
Experiment kit
Quantity
1
1
1
1
1
1
Theory:
Rectifier is defined as an electronic device used for converting AC voltage to DC
voltage.
Full Wave Rectifier: It converts an AC voltage to pulsating DC voltage,using both
half cycles of the applied AC voltage. The rectifying diode conducts during both half
cycles of the AC cycle.
During positive half cycle of the input signal, the anode of the diode D1 becomes more
positive w.r.t. cathode and at the same time anode of D2 becomes negative and hence
diode D2 does not conduct and o/p current flows through only D1.
During negative half cycle of the input signal, the anode of diode D1 becomes negative
and anode of D2 becomes positive ,hence diode D1 becomes reverse bias in which it
acts as an open switch and only D2 conducts and provides the load current.
When capacitor is used as filter, then it is connected across the load resistor. The
Property of the capacitor is that it allows to pass only AC components present in o/p
and blocks the DC. As the o/p across the load resistor is not constant but it contains
Positive half cycles only which does not give constant DC o/p. During positive half
Cycle capacitor charges and when the next positive half cycle appears in between this
time, due to charge stored across capacitor o/p across load resistor appears almost
Semiconductor Devices & Circuits
14
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Department of E&TC
constant.
Procedure:
A) For with filter: (Short points A & C)
1. Trace and draw the circuit diagram.
2. For load regulation ammeter is connected between points A and B. Voltmeter is
Connected between point B and Ground. Vary load resistor RL and note readings of
voltage VL and current IL.
3. For line regulation, Voltmeter is connected between point B and ground. Vary
Supply voltage through auto-transformer and note readings of supply voltage Vi And
o/p voltage Vo. At that time keep RL constant.
4. For ripple factor, short A and B, connect CRO between B to ground at constant load
and measure Vm on CRO.
5. Draw the waveforms on the graph paper.
15
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Department of E&TC
Observation Table:
Line Regulation: (Without capacitor Filter)Sr.NO.
Vi(volts)
Vo(volts)
1
2
3
4
5
6
7
8
9
10
Line Regulation : (With Capacitor Filter)Sr.NO.
Vi(volts)
Vo(volts)
1
2
3
4
5
6
7
8
9
10
16
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Department of E&TC
IL(mA)
VL(volts)
1
2
3
4
5
6
7
8
9
10
Load Regulation (With capacitor Filter)Sr.NO.
IL(mA)
VL(volts)
1
2
3
4
5
6
7
8
9
10
17
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Department of E&TC
Calculations:
Load regulation=
Line regulation=
Vo/Vi *100
Load Regulation:
1) (Without Capacitor Filter):
Line Regulation:
1) (Without Capacitor Filter):
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Department of E&TC
Result:
Type of Regulation
% Load Regulation
% Line Regulation
Conclusion:
________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
19
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Department of E&TC
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Lab Assignment2: Derive expression for ripple factor of a full wave rectifier with
Capacitor filter?
Ans:-----------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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Department of E&TC
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
21
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Department of E&TC
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
22
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No. 3
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
-----------------
3) Oral [1]
---------------
Overall Marks
----------------
23
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Department of E&TC
Experiment No. 3
Name of Equipments
Experiment kit
Power Supply
Auto transformer
CRO
Specification
0-30V DC
20 MHz Dual
channel
Digital Multimeter
Quantity
1
1
1
1
1
Theory:
Rectifier is defined as an electronic circuit used for converting AC voltage to DC
voltage.
Bridge Wave Rectifier:
only one half cycle of the applied AC voltage. The rectifying diode conducts only
during one half of the AC cycle only.
During positive half cycle of the input signal, the point A is more positive w.r.t.
point B. The current path is point A through D1, load, D3 and backs to the point
B.During this time diodes D2 and D4 are reverse bias.
During negative half cycle of the input signal, the point B is More positive than
point A.The current path is point B through D2, load D4 and back to the point
A.During this time D3 and D4 are reverse bias.
It is interesting to note that, in both the half cycles the direction of current
flow through the load is same. Thus we obtain full wave rectification, the waveform
being same. When capacitor is used as filter, then it is connected across the load
resistor. The Property of the capacitor is that it allows to pass only AC components
present in o/p and blocks the DC. As the o/p across the load resistor is not constant but
it contains Positive half cycles only, during positive half cycle capacitor charges
Semiconductor Devices & Circuits
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RCPIT, Shirpur
Department of E&TC
and when the Negative half cycle appears for which no o/p is obtained, due to charged
capacitor Voltage across capacitor remains always constant.
Procedure:
A) For with capacitor filter: (Short points A & C)
1. Trace and draw the circuit diagram.
2. For load regulation ammeter is connected between points A and B.Voltmeter is
Connected between point B and Ground. Vary load resistor RL and note readings
of voltage VL and current IL.
3. For line regulation, Voltmeter is connected between point B and ground. Vary
Supply voltage through auto-transformer and note readings of supply voltage Vi
And o/p voltage Vo. At that time keep RL constant.
4. For ripple factor, short A and B, connect CRO between B to ground at constant
load and measure Vm on CRO.
5. Draw the waveforms on the graph paper.
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Department of E&TC
Observation Table:
Line Regulation :( Without capacitor Filter)Sr.NO.
Vi(volts)
Vo(volts)
1
2
3
4
5
6
7
8
9
10
Line Regulation :(With capacitor Filter)Sr.NO.
Vi(volts)
Vo(volts)
1
2
3
4
5
6
7
8
9
10
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Department of E&TC
IL(mA)
VL(volts)
1
2
3
4
5
6
7
8
9
10
11
Load Regulation (With capacitor Filter)-
Sr.NO.
IL(mA)
VL(volts)
1
2
3
4
5
6
7
8
9
10
11
27
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Department of E&TC
Calculations:
Load regulation=
Line regulation=
Vo/Vi *100
Load Regulation:
Line Regulation:
28
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Result:
Types of Regulation
% Load Regulation
% Line Regulation
Conclusion:
_________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
29
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Department of E&TC
30
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No. 4
Batch Code: __________________
Name of Student: _______________________________________ Roll No. ____________
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
31
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Department of E&TC
Experiment No. 4
Objective
- Square wave testing of an amplifier to find lower and higher cut-off freq.
Equipments needed:Sr.No
1
Name of Equipments
Experiment Kit
2
3
4
Power Supply
Function Generator
CRO
Connecting wires
Specification
0-30 V DC
Sine wave o/p
20 MHz Dual
Channel
Quantity
1
1
1
1
Theory:
It is the method to find out lower and higher cut off freq. of an amplifier without
plotting the actual freq. curve is known as square wave testing. The reason for
choosing square wave signal can be cleared from the following.
1) If we examine the fourier series expansion of square wave , we get a series of
sinusoidal components of different magnitude and freq. .So by Square wave testing,
we are checking the amplifier response for series of sinusoidal components of the
different amplitudes and freq.
2) The use of square wave testing significantly less time consuming than applying a
series of sinusoidal signals at diff. freqs. And magnitude to test the freq. response
of the amplifier.
3) Square waveform is one which permits small distortions to stand out clearly.
For upper 3db freq.:
Fh = 0.35/tr
For lower 3 db freq.:
FL = p* f / 100
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Department of E&TC
Procedure:
1) Set i/p freq. square wave to 20 mV at 1 KHz. Keep i/p freq. of square wave low
(100 Hz) for FL, observe the waveform on CRO .Calculate P and from P calculate
FL.
2) Keep i/p freq. high (10 KHz / 100 KHz)for FH ,observe waveform on CRO
Measure rise time (tr) .Calculate FH.
3) Set i/p freq. sine wave and observe the response.
Observation Table:
1) Lower cut-off freq:
Sr.NO. Freq. (Hz)
V(volts)
V (volts)
P=V-V/V*100
FL =P*f/100
1
2
3
Mean FL = FL1+FL2+FL3 / 3
2) Higher cut-off freq:
Sr.NO.
Freq. (Hz)
T1 (s)
T2
(s)
Tr = T2-T1
FH =(0.35/tr)
1
2
3
Mean FH = FH1+FH2+FH3 / 3
33
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Department of E&TC
Calculations:
Result:
Mean FL =
Mean FH =
Bandwidth =
Mean FH - Mean FL
Conclusion:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
34
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Department of E&TC
35
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Department of E&TC
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
36
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Department of E&TC
Laboratory Report
Experiment No. 5
Date of Submission:
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
-----------------
3) Oral [1]
----------------
Overall Marks
----------------
37
RCPIT, Shirpur
Department of E&TC
Experiment No. 5
Objective:
Pre-lab:
Equipments needed:Sr.No
1
2
3
4
Name of Equipments
Experiment Kit
Power Supply
Function Generator
CRO
Specification
Quantity
1
0-30 V DC
1
Sine wave o/p
1
20 MHz Dual
1
Channel
Theory:If the voltage or power gain obtained from A single stage small signal amplifier is not
sufficient for practical, we must have to use more than one stage of amplification to
Achieve necessary voltage and power gain. Such an amplifier is called as a multistage
amplifier. A two stage amplifier is shown in fig .
In this amplifier o/p of first stage is fed as i/p to the second stage, such a connection
is commonly referred to as cascading. In amplifiers, cascading is also done to achieve i/p
and o/p impedances for specific applications.
A multistage amplifier having two or more stages of CE amplifier is called as cascaded
amplifier. So overall voltage gain of the amplifier is the product of voltage gain of
individual stage .Therefore we get much higher voltage in cascaded amplifier.
V1 = i/p voltage of first stage
V2 = o/p voltage of first stage
V3 = i/p voltage of second stage
V4 = o/p voltage of second stage
Therefore Av1 = V2/V1
Av2 = V4/V3
Overall voltage gain = Av = V4/V1
AVS = V4/V3 * V2/V1
Avs = Av2 * Av1
Semiconductor Devices & Circuits
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Department of E&TC
Freq.
Output(Vo)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
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28
29
30
31
32
33
34
35
36
37
38
39
40
Calculations:
Bandwidth = FH - FL
Result: ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------____________________
________________
40
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Department of E&TC
41
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Department of E&TC
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Lab assignment 3: Compare CE, CC, CB configuration on the basis of Av ,Ai ,Ri and
Ro
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
42
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No. 6
Batch Code: __________________
Name of Student: ____________________________________________ Roll No. ____________
Evaluations
1) Lab Attendance [4]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
43
RCPIT, Shirpur
Department of E&TC
Experiment No. 6
Objective: - Find voltage gain and bandwidth for CE-CB Cascode amplifier.
Pre-lab: What is difference between Cascade and cascode amplifier?
Equipments needed:Sr.No
1
2
3
4
Name of Equipments
Experiment Kit
Power Supply
Function Generator
CRO
Specification
Quantity
1
0-30 V DC
1
Sine wave o/p
1
20 MHz Dual
1
Channel
Theory:
Multistage Amplifier:
small signal amplifier is not sufficient for practical, we must have to use more than one
stage of amplification to achieve necessary voltage and power gain. Such an amplifier
is called as a multistage amplifier. A two stage amplifier is shown in fig .
In this amplifier o/p of first stage is fed as i/p to the second stage, such a
Connection is commonly referred to as cascading. In amplifiers, cascading is also done to
achieve i/p and o/p impedances for specific applications.
Depending upon the type of amplifier, used in individual stages, multistage
amplifiers can be classified into several types.
A multistage amplifier having two or more stages of CE amplifier is called as
Cascaded amplifier. A multistage amplifier with CE as a first stage and CB as a second
Stage is called cascade amplifier.
It is one approach to solve the low impedance problem of CB circuit.
The cascade amplifier gives high i/p impedance stage of a CE amplifier stage as
well as good voltage gain and high freq. performance of CB circuit.
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Department of E&TC
Sr. No.
Freq.
Output(Vo)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
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27
28
29
30
31
32
33
34
35
36
37
38
39
40
Calculations:
Bandwidth = FH - FL
Result: ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------____________________
________________
46
RCPIT, Shirpur
Department of E&TC
Conclusion: --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Lab assignment 1: What is the need of using multistage amplifier? What is Cascode
amplifier?
Ans:-----------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ------------------------
47
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No. 7
Evaluations
1) Lab Attendance [4]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
48
RCPIT, Shirpur
Department of E&TC
Experiment No. 07
Objective: - Determine i/p , o/p impedance and voltage gain of CE stage followed by CC
Stage.
Pre-lab: Need of multistage amplifier.
Types of coupling in multistage amplifier
Equipments needed:Sr.No
1
2
3
4
Name of Equipments
Experimental Kit
Power Supply
Function Generator
CRO
Specification
0-30 V DC
Sine wave o/p
20 MHz Dual
Channel
Quantity
1
1
1
1
Theory:
If the voltage or power gain obtained from A single stage small signal amplifier is
not sufficient for practical, we must have to use more than one stage of amplification to
achieve necessary voltage and power gain. Such an amplifier is called as a multistage
amplifier. A two stage amplifier is shown in fig .
In this amplifier o/p of first stage is fed as i/p to the second stage, such a connection
is commonly referred to as cascading. In amplifiers, cascading is also done to achieve i/p
and o/p impedances for specific applications.
A multistage amplifier having two or more stages of CE amplifier is called as
cascaded amplifier.
Analysis of amplifier:
For Second Stage:
Current gain: Current gain of the particular stage is given by-
AI =
-hf
1 + h o ZL
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AI2 =
-Ie2
- hfe
=
Ib2
1 + hoc RE2
50
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Department of E&TC
The o/p admittance of the first transistor Q1, Yo1 = hoe - hfe *hre
hie + Rs
The o/p impedance taking Rc1 into account is Rot1 = Ro1 II Rc1
The o/p admittance of the second stage, Yo2 = hoc hfc * hrc
hic + Rot1
o/p impedance, Ro2 = 1/Yo2
The amplifier o/p impedance taking RE2 into account is Ro2II RE2
Hence, Ro2 = Ro2 * RE2
Ro2+Re2
The overall voltage gain taking the source impedance into account,
Avs = - Vo
Vs
= Av Ri1
Ri1 + Rs
Result:
1) Av =
2) Ri =
3) Ro =
Conclusion:_______________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
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Lab Assignment: Differentiate CE, CC, CB amplifiers on the basis of Av, Ai, Ri and
Ro.
Ans:-----------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
52
RCPIT, Shirpur
Department of E&TC
Laboratory Report
Experiment No. 8
Batch Code: __________________
Name of Student: ____________________________________________ Roll No. ____________
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
53
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Department of E&TC
Experiment No. 08
Objective: Study the Effect of bypass Capacitor on Frequency Response of Single Stage
Pre-lab:
CE Amplifier.
What is frequency response?
Need of coupling and bypass capacitors
Equipments needed:Sr.No
1
2
3
4
Name of Equipments
Experimental Kit
Power Supply
Function Generator
CRO
Specification
0-30 V DC
Sine wave o/p
20 MHz Dual
Channel
Quantity
1
1
1
1
Theory:
The bypass capacitor is connected across the emitter resistance RE
in BJT amplifier as shown in figure.
1. At medium and high freq. the bypass capacitor CE offers a very low reactance.
Therefore it can be replaced by a short circuit as shown fig. Therefore the
Impedance ZE which is the parallel combination of RE and XCE will have a
Zero .value. Thus RE is bypassed successfully and the bypass capacitor CE has
no effect On the freq. response of the amplifier at medium and high freq.
2. But, at low freq. the reactance XCE is not equal to zero,butit has some finite
Value. Thus the parallel combination of RE and CE will offer a finite
Impedance.So RE is not properly bypassed.
3. Let the impedance of parallel combination be denoted by RE
4. We know that the gain of the CE amplifier with bypassed RE is given by
AV= - hfe RL
hie
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Department of E&TC
Freq.
Output voltage
X-Y open
X-Y short
(Without bypass)
(Withbypass)
Voltage gain
X-Y open
X-Y short
(Without bypass)
(Withbypass)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
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19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Calculations:
Result:
__________________________________________________________________________________________
__________________________________________________________________________________________
_________________________________________________________________________________________
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Conclusion
__________________________________________________________________________________________
__________________________________________________________________________________________
_________________________________________________________________________________________
Lab Assignment 1: What is the effect of bypass capacitor on freq.?
Ans:-----------------------------------------------------------------------------------------
Ans:-----------------------------------------------------------------------------------------
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-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
58
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Laboratory Report
Experiment No. 9
Evaluations
1) Lab Attendance [4]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
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Department of E&TC
Experiment No. 9
Equipments needed:Sr.No
1
2
3
4
Name of Equipments
Experiment Kit
Power Supply
Function Generator
CRO
Specification
Quantity
1
0-30 V DC
1
Sine wave o/p
1
20 MHz Dual
1
Channel
Theory:
FET Amplifiers: FET amplifiers provide an excellent voltage gain with the added
advantage of high input impedance. There are three basic FET circuit configurations as
follows:
1.
Common Source
2.
Common Drain
3.
Common Gate.
The common source amplifier which provides good voltage amplification is most
frequently used. The common drain amplifier with high i/p impedance and nearly unity
voltage gain is used as buffer amplifier and the common gate amplifier is used as high
freq. amplifier. The small signal current source model for FET in CS configuration.
In Common source amplifier source resistor is used to set the Q-point but
bypassed by capacitor for mid-freq. operation.
Procedure:
1) Trace and draw the ckt.dia.
2) Apply 20 V DC using power supply.
3) Set the sinusoidal i/p 50mV at 1 KHz from function generator.
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Observation Table:
Sr.
No
1
Freq.
Output(Vo)
Voltage
gain(Vo/Vi)
Sr.
No
23
24
25
26
27
28
29
30
31
10
32
11
33
12
34
13
35
14
36
15
37
16
38
17
39
18
40
19
41
20
42
21
43
22
44
Freq.
Output(Vo)
Voltage
gain(Vo/Vi)
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Calculations:
Result: ___________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
Conclusion:
_________________________________________________________________________________
_________________________________________________________________________________
_________________________________________________________________________________
Lab Assignment 1. - In which region Q-point of FET is located? Why?
Ans:-----------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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Laboratory Report
Experiment No. 10
Batch Code: __________________
Name of Student: ____________________________________________ Roll No. ____________
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
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RCPIT, Shirpur
Department of E&TC
Experiment No. 10
Objective: Determine input, output impedances and voltage gain for common source FET
amplifier.
Pre-lab: Compare BJT and FET.
Construction of FET.
Equipments needed:
Sr.No
Name of Equipments
1
Experiment kit
2
Power Supply
3
Auto transformer
4
CRO
5
Digital Multimeter
Specification
0-30V DC
20 MHz Dual
channel
Quantity
1
1
1
1
1
Theory:
FET Amplifiers: FET amplifiers provide an excellent voltage gain with the added
advantage of a high input impedance.There is three basic FET circuit configurations as
follows:
1.
Common Source
2.
Common Drain
3.
Common Gate.
In common source amplifier, input is applied between gate and source and output is taken
from drain and source.
1) Input Impedance:
Zi = RG
2) Output Impedance: output impedance Zo is measured by looking into the output
terminals with Vi=0
As Vi=0 and Vgs=0
Therefore,
gm* Vgs =0
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(rd>>RD)
Calculations:
1) Av =
2) Ro =
3) Ri =
Result:
_________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
Conclusion:
_________________________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
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RCPIT, Shirpur
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---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Lab Assignment 2: State whether FET is a current operated device or voltage operated
device? Why?
Ans:-----------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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RCPIT, Shirpur
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------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Lab Assignment 3: What are the advantages of FET amplifier over BJT?
Ans:-----------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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RCPIT, Shirpur
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Laboratory Report
Experiment No. 11
Batch Code: __________________
Name of Student: ____________________________________________ Roll No. ____________
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
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RCPIT, Shirpur
Department of E&TC
Experiment No. 11
FET parameters
Equipments needed:
Sr.No
Name of Equipments
1
Experiment kit
2
Power Supply
3
Auto transformer
4
CRO
5
Specification
0-30V DC
20 MHz Dual
channel
Digital Multimeter
Quantity
1
1
1
1
1
Theory:
FET has three terminals named they are as follows:
1.
Source
2.
Drain
3.
Gate.
The Source is the terminal through which the majority carrier enters the bar.
The current flowing through source is termed as IS, the drain current is denoted as ID,
Normally the drain to source voltage is define as VDS & drain is kept as more +ve.
In JFET, the drain current ID depends upon the drain voltage VDS & the gate
voltage VGS, Any one of those variable may be fixed & reference between the other two
are determined.
The trans-conductance is the ratio of a small change in the current to the
corresponding small change in gate voltage at a constant drain voltage. The change in ID
& VGS should be taken on the straight part.
Amplification Factor is the ratio of small change in the drain voltage to the
Corresponding small change in the gate voltage at a constant drain current.
Drain resistance is the reciprocal of the drain characteristics.
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It is defined as the ratio of the small change in the drain voltage to corresponding small
change in gate Voltage at a constant drain current.
Procedure:
1. Trace & Draw circuit diagram & make connections as shown in fig. VDD & VGG sources
are connected across the drain & gate terminals with source.
2. The voltage across gate & source is VGS & i.e across the drain & source is VDS.
3. The VGS is maintained at source some fixed value & Observations are taken by varying
VDD also VDS voltage is also measured.
4. The graph of ID & VGS is plotted which is close to the ideal graph of FET characteristics.
Observation Table:
V-I CharacteristicsVGS = 0
Sr.
No.
1.
ID (mA)
VDS (V)
VGS =1 V
ID (mA)
VDS (V)
VGS = 1.5 V
ID (mA)
VDS (V)
2.
3.
4.
5.
6.
7.
8.
9.
10.
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Dynamic Characteristics:
Sr.No.
ID (mA)
VGS (volts)
1
2
3
4
5
6
7
8
9
10
Result:___________________________________________________________________
_________________________________________________________________________
_______________________________________________________________________
Conclusion:_______________________________________________________________
_________________________________________________________________________
_________________________________________________________________________
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---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Lab Assignment2: What is the difference between FET and BJT?
Ans:-----------------------------------------------------------------------------------------
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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Department of E&TC
Laboratory Report
Experiment No. 12
Batch Code: __________________
Name of Student: ____________________________________________ Roll No. ____________
Evaluations
1) Lab Attendance [2]
a) Pre lab work done (if any) [1]
___________
___________
----------------
3) Oral [1]
---------------
Overall Marks
----------------
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RCPIT, Shirpur
Department of E&TC
Experiment No.12
Objective: To study h parameters for CE configuration.
Equipments needed:
Sr.No
Name of Equipments
1
Experiment kit
2
Power Supply
3
Auto transformer
4
CRO
5
Specification
0-15V DC
20 MHz Dual
channel
Digital Multimeter
Quantity
1
1
1
1
1
Circuit Diagram
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2 Port network
h parameter for CE
Suffixes of h parameters
i = input
f = forward
r = reverse
o = output
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b = base
e = emitter
hre = 2x10-4
hoe = 20x10-6 S
Input Characteristics: The input quantities for CE configuration are base current IB and
base emitter voltage VBE.
1. If VCE =0 and if base emitter junction is forward biased, then the input
characteristics is same as the characteristics of forward biased diode.
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2. If VCE is increased then VCB increases. Increase in VCB leads to decrease in base
width WB due to Early effect, resulting in decrease of recombination and
consequently decrease in base current due to recombination.
. In general two of the four variables are independent and the rest
where
, and
with,
input impedance
With (output short-circuit).
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This is AC resistance between base and emitter, the reciprocal of the slope of the
current-voltage curve of the input characteristics.
: reverse transfer voltage ratio with
affects
(input open-
. In general
be ignored.
: Forward transfer current ratio or current amplification
factor with
is in the range of
20 to 200.
: Output admittance with
(input open-
If all variables
far
In general,
and
and
with a resistance
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RCPIT, Shirpur
Department of E&TC
The small-signal parameters are controlled by the Q-point and are independent of
the geometry of the BJT.
Transconductance:I
g m = C 40 I C
VT
Input resistance:-
r = o T = o
IC
gm
Output resistance:-
V +V
ro = A CE
IC
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Phase Relationship
A CE amplifier configuration will always have a phase relationship between input and
output is 180 degrees. This is independent of the DC bias
H Parameter / CE:
H Parameter / CE:
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H Parameter / CE:
H Parameter / CE:
Transistor as an Amplifier
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Department of E&TC
1. The transistor operates in the linear region for the whole cycle of the
whole input.
2. The transistor is never driven into saturation or
cut-off region.
Then the transistor will operate as a linear amplifier since
I = I holds in the active region
C
B
Benefits of h parameters
Procedure:
1. Trace the diagram of BJT on the plain sheet of paper.
2. Mark the points VCC, VBB, I/P Voltage source and O/P Voltage.
3. For I/P characteristics VBB from 1 to 10 V by keeping VCE is constant on particular
value and measure IB and VBE.
4. Connect the wires according to the diagram drawn.
5. For O/P characteristics set IB on any value. Vary VCE in steps of 1V by keeping VBB
constant at any value and measure IC.
6. Find the values of VCE &VBE and then calculate the h parameters with the help of
formulae.
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Observation Table:
For I/p Characteristics:
VCE
VBE (V)
VCE
IB (A)
VBE (V)
IB (A)
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Determination of h parameters:
1) hie = input impedance = VBE/IB by keeping VCE = constant.
2) hre = reverse voltage gain = VBE/VCE by keeping IB = constant.
IB
IC (mA)
VCE (V)
IC (mA)
Determination of h parameters:
1) hfe = forward current gain = Ic/IB by keeping VCE = constant.
2) hoe = output admittance = Ic/VCE by keeping IB = constant
Conclusion:___________________________________________________________________
___________________________________________________________________
__________________________________________________________________
87