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Application Note, V1.1, Apr.

2002

CoolMOS

TM

AN-CoolMOS-08
SMPS Topologies Overview

Power Management & Supply

N e v e r

s t o p

t h i n k i n g .

SMPS Topologies Overview


Revision History:

2002-04

Previous Version:
Page

V1.1
V1.0

Subjects (major changes since last revision)


Documents layout has been changed: 2002-Sep.

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Edition 2002-04
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SMPS Topologies Overview

Table of Contents

Page

1
1.1
1.2
1.3
1.4
1.5
1.6
1.7

SMPS Topologies Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4


Flyback Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Boost Converter (PFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Single Transistor Forward Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Half Bridge Forward Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Two Transistor Forward Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Full "H" Bridge Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Full Bridge ZVT Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

List of related application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Application Note

V1.1, 2002-04

SMPS Topologies Overview

AN-CoolMOS-08

This application note gives a briefly overview of major state of the art SMPS topologies.

SMPS Topologies Overview

A variety of converter topologies are used in switch mode power supplies employing
pulse width modulation to regulate an output voltage. Table 1 shows the basic
topologies in widespread use. Note that though the classic description of these
topologies specifies only hard PWM as a switching mode, there are resonant variations
of many of these with similar characteristics. Also there are specialized converters such
as the Ck and SEPIC using multiple reactive components for energy transfer, but with
operating characteristics for the power switch which are similar to the basic topologies
described below, though often with increased VDS requirements.
Table 1

SMPS Topologies & Transistor Selection

Topology

CoolMOS Generation

Voltage Rating

PFC Boost Converter

S5, C2, C3

500 V, 600 V

Flyback Converter

S5, C2, C3

600 V, 800 V

Forward Converter Single


Transistor

C3

800 V

not recommended
S5, C2, C3
S5, C2, C3

500 V, 600 V
500 V, 600 V
500 V, 600 V

Center Tap Single Push-Pull


Converter

C3

800 V

Full Bridge PWM

not recommended

500 V, 600 V

Full Bridge ZVT-Phase Controlled

C2, C3

500 V, 600 V

Half-Bridge Converter
-Symmetrical PWM
-Symmetrical Resonant
-Asymmetrical
(2 Transistor Forward)

Application Note

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

1.1

Flyback Converter

The Flyback converter is one of the simplest and most economical SMPS power supply
topology, suited best to lower power levels, because the triangular current waveforms
incur high peak losses in the primary side switch, and relatively high output ripple current
and ripple voltage on the output side. The flyback transformer is designed as an energy
storage and transfer inductor, sized to store the energy required at the peak of the
primary current during the first switching state. This maximum energy storage is
irrespective of the input line voltage; variations in line voltage merely change the duty
cycle required to charge the flyback transformer to the programmed current level. The
transformer turns ratio is selected based on the allowable reflected flyback voltage as
well as the desired output voltage. During the second switching state, the power switch
must block the bus voltage "+VIn" plus the reflected reset voltage determined by the
regulated VOut and the transformer turns ratio. Uncoupled inductance from the primary to
secondary (leakage inductance) will also store energy, and since this energy is not
clamped by the output winding, it will cause an avalanche on the primary unless clamped
by an RCD snubber network.

Figure 1

Flyback Converter

Energy transfer occurs by charging a current into the flyback inductor/transformer


primary by turning on the power transistor. When the transistor turns off, the inductor
reset on the secondary side conducts through CR1 to the output capacitor. Leakage
inductance on the primary must be clamped on primary side.
Application Note

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

1.2

Boost Converter (PFC)

The boost converter as shown (Figure 2) is not an isolated output SMPS converter. It is
used to raise an unregulated input voltage to a higher level, and is commonly employed
in active Power Factor Correction circuits. The boost inductor is the primary energy
storage and transfer element, storing energy when the switching transistor Q1 is turned
on, and delivering it to an output capacitor through CR1 when the switching transistor
turns off. If the high frequency power loop formed by Q1, CR1, and COut is reasonably
small, with low stray inductance, CR1 will clamp the drain voltage of Q1, and avalanche
conduction is unlikely. If there is considerable stray inductance in this loop, then at high
di/dt for Q1 turn off there may be a possibility of brief avalanche events.

Figure 2

Boost Converter

Energy transfer occurs by charging a current into the boost inductor by turning on the
power transistor. When the transistor turns off, the inductor reset transfers energy to the
output capacitor through the boost diode. Output voltage is higher than input, because
the inductor reference is at the input voltage.

Application Note

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

1.3

Single Transistor Forward Converter

The single transistor forward converter (Figure 3) offers some significant performance
advantages over the flyback SMPS converter, but at the cost of many additional
components. Instead of combining energy storage and voltage isolation/conversion in
one magnetic component, a separate transformer and output filter inductor are used,
permitting more favorable trapezoidal current waveforms and lower output current and
voltage ripple, thus reducing noise and decreasing stress on semiconductors and
capacitors. In a conventional single transistor forward converter, the transformer reset
occurs after the power transfer cycle, and requires that the input transistor block a
minimum of twice the input voltage. In practice, the coupling between the reset clamp
winding and the primary power winding may not be ideal, and leakage inductance on the
primary winding can store energy which can cause avalanche voltage overshoots unless
clamped by an RCD snubber network across the power transistor Q1. For a maximum
rectified bus voltage of 360 V, a VDS rating of 800 V is required for the power transistor
Q1, unless alterations to the maximum duty cycle, and special clamp winding
arrangements are made to lower the reflected voltage on Q1.

Application Note

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

Figure 3

Single Transistor Forward Converter

Energy transfer occurs across the isolation transformer, when the power transistor Q1
turns on the primary voltage is reflected across the output windings, and rectified by
CR1, charging the output inductor. When the primary switch turns off, the bifilar primary
clamp winding conducts through the clamp diode, clamping the drain voltage of Q1 at
twice the input voltage, and returning the energy from the magnetizing inductance of the
transformer to the primary power bus (CIn). The driven side of the output inductor is
clamped at 0.7 volts below ground by the recirculating diode, and the output inductor and
output capacitor store energy and integrate the duty cycle so that the output voltage is
proportional to the product of the rectified output voltage and duty cycle. If the primary
winding is not bifilar (wound at the same time) with the clamp winding, there will be a
substantial unclamped leakage inductance on the primary. This leakage inductance and
any additional stray inductance stores energy which will not be clamped by clamp
winding, and must be dissipated on the primary side by the power transistor in
avalanche, or by additional protective snubber networks.
Application Note

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

1.4

Half Bridge Forward Converter

This converter design offers the possibility of reducing the size of the transformer by
nearly 1/2 compared with the single transistor forward converter, because it's single
ended push-pull configuration uses the transformer flux in both directions. It doesn't
require a clamp winding, but does require two output windings, to support both polarities
of output drive from the transformer. By replacing the small flux balance cap with a
resonant network, it is possible to easily make a resonant mode converter, with very low
switching losses because the voltage turn-on and turn-off occurs at very low current. The
body diodes of the switching transistors Q1 and Q2 provide clamping of turn-off
transients due to leakage inductance, so avalanche is not normally an issue with this
topology.
Because of the primary side capacitors and their affect on the source voltage driving the
transformer and output inductor, this topology cannot be used readily with current mode
control, which is a significant disadvantage from the points of control loop dynamics,
audio susceptibility, line regulation, and transistor protection. For this reason this
topology has fallen in popularity for midrange sized power supplies, though it may
commonly be found in direct coupled lighting applications when used with resonant
components.

Application Note

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

Figure 4

Half Bridge Forward Converter

Energy transfer occurs across the isolation transformer, in single ended push-pull. First,
when the power transistor Q1 turns on the primary voltage is reflected across the output
windings, and rectified by CR1, charging the output inductor. When Q1 turns off, the
voltage drive across the transformer primary drops to zero, and energy stored in the
leakage inductance and magnetizing inductance causes a turn-off overshoot, which is
clamped by the body diode of Q2. In the second stage, Q2 turns on, and the transformer
is driven in the opposite direction, resetting the flux balance in the transformer core. The
output of the transformer is made with two windings and connected to a half wave
rectifier, so the alternating polarity pulse train is rectified into a unidirectional pulse train
of twice the frequency. The output inductor and output capacitor store energy and
integrate the duty cycle so that the output voltage is proportional to the product of the
rectified output voltage and duty cycle.
Application Note

10

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

1.5

Two Transistor Forward Converter

This SMPS topology (Figure 5) has been widely used because of it's robustness,
simplicity, and moderately high performance. It is similar in performance characteristics
to the single transistor forward converter, excepting that the two-transistor topology is
inherently self-clamping for the magnetizing current reset of the power transformer,
making avalanche operation unlikely. Additionally, this topology requires power
transistors with only 1/2 the VDS blocking capability of the single transistor version. This
reduction in voltage requirements dramatically reduces the RDS[on] for silicon area in the
case of conventional MOSFET transistors, with the result that the two smaller transistors
usually cost less than the single larger transistor, with lower total losses.
The two transistor forward converter is compatible with current mode control, and with
the improved operating conditions for the transistor switches due to the lower operating
voltage requirements, gives good performance in midrange power applications. It's main
drawback compared with the Half Bridge converter is the necessity for a larger power
transformer because the flux swing can only operate in one direction, but this also
eliminates the necessity for any flux balancing methods in the control circuits.

Application Note

11

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

Figure 5

Two Transistor Forward Converter

Application Note

12

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview
Energy transfer occurs across the isolation transformer, when the power transistors Q1
and Q2 turn on, and the primary voltage is reflected across the output windings, and
rectified by CR1, charging the output inductor. When the primary switch turns off, the
flyback from the leakage inductance and magnetizing inductance flows through the
clamp diodes D1 and D2, clamping the flyback of the primary and returning the energy
from the magnetizing inductance of the transformer to the primary power bus (C1In). The
output inductor and output capacitor store energy and integrate the duty cycle so that the
output voltage is proportional to the product of the rectified output voltage and duty cycle.

1.6

Full "H" Bridge Converter

The "H" Bridge converter (Figure 6) draws its name from the four switching legs and
their common connection to the load or output transformer. It combines some of the best
features of the Two Transistor Forward converter and the Half Bridge converter. These
include low input voltage requirements for the power switches, smaller transformer size
from utilizing both polarities of BH loop excitation, inherent clamping of magnetizing
current and leakage inductance transients, and compatibility with current mode control.
The latter also provides inherent flux balancing of the power transformer, insuring equal
volt seconds across the transformer primary in both directions.
Because the H-Bridge topology is capable of operating at effective inductor PWM duty
cycles greater than 50%, stable operation in current mode control avoiding sub harmonic
oscillation requires slope compensation of the inner control loop, unless a rectifier output
topology such as a current doubler is used, which cuts in half the effective duty cycle on
the output inductors.
The rectified output pulse train is at twice the switching frequency of the primary
transistors, which may also allow a reduction in the size of the inductor magnetics for a
given output ripple voltage requirement.

Application Note

13

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

Figure 6

Full Bridge Converter with Conventional PWM

Application Note

14

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview
Energy transfer occurs across the isolation transformer in balanced push-pull. First,
when the power transistors Q1 and Q4 are turned on, the full bus voltage is applied
across the primary winding, and the primary voltage is reflected across the output
windings, and rectified by CR1, charging the output inductor. When Q1 and Q4 turn off,
the voltage drive across the transformer primary drops to zero, and energy stored in the
leakage inductance and magnetizing inductance causes a turn-off overshoot, which is
clamped by the body diodes of Q2 and Q3. In the second stage, Q2 and Q3 turn on, and
the transformer is driven in the opposite direction, resetting the flux balance in the
transformer core. The output of the transformer is made with two windings and
connected to a half wave rectifier, so the alternating polarity pulse train is rectified into a
unidirectional pulse train of twice the frequency. The output inductor and output capacitor
store energy and integrate the duty cycle so that the output voltage is proportional to the
product of the rectified output voltage and duty cycle.

1.7

Full Bridge ZVT Converter

This topology (Figure 7) is similar in physical and electrical layout to the conventional H
Bridge topology, but it's operation and control circuits are in some regards radically
different, and significantly more complicated. Like the conventional H Bridge,
advantages include small magnetics, low voltage requirements for the power transistors,
reduced likelihood of avalanche, and compatibility with current mode control.
The complexity comes into play with the control scheme necessary to achieve Zero
Voltage Transitions and essentially eliminate switching losses in the power transistors.
Instead of using the conventional H Bridge's simple anti-phase PWM modulation
scheme where switches Q1 and Q4 are driven from the same control signal (Figure 6)
and switches Q2 and Q3 are likewise driven, unique timing signals are generated for
each switching transistor, so that each side of the H bridge switches roughly in a square
wave fashion at drive points "A" and "B" (Figure 7), and the displacement in phase
between the square wave drives produces an effective PWM across the transformer
primary. The key advantage to this scheme lies in the fact that the drain to source
transitions of each transistor are powered by the energy stored in the leakage
inductance, or when necessary, a primary resonant inductor. Each transistor turns on
with essentially zero volts drain to source over a wide load range. This requires careful
timing of control signals, and adjustable delays between the turn off of one bridge
transistor and the turn on the next. The benefit lies in eliminating almost all of the
switching losses of the power MOSFET transistors, making possible increases in the
operating frequency of the power supply, with attendant reductions in the size and weight
of the power transformer and inductors.

Application Note

15

V1.1, 2002-04

SMPS Topologies Overview


SMPS Topologies Overview

Figure 7

Full Bridge Converter with Phase Shifted ZVT

Application Note

16

V1.1, 2002-04

SMPS Topologies Overview


List of related application notes
Energy transfer occurs across the isolation transformer in balanced push-pull, as for the
conventional Full Bridge. Key to the operation with no switching losses is the use of a
phase shifted modulation scheme, using square waves on both sides of the transformer
primary, and controlling the duty cycle across the transformer primary by changing the
effective phase between the two square waves. To achieve near lossless switching
operation, drain to source transitions occur when one transistor in a leg turns off, and the
magnetizing or resonant inductance slews the drain to source voltage to the opposite
potential, after which the other transistor is turned on. This requires the delays in
switching control shown in Delay 1/2 and Delay 3/4, which shows in an exaggerated
manner for clarity the timing delays required. In some implementations this delay is
made variable as a function of load current, to optimize the drain to source resonant
timing for both light loads and heavy loads.

List of related application notes

Application Note 1: CoolMOS Selection Guide (AN-CoolMOS-02)


Application Note 2: CoolMOS Design In Guidelines (AN-CoolMOS-03)

Application Note

17

V1.1, 2002-04

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