A Low Cost Power Amplifier for 5-GHz

W-LAN Applications (Invited Paper)

A. Scuderi, F. Carrara and G. Palmisano

STMicroelectronics, Stradale Primosole 50,95121, Catania, Italy

2Universitl di Catania, Facolti di Ingegneria, DIEES, Viale A. Doria 6, 95125, Catania, Italy
antonino.scuderi@st.com, fcarrara@diees.unict.it,gpalmisano@diees.unict.it
efficiency (PAE)that leads to a short operating time for the
mobile equipment.

Abstract- A monolithic 5-GHz RF linear power amplifier for WLAN IEEE802.11a applications was integrated using a very low
cost 35-GHz-fr bipolar process. The process adopts a selective
germanium implant technique to optimize the base profde. The
two-stage power amplifier exhibits a 8-dB power gain, a 27-dBm
PldB and a 27% power added efficiency (PAE). Thanks to an
optimized linealization technique the power amplifier is able to
comply with the stringent error vector magnitude (EVM)
requirement of the standard up to 23-dBm output power with an
IEEE802.11a 54-Mbiffs input signal.

In order to extend the operating time, a proper biasing

technique has to be used as will be discussed in Section HI.

KeywordsSiGe: bipolar: power amplifier: PAE; Em:RF: W-

This work presents a very low cost silicon-germanium

bipolar linear PA that exhibits a 27-dBm P L a , 8-dB small
signal gain, 29dBm saturated output power and 27% PAE at
5.25 GHz and 3.3-V supply voltage. With an IEEE802.11a
54-MbiVs input signal, the circuit is able to deliver an output
power as high as 23 dBm.

LAN: IEEE802.11a

I.

11. SlGE IMPLANTED TECHNOLOGY

The process adopts a selective germanium implant
technique. The implantation is used on an existing low cost
host process which makes available additional devices for
complex function design. Moreover, the implantation allows an
independent control of Ge dose and base profile.

INTRODUCTION

Wireless applications are capturing higher and higher

market share due to the request of mobility and flexibility bom
the end-users. The challenge is to implement attractive wireless
solutions in terms of integration, performance and costs. A
mass market perspective needs the use of very low cost
technologies capable of implementing complex functions. In
addition to cost, a basic issue of a wireless technology is the
capability to perform power amplification. This is mandatory
to integrate the RF front-end transceiver including the PA in a
single chip. Recently, this concept has been attracting
increasing attention for GSM/DCS or WCDWCDMA2k
applications where BiCMOS/SiGe technologies are becoming
the most attractive ones. For IEEE 802.11a WLAN
applications, integrated solutions have heen presented [I] and
stand-alone PAS reported [2] but they suffer from the high
production cost of the technologies. This paper shows a power
amplifier for the IEEE802.1 la standard, which is integrated in
a very low cost silicon germanium bipolar process.

The optimization of the base profile enables the design of

bipolar transistors with very low base transit time. A
cross-section of a typical implanted SiGe transistor is depicted
in Fig. 1.

The IEEE802.1 l a standard employs orthogonal frequency

division multiplexing modulation providing high data rate (54
Mb/s) with very low inter-symbol interference and a good
multi-path fading immunity. However the OFDM signal shows
very high peak-to-average power ratio that leads to a stringent
linearity requirement for the PA. The 54 Mb/s configuration is
the most critical for the fulfillment of the EVM requirement
which is as low as 5.6%.
Figure 1. Simplified SiGc BIT emss section

Due to the high peak-to-average ratio (higher than 7 dB

[3]), a deep power back-off has to be used to avoid peak
clipping. As a consequence, the PA exhibits poor power-added

A SEM photo is shown in Fig. 2. The main features of the

process are: thin centura epi layer (0.8 to l.Opn), enhanced
trench for improved F
E isolation, optimized double implanted

129

2004 IEEE CSIC Digest

__
-~
--

In order to increase the breakdown voltage from 3 V to 4.3

V for a PA operating at 3.3 V the collector was optimized
while the fr was reduced to 35 GHz. This trade-off was
achieved adopting a collector implantation dose lower than the
standard one.

selective collector, self-aligned double-poly baselemitter

structure, ion implanted germanium, directly implanted base,
junction depth < 900 A, and an effective emitter width of 0.4
pm. Moreover, it features three AISiCu-metal layers, poly
resistors, and metal-insulator-metal capacitors (0.7 fF/pm2).
Comparison between host technology performance and
implanted SiGe BJT is summarized in Tab. I .

-~

Figure 2. SEM photo

--

---

Parameter

Host Tech

SiGe Technology

h m m (VCS= 0 v)

1 IO

132

BVCEO[VI

[GHz] @ V c b 2 V

22

44

fm [GHz] @ V c b 2 V

18

68

TF
fTm

IPS1

111.

THE LINEARIZATION
TECHNIQUE

Class-AB operation is suitable to achieve low current

consumption and optimum bias current level for minimum
third-order distortion [4]. As shown in Fig. 4, the IM3
characteristic for a Class-AB PA can roughly be divided into
two regions. Gain expansion is observed for low output power
levels (weak nonlinearity), whereas saturation of the output
voltage occurs when the output power is high (hard
nonlinearity). To take into account AMIAM and AMmM
effects in the weakly nonlinear region, the PA's distortion has
to be analyzed by the Volterra series approach. IM3 can be
minimized by sening optimum bias impedances at 2oC and
Am = 1 w2- w , 1, where wc is the camer frequency and Am is
the frequency spacing between the two input tones [SI.On the
other hand, in the hard distortion region IM3 can be minimized
by properly managing the sweet spot, i.e., by controlling the
compensation between the expansion and compression of the
power gain curve [6]. The addition of a diode linearizer to the
bias circuitry, allows tracking the variation of the power
transistor base-eminer voltage thereby enhancing the I-dB
compression point of the PA [7].

Weak
nonlinearity

i'

Hard
nonlinearity

Output power [dBm]

Figure 4. Thhird-order intermodulation dirtoltion versus output power
characteristic for a Class-AB PA.

N.

h,
-

0
0.1

Figure 3. /?and/."

THE POWER AMPLIFIER

The proposed PA comprises 2 gain stages device and

exploits MIM capacitors, bond-wires and a spiral inductor with
pattemed ground shield to provide on-chip inter-stage and
input matching. In order to minimize the IM3, the optimization
of the base-band bias impedance was performed and an antiparallel junction at the base of the power transistor was used, as
shown in Fig. 5 . The bias circuit also allows a power control
. can be
function to be achieved through the voltage V C ~This
also used to control the quiescent current level of the power
amplifier thus optimizing the trade-off between efficiency and
linearity.

vmus collector current @ V c k 2 V

130

t vco

Fig. 8 shows the single-tone performance in terms of output

power and PAE. The PA exhibits a 27-dBm output
compression point, a 8-dB small-signal gain and a 29-dBm
saturated output power along with a 27% maximum PAE. This
was optimized with the PA operating close to the compression
point.

"cl
II

.....

Off-chip
matching

I
Figure 5. Simplified schematic of the power amplifier

V. EXPERIMENTAL
RESULTS
A die photograph of the fabricated PA is shown in Fig. 6.
The chip size is 1.5 mm x 1.2 m. Ground planes and a large
number of emitter down-bonding wires were adopted to reduce
the parasitic inductance between the emitter of the transistor
and the extemal ground. Inter-matching network exploits a
monolithic circular inductor. In order to enhance the Q-factor,
the top and the second metal layer was used for spiral and
underpass, respectively. Moreover, radial panemed ground
shied was used to avoid detrimental effects due to induced
substrate currents [8].

The control curve of the PA is repolted in Fig. 9. The curve

represents the variation of the output compression point as a
function of the extemal control voltage VCNI..More than 30 dB
of power control was measured and the maximum slope of the
power control curve is lower than 100 d B N .
In Fig. 10 the PA performance under IEEE802.11a
excitation is presented. A bit rate of 54 Mbitls was set for the
input signal, representing the worst case with respect to
linearity requirements. In this case, EVM must be less than
5.6%. Measured EVM is below 3.5% up to a 22-dBm output
power level, whereas the 5.6% requirement is fulfilled up to
23 dBm.
In Fig. 11 the output spectrum, for 23-dBm output power, is
shown, demonstrating compliance with standard emission
mask specifications.

The chip was assembled in a 4 mm x 4 mm QFN 16-lead

plastic package and mounted on a 400-pm-thick FR4 substrate
which is shown in Fig. 7. The output matching network and
input SO-ohm line are highlighted.
The PA was operated under a 3.3 V supply voltage and the
operating frequency was set to 5.25 GHz. Extemal matching
was optimized to obtain the best trade-off between the
compression point and the gain.

Figure 7. Photograph of the testing bavd

30

i
m jol
27.5
25
~~

5 17.5
2

/',

28

L4

12 1

.=

2 4 6 8 101214 1 6 1 8 2 0 2 2 2 4 2 6

Pin Idem]
Figure 6. Die photograph
Figure 8. Output paw= and PAE v m w input power (Pin)

131

VI.

30

CONCLUSION
A MMIC PA was integrated using a very low cost bipolar

technology. The process adopts a base selective germanium

implant technique to optimize the base profile. The PA
includes an optimized bias network providing linearity
enhancement, shut-down and quiescent current regulation
functionalties. With an IEEE802. I la 54-MbiVs input signal,
the PA is capable o f delivering a linear output power of
23 dBm with a 27% PAE while complying with the standard
linearity requirements.

,
I
1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2

-5-1

Vcnt [VI

ACKNOWLEDGMENT
The authors would like to thank P. Ward and C. Alemanni,
STMicroelectronics, Catania, Italy, for help with technology
issues and A. Castorina, U. Lombard0 and C. Santagati,
STMicroelectronics, Catania, Italy, for assistance with
measurements.

Figure 9. Output power versus control voltage (V,)

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24

Pout [dBm]
Figure IO. EVM YBNS Output power (54 Mbit OFDM input sigmal)

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Figure 11. Output spechum at 23 dBm output channel power (Vcc=3.3 V)

132