ANTI THEFT CONTROL SYSTEM DESIGN USING EMBEDDED SYSTEM

INTRODUCTION:
This system makes use of an embedded chip that has an inductive proximity sensor, which senses the key
during insertion and sends a text message to the owners mobile stating that the car is being accessed. This is
followed by the system present in the car asking the user to enter a unique password. The password consists of
few characters and the car key number. If the user fails to enter the correct password in three trials, a text message
is sent to the police with the vehicle number and the location tracked using a GPS module. The message is also
sent to the owner about the unauthorized usage. Further the fuel injector of the car deactivated so that the user
cannot start the car by any means. At the same time a secret lock system gets activated and the unauthorized user
gets trapped inside the car and only the owner who is equipped with the key to the secret lock system can
deactivate the mechanism. This technique helps in taking fast steps towards an attempt to steal the vehicle. The
design is robust andsimple.
When the key is inserted in the key hole the inductive proximity sensor detects the key and triggers the
microcontroller. A password check message is displayed on the LCD provided inside the car and at the same time
the owner is alerted with a message about the usage of his car. Totally three trials are provided to enter the correct
password. If the entered password is incorrect a second electronic lock system gets activated and the doors are
locked. An alert message is sent to the police and the owner about the illegal access of his car. With the help of
GPS the exact location of his car is found and the key of the second lock system is available only with the owner
hence a total control over the vehicle is established.

Block diagram

MICRO CONTROLLERS
Microprocessors vs Microcontrollers:
Microprocessors are single-chip CPUs used in microcomputers.

Microcontrollers and microprocessors are different in three main aspects hardware

architecture, applications,

and instruction set features.

Hardware architecture: A microprocessor is a single chip CPU while a microcontroller is a single IC contains a
CPU and much of remaining circuitry of a complete computer (e.g., RAM, ROM, serial interface, parallel
interface, timer and interrupt handling circuit).
Applications: Microprocessors are commonly used as a CPU in computers while microcontrollers are found in
small, minimum component designs performing control oriented activities.
Microprocessor instruction sets are processing Intensive.
Their instructions operate on nibbles, bytes, words, or even double words.
Addressing modes provide access to large arrays of data using pointers and offsets.
They have instructions to set and clear individual bits and perform bit operations.
They have instructions for input/output operations, event timing, enabling and setting

priority levels for

interrupts caused by external stimuli.

Processing power of a microcontroller is much less than a microprocessor.

Difference between 8051 and 8052:

The 8052 microcontroller is the 8051's "big brother". It is a slightly more powerful microcontroller, sporting a
number of additional features which the developer may make use of:

256 bytes of Internal RAM (compared to 128 in the standard 8051).

A third 16-bit timer, capable of a number of new operation modes and 16-bit reloads.

Additional SFRs to support the functionality offered by the third timer.

AT89S52:
DESCRIPTION OF MICROCONTROLLER AT89S52:
The AT89S52 is a low-power, high-performance CMOS 8-bit micro controller with 8Kbytes of in-system
programmable Flash memory. The device is manufactured Using Atmels high-density nonvolatile memory
technology and is compatible with the industry-standard 80C51 micro controller. The on-chip Flash allows the
program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By
combining a versatile 8-bit CPU with in-system programmable flash one monolithic chip; the Atmel AT89S52 is a
powerful micro controller, which providesa highly flexible and cost-effective solution to many embedded control
applications.

Features:

 Compatible with MCS-51Products

8K Bytes of In-System Programmable (ISP) Flash Memory
Endurance: 1000 Write/Erase Cycles
4.0V to 5.5V Operating Range
Fully Static Operation: 0 Hz to 33 MHz
Three-level Program Memory Lock
256K Internal RAM
32 Programmable I/O Lines
3 16-bit Timer/Counters
Eight Interrupt Sources
Full Duplex UART Serial Channel
Low-power Idle and Power-down Modes
Interrupt Recovery from Power-down Mode
Watchdog Timer
Dual Data Pointer
Power off flag

The AT89S52 provides the following standard features: 8K bytes of Flash, 256bytes of RAM, 32 I/O
lines, Watchdog timer, two data pointers, three 16-bit timer/counters, full duplex serial port, on-chip oscillator,
and clock circuitry. In addition, the AT89S52 is designed with static logic for separation down to zero frequency
and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the
RAM timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the
RAM contents but freezes the oscillator, disabling all other chip functions until the next interruptor hardware
reset.

PIN DESCRIPTION OF MICROCONTROLLER 89S52

VCC
Supply voltage.
GND
Ground.

Port 0
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs.
When 1sare written to port 0 pins, the pins can be used as high impedance inputs. Port 0 can also be configured to
be the multiplexed low order address/data bus during accesses to external program and data memory. In this
mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the
code bytes during program verification. External pull-ups are required during program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 Output buffers can sink/source
four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used
as inputs. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2)
and the timer/counter 2 trigger input P1.1/T2EX), respectively, as shown in the following table. Port 1 also
receives the low-order address bytes during Flash programming and verification.

Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source
four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used
as inputs. Port 2 emits the high-order address byte during fetches from external program memory and during
accesses to external datamemory that may use 16-bit addresses (MOVX @DPTR). In this application, Port 2
uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOVX @ RI), Port 2emits the contents of the P2 Special Function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source
four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used

as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.
Port 3 also receives some control signals for Flash programming and verification.

RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device.

ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to
external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal
operation, ALE is emitted at a constant rate of1/6 the oscillator frequency and may be used for external timing or
clocking purposes. However, that one ALE pulse is skipped during each access to external data Memory. If
desired, ALE operation can be disabled by setting bit 0 of SFR location8EH. With the bit set, ALE is active only
during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has
no effect if the micro controller is in external execution mode.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is
executing code from external program memory, PSEN is activated twice each machine cycle, except that two
PSEN activations are skipped during each access to external data memory.
EA/VPP
External Access Enable must be strapped to GND in order to enable the device to fetch code from external
program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA
will be internally latched on reset. A should be strapped to VCC for internal program executions. This pin also
receives the 12-voltProgramming enables voltage (VPP) during Flash programming.

XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator
may be used. To drive the device from an External clock source, XTAL2 should be left unconnected while
XTAL1 is driven, as shown in Figure 2.

Figure 1.Oscillator Connections

Special Function Register (SFR) Memory: Special Function Registers (SFR s) are areas of memory that control specific functionality of the
8051 processor. For example, four SFRs permit access to the 8051s 32 input/output lines. Another SFR
allows the user to set the serial baud rate, control and access timers, and configure the 8051s interrupt
system.
The Accumulator:
The Accumulator, as its name suggests is used as a general register to accumulate the results of a
large number of instructions. It can hold 8-bit (1-byte) value and is the most versatile register.
The R registers:
The R registers are a set of eight registers that are named R0, R1. Etc up to R7. These registers are
used as auxiliary registers in many operations.
The B registers:
The B register is very similar to the accumulator in the sense that it may hold an 8-bit (1-byte)
value. Two only uses the B register 8051 instructions: MUL AB and DIV AB.

The Data Pointer:

The Data pointer (DPTR) is the 8051s only user accessible 16-bit (2Bytes) register. The accumulator,
R registers are all 1-Byte values. DPTR, as the name suggests, is used to point to data. It is used by a
number of commands, which allow the 8051 to access external memory.
THE PROGRAM COUNTER AND STACK POINTER:
The program counter (PC) is a 2-byte address, which tells the 8051 where the next instruction to
execute is found in memory. The stack pointer like all registers except DPTR and PC may hold an 8-bit (1Byte) value.
ADDRESSING MODES:
An addressing mode refers that you are addressing a given memory location. In summary, the
addressing modes are as follows, with an example of each of these addressing modes provides important
flexibility.
Immediate Addressing

MOV A, #20 H

Direct

Addressing

MOV A, 30 H

Indirect

Addressing

MOV A, @R0

Indexed

Addressing

a. External Direct
b. Code In direct

MOVX A, @DPTR
MOVC A, @A+DPTR

Immediate Addressing:
Immediate addressing is so named because the value to be stored in memory immediately follows the
operation code in memory. That is to say, the instruction itself dictates what value will be stored in memory.
For example, the instruction:
MOV A, #20H
This instruction uses immediate Addressing because the accumulator will be loaded with the value
that immediately follows in this case 20(hexadecimal). Immediate addressing is very fast since the value to
be loaded is included in the instruction. However, since the value to be loaded is fixed at compile-time it is
not very flexible.
Direct Addressing:
Direct addressing is so named because the value to be stored in memory is obtained by directly
retrieving it from another memory location.
For example:
MOV A, 30H
This instruction will read the data out of internal RAM address 30(hexadecimal) and store it in the
Accumulator. Direct addressing is generally fast since, although the value to be loaded is nt included in the
instruction, it is quickly accessible since it is stored in the 8051s internal RAM. It is also much more flexible

than Immediate Addressing since the value to be loaded is whatever is found at the given address which may
variable.
Also it is important to note that when using direct addressing any instruction that refers to an address
between 00h and 7Fh is referring to the SFR control registers that control the 8051 micro controller itself.
Indirect Addressing:
Indirect addressing is a very powerful addressing mode, which in many cases provides an exceptional
level of flexibility. Indirect addressing is also the only way to access the extra 128 bytes of internal RAM
found on the 8052. Indirect addressing appears as follows:
MOV A, @R0
This instruction causes the 8051 to analyze Special Function Register (SFR) Memory Special
Function Registers (SFRs) are areas of memory that control specific functionality of the 8051 processor. For
example, four SFRs permit access to the 8051s 32 input/output lines. Another SFR allows the user to set the
serial baud rate, control and access timers, and configure the 8051s interrupt system.
Timer 2 Registers:
Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The register pair
(RCAP2H,CAP2L) are the Capture/Reload registers for Timer2 in 16-bit capture mode or 16-bit auto-reload
mode.
Interrupt Registers:
The individual interrupt enable bits are in the IE register . Two priorities can be set for each of the
six interrupt sources in the IP register.

Timer 2
Timer 2 is a 16-bit Timer / Counter that can operate as either a timer or an event counter. The
type of operation is selected by bit C/T2 in. The SFR T2CON Timer 2 has three operating Modes : capture ,
auto-reload ( up or down Counting ) , and baud rate generator . The modes are selected by bits in T2CON.
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented
every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the
oscillator frequency. In the Counter function , the register is incremented in response to a 1-to-0 transition at
its corresponding external input pin , T2. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. Since two machine cycles (24 Oscillator periods ) are required to recognize 1-to-0
transition, the maximum count rate is 1 / 24 of the oscillator frequency . To ensure that a given level is
sampled at least once before it changes , the level should be held for at least one full machine cycle .
Capture Mode
In the capture mode , two options are selected by bit EXEN2 in T2CON . If EXEN2 = 0, Timer 2
is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can be used to generate
an interrupt. If EXEN2 = 1 , Timer 2 performs the same operation , but a 1-to-0 transition at external
input T2EX

also causes the current value

in TH2

and

TL2

to be captured into RCAP2H and

RCAP2L, respectively.
Auto-reload (Up or Down Counter)
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD. Upon reset ,
the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set , Timer 2 can
count up or down , depending on the value of the T2EX pin . In this mode , two options are selected
by bit EXEN2 in T2CON . If EXEN2 = 0 , Timer 2 counts up to 0FFFFH and then sets the TF2 bit
upon overflow . If EXEN2 = 1 , a 16-bitreload can be triggered either by an overflow or by a 1-to-0
transition at external input T2EX.
Baud Rate Generator

Timer 2
It is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON . Note that the
baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter
and Timer 1 is used for the other function .The baud rates in Modes 1 and 3 aredetermined by Timer
2s overflow rate according to the following equation .
Modes 1 and 3 Baud Rates =Timer 2 Overflow Rate
16
The timer operation is different for Timer 2 when it is used as a baud rate generator .Normally ,as a
timer , it increments every machine cycle (at 1/12 the oscillator frequency).As a baud rate generator ,
however, it increments every state time ( at 1/2 the oscillator frequency ) .
Timer 0
Timer 0 functions as either a timer or event counter in four modes of operation . Timer 0 is
controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5 of the TCON register

Mode 0 (13-bit Timer):

Mode 0 configures timer 0 as a 13-bit timer which is set up as an 8-bit timer (TH0 register)
with a modulo 32 pre-scalar implemented with the lower five bits of the TL0 register. The upper three bits
of TL0 register are indeterminate and should be ignored. Pre-scalar overflow increments the TH0 register.
Mode 1 (16-bit Timer):
Mode 1 is the same as Mode 0, except that the Timer register is being run with all 16bits.
Mode 1 configures timer 0 as a 16-bit timer with the TH0 and TL0 registers connected in cascade. The selected
input increments the TL0 register
.
Mode 2 (8-bit Timer with Auto-Reload):
Mode 2 configures timer 0 as an 8-bit timer (TL0 register) that automatically reloads from the TH0
register. TL0 overflow sets TF0 flag in the TCON register and reloads TL0 with the contents of TH0, which is
preset by software.
Mode 3 (Two 8-bit Timers):
Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-bit timers. This mode is
provided for applications requiring an additional 8-bit timer or counter.
Timer 1
Timer 1 is identical to timer 0 , except for mode 3 , which is a hold-count mode .

Mode 3 (Halt)
Placing Timer 1 in mode 3 causes it to halt and hold its count. This can be used to halt Timer 1 when TR1 run
control bit is not available i.e., when Timer 0 is in mode 3.
Baud Rates:
The baud rate in Mode 0 is fixed. The baud rate in Mode 2 depends on the value of bit SMOD in Special
Function Register PCON. If SMOD=0(which is its value on reset), the baud rate is 1/64 the oscillator frequency.
If SMOD=1, the baud rate is 1/32 the oscillator frequency. In the 89S52, the baud rates in Modes 1 and 3 are
determined by the Timer 1 overflow rate. In case of Timer 2, these baud rates can be determined by Timer , or
by timer 2, or by both(one for transmit and the other for receive ).

TCON REGISTER: Timer/counter Control Register

Power Supply
Power supply is a reference to a source of electrical power. A device or system that supplies electrical or
other types of energy to an output load or group of loads is called a power supply unit or PSU. The term is most
commonly applied to electrical energy supplies, less often to mechanical ones, and rarely to others.

This power supply section is required to convert AC signal to DC signal and also to reduce the amplitude
of the signal. The available voltage signal from the mains is 230V/50Hz which is an AC voltage, but the required
is DC voltage (no frequency) with the amplitude of +5V and +12V for various applications.
In this section we have Transformer, Bridge rectifier, are connected serially and voltage regulators for
+5V and +12V (7805 and 7812) via a capacitor (1000F) in parallel are connected parallel as shown in the circuit
diagram below. Each voltage regulator output is again is connected to the capacitors of values (100F, 10F, 1
F, 0.1 F) are connected parallel through which the corresponding output (+5V or +12V) are taken into
consideration.

Circuit Explanation
1. Transformer
A transformer is a device that transfers electrical energy from one circuit to another through inductively
coupled electrical conductors. A changing current in the first circuit (the primary) creates a changing magnetic
field; in turn, this magnetic field induces a changing voltage in the second circuit (the secondary). By adding a
load to the secondary circuit, one can make current flow in the transformer, thus transferring energy from one
circuit to the other.
The secondary induced voltage VS, of an ideal transformer, is scaled from the primary VP by a factor equal
to the ratio of the number of turns of wire in their respective windings:

Basic principle:
The transformer is based on two principles: firstly, that an electric current
can produce a magnetic field (electromagnetism) and secondly that a changing
magnetic field within a coil of wire induces a voltage across the ends of the coil
(electromagnetic induction). By changing the current in the primary coil, it
changes the strength of its magnetic field; since the changing magnetic field
extends into the secondary coil, a voltage is induced across the secondary.
A simplified transformer design is shown below. A current passing through
the primary coil creates a magnetic field. The primary and secondary coils are
wrapped around a core of very high magnetic permeability, such as iron; this
ensures that most of the magnetic field lines produced by the primary current
are within the iron and pass through the secondary coil as well as the primary
coil.

An ideal step-down transformer showing magnetic flux in the core

Induction law:
The voltage induced across the secondary coil may be calculated from Faraday's law of induction, which
states that:

Where VS is the instantaneous voltage, NS is the number of turns in the secondary coil and equals the
magnetic flux through one turn of the coil. If the turns of the coil are oriented perpendicular to the magnetic field
lines, the flux is the product of the magnetic field strength B and the area A through which it cuts. The area is

constant, being equal to the cross-sectional area of the transformer core, whereas the magnetic field varies with
time according to the excitation of the primary. Since the same magnetic flux passes through both the primary and
secondary coils in an ideal transformer, the instantaneous voltage across the primary winding equals

Taking the ratio of the two equations for VS and VP gives the basic equationfor stepping up or stepping
down the voltage

Ideal power equation:

If the secondary coil is attached to a load that allows current to flow, electrical power is transmitted from
the primary circuit to the secondary circuit. Ideally, the transformer is perfectly efficient; all the incoming energy
is transformed from the primary circuit to the magnetic field and into the secondary circuit. If this condition is
met, the incoming electric power must equal the outgoing power.
P incoming= IPVP =P outgoing = ISVS
Giving the ideal transformer equation

Pin-coming = IPVP = Pout-going = ISVS

Giving the ideal transformer equation

If the voltage is increased (stepped up) (VS>VP), then the current is decreased (stepped down) (IS<IP) by
the same factor. Transformers are efficient so this formula is a reasonable approximation.

If the voltage is increased (stepped up) (VS>VP), then the current is decreased (stepped down) (IS<IP) by
the same factor. Transformers are efficient so this formula is a reasonable approximation.
The impedance in one circuit is transformed by the square of the turns ratio. For example, if an impedance
ZS is attached across the terminals of the secondary coil, it appears to the primary circuit to have an impedance of

This relationship is reciprocal, so that the impedance ZP of the primary circuit appears to the secondary to
be

Detailed operation:
The simplified description above neglects several practical factors, in particular the primary current
required to establish a magnetic field in the core, and the contribution to the field due to current in the secondary
circuit.
Models of an ideal transformer typically assume a core of negligible reluctance with two windings of zero
resistance. When a voltage is applied to the primary winding,a small current flows, driving flux around the
magnetic circuit of the core. The current required to create the flux is termed the magnetizing current; since the
ideal core has been assumed to have near-zero reluctance, the magnetizing current is negligible, although still
required to create the magnetic field.
The changing magnetic field induces an electromotive force (EMF) across each winding. Since the ideal
windings have no impedance, they have no associated voltage drop, and so the voltages V P and VS measured at
the terminals of the transformer, are equal to the corresponding EMFs. The primary EMF, acting as it does in
opposition to the primary voltage, is sometimes termed the "back EMF". This is due to Lenz's law which states
that the induction of EMF would always be such that it will oppose development of any such change in magnetic
field.

1)

Bridge Rectifier:

A diode bridge or bridge rectifier is an arrangement of four diodes in a bridge configuration that
provides the same polarity of output voltage for any polarity of input voltage. When used in its most
common application, for conversion of alternating current (AC) input into direct current (DC) output, it is
known as a bridge rectifier. A bridge rectifier provides full-wave rectification from a two-wire AC input,
resulting in lower cost and weight as compared to a center-tapped transformer design, but has two diode
drops rather than one, thus exhibiting reduced efficiency over a center-tapped design for the same
output voltage.
Basic Operation:
When the input connected at the left corner of the diamond is positive with respect to the one connected at
the right hand corner, current flows to the right along the upper colored path to the output, and returns to the input
supply via the lower one.

When the right hand corner is positive relative to the left hand corner, current flows along the upper
colored path and returns to the supply via the lower colored path.

In each case, the upper right output remains positive with respect to the lower right one. Since this is true
whether the input is AC or DC, this circuit not only produces DC power when supplied with AC power: it also

can provide what is sometimes called "reverse polarity protection". That is, it permits normal functioning when
batteries are installed backwards or DC input-power supply wiring "has its wires crossed" (and protects the
circuitry it powers against damage that might occur without this circuit in place).
Prior to availability of integrated electronics, such a bridge rectifier was always constructed from discrete
components. Since about 1950, a single four-terminal component containing the four diodes connected in the
bridge configuration became a standard commercial component and is now available with various voltage and
current ratings.

Output smoothing (Using Capacitor):

For many applications, especially with single phase AC where the full-wave bridge serves to convert an
AC input into a DC output, the addition of a capacitor may be important because the bridge alone supplies an
output voltage of fixed polarity but pulsating magnitude (see diagram above).

The function of this capacitor, known as a reservoir capacitor (aka smoothing capacitor) is to lessen the
variation in (or 'smooth') the rectified AC output voltage waveform from the bridge. One explanation of
'smoothing' is that the capacitor provides a low impedance path to the AC component of the output, reducing the
AC voltage across, and AC current through, the resistive load. In less technical terms, any drop in the output
voltage and current of the bridge tends to be cancelled by loss of charge in the capacitor.
This charge flows out as additional current through the load. Thus the change of load current and voltage
is reduced relative to what would occur without the capacitor. Increases of voltage correspondingly store excess
charge in the capacitor, thus moderating the change in output voltage / current. Also see rectifier output
smoothing.
The simplified circuit shown has a well deserved reputation for being dangerous, because, in some
applications, the capacitor can retain a lethal charge after the AC power source is removed. If supplying a
dangerous voltage, a practical circuit should include a reliable way to safely discharge the capacitor. If the normal
load cant be guaranteed to perform this function, perhaps because it can be disconnected, the circuit should
include a bleeder resistor connected as close as practical across the capacitor. This resistor should consume a
current large enough to discharge the capacitor in a reasonable time, but small enough to avoid unnecessary
power waste.
Because a bleeder sets a minimum current drain, the regulation of the circuit, defined as percentage
voltage change from minimum to maximum load, is improved. However in many cases the improvement is of
insignificant magnitude.
The capacitor and the load resistance have a typical time constant = RC where C and R are the
capacitance and load resistance respectively. As long as the load resistor is large enough so that this time constant
is much longer than the time of one ripple cycle, the above configuration will produce a smoothed DC voltage
across the load.

In some designs, a series resistor at the load side of the capacitor is added. The smoothing can then be
improved by adding additional stages of capacitorresistor pairs, often done only for sub-supplies to critical highgain circuits that tend to be sensitive to supply voltage noise.
The idealized waveforms shown above are seen for both voltage and current when the load on the bridge
is resistive. When the load includes a smoothing capacitor, both the voltage and the current waveforms will be
greatly changed. While the voltage is smoothed, as described above, current will flow through the bridge only
during the time when the input voltage is greater than the capacitor voltage. For example, if the load draws an
average current of n Amps, and the diodes conduct for 10% of the time, the average diode current during
conduction must be 10n Amps. This non-sinusoidal current leads to harmonic distortion and a poor power factor
in the AC supply.
In a practical circuit, when a capacitor is directly connected to the output of a bridge, the bridge diodes
must be sized to withstand the current surge that occurs when the power is turned on at the peak of the AC
voltage and the capacitor is fully discharged. Sometimes a small series resistor is included before the capacitor to
limit this current, though in most applications the power supply transformer's resistance is already sufficient.
Output can also be smoothed using a choke and second capacitor. The choke tends to keep the current
(rather than the voltage) more constant. Due to the relatively high cost of an effective choke compared to a
resistor and capacitor this is not employed in modern equipment.
Some early console radios created the speaker's constant field with the current from the high voltage ("B
+") power supply, which was then routed to the consuming circuits, (permanent magnets were considered too
weak for good performance) to create the speaker's constant magnetic field. The speaker field coil thus performed
2 jobs in one: it acted as a choke, filtering the power supply, and it produced the magnetic field to operate the
speaker.
2)

Voltage Regulator :

Voltages in the same circuit,if necessary. A voltage regulator is an electrical regulator designed to automatically
maintain a constant voltage level.
The 78xx (also sometimes known as LM78xx) series of devices is a family of self-contained fixed linear
voltage regulator integrated circuits. The 78xx family is a very popular choice for many electronic circuits which
require a regulated power supply, due to their ease of use and relative cheapness. When specifying individual ICs
within this family, the xx is replaced with a two-digit number, which indicates the output voltage the particular
device is designed to provide (for example, the 7805 has a 5 volt output, while the 7812 produces 12 volts). The
78xx line is positive voltage regulators, meaning that they are designed to produce a voltage that is positive

relative to a common ground. There is a related line of 79xx devices which are complementary negative voltage
regulators. 78xx and 79xx ICs can be used in combination to provide both positive and negative supply
78xx ICs have three terminals and are most commonly found in the TO220 form factor, although smaller
surface-mount and larger TrO3 packages are also available from some manufacturers. These devices typically
support an input voltage which can be anywhere from a couple of volts over the intended output voltage, up to a
maximum of 35 or 40 volts, and can typically provide up to around 1 or 1.5 amps of current (though smaller or
larger packages may have a lower or higher current rating).

GSM (Global System for Mobile communications)

Introduction:
GSM (Global System for Mobile communications) is a cellular network, which means that mobile phones
connect to it by searching for cells in the immediate vicinity. GSM networks operate in four different frequency
ranges. Most GSM networks operate in the 900 MHz or 1800 MHz bands. Some countries in the Americas use
the 850 MHz and 1900 MHz bands because the 900 and 1800 MHz frequency bands were already allocated.
The rarer 400 and 450 MHz frequency bands are assigned in some countries, where these frequencies
were previously used for first-generation systems.
GSM-900 uses 890915 MHz to send information from the mobile station to the base station (uplink) and
935960 MHz for the other direction (downlink), providing 124 RF channels (channel numbers 1 to 124) spaced
at 200 kHz. Duplex spacing of 45 MHz is used. In some countries the GSM-900 band has been extended to cover
a larger frequency range. This 'extended GSM', E-GSM, uses 880915 MHz (uplink) and 925960 MHz
(downlink), adding 50 channels (channel numbers 975 to 1023 and 0) to the original GSM-900 band. Time

division multiplexing is used to allow eight full-rate or sixteen half-rate speech channels per radio frequency
channel. There are eight radio timeslots (giving eight burst periods) grouped into what is called a TDMA frame.
Half rate channels use alternate frames in the same timeslot. The channel data rate is 270.833kbit/s, and the frame
duration is 4.615ms.
GSM Advantages:
GSM also pioneered a low-cost, to the network carrier, alternative to voice calls, the Short t message
service (SMS, also called "text messaging"), which is now supported on other mobile standards as well. Another
advantage is that the standard includes one worldwide Emergency telephone number, 112. This makes it easier for
international travelers to connect to emergency services without knowing the local emergency number.
The GSM Network:
GSM provides recommendations, not requirements. The GSM specifications define the functions and interface
requirements in detail but do not address the hardware. The GSM network is divided into three major systems: the
switching system (SS), the base station system (BSS), and the operation and support system (OSS).

The switching system (SS) is responsible for performing call processing and subscriber-related functions. The
switching system includes the following functional units.

Home location register (HLR): The HLR is a database used for storage and management of
subscriptions. The HLR is considered the most important database, as it stores permanent data about
subscribers, including a subscriber's service profile, location information, and activity status. When an
individual buys a subscription from one of the PCS operators, he or she is registered in the HLR of that
operator.

Mobile services switching center (MSC): The MSC performs the telephony switching functions of the
system. It controls calls to and from other telephone and data systems. It also performs such functions as
toll ticketing, network interfacing, common channel signaling, and others.

Visitor location register (VLR): The VLR is a database that contains temporary information about
subscribers that is needed by the MSC in order to service visiting subscribers. The VLR is always
integrated with the MSC. When a mobile station roams into a new MSC area, the VLR connected to that
MSC will request data about the mobile station from the HLR. Later, if the mobile station makes a call,
the VLR will have the information needed for call setup without having to interrogate the HLR each time.

Authentication center (AUC): A unit called the AUC provides authentication and encryption parameters
that verify the user's identity and ensure the confidentiality of each call. The AUC protects network
operators from different types of fraud found in today's cellular world.

Equipment identity register (EIR): The EIR is a database that contains information about the identity of
mobile equipment that prevents calls from stolen, unauthorized, or defective mobile stations. The AUC
and EIR are implemented as stand-alone nodes or as a combined AUC/EIR node.

The Base Station System (BSS):

All radio-related functions are performed in the BSS, which consists of base station controllers (BSCs) and
the base transceiver stations (BTSs).

BSC: The BSC provides all the control functions and physical links between the MSC and BTS. It is a
high-capacity switch that provides functions such as handover, cell configuration data, and control of
radio frequency (RF) power levels in base transceiver stations. A number of BSCs are served by an MSC.

BTS: The BTS handles the radio interface to the mobile station. The BTS is the radio equipment
(transceivers and antennas) needed to service each cell in the network. A group of BTSs are controlled by
a BSC.

The Operation and Support System:

The operations and maintenance center (OMC) is connected to all equipment in the switching system and
to the BSC. The implementation of OMC is called the operation and support system (OSS). The OSS is the

functional entity from which the network operator monitors and controls the system. The purpose of OSS is to
offer the customer cost-effective support for centralized, regional and local operational and maintenance activities
that are required for a GSM network. An important function of OSS is to provide a network overview and support
the maintenance activities of different operation and maintenance organizations.
Additional Functional Elements:

Message center (MXE): The MXE is a node that provides integrated voice, fax, and data messaging.
Specifically, the MXE handles short message service, cell broadcast, voice mail, fax mail, e-mail, and
notification.

Mobile service node (MSN): The MSN is the node that handles the mobile intelligent network (IN)
services.

Gateway mobile services switching center (GMSC): A gateway is a node used to interconnect two
networks. The gateway is often implemented in an MSC. The MSC is then referred to as the GMSC.

GSM inter-working unit (GIWU): The GIWU consists of both hardware and software that provides an
interface to various networks for data communications. Through the GIWU, users can alternate between
speech and data during the same call. The GIWU hardware equipment is physically located at the
MSC/VLR.

GSM Network Areas:

The GSM network is made up of geographic areas. As shown in bellow figure, these areas include cells, location
areas (LAs), MSC/VLR service areas, and public land mobile network (PLMN) areas.

Location Areas:
The cell is the area given radio coverage by one base transceiver station. The GSM network identifies
each cell via the cell global identity (CGI) number assigned to each cell. The location area is a group of cells. It is
the area in which the subscriber is paged. Each LA is served by one or more base station controllers, yet only by a
single MSC Each LA is assigned a location area identity (LAI) number.
MSC/VLR service areas:
An MSC/VLR service area represents the part of the GSM network that is covered by one MSC and
which is reachable, as it is registered in the VLR of the MSC.
PLMN service areas:
The PLMN service area is an area served by one network operator.

GSM Specifications:
Specifications for different personal communication services (PCS) systems vary among the different PCS
networks. Listed below is a description of the specifications and characteristics for GSM.

Frequency band: The frequency range specified for GSM is 1,850 to 1,990 MHz (mobile station to base
station).

Duplex distance: The duplex distance is 80MHz. Duplex distance is the distance between the uplink and
downlink frequencies. A channel has two frequencies, 80 MHz apart.

Channel separation: The separation between adjacent carrier frequencies. In GSM, this is 200 kHz.

Modulation: Modulation is the process of sending a signal by changing the characteristics of a carrier
frequency. This is done in GSM via Gaussian minimum shift keying (GMSK).

Transmission rate: GSM is a digital system with an over-the-air bit rate of 270 kbps.

Access method: GSM utilizes the time division multiple access (TDMA) concept. TDMA is a technique
in which several different calls may share the same carrier. Each call is assigned a particular time slot.

Speech coder: GSM uses linear predictive coding (LPC). The purpose of LPC is to reduce the bit rate.
The LPC provides parameters for a filter that mimics the vocal tract. The signal passes through this filter,
leaving behind a residual signal. Speech is encoded at 13 kbps.

GSM Subscriber Services:

Dual-tone multi frequency (DTMF):

DTMF is a tone signaling scheme often used for various control purposes via the telephone network, such
as remote control of an answering machine. GSM supports full-originating DTMF.
Facsimile group III:
GSM supports CCITT Group 3 facsimile. As standard fax machines are designed to be connected to a
telephone using analog signals, a special fax converter connected to the exchange is used in the GSM system.
This enables a GSMconnected fax to communicate with any analog fax in the network.
Short message services:
A convenient facility of the GSM network is the short message service. A message consisting of a
maximum of 160 alphanumeric characters can be sent to or from a mobile station. This service can be viewed as
an advanced form of alphanumeric paging with a number of advantages. If the subscriber's mobile unit is
powered off or has left the coverage area, the message is stored and offered back to the subscriber when the
mobile is powered on or has reentered the coverage area of the network. This function ensures that the message
will be received.
Cell broadcast:
A variation of the short message service is the cell broadcast facility. A message of a maximum of 93
characters can be broadcast to all mobile subscribers in a certain geographic area. Typical applications include
traffic congestion warnings and reports on accidents.

Voice mail:
This service is actually an answering machine within the network, which is controlled by the subscriber.
Calls can be forwarded to the subscriber's voice-mail box and the subscriber checks for messages via a personal
security code.
Fax mail:
With this service, the subscriber can receive fax messages at any fax machine. The messages are stored in
a service center from which they can be retrieved by the subscriber via a personal security code to the desired fax
number

Supplementary Services:
GSM supports a comprehensive set of supplementary services that can complement and support both
telephony and data services.
Call forwarding:
This service gives the subscriber the ability to forward incoming calls to another number if the called
mobile unit is not reachable, if it is busy, if there is no reply, or if call forwarding is allowed unconditionally.
Barring of outgoing calls:
This service makes it possible for a mobile subscriber to prevent all outgoing calls.
Barring of incoming calls:
This function allows the subscriber to prevent incoming calls. The following two conditions for incoming
call barring exist barring of all incoming calls and barring of incoming calls when roaming outside the home
PLMN.
Advice of charge (AOC):
The AOC service provides the mobile subscriber with an estimate of the call charges. There are two types
of AOC information: one that provides the subscriber with an estimate of the bill and one that can be used for
immediate charging purposes. AOC for data calls is provided on the basis of time measurements.
Call hold:
This service enables the subscriber to interrupt an ongoing call and then subsequently reestablish the call.
The call hold service is only applicable to normal telephony.
Call waiting:
This service enables the mobile subscriber to be notified of an incoming call during a conversation. The
subscriber can answer, reject, or ignore the incoming call. Call waiting is applicable to all GSM
telecommunications services using a circuit-switched connection.
Multiparty service:
The multiparty service enables a mobile subscriber to establish a multiparty conversationthat is, a
simultaneous conversation between three and six subscribers. This service is only applicable to normal telephony.
Calling line identification presentation/restriction:

These services supply the called party with the integrated services digital network (ISDN) number of the
calling party. The restriction service enables the calling party to restrict the presentation. The restriction overrides
the presentation.
Closed user groups (CUGs):
CUGs are generally comparable to a PBX. They are a group of subscribers who are capable of only
calling themselves and certain numbers
Main AT commands:
"AT command set for GSM Mobile Equipment describes the Main AT commands to communicate via a
serial interface with the GSM subsystem of the phone.
AT commands are instructions used to control a modem. AT is the abbreviation of Attention. Every
command line starts with "AT" or "at". That's why modem commands are called AT commands. Many of the
commands that are used to control wired dial-up modems, such as ATD (Dial), ATA (Answer), ATH (Hook
control) and ATO (Return to online data state), are also supported by GSM/GPRS modems and mobile phones.
Besides this common AT command set, GSM/GPRS modems and mobile phones support an AT command set that
is specific to the GSM technology, which includes SMS-related commands like AT+CMGS (Send SMS message),
AT+CMSS (Send SMS message from storage), AT+CMGL (List SMS messages) and AT+CMGR (Read SMS
messages).
Note that the starting "AT" is the prefix that informs the modem about the start of a command line. It is
not part of the AT command name. For example, D is the actual AT command name in ATD and +CMGS is the
actual AT command name in AT+CMGS. However, some books and web sites use them interchangeably as the
name of an AT command.
Here are some of the tasks that can be done using AT commands with a GSM/GPRS modem or mobile phone:

Get basic information about the mobile phone or GSM/GPRS modem. For example, name of
manufacturer (AT+CGMI), model number (AT+CGMM), IMEI number (International Mobile Equipment
Identity) (AT+CGSN) and software version (AT+CGMR).

Get basic information about the subscriber. For example, MSISDN (AT+CNUM) and IMSI number
(International Mobile Subscriber Identity) (AT+CIMI).

Get the current status of the mobile phone or GSM/GPRS modem. For example, mobile phone activity
status (AT+CPAS), mobile network registration status (AT+CREG), radio signal strength (AT+CSQ),
battery charge level and battery charging status (AT+CBC).

Establish a data connection or voice connection to a remote modem (ATD, ATA, etc).

Send and receive fax (ATD, ATA, AT+F*).

Send (AT+CMGS, AT+CMSS), read (AT+CMGR, AT+CMGL), write (AT+CMGW) or delete

(AT+CMGD) SMS messages and obtain notifications of newly received SMS messages (AT+CNMI).

Read (AT+CPBR), write (AT+CPBW) or search (AT+CPBF) phonebook entries.

Perform security-related tasks, such as opening or closing facility locks (AT+CLCK), checking whether a
facility

is

locked

(AT+CLCK)

and

changing

passwords

(AT+CPWD).

(Facility lock examples: SIM lock [a password must be given to the SIM card every time the mobile
phone is switched on] and PH-SIM lock [a certain SIM card is associated with the mobile phone. To use
other SIM cards with the mobile phone, a password must be entered.])

Control the presentation of result codes / error messages of AT commands. For example, you can control
whether to enable certain error messages (AT+CMEE) and whether error messages should be displayed in
numeric format or verbose format (AT+CMEE=1 or AT+CMEE=2).

Get or change the configurations of the mobile phone or GSM/GPRS modem. For example, change the
GSM network (AT+COPS), bearer service type (AT+CBST), radio link protocol parameters (AT+CRLP),
SMS center address (AT+CSCA) and storage of SMS messages (AT+CPMS).

Save and restore configurations of the mobile phone or GSM/GPRS modem. For example, save
(AT+CSAS) and restore (AT+CRES) settings related to SMS messaging such as the SMS center address.

Introduction:
The Global Positioning System (GPS) is the only fully functional Global Navigation Satellite System
(GNSS). The GPS uses a constellation of between 24 and 32 Medium Earth Orbit satellites that transmit precise
microwave signals, which enable GPS receivers to determine their location, speed,. GPS was developed by the
United States Department of Defense. Its official name is NAVSTAR-GPS. Although NAVSTAR-GPS is not an
acronym, a few backronyms have been created for it. The GPS satellite constellation is managed by the United
States Air Force 50th Space Wing.
Global Positioning System is an earth-orbiting-satellite based system that provides signals available
anywhere on or above the earth, twenty-four hours a day, which can be used to determine precise time and the
position of a GPS receiver in three dimensions. GPS is increasingly used as an input for Geographic Information
Systems particularly for precise positioning of geospatial data and the collection of data in the field.Precise

positioning is possible using GPS receivers at reference locations providing corrections and relative positioning
data for remote receivers. Time and frequency dissemination, based on the precise clocks on board the SVs and
controlled by the monitor stations, is another, use for GPS. Astronomical observatories telecommunications
facilities and laboratory standards can be set to precise time signals or controlled to accurate frequencies by
special purpose GPS receivers.
Similar satellite navigation systems include the Russian GLONASS (incomplete as of 2008), the
upcoming European Galileo positioning system, the proposed COMPASS navigation system of China, and
IRNSS of India.
Following the shooting down of Korean Air Lines Flight 007 in 1983, President Ronald Reagan issued a
directive making the system available free for civilian use as a common good. Since then, GPS has become a
widely used aid to navigation worldwide, and a useful tool for map-making, land surveying, commerce, scientific
uses, and hobbies such as geocaching. GPS also provides a precise time reference used in many applications
including scientific study of earthquakes, and synchronization of telecommunications networks.

Basic concept of GPS operation

A GPS receiver calculates its position by carefully timing the signals sent by the constellation of GPS
satellites high above the Earth. Each satellite continually transmits messages containing the time the message was
sent, a precise orbit for the satellite sending the message (the ephemeris), and the general system health and rough
orbits of all GPS satellites (the almanac). These signals travel at the speed of light through outer space, and
slightly slower through the atmosphere. The receiver uses the arrival time of each message to measure the
distance to each satellite, from which it determines the position of the receiver (conceptually the intersection of
spheres - see trilateration ) The resulting coordinates are converted to more user-friendly forms such as latitude
and longitude, or location on a map, then displayed to the user.
It might seem that three satellites would be enough to solve for a position, since space has three
dimensions. However, a three satellite solution requires the time be known to a nanosecond or so, far better than

any non-laboratory clock can provide. Using four or more satellites allows the receiver to solve for time as well
as geographical position, eliminating the need for a super accurate clock. In other words, the receiver uses four
measurements to solve for four variables: x, y, z, and t. While many GPS applications have no particular use for
this (very accurate) time, it is used in some GPS applications such as time transfer, and it is the only variable of
interest in some applications, such as traffic signal timing.
Although four satellites are required for normal operation, fewer may be needed in some special cases. If
one variable is already known (for example, a ship or plane may already know its altitude), a receiver can
determine its position using only three satellites. Also, in practice, receivers use additional clues (Doppler shift of
satellite signals, last known position, dead reckoning, inertiral navigation, and so on) to give degraded answers
when fewer than four satellites are visible.

Position calculation introduction

To provide an introductory description of how a GPS receiver works, errors will be ignored in this section.
Using messages received from a minimum of four visible satellites, a GPS receiver is able to determine the
satellite positions and time sent.
The x, y, and z components of position and the time sent are designated as
where the
subscript i denotes the satellite number and has the value 1, 2, 3, or 4. Knowing the indicated time the message
was received

, the GPS receiver can compute the indicated transit time,

. of the message.

Assuming the message traveled at the speed of light, c, the distance travelled,

can be computed as

. Knowing the distance from GPS receiver to a satellite and the position of a satellite implies that the
GPS receiver is on the surface of a sphere centered at the position of a satellite. Thus we know that the indicated
position of the GPS receiver is at or near the intersection of the surfaces of four spheres. In the ideal case of no
errors, the GPS receiver will be at an intersection of the surfaces of four spheres. The surfaces of two spheres if
they intersect in more than one point intersect in a circle. A figure, two sphere surfaces intersecting in a circle, is
shown below.

Two Sphere Surfaces Intersecting in a Circle

The article, trilateration, shows mathematically that two spheres intersecting in more than one point
intersect in a circle.

Surface of Sphere Intersecting a Circle (not disk) at Two Points

A circle and sphere surface in most cases of practical interest intersects at
two points, although it is conceivable that they could intersect in 0 or 1 point.
Another figure, Surface of Sphere Intersecting a Circle (not disk) at Two Points, is
shown to aid in visualizing this intersection. Again trilateration clearly show this
mathematically. The correct position of the GPS receiver is the one that is closest to
the fourth sphere.
Correcting GPS clock
The method of calculating position for the case of no errors has been explained. One of the most important
errors is the error in the GPS receiver clock. Because of the very large value of c, the speed of light, the estimated
distances from the GPS receiver to the satellites, the pseudo ranges, are very sensitive to errors in the GPS
receiver clock. This seems to suggest that an extremely accurate and expensive clock is required for the GPS
receiver to work. On the other hand, manufacturers would like to make an inexpensive GPS receiver which can
be mass marketed. The manufacturers were thus faced with a difficult design problem. The technique that solves
this problem is based on the way sphere surfaces intersect in the GPS problem.
It is likely the surfaces of the three spheres intersect since the circle of intersection of the first two spheres
is normally quite large and thus the third sphere surface is likely to intersect this large circle. It is very unlikely
that the surface of the sphere corresponding to the fourth satellite will intersect either of the two points of
intersection of the first three since any clock error could cause it to miss intersecting a point. However the
distance from the valid estimate of GPS receiver position to the surface of the sphere corresponding to the fourth
satellite can be used to compute a clock correction. Let denote the distance from the valid estimate of GPS
receiver position to the fourth satellite and let
denote the pseudo range of the fourth satellite. Let
. Note that

is the distance from the computed GPS receiver position to the surface of the

sphere corresponding to the fourth satellite. Thus the quotient,

, provides an estimate of:
(correct time) - (time indicated by the receiver's on-board clock)
and the GPS receiver clock can be advanced if is positive or delayed if is negative.
System segmentation
The current GPS consists of three major segments. These are the space segment (SS), a control segment
(CS), and a user segment (US).
Space segment

A visual example of the GPS constellation in motion with the Earth rotating. Notice how the number of
satellites in view from a given point on the Earth's surface, in this example at 45N, changes with time.
The space segment (SS) comprises the orbiting GPS satellites, or Space Vehicles (SV) in GPS parlance.
The GPS design originally called for 24 SVs, eight each in three circular orbital planes, but this was modified to
six planes with four satellites each. The orbital

Figure 11: A GPS satellite

3.2.2.2 The communication link budget analysis

planes are centered on the Earth, not rotating with respect to the distant stars. The six planes have approximately
55 inclination (tilt relative to Earth's equator) and are separated by 60 right ascension of the ascending node
(angle along the equator from a reference point to the orbit's intersection). The orbits are arranged so that at least
six satellites are always within line of sight from almost everywhere on Earth's surface.
Orbiting at an altitude of approximately 20,200 kilometers (12,600 miles or 10,900 nautical miles; orbital
radius of 26,600 km (16,500 mi or 14,400 NM)), each SV makes two complete orbits each sidereal day. The
ground track of each satellite therefore repeats each (sidereal) day. This was very helpful during development,
since even with just four satellites, correct alignment means all four are visible from one spot for a few hours each
day. For military operations, the ground track repeat can be used to ensure good coverage in combat zones.
As of March 2008, there are 31 actively broadcasting satellites in the GPS constellation. The additional
satellites improve the precision of GPS receiver calculations by providing redundant measurements. With the
increased number of satellites, the constellation was changed to a nonuniform arrangement. Such an arrangement
was shown to improve reliability and availability of the system, relative to a uniform system, when multiple
satellites fail.
Some reports in 2008 indicated that the 32nd satellite was causing difficulties for some GPS receivers.
Control segment
The flight paths of the satellites are tracked by US Air Force monitoring stations in Hawaii, Kwajalein,
Ascension Island, Diego Garcia, and Colorado Springs, Colorado, along with monitor stations operated by the
National Geospatial-Intelligence Agency (NGA). The tracking information is sent to the Air Force Space
Command's master control station at Schriever Air Force Base in Colorado Springs, which is operated by the 2nd
Space Operations Squadron (2 SOPS) of the United States Air Force (USAF). Then 2 SOPS contacts each GPS
satellite regularly with a navigational update (using the ground antennas at Ascension Island, Diego Garcia,
Kwajalein, and Colorado Springs). These updates synchronize the atomic clocks on board the satellites to within
a few nanoseconds of each other, and adjust the ephemeris of each satellite's internal orbital model. The updates
are created by a Kalman filter which uses inputs from the ground monitoring stations, space weather information,
and various other inputs.
Satellite maneuvers are not precise by GPS standards. So to change the orbit of a satellite, the satellite
must be marked 'unhealthy', so receivers will not use it in their calculation. Then the maneuver can be carried out,
and the resulting orbit tracked from the ground. Then the new ephemeris is uploaded and the satellite marked
healthy again.

User segment

PS receivers come in a variety of formats, from devices integrated into cars, phones, and watches, to
dedicated devices such as those shown here from manufacturers Trimble, Garmin and Leica (left to right).
The user's GPS receiver is the user segment (US) of the GPS. In general, GPS receivers are composed of
an antenna, tuned to the frequencies transmitted by the satellites, receiver-processors, and a highly-stable clock
(often a crystal oscillator). They may also include a display for providing location and speed information to the
user. A receiver is often described by its number of channels: this signifies how many satellites it can monitor
simultaneously. Originally limited to four or five, this has progressively increased over the years so that, as of
2007, receivers typically have between 12 and 20 channels.

A typical OEM GPS receiver module measuring 1517 mm.

GPS receivers may include an input for differential corrections, using the RTCM SC-104 format. This is
typically in the form of a RS-232 port at 4,800 bit/s speed. Data is actually sent at a much lower rate, which limits
the accuracy of the signal sent using RTCM. Receivers with internal DGPS receivers can outperform those using
external RTCM data. As of 2006, even low-cost units commonly include Wide Area Augmentation System
(WAAS) receivers.

A typical GPS receiver with integrated antenna.

Many GPS receivers can relay position data to a PC or other device using the NMEA 0183 protocol, or the
newer and less widely used NMEA 2000. Although these protocols are officially defined by the NMEA,
references to the these protocols have been compiled from public records, allowing open source tools like gpsd to
read the protocol without violating intellectual property laws. Other proprietary protocols exist as well, such as
the SiRF and MTK protocols. Receivers can interface with other devices using methods including a serial
connection, USB or Bluetooth.
Navigation signals

GPS broadcast signal

Each GPS satellite continuously broadcasts a Navigation Message at 50 bit/s giving the time-of-week,
GPS week number and satellite health information (all transmitted in the first part of the message), an ephemeris
(transmitted in the second part of the message) and an almanac (later part of the message). The messages are sent
in frames, each taking 30 seconds to transmit 1500 bits.
The first 6 seconds of every frame contains data describing the satellite clock and its relationship to GPS
time. The next 12 seconds contain the ephemeris data, giving the satellite's own precise orbit. The ephemeris is
updated every 2 hours and is generally valid for 4 hours, with provisions for updates every 6 hours or longer in
non-nominal conditions. The time needed to acquire the ephemeris is becoming a significant element of the delay
to first position fix, because, as the hardware becomes more capable, the time to lock onto the satellite signals
shrinks, but the ephemeris data requires 30 seconds (worst case) before it is received, due to the low data
transmission rate.
The almanac consists of coarse orbit and status information for each satellite in the constellation, an
ionosphere model, and information to relate GPS derived time to Coordinated Universal Time (UTC). A new part
of the almanac is received for the last 12 seconds in each 30 second frame. Each frame contains 1/25th of the
almanac, so 12.5 minutes are required to receive the entire almanac from a single satellite. The almanac serves
several purposes. The first is to assist in the acquisition of satellites at power-up by allowing the receiver to
generate a list of visible satellites based on stored position and time, while an ephemeris from each satellite is
needed to compute position fixes using that satellite. In older hardware, lack of an almanac in a new receiver
would cause long delays before providing a valid position, because the search for each satellite was a slow
process. Advances in hardware have made the acquisition process much faster, so not having an almanac is no
longer an issue. The second purpose is for relating time derived from the GPS (called GPS time) to the
international time standard of UTC. Finally, the almanac allows a single frequency receiver to correct for
ionospheric error by using a global ionospheric model. The corrections are not as accurate as augmentation
systems like WAAS or dual frequency receivers. However it is often better than no correction since ionospheric
error is the largest error source for a single frequency GPS receiver. An important thing to note about navigation
data is that each satellite transmits only its own ephemeris, but transmits an almanac for all satellites.
Each satellite transmits its navigation message with at least two distinct spread spectrum codes: the
Coarse / Acquisition (C/A) code, which is freely available to the public, and the Precise (P) code, which is
usually encrypted and reserved for military applications. The C/A code is a 1023 length Gold code at 1.023
million chips per second so that it repeats every millisecond. As pointed out in a chip is essentially the same thing
as a bit and chips per second are the same as bits per second. The justification for coming up with this new term,
chip, is that in some cases a sequence of bits is used as a type of Modulation and contains no information.
Each satellite has its own C/A code so that it can be uniquely identified and received separately from the
other satellites transmitting on the same frequency. The P-code is a 10.23 mega chip per second PRN code that
repeats only every week. When the "anti-spoofing" mode is on, as it is in normal operation, the P code is
encrypted by the Y-code to produce the P(Y) code, which can only be decrypted by units with a valid decryption
key. Both the C/A and P(Y) codes impart the precise time-of-day to the user.
Position determination
Before providing a more mathematical description of position calculation, the introductory material on
these topics is reviewed. To describe the basic concept of how a GPS receiver works, the errors are at first
ignored. Using messages received from four satellites, the GPS receiver is able to determine the satellite positions

and time sent. The x, y, and z components of position and the time sent are designated as
where the
subscript i denotes which satellite and has the value 1, 2, 3, or 4. Knowing the indicated time the message was
received

, the GPS receiver can compute the indicated transit time,

. of the message. Assuming the

message traveled at the speed of light, c, the distance traveled, can be computed as
. Knowing the
distance from GPS receiver to a satellite and the position of a satellite implies that the GPS receiver is on the
surface of a sphere centered at the position of a satellite. Thus we know that the indicated position of the GPS
receiver is at or near the intersection of the surfaces of four spheres. In the ideal case of no errors, the GPS
receiver will be at an intersection of the surfaces of four spheres. The surfaces of two spheres if they intersect in
more than one point intersect in a circle. A figure, Two Sphere Surfaces Intersecting in a Circle, is shown below
depicting this which hopefully will aid the reader in visualizing this intersection.

Two Sphere Surfaces Intersecting in a Circle

Three dimensional co-ordinate system

The article, trilateration, shows mathematically how the equation for a circle is determined. A circle and
sphere surface in most cases of practical interest intersects at two points, although it is conceivable that they could
intersect in 0 or 1 point. Another figure, Surface of Sphere Intersecting a Circle (not disk) at Two Points, is shown
below to aid in visualizing this intersection. Again trilateration clearly show this mathematically. The correct
position of the GPS receiver is the one that is closest to the fourth sphere. This paragraph has described the basic
concept of GPS while ignoring errors. The next problem is how to process the messages when errors are present.

Surface of Sphere Intersecting a Circle (not disk) at Two Points

Let denote the clock error or bias, the amount by which the receiver's clock is slow. The GPS receiver
has four unknowns, the three components of GPS receiver position and the clock bias
of the sphere surfaces are given by:

. The equation

Another useful form of these equations is in terms of the pseudoranges, which are simply the ranges
approximated based on GPS receiver clock's indicated (i.e. uncorrected) time so that
the equations becomes:
.

. Then

Two of the most important methods of computing GPS receiver position and clock bias are (1) trilateration
followed by one dimensional numerical root finding and (2) multidimensional Newton-Raphson. These two
methods along with their advantages are discussed.

Solve by trilateration followed by one dimensional numerical root finding. This method involves using
Trilateration to determine the intersection of the surfaces of three spheres. It is clearly shown in
trilateration that the surfaces of three spheres intersect in 0, 1, or 2 points. In the usual case of two
intersections, the solution which is nearest the surface of the sphere corresponding to the fourth satellite is
chosen. The surface of the earth can also sometimes be used instead, especially in the case of civilian GPS
receivers since it is illegal in the United States to track vehicles of more than 60,000 feet in altitude. The
bias, is then computed based on the distance from the solution to the surface of the sphere corresponding
to the fourth satellite. Using an updated received time based on this bias, new spheres are computed and
the process is repeated. One advantage of this method is that it involves one dimensional as opposed to
multidimensional numerical root finding.

Utilize

multidimensional

Newton-Raphson.

Linearize

around

an

approximate

solution

say

from iteration k, then solve four linear equations derived from the quadratic
equations above to obtain
. The radii are large and so the sphere
surfaces are close to flat. This near flatness may cause the iterative procedure to converge rapidly in the
case where is near the correct value and the primary change is in the values of
, since in
this case the problem is merely to find the intersection of nearly flat surfaces and thus close to a linear
problem. However when is changing significantly, this near flatness does not appear to be advantageous
in producing rapid convergence, since in this case these near flat surfaces will be moving as the spheres
expand and contract. This possible fast convergence is an advantage of this method. Also it has been
claimed that this method is the "typical" method used by GPS receivers. A disadvantage of this method is
that according to, "There are no good general methods for solving systems of more than one nonlinear
equation."

Other methods include: Solve for the intersection of the expanding signals form light cones in 4-space
cones, Solve for the intersection of hyperboloids determined by the time difference of signals received
from satellites utilizing multilateration, Solve the equations in accordance with.

More than four satellites should be used, if available. This results in an over-determined system of equations
with no unique solution, which must be solved by least-squares or a similar technique. If all visible satellites are
used, the results are always at least as good as using the four best, and usually better. Also the errors in results can
be estimated through the residuals. With each combination of four or more satellites, a geometric dilution of
precision (GDOP) vector can be calculated, based on the relative sky positions of the satellites used. As more
satellites are picked up, pseudoranges from more combinations of four satellites can be processed to add more
estimates to the location and clock offset. The receiver then determines which combinations to use and how to
calculate the estimated position by determining the weighted average of these positions and clock offsets. After
the final location and time are calculated, the location is expressed in a specific coordinate system such as latitude
and longitude, using the WGS 84 geodetic datum or a local system specific to a country.

Finally, results from other positioning systems such as GLONASS or the upcoming Galileo can be used in the
fit, or used to double check the result. (By design, these systems use the same bands; so much of the receiver
circuitry can be shared, though the decoding is different.)
P(Y) code
Calculating a position with the P(Y) signal is generally similar in concept, assuming one can decrypt it.
The encryption is essentially a safety mechanism: if a signal can be successfully decrypted, it is reasonable to
assume it is a real signal being sent by a GPS satellite. In comparison, civil receivers are highly vulnerable to
spoofing since correctly formatted C/A signals can be generated using readily available signal generators. RAIM
features do not protect against spoofing, since RAIM only checks the signals from a navigational perspective.
Applications
The Global Positioning System, while originally a military project is considered a dual-use technology,
meaning it has significant applications for both the military and the civilian industry.
Military
The military applications of GPS span many purposes:

Navigation: GPS allows soldiers to find objectives in the dark or in unfamiliar territory, and to coordinate
the movement of troops and supplies. The GPS-receivers commanders and soldiers use are respectively
called the Commanders Digital Assistant and the Soldier Digital Assistant.

Target tracking: Various military weapons systems use GPS to track potential ground and air targets before
they are flagged as hostile. These weapon systems pass GPS co-ordinates of targets to precision-guided
munitions to allow them to engage the targets accurately. Military aircraft, particularly those used in airto-ground roles use GPS to find targets (for example, gun camera video from AH-1 Cobras in Iraq show
GPS co-ordinates that can be looked up in Google Earth).

Missile and projectile guidance: GPS allows accurate targeting of various military weapons including
ICBMs, cruise missiles and precision-guided munitions. Artillery projectiles with embedded GPS
receivers able to withstand accelerations of 12,000G have been developed for use in 155 mm howitzers.

Search and Rescue: Downed pilots can be located faster if they have a GPS receiver.

Reconnaissance and Map Creation: The military use GPS extensively to aid mapping and reconnaissance.

The GPS satellites also carry a set of nuclear detonation detectors consisting of an optical sensor (Ysensor), an X-ray sensor, a dosimeter, and an Electro-Magnetic Pulse (EMP) sensor (W-sensor) which
form a major portion of the United States Nuclear Detonation Detection System.

Civilian

This antenna is mounted on the roof of a hut containing a scientific experiment needing precise timing.
Many civilian applications benefit from GPS signals, using one or more of three basic components of the
GPS: absolute location, relative movement, and time transfer.
The ability to determine the receiver's absolute location allows GPS receivers to perform as a surveying
tool or as an aid to navigation. The capacity to determine relative movement enables a receiver to calculate local
velocity and orientation, useful in vessels or observations of the Earth. Being able to synchronize clocks to
exacting standards enables time transfer, which is critical in large communication and observation systems. An
example is CDMA digital cellular. Each base station has a GPS timing receiver to synchronize its spreading codes
with other base stations to facilitate inter-cell hand off and support hybrid GPS/CDMA positioning of mobiles for
emergency calls and other applications. Finally, GPS enables researchers to explore the Earth environment
including the atmosphere, ionosphere and gravity field. GPS survey equipment has revolutionized tectonics by
directly measuring the motion of faults in earthquakes.
To help prevent civilian GPS guidance from being used in an enemy's military or improvised weaponry,
the US Government controls the export of civilian receivers. A US-based manufacturer cannot generally export a
GPS receiver unless the receiver contains limits restricting it from functioning when it is simultaneously (1) at an
altitude above 18 kilometers (60,000 ft) and (2) traveling at over 515 m/s (1,000 knots). These parameters are
well above the operating characteristics of the typical cruise missile, but would be characteristic of the reentry
vehicle from a ballistic missile.
GPS tours are also an example of civilian use. The GPS is used to determine which content to display. For
instance, when approaching a monument it would tell you about the monument.
GPS functionality has now started to move into mobile phones en masse. The first handsets with
integrated GPS were launched already in the late 1990s, and were available for broader consumer availability on
networks such as those run by Nextel, Sprint and Verizon in 2002 in response to US FCC mandates for handset
positioning in emergency calls. Capabilities for access by third party software developers to these features were
slower in coming, with Nextel opening those APIs up upon launch to any developer, Sprint following in 2006,
and Verizon soon thereafter.
GPS Module
Latitude and longitude are usually provided in the geodetic datum on which GPS is based (WGS-84).

 Receivers can often be set to convert to other user-required datums.

Receiver position is computed from the SV positions, the measured pseudo-ranges, and a receiver position
estimate.
Four satellites allow computation of three position dimensions and time.
Three satellites could be used determine three position dimensions with a perfect receiver clock.
In practice this is rarely possible and three SVs are used to compute a two-dimensional, horizontal fix (in
latitude and longitude) given an assumed height.
This is often possible at sea or in altimeter equipped aircraft.
Five or more satellites can provide position, time and redundancy.
Twelve channel receivers allow continuous tracking of all available satellites, including tracking of satellites
with weak or occasionally obstructed signals.
The GPS used follows NMEA 0183 version 3.0. The parameters like latitude, longitude, altitude and speed
are received from GPS via RS232 these parameters are compare with the predefine wave points and when status
of success is displayed on the LCD along with these instant latitude, longitude, altitude and speed parameters are
also displayed on the LCD.
To achieve this we are going to use one GPS module and one GSM module, which are connected to a
micro controller unit. Whenever the user sends an SMS to the GSM modem, micro controller unit will get the
appropriate request by sending standard AT commands, and sends request to GPS module from the micro
controller in the form of NMEA standard command sentences, to get the vehicle longitude and latitude. After that
by processing the received data in micro controller, the reverse SMS with position will send to the users number
from GSM modem.
The GPS module in this system will communicate with the satellite and receives its current position
(vehicle position). If any theft occurs we can lock the doors remotely again by sending SMS.

GPS Receivers
GPS receivers require different signals in order to function figure. These variables are broadcast after
position and time have been successfully calculated and determined. To ensure that the different types of
appliances are portable there are either international standards for data exchange (NMEA and RTCM), or the
Manufacturer provides defined (proprietary) formats and protocols.

Block diagram of a GPS receiver with interfaces, Data interfaces, The NMEA-0183 data interface, In
order to relay computed GPS variables such as position, velocity, course etc. to a peripheral (e.g. computer,
screen, transceiver), GPS modules have a serial interface (TTL or RS -232level).
The most important elements of receiver information are broad cast via this interface in a special data
format.
ThisformatisstandardisedbythenationalMarineElectronicsAssociation
(NMEA)
toensurethatdataexchangetakesplacewithoutanyproblems.Nowadays,data is relay ed according to the NMEA-0183
specification. NMEA has specified data sets for various applications e.g. GNSS (Global Navigation Satellite
System), GPS, Loran, Omega, Transit and also for various manufacturers. The following seven datasets are
widely used with GPS module store lay GPS information [xv]:
1. GGA (GPS Fix Data, fixed data for the Global Positioning System)
2. GLL (Geographic PositionLatitude/Longitude)
3. GSA (GNSSDOP and Active Satellites, degradation of accuracy and the number of
active satellites in the Global Satellite Navigation System)
4. GSV (GNSSSatellitesinView, satellites in view in the Global
Satellite Navigation System)
5. RMC (Recommended Minimum Specific GNSSD at a)
6. VTG (CourseoverGroundandGroundSpeed, horizontal course and horizontal velocity)
7. ZDA (Time & Date)
Structure of the NMEA protocol
In the case of NMEA, there at at which data is
transmitted is 4800 Baud using printable 8bit ASCII characters.
Transmission begin switch start bit (logical zero), followed by eight data bits and as to bit (logical one)added at
the end. No parity bits are used.

NMEA format (TTL and RS-232 level)

The different levels must be take into consideration depending on whether the GPS receiver used has a
TTL or RS-232interface (Figure)

In the case of a TTL level interface, a logical zero corresponds to approx. 0V and a logical one roughly to
the operating voltage of the system (+3.3V.+5V)

In the case of an RS232 interface a logical zero corresponds to a positive voltage (+3V_._+15V)and a
Logical one a negative voltage(-3V...15V).
If a GPS module with a TTL level interface is connected to an appliance with an RS-232 interface, a level
conversion must beffected A few GPS modules all the baud rate to be increased (upto38400bitsper_second).
Each GPS data set is formed in the same way and has the following structure:
$GPDTS, Inf1,Inf2,Inf3,Inf4,Inf5,Inf6,Infn*CS<CR><LF>
ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable8

Table 8: Description of the individual NMEA DATA SET blocks

The
maximum
ofcharacters_used_must_not_exceed_79._For_the_purposes_of_determining_this_number,_the_
Start sign $and end signs <CR><LF>are not counted.

number

The following NMEA Protocol was recorded using a GPS receiver (Table9):

Recording of an NMEA protocol

GGA data set
The GGA dataset (GPS Fix Data) contains information on time, longitude and latitude, the quality of the system,
The number of satellites used and the height.
An example of a GGA dataset:
$GPGGA, 130305.0,4717.115,N,00833.912,E,1,08,0.94,00499,M,047,M,,*58<CR><LF>
ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable10

Description of the individual GGA data set blocks

GLL data set
The GLL dataset (geographic positionlatitude/longitude) contains information on latitude and longitude, time
And health.
ExampleofaGLLdataset:
$GPGLL,4717.115,N,00833.912,E,130305.0,A*32<CR><LF>
ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable

Description of the
individual GGL data set blocks
GSA data set
TheGSAdataset (GNSSDOPandActiveSatellites)containsinformationonthemeasuringmode(2Dor3D),the number
of satellites used to determine the position and theaccuracyofthemeasurements (DOP:Dilution of Precision).
AnexampleofaGSAdataset:
$GPGSA,A,3,13,20,11,29,01,25,07,04,,,,1.63,0.94,1.33*04<CR><LF>
ThefunctionoftheindividualcharacterorsetsofcharactersisdecribedinTable

Description of the
individual GSA data set blocks
GSV data set
The GSV data set (GNSS Satellites in View) contains information on the number of satellites in view, there
Identification, theirelevationandazimuth,andthesignal-to-noiseratio.
AnexampleofaGSVdataset:_
$GPGSV,2,2,8,01,52,187,43,25,25,074,39,07,37,286,40,04,09,306,33*44<CR><LF>
ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable13.

Description of the individual GSV data set blocks

RMC data set
TheRMCdata set (RecommendedMinimumSpecificGNSS) contains informationontime, latitude, longitude And
height, systemstatus, speed, courseanddate.ThisdatasetisrelayedbyallGPSreceivers.
AnexampleofanRMCdataset:_
$GPRMC,130304.0,A,4717.115,N,00833.912,E,000.04,205.5,200601,01.3,W*7C<CR><LF>
ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable

Description of the individual RMC data set blocks

VTG data set
TheVGTdataset(CourseoverGroundandGroundSpeed)containsinformationoncourseandspeed.
AnexampleofaVTGdataset:
$GPVTG,014.2,T,015.4,M,000.03,N,000.05,K*4F<CR><LF>
ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable

Description of the individual VTG data set blocks

ZDA data set
The ZDA dataset(timeanddate)contains informationonUTCtime,thedateandlocaltime.
AnexampleofaZDAdataset:
$GPZDA,130305.2,20,06,2001,,*57<CR><LF>

ThefunctionoftheindividualcharactersorcharactersetsisexplainedinTable

Description of the individual ZDA data set blocks

Calculating the checksum
The checksumisdeterminedbyanexclusiveoroperationinvolvingall8databits (excludingstartandstopbits)
Fromalltransmittedcharacters,
including
separators.
The
exclusiveor
operation
commences
afterthestartofthedataset($sign)andendsbeforethechecksumseparator(asterisk:*).
The8-bit result is divided into 2 sets of 4 bits (nibbles) and each nibble is converted into the appropriate
Hexadecimal value(0...9,A...F).ThechecksumconsistsofthetwohexadecimalvaluesconvertedintoASCII characters.
Theprincipleofchecksumcalculationcanbeexplainedwiththehelpofabriefexample:
ThefollowingNMEAdatasethasbeenreceivedandthechecksum(CS)mustbeverifiedforitscorrectness.
$GPRTE,1,1,c,0*07 (07 is_the_checksum)
Procedure:
1. Onlythecharactersbetween$and*areincludedintheanalysis:GPRTE,1,1,c,0
2.These13ASCIIcharactersareconvertedinto8bitvalues(seeTable)
3.Eachindividualbitofthe13ASCIIcharactersislinkedtoanexclusiveoroperation(N.B.Ifthenumberofonesisuneven,theexclusive-orvalueisone)
4. Theresultisdividedintotwonibbles
5. Thehexadecimalvalueofeachnibbleisdetermined
6.BothhexadecimalcharactersaretransmittedasASCIIcharacterstoformthechecksum

Determining the checksum in the case of NMEA data sets

Hardware interfaces
Antenna
GPS modulescan either be operated with a passive or active antenna. Active antenna, i.e. with
abuiltinpreamplifier(LNA:LowNoiseAmplifier)arepoweredfromtheGPSmodule,thecurrentbeingprovidedbytheHF
signaline.Formobilenavigationalpurposescombinedantennae(e.g.GSM/FMandGPS)aresupplied.GPS
antennaereceiveright-handedcircularpolarisedwaves.
Twotypesofantennaareobtainableonthemarket,PatchantennaeandHelixantennae.Patchantennaeareflat,generallyhav
eaceramicandmetallisedbodyandaremountedonametalbaseplate.Inordertoensurea
sufficiently high degree of selectivity, the base to Patch surface ratiohastobeadjusted. Patchantennae are
oftencastinahousing(Figure),[xxii]).
Helixantennaearecylindricalinshape(Figure47,[xxiii])andhaveahighergainthanthePatchantennae.

Open and cast Patch antennae

Basic structural shape of a Helix antennae

powerSupply
GPSmodulesmustbepoweredfromanexternalvoltagesourceof3.3Vto6Volts.Ineachcase,thepowerdraw
isverydifferent.
Time pulse: 1PPS and time systems
MostGPS modules generate a timepulse every second, referred to as 1 PPs (1 pulse per second), which is
synchronisedtoUTC.ThissignalusuallyhasaTTLlevel(Figure).

1PPS signal
Thetimepulsecanbeusedtosynchronisecommunicationnetworks(PrecisionTiming).
As time can play a fundamental part whenGPS is used to determine a position, a distinction is drawn here
betweenfiveimportantGPStimesystems:
Atomic time (TAI)

The International AtomicTime Scale (Temps Atomique International) was introduced in order to provide a
universal 'absolute' time scale that would meet various practical demands andat the sametimealso be of
significanceforGPSpositioning.Since1967,thesecondhasbeendefinedbyanatomicconstantinphysics,the
non-radioactive element Cesium 133Cs being selected as a reference. The resonant frequency between the
Selected energy states of this atom has been determined at 9 192 631 770 Hz. Time defined in this way is
Therefore part of the SIsystem(System International).Thestartofatomictimetookplaceon01.01.1958at
00.00hours.
8.3.3.2 Universal time co-ordinate (UTC)
UTC (Universal Time Coordinated)was introduced, in order to have a practical time scale that was oriented
towardsuniversalatomictimeand,atthesametime,adjustedtouniversalco-ordinatedtime.Itisdistinguished
fromTAIintheway the seconds are counted, i.e.UTC = TAl - n,where n= complete seconds that can be
alteredon1stJanuaryor1stJuneofanygivenyear(leapseconds).
8.3.3.3 GPS time
GeneralGPSsystemtimeisspecifiedbyaweeknumberandthenumberofsecondswithinthatweek.Thestart
datewasSunday,6thJanuary1980at0.00hours(UTC).EachGPSweekstart in the night from Saturday to Sunday,
thecontinuoustimescalebeingsetbythemainclockattheMasterControlStation.
ThetimedifferencethatarisesbetweenGPSandUTCtimeisconstantlybeingcalculatedandappendedtothenavigationmes
sage.
8.3.3.4 Satellite time
Because of constant, irregular frequency errors in the atomic clocks on board the GPS satellites, individual
SatellitetimeisatvariancewithGPSsystemtime.Thesatelliteclocksaremonitoredbythecontrolstationand
Any apparent time difference relayed to Earth. Any time differences must be taken into account when
Conducting localGPSmeasurements
8.3.3.5 Local time
Local time is the time referred to within a certain area. The relationship between local time and UTCtime is
Determined bythetimezoneandregulationsgoverningthechangeoverfrom_normal_timetosummertime
Example of a timeframe(Table20)on21stJune2001(Zurich)

.
Table 20: Time systems
The interrelationship of time systems (valid for 2001):
TAI-UTC=+32sec
GPS-UTC=+13sec
TAIGPS=+19sec

8.3.4 Converting the TTL level to RS-232

8.3.4.1 Basics of serial communication
ThepurposeoftheRS-232interfaceismainly
to link computers to each other(mostly bi-directional)
Tocontrolserialprinters
ToconnectPCstoexternalequipment, suchasGSMmodems,GPSreceivers,etc.
TheserialportsinPCsaredesignedforasynchronoustransfer.Personsengagedintransmittingandreceiving
Operationsmustadheretoacompatibletransferprotocol, i.e.anagreementonhowdataistobetransferred.
Bothpartnersmustworkwiththesameinterfaceconfiguration, andthiswillaffecttherateoftransfermeasured
Inbaud.Thebaudrateisthenumberofbitspersecondtobetransferred.Typicalbaudratesare110, 150,300,
600,1200,2400,4800,9600,19200and38400baud,i.e.bitspersecond.Theseparametersarelaiddownin
the transfer protocol. In addition, both sides on what checks should be must reach agreement
Implementedregardingthereadytotransmitandreceivestatus.
During transmission, 7 to 8 data bits arecondensedinto a data word in order to relay the ASCII codes. The
lengthofadatawordislaiddowninthetransferprotocol.
The beginning of data word is identified by a startbit,and at theend of everyword1 or 2 stopbitsareAppended.
Acheckcanbecarriedoutusingaparitybit.Inthecaseofevenparity,
theparitybitisselectedinsuchawayThatthetotalnumberoftransferreddataword1bitsiseven(inthecaseofunevenparity
thereisanunevennumber).Checkingparityisimportant,becauseinterferenceinthelinkcancausetransmissionerrors.Eve
n if onebitofadatawordisaltered,theerrorcanbeidentifiedusingtheparitybit.
8.3.4.2 Determining the level and its logical allocation
DataistransmittedininvertedlogicontheTxDandRxDlines.TstandsfortransmitterandRforreceiver.
Inaccordancewithstandards,thelevelsare:
Logical0=positivevoltage, transmitmode:+5..+15V,receivemode:+3..+15V
Logical1=negativevoltage, transmit_mode:-5..-15V,receivemode-3..-15V
The difference between the minimum permissiblevoltageduring transmission_ andreceptionmeans that line
Interference doesnot affect the function of the interface, provided thenoiseamplitudeis_below2V.
ConvertingtheTTLleveloftheinterfacecontroller
(UART,universal
asynchronousreceiver/transmitter)totherequiredRS232levelandviceversaiscarriedoutbyalevelconverter(e.g.MAX3221andmanymorebesides).
Thefollowingfigure (Figure) illustrates the difference betweenTTL and RS-232levels.Levelinversion can clearly
be seen.

Difference between TTL and RS-232 levels

Converting the TTL level to RS-232
Many GPS receivers and GPS modulesonlymakeserialNMEAandproprietarydataavailable using TTL levels
(approx.0Vorapprox.Vcc=+3.3Vor+5V).It is not always possible toevaluate this data directly through a PC,as a
PCinputrequiresRS232levelvalues.
Asacircuitsneededtocarryoutthenecessaryleveladjustment,theindustryhasdeveloped integrated circuits Specifically
designed todeal with conversion between the two level ranges, to undertake signal inversion ,and to accommodate
the necessary_equipment to generate negative supply voltage(by_meansof built-incharge pumps)._
A complete bidirectional levelconverter that usesa"MaximMAX3221"[xxiv] is illustrated on the
followingCircuitdiagram(Figure_50).Thecircuithasanoperationalvoltageof3V...5V_and_is_protectedagainstvoltag
e
peaks(ESD)of15kV.ThefunctionoftheC1..C4capacitorsistoincreaseorinvertthevoltage.

MAX 232
Introduction:
A standard serial interface for PC, RS232C, requires negative logic, i.e., logic 1 is -3V to -12V and logic 0
is +3V to +12V. To convert TTL logic, say, TxD and RxD pins of the microcontroller thus need a converter chip.
A MAX232 chip has long been using in many microcontrollers boards. It is a dual RS232 receiver / transmitter
that meets all RS232 specifications while using only +5V power supply. It has two onboard charge pump voltage
converters which generate +10V to -10V power supplies from a single 5V supply. It has four level translators, two
of which are RS232 transmitters that convert TTL/CMOS input levels into +9V RS232 outputs. The other two
level translators are RS232 receivers that convert RS232 input to 5V. Typical MAX232 circuit is shown below.

Feachers:
1. Operates With Single 5-V Power Supply
2.LinBiCMOSEProcess Technology
3.Two Drivers and Two Receivers
4.30-V Input Levels
5.Low Supply Current . 8 mA Typical
6.Meets or Exceeds TIA/EIA-232-F and ITU
Recommendation V.28
7.Designed to be Interchangeable With
Maxim MAX232
8.Applications
TIA/EIA-232-F
Battery-Powered Systems
Terminals
Modems
Computers
9.ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015
10.Package Options Include Plastic
Small-Outline (D, DW) Packages and
Standard Plastic (N) DIPs

Cicuit connections:
A standard serial interfacing for PC, RS232C, requires negative logic, i.e., logic '1' is -3V to -12V and logic '0' is
+3V to +12V. To convert a TTL logic, say, TxD and RxD pins of the uC chips, thus need a converter chip. A
MAX232 chip has long been using in many uC boards. It provides 2-channel RS232C port and requires external
10uF pacitors. Carefully check the polarity of capacitor when soldering the board. A DS275 however, no need
external capacitor and smaller. Either circuit can be used without any problems.

LCD (Liquid Cristal Display)

Introduction:
A liquid crystal display (LCD) is a thin, flat display device made up of any number of color or monochrome
pixels arrayed in front of a light source or reflector. Each pixel consists of a column of liquid crystal molecules
suspended between two transparent electrodes, and two polarizing filters, the axes of polarity of which are
perpendicular to each other. Without the liquid crystals between them, light passing through one would be
blocked by the other. The liquid crystal twists the polarization of light entering one filter to allow it to pass
through the other.
A program must interact with the outside world using input and output devices that communicate directly with a
human being. One of the most common devices attached to an controller is an LCD display. Some of the most
common LCDs connected to the contollers are 16X1, 16x2 and 20x2 displays. This means 16 characters per line
by 1 line 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively.

Many microcontroller devices use 'smart LCD' displays to output visual information. LCD displays
designed around LCD NT-C1611 module, are inexpensive, easy to use, and it is even possible to produce a
readout using the 5X7 dots plus cursor of the display. They have a standard ASCII set of characters and
mathematical symbols. For an 8-bit data bus, the display requires a +5V supply plus 10 I/O lines (RS RW D7 D6
D5 D4 D3 D2 D1 D0). For a 4-bit data bus it only requires the supply lines plus 6 extra lines(RS RW D7 D6 D5
D4). When the LCD display is not enabled, data lines are tri-state and they do not interfere with the operation of
the microcontroller.
Features:
(1) Interface with either 4-bit or 8-bit microprocessor.
(2) Display data RAM
(3) 80x8 bits (80 characters).
(4) Character generator ROM
(5). 160 different 5 7 dot-matrix character patterns.
(6).Character generator RAM
(7) 8different user programmed 5 7 dot-matrix patterns.
(8).Display data RAM and character generator RAM may be
Accessed by the

microprocessor.

(9) Numerous instructions

(10) .Clear Display, Cursor Home, Display ON/OFF, Cursor ON/OFF,
Blink Character, Cursor Shift, Display Shift.
(11). Built-in reset circuit is
(12). Built-in

triggered

at power

ON.

oscillator.

Data can be placed at any location on the LCD. For 161 LCD, the address locations are:

available. Line lengths of

8, 16,
20, 24,
32 and
40
charact
ers are
all
standar
d, in
one,
two

Fig : Address locations for a 1x16 line LCD

Shapes and sizes:

Even limited to character based modules,there is still a wide variety of shapes and sizes available. Line lenghs
of 8,16,20,24,32 and 40 charecters are all standard, in one, two and four line versions.
Several different LC technologies exists. supertwist types, for example, offer Improved contrast and
viewing angle over the older twisted nematic types. Some modules are available with back lighting, so so that
they can be viewed in dimly-lit conditions. The back lighting may be either electro-luminescent, requiring a
high voltage inverter circuit, or simple LED illumination.

Electrical blockdiagram:

Power supply for lcd driving:

PIN DESCRIPTION:
Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins (two pins are extra in
both for back-light LED connections).

Fig: pin diagram of 1x16 lines lcd

CONTROL LINES:
EN:
Line is called "Enable." This control line is used to tell the LCD that you are sending it data. To send data
to the LCD, your program should make sure this line is low (0) and then set the other two control lines and/or put
data on the data bus. When the other lines are completely ready, bring EN high (1) and wait for the minimum
amount of time required by the LCD datasheet (this varies from LCD to LCD), and end by bringing it low (0)
again.

RS:
Line is the "Register Select" line. When RS is low (0), the data is to be treated as a command or special
instruction (such as clear screen, position cursor, etc.). When RS is high (1), the data being sent is text data which
sould be displayed on the screen. For example, to display the letter "T" on the screen you would set RS high.
RW:
Line is the "Read/Write" control line. When RW is low (0), the information on the data bus is being
written to the LCD. When RW is high (1), the program is effectively querying (or reading) the LCD. Only one
instruction ("Get LCD status") is a read command. All others are write commands, so RW will almost always be
low.
Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation selected by the user). In
the case of an 8-bit data bus, the lines are referred to as DB0, DB1, DB2, DB3, DB4, DB5, DB6, and DB7.
Logic status on control lines:
E - 0 Access to LCD disabled
- 1 Access to LCD enabled
R/W - 0 Writing data to LCD
- 1 Reading data from LCD
RS - 0 Instructions
-

1 Character

Writing data to the LCD:

1) Set R/W bit to low
2) Set RS bit to logic 0 or 1 (instruction or character)
3) Set data to data lines (if it is writing)
4) Set E line to high
5) Set E line to low
Read data from data lines (if it is reading)on LCD:
1) Set R/W bit to high
2) Set RS bit to logic 0 or 1 (instruction or character)
3) Set data to data lines (if it is writing)

4) Set E line to high

5) Set E line to low
Entering Text:
First, a little tip: it is manually a lot easier to enter characters and commands in hexadecimal rather than
binary (although, of course, you will need to translate commands from binary couple of sub-miniature hexadecimal
rotary switches is a simple matter, although a little bit into hex so that you know which bits you are setting).
Replacing the d.i.l. switch pack with a of re-wiring is necessary.
The switches must be the type where On = 0, so that when they are turned to the zero position, all four
outputs are shorted to the common pin, and in position F, all four outputs are open circuit.
All the available characters that are built into the module are shown in Table 3. Studying the table, you will
see that codes associated with the characters are quoted in binary and hexadecimal, most significant bits (lefthand four bits) across the top, and least significant bits (right-hand four bits) down the left.
Most of the characters conform to the ASCII standard, although the Japanese and Greek characters (and a
few other things) are obvious exceptions. Since these intelligent modules were designed in the Land of the Rising
Sun, it seems only fair that their Katakana phonetic symbols should also be incorporated. The more extensive
Kanji character set, which the Japanese share with the Chinese, consisting of several thousand different characters,
is not included!
Using the switches, of whatever type, and referring to Table 3, enter a few characters onto the display, both
letters and numbers. The RS switch (S10) must be up (logic 1) when sending the characters, and switch E (S9)
must be pressed for each of them. Thus the operational order is: set RS high, enter character, trigger E, leave RS
high, enter another character, trigger E, and so on.
The first 16 codes in Table 3, 00000000 to 00001111, ($00 to $0F) refer to the CGRAM.This is the
Character Generator RAM (random access memory), which can be used tohold user-defined graphics characters.
This is where these modules really start to showtheir potential, offering such capabilities as bargraphs, flashing
symbols, even animatedcharacters. Before the user-defined characters are set up, these codes will just bring
upstrange looking symbols.
Codes 00010000 to 00011111 ($10 to $1F) are not used and just display blank characters. ASCII codes proper
start at 00100000 ($20) and end with 01111111 ($7F). Codes 10000000 to 10011111 ($80 to $9F) are not used, and
10100000 to 11011111 ($A0 to $DF) are the Japanese characters.

Initialization by Instructions:

If the power conditions for the normal operation of the internal reset circuit are not satisfied,
then executing a series ofinstructions mustinitialize LCD unit. The procedure for this initialization
process is as above show.

Keil Software
Installing the Keil software on a Windows PC

Insert the CD-ROM in your computers CD drive

On most computers, the CD will auto run, and you will see the Keil installation menu. If the menu does
not appear, manually double click on the Setup icon, in the root directory: you will then see the Keil
menu.

On the Keil menu, please select Install Evaluation Software. (You will not require a license number to
install this software).
Follow the installation instructions as they appear.

Loading the Projects

The example projects for this book are NOT loaded automatically when you install the Keil compiler.
These files are stored on the CD in a directory /Pont. The files are arranged by chapter: for example, the project
discussed in Chapter 3 is in the directory /Pont/Ch03_00-Hello.
Rather than using the projects on the CD (where changes cannot be saved), please copy the files from CD onto an
appropriate directory on your hard disk.
Note: you will need to change the file properties after copying: file transferred from the CD will be read only.

Configuring the Simulator

Open the KeilVision2

Go to Project Open Project and browse for Hello in Ch03_00 in Pont and open it.

Go to Project Select Device for Target Target1

Select 8052(all variants) and click OK

Now we need to check the oscillator frequency:

Go to project Options for Target Target1

Make sure that the oscillator frequency is 12MHz.

Building the Target

Build the target as illustrated in the figure below

Running the Simulation

Having successfully built the target, we are now ready to start the debug session and run the simulator.
First start a debug session

The flashing LED we will view will be connected to Port 1. We therefore want to observe the activity on this port

To ensure that the port activity is visible, we need to start the periodic window update flag

Go to Debug - Go

While the simulation is running, view the performance analyzer to check the delay durations.

Go to Debug Performance Analyzer and click on it

Double click on DELAY_LOOP_Wait in Function Symbols: and click Define button

Bibliography:

The 8051 Micro controller and Embedded Systems

Muhammad Ali Mazidi
Janice Gillispie Mazidi
The 8051 Micro controller Architecture, Programming & Applications
Kenneth J.Ayala
Fundamentals of Micro processors and Micro computers
B.Ram
Micro processor Architecture, Programming & Applications
Ramesh S.Gaonkar
Electronic Components
D.V.Prasad

References on the Web:

www.national.com
www.atmel.com
www.microsoftsearch.com
www.geocities.com