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* = Mentioned in Sem5 DIC University paper Dec1996-98, one star for each hit.
Basic gates:
7400 Quad 2 input NAND gates Miscellaneous:
7402 Quad 2 input NOR gates 741 Op amp
7404 Hex invertors * 7483 4bit binary adder
7408 Quad 2 input AND gates *** 7485 4 bit comparator with cascading inputs
7410 Triple 3 input NAND gates *** 74180 8 bit parity checker/generator
7411 Triple 3 input AND gates ***** 74181 4 bit ALU
7432 Quad 2 input OR gates ** 74182 Look ahead carry generator
7486 Quad 2 input XOR gates
Multiplexers, demux, encoders, decoders:
74138 Demux 1:8 (3:8 dec) active low o/p
74139 Mux 1:4 (2:4 dec) (Dual) active low o/p
** 74150 Mux 16:1 active low o/p
74151 Mux 8:1
74152 Mux 8:1 active low o/p
74153 Mux 4:1 (Dual) active high o/p
74154 Demux 1:16 (4:16 dec) active low o/p
74155 Demux 1:4 (dec 4:16) (Dual) 1Y inverted, 2Y same
74156 Demux 1:4 (dec 4:16) (Dual) 1Y inverted, 2Y same, open collector
74157 Mux 2:1 (Quad)
74158 Mux 2:1 (Quad) active low o/p
74159 Demux 1:16 (4:16 dec) open collector
74352 Mux 4:1 (Dual) active low o/p
Convertors
* 7442 BCD to decimal decoder
*** 7447 BCD to 7 segment decoder/driver
***** 74147 priority encoder decimal to BCD (active low ip/op)
* 74148 priority encoder octal to binary (EI,EO is active low)
* 74184 BCD to binary (active low enable)
** 74185 binary to BCD (active low enable)
_________
I11 1| \_/ |14 Vcc
I12 2| |13 I31
O1 3| 7 |12 I32
I21 4| 4 |11 O3
I22 5| 0 |10 I41
O2 6| 0 |9 I42
GND 7|_________|8 O4
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Pinout:
_________
O1 1| \_/ |14 Vcc
I11 2| |13 O3
I12 3| 7 |12 I32
O2 6| 4 |9 I31
I22 4| 0 |11 O4
I21 5| 2 |10 I42
GND 7|_________|8 I41
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Quick reference:
i.e. the output is such that the parity as shown above is maintained even.
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L ENAB D/U-bar CK
X 0 X X Stop count
0 0 X X Preset
1 0 0 Rising Up Count
1 0 1 Rising Down Count
MAX/MIN: Normally 0. Goes high when count is maximum (UP count) or minimum (DN count)
RC: Normally 1, goes 0 when MAX/MIN is reached and CK is low.