7.

1 Introduction (informative)
The SystemVerilog operators are a combination of Verilog and C operators. In bot
h languages, the type and
size of the operands is fixed, and hence the operator is of a fixed type and siz
e. The fixed type and size of operators
is preserved in SystemVerilog. This allows efficient code generation.
Verilog does not have assignment operators or increment and decrement operators.
SystemVerilog includes the
C assignment operators, such as +=, and the C increment and decrement operators,
++ and --.
Verilog-2001 added signed nets and reg variables, and signed based literals. The
re is a difference in the rules
for combining signed and unsigned integers between Verilog and C. SystemVerilog
uses the Verilog-2001
rules.
7.2 Operator syntax
Syntax 7-1 Operator syntax (excerpt from Annex A)
7.3 Assignment operators
In addition to the simple assignment operator, =, SystemVerilog includes the C a
ssignment operators and special
bitwise assignment operators: +=, -=, *=, /=, %=, &=, |=, ^=, <<=, >>=, <<<=, an
d >>>=. An assignment
operator is semantically equivalent to a blocking assignment, with the exception
that any left hand side index
expression is only evaluated once. For example:
a[i]+=2; // same as a[i] = a[i] +2;
In SystemVerilog, an expression can include a blocking assignment, provided it d
oes not have a timing control.
Note that such an assignment must be enclosed in parentheses to avoid common mis
takes such as using a=b
for a==b, or a|=b for a!=b.
if ((a=b)) b = (a+=1);
assignment_operator ::=
= | += | -= | *= | /= | %= | &= | |= | ^= | <<= | >>= | <<<= | >>>=
conditional_expression ::=
cond_predicate ? { attribute_instance } expression : expression
unary_operator ::=
+ | - | ! | ~ | & | ~& | | | ~| | ^ | ~^ | ^~
binary_operator ::=
+ | - | * | / | % | == | != | === | !== | =?= | !?= | && | || | **
| < | <= | > | >= | & | | | ^ | ^~ | ~^ | >> | << | >>> | <<<
inc_or_dec_operator ::= ++ | -unary_module_path_operator ::=
! | ~ | & | ~& | | | ~| | ^ | ~^ | ^~
binary_module_path_operator ::=
== | != | && | || | & | | | ^ | ^~ | ~^
// from Annex A.6.2
// from Annex A.8.3
// from Annex A.8.6
Accellera
Extensions to Verilog-2001 SystemVerilog 3.1a
Copyright 2004 Accellera. All rights reserved. 63
a = (b = (c = 5));
The semantics of such an assignment expression are those of a function which eva
luates the right hand side,
casts the right hand side to the left hand data type, stacks it, updates the lef
t hand side and returns the stacked
value. The type returned is the type of the left hand side data type. If the lef
t hand side is a concatenation, the
type returned shall be an unsigned integral value whose bit length is the sum of

the length of its operands.

It shall be illegal to include an assignment operator in an event expression, in
an expression within a procedural
continuous assignment, or in an expression that is not within a procedural state
ment.
SystemVerilog includes the C increment and decrement assignment operators ++i, -i, i++ and i--. These
do not need parentheses when used in expressions. These increment and decrement
assignment operators
behave as blocking assignments.
The ordering of assignment operations relative to any other operation within an
expression is undefined. An
implementation can warn whenever a variable is both written and read-or-written
within an integral expression
or in other contexts where an implementation cannot guarantee order of evaluatio
n. In the following example:
i = 10;
j = i++ + (i = i - 1);
After execution, the value of j can be 18, 19, or 20 depending upon the relative
ordering of the increment and
the assignment statements.
7.4 Operations on logic and bit types
When a binary operator has one operand of type bit and another of type logic, th
e result is of type logic. If
one operand is of type int and the other of type integer, the result is of type
integer.
The operators != and == return an X if either operand contains an X or a Z, as i
n Verilog-2001. This is converted
to a 0 if the result is converted to type bit, e.g. in an if statement.
The unary reduction operators (& ~& | ~| ^ ~^) can be applied to any integer exp
ression (including packed
arrays). The operators shall return a single v