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Table of Contents
1.
INTRODUCTION .................................................................. 3
2.
2.1.
3.
3.6.
4.
4.1.
4.1.1.
4.1.2.
4.1.3.
4.1.4.
4.2.
5.
5.1.
5.2.
5.3.
3.1.
3.2.
3.3.
3.4.
3.5.
1. INTRODUCTION
The major advantage of an HVDC
transmission is its built in ability to control
the transmitted power between the sending
and the receiving converter terminals, the
former called rectifier and the latter
inverter.
2. BASIC CONTROL
PRINCIPLES
The basic concept to control an HVDC
transmission is the possibility to set the DC
voltage across the converter valve bridge
and the transmitted power by varying the
phase position of the gate control pulses to
the converter valves.
Inverter
Id
Rd
Ud1
Ud2
Figure 1
PdI =
Y/Y
1
Y/Y
Id
Y/D
(4)
Ud
Y/D
1
Ud 2(Ud1 Ud 2)
Rd
PdI = PdR Pd 1 = Rd Id 2
u:/hvdckurs/lk/kontroll/oh/twepuls
(5)
Figure 2
PdR = Ud 1 Id
(1)
Porder
Power
control
I order
Current
control
amplifier
P mod
Converter
unit
firing
control
Id
I response
U d1 U d 2
Id =
Rd
and
PdR =
Ud 1(Ud 1 Ud 2)
Rd
Ud response
Voltage
measuring
system
(2)
Figure 3
(3)
3. Ud/Id CHARACTERISTICS
FOR THE HVDC
CONVERTER
min
const. I d
C
I0
Id
statchar.vsd
Ud = U dio cos ( dx + dr )
Id
UdioN
IdN
Figure 4
(6)
The firing angle is a parameter
influenced by the control system to
keep the DC current equal to the
preset reference.
The second term in the right member
is the voltage drop in the converter
transformer with (dx + dr) directly
representing the impedance of the
transformer.
Udio, with rated value UdioN , is the noload DC voltage obtained with
= 0.
Inverter
U ac1
Uac2
Ud1
CCA
Io1
Ud2
12
CFC
CCA
12
CPG
CPG
Id1
Io2
CFC
Id1
Iresp.
Iresp.
Figure 5
Inverter
Rectifier
statch1.vsd
I02
Figure 6
I01
Id
Inverter
I01'
Rectifier
I02
Id
I01
statch2.vsd
Figure 7
1
11
3
4
B
8
9
5
statch3.vsd
Id
Figure 8
A
B
Id
I
statch4.vsd
Figure 9
(7)
gives the voltage across an HVDC
converter. By using the relationships
= 180( + u)
and
Ud = U dio cos ( dx dr )
8
9
Rd Id
Id
I
statch5.vsd
Figure 10
Ud = U dio cos ( dx + dr )
Id
UdioN
I dN
(10)
I d UdioN
IdN Udio
(9)
(8)
Id
UdioN
IdN
10
IO ABS MAX
I order maximum
limitation
IO LIM
I order minimum
limitation
IO ABS MIN
UD
UD HIGH
UD LOW
VDCOL
UD
CCA
ID
ORDER
Firing
control
CPG
UdN
Figure 12
IO
Ud1
CP
UAC
BLOCK/DEBLOCK
overw.vsd
Figure 11
11
Firing Control
AMIN
BLOCK/DEBLOCK
t
UAC
= f(t)
ALPHA MIN
&
>1
UMIN
UD
IO
&
VDCOL
CCA
ORDER
ID
Figure 13
12
CPG
CP
13
ld
UdR
TCC
ALPHA
CFC
Udl
ld
ld
ALPHA/UDREF
ALPHA/UDREF
TCC
CFC
GAMMA
GAMMA/UDREF
VARC
TCOM
VARC
GAMMA/UDREF
traoverw.vsd
Figure 14
14
controlled is either the AC bus voltage (Ucontrol) or the reactive power exchange
with the AC system (Q-control). To
prevent excessive harmonics to enter into
the AC system the (RPC) should also
make sure that a sufficient amount of
filters is connected. These tasks are
performed by switching on and off the AC
filters and shunt banks.
15
16