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October 8, 2007
Don Martin
HVDC STUDIES
AND APPLICATIONS
Converter
DC yard
Valve hall
Pole line
13th
harmonic
filter
DC filter
Highpass
filter
Electrode
lines
Highpass
filter
13th
harmonic
filter
Pole line
11th
harmonic
filter
AC bus
Qcap= +0.5 PU
U vN =
U di 0 N
3
I vN =
2
I dN
3
Optimized design
=15 degree
dxN= 0.065
drN= 0.003
Once the above definition of dx is taken into account, and UT is neglected, the equations
are essentially the same as those in the PSS/E Manual.
500 kVdc
1000 kVdc
Rdc=0.01
/ km
VSCHD= 500 kV
Rdc=0.01
500 kVdc
/ km
VSCHD= 500 kV
Rdc=0.01
/ km
500 kVdc
Rdc=0.01
/ km
Two entries
VSCHD= 500 kV
Rdc=0.01
/ km
500 kVdc
500 kVdc
Rdc=0.01
/ km
IOi
+
CC
+
COR
DI
DCR
IO
+
CR
+
DIO
DCR
DF
DF
FPD
FPD
frequency (FLJO-2)
control
modulation (FLJOGG)
control
IO1
COR
IO
CR
DGAM
GR
Udc or Uac
VDCOL characteristics
avoid power instability during and after disturbances in the a.c. network
define a fast and controlled restart after clearance of a.c. and d.c. faults
avoid stresses on the thyristors at continuous commutation failure
suppress the probability of consecutive commutation failures at recovery
Io, Id Rectifier
Alpha Rectifier
Vd Inverter
Vac Inv
(rectified)
Io, Id Inverter
Gamma Inverter
Io, Id Rectifier
Alpha Rectifier
Vd Inverter
Vac Inv
(rectified)
Io, Id Inverter
Gamma Inverter
Half power
transmitted
during fault
Io, Id Rectifier
Alpha Rectifier
Vd Inverter
Vac Inv
(rectified)
Io, Id Inverter
Gamma Inverter
Io, Id Rectifier
Alpha Rectifier
Vd Inverter
Vac Inv
(rectified)
Io, Id Inverter
Gamma Inverter
Io, Id Rectifier
Alpha Rectifier
Vd Inverter
Vac Inv
(rectified)
Io, Id Inverter
Gamma Inverter
Alpha Rectifier
Vd Inverter
Vac Inv
(rectified)
Io, Id Inverter
Gamma Inverter
Half power on
other pole
Can compensate
transiently
Modular concept
Voltages
Currents
580A (2 sub)
1140A (4 sub)
1740A (6 sub)
80 kV
M1 =101 MVA
M2 =199 MVA
M3 =304 MVA
150 kV
M4 =190 MVA
M5 =373 MVA
M6 =570 MVA
300 kV
M7 =380 MVA
M8 =747 MVA
M9 =1140 MVA
Filter bus
ZSOURCE
Generator model
to represent the
converter
The PQ-diagram
(limitations)
DC_HL2
CHVDCL
CHVDCL
Dynamic model
Load flow model
PCC
Filter bus
Filter bus
AC
system
PCC
AC
system
Generator model
to represent the
converter
First converter
Generator model
to represent the
converter
Second converter
PCC
Udc ref
AC
voltage
control
Inner
current
control
DC
voltage
control
Qref
Pref
Reactive
power
control
Udc
Uac ref
Qref
PCC
Upcc
Uac ref
Phase
current
limit
Converter
voltage
limit
Active
power
control
Pref
UacCtrl
UdcCtrl
QCtrl
PCtrl
Converter blocking
Porder
Qorder
Uacorder
Black start
VA
VB
VC
No Change in
Reactive Power Demand
or AC Voltage
kV
50
0
-50
-100
-150
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0.7
0.8
0.9
kV
50
-50
-100
0.1
0.2
0.3
0.4
0.5
0.6
kV
50
0
-50
-100
-150
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0.7
0.8
0.9
kV
50
-50
-100
0.1
0.2
0.3
0.4
0.5
0.6
PSS/E
PSLF
Available
Available
HVDC Conventional
Yes
Yes
Yes
Yes
Yes
No
Note: Detailed and Reduced Model generally require ABB to provide data to properly model the system
POLE POWER
MW
1600
-60 MW/MIN
1200 MW/MIN
1200
800
400
0
MINUTES
0
Radisson
Nicolet
Montreal
Des Cantons
Comerford
Sandy Pond
New York
Boston
Atlantic
Ocean
HVDC PERFORMANCE