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TEMPERATURA
CONTENIDO
1 INTRODUCCIÓN ............................................................................................................................2
3 MÓDULO SENSOR-ACONDICIONADOR..................................................................................4
4 MÓDULO DE ALARMA.................................................................................................................8
-1-
Sistema para el Control de Temperatura
1 Introducción
-2-
Sistema para el Control de Temperatura
a. Sensor-acondicionador
b. Alarma
c. Actuador
Alimentación:
- +/- 15 Vcc para la circuitería electrónica, proporcionada por las fuentes del
laboratorio, o por fuentes de alimentación ensambladas por los alumnos.
Temperaturas:
Construcción:
Los valores normalizados para las resistencias, así como sus códigos de
colores, se muestran en una de las hojas anexas a este manual.
-3-
Sistema para el Control de Temperatura
Sensor Resistencia
Depósito de Agua
PT-100 de Caldeo
Módulo Módulo
Sensor-Acondicionador Actuador
Módulo de Altavoz
Alarma
3 Módulo sensor-acondicionador
-4-
Sistema para el Control de Temperatura
Los valores para la señal de salida del circuito serán los siguientes:
Generador de
5 Vcc
Sensor de
temperatura Puente con Compensación
compensación lineal consigna (ajustable)
Amplificador de
Salida proporcional a
salida (ajustable) la temperatura
El puente de Wheatstone estará alimentado con 4,7 Vcc, que deben ser
obtenidos a partir de 15 Vcc, con un circuito basado en un diodo Zener de 4,7
voltios. Este circuito puente es un circuito apropiado para la medida con
precisión de pequeñas variaciones de resistencia. El amplificador operacional
del circuito hace que por la PT-100 circule siempre la misma corriente,
independientemente del valor de la resistencia de la PT-100, de esta forma, la
-5-
Sistema para el Control de Temperatura
La respuesta del circuito mantendrá la misma linealidad que la que nos aporta
la PT-100. Las resistencias R1 y R2, determinarán la magnitud de la corriente
que circulará por las ramas del puente, y la resistencia R3, equilibrará el puente
para una temperatura de 0ºC. Dado que la salida debe estar equilibrada en 0
voltios para 90ºC, la corriente de desequilibrio que se producirá en el puente,
debe ser aportada por una fuente de corriente adicional que debe hacer que la
salida sea 0 voltios para 90ºC.
-6-
Sistema para el Control de Temperatura
-7-
Sistema para el Control de Temperatura
4 Módulo de alarma
-8-
Sistema para el Control de Temperatura
85ºC). Cuando la señal de entrada está entre –10 voltios y +10 voltios, la salida
de este comparador debe ser un cero lógico (aproximadamente 0 Vcc).
Oscilador de alta
frecuencia Oscilador de baja
(Puente de Wien) frecuencia (555)
-9-
Sistema para el Control de Temperatura
Este oscilador da en su salida una señal sinusoidal cuya frecuencia viene dada
por la relación:
1
Fosc =
2πRC
- 10 -
Sistema para el Control de Temperatura
Para que el oscilador oscile, la relación de las resistencia R1 y R2 debe ser tal
que R2 sea ligeramente mayor que el doble de R1. Para hacer este ajuste, se
debe implementar R2 como una resistencia en serie con un potenciómetro.
Para el ajuste de R2, partiendo de un valor bajo de resistencia, a medida que
ésta se acerque a su valor final, se observará que la forma de la señal de salida
va aumentando su voltaje. Si el valor de R2 se hace excesivamente grande, se
observará que la señal de salida se recorta en los picos positivo y negativo, al
llegar a unos +13V y –13V, aproximadamente, debido a la saturación del
amplificador operacional.
La salida del oscilador de 2kHz, debe ser enviada a un altavoz para activar la
alarma acústica, ya que con una señal de 2kHz aplicada a un altavoz, se
consigue un pitido perfectamente audible por el oído humano. La señal de
salida directa del oscilador no puede dar la corriente necesaria para hacer que
la señal acústica sea perfectamente audible. Para conseguir que lo sea, se
debe utilizar una etapa de salida amplificadora de corriente, que nos permita
también regular el volumen de la señal acústica. El circuito de salida es el que
aparece en la Figura 4.4.
- 11 -
Sistema para el Control de Temperatura
5 Módulo actuador
- 12 -
Sistema para el Control de Temperatura
Entrada proporcional a la
Comparador con
temperatura
histéresis
Conmutador de Paso
por cero Optoacoplador
(U217B)
- 13 -
Sistema para el Control de Temperatura
Para ajustar los valores a los que se debe conmutar la salida, puede
implementarse R2 como una resistencia en serie con un potenciómetro. Se
deberá seleccionar los valores de resistencia y potenciómetro de forma que se
pueda hacer el ajuste para todo el rango de tensión de salida de saturación que
el amplificador operacional nos pueda dar.
- 14 -
Sistema para el Control de Temperatura
- 15 -
Sistema para el Control de Temperatura
7 ANEXO. Esquemáticos
- 16 -
5 4 3 2 1
D D
+15V
BORNA 3P
3
J1A
1
2
3
P6
2
1
2
3
+15V +15 -15 D2
1
R0
R6 D3
Q1
BC556
C
D1 C
-15V
R8 R9 +15V
C1
C3
R1 R2
100nF-50V
U1
100nF-50V
LM741 U2
LM741
5
4
7
1
J2
- 2 3 +
6 6 vo 1 1
+ 3 2 - 2 2
R4 R3
1
7
4
5
PT-100 BORNA 2P
C2 vpt
C4
B B
100nF-50V
+15V
100nF-50V
-15V
P5
R5
3 1
2
A A
Title
SISTEMAS ELECTRÓNICOS. 4º CURSO INGENIERÍA INDUSTRIAL
Size Document Number Rev
B Sistema para el Control de Temperatura. SENSOR-ACONDICIONADOR J.C.
Date: Sheet 1 of 3
5 4 3 2 1
5 4 3 2 1
D D
P7
BORNA 3P R6 R7
3 1
J1A
1
2
3
2
R10
1
2
3
+15 -15 +15V
-15V
+15V -15V R4
U3 C9
3
LM555N
C6
DSCHG 7
P1 3 D3 U4
OUT R5
2
4
5
LED
U1 4 RST TRG 2 LM741
2
4
5
-
LM741 5 CV THR 6 6
D1
1
2 3
C5
- +
6
VCC
GND
3 + C1
7
1
C
R1 C11 C
8
1
7
1
+15V R8
C7 C2
R3
C8
C3
J2 R0
R9
1 vin
1 +15V
2 2
BORNA 2P
+15V
C4
-15V
+15V
C13
Q1
-15V BD135
3
C10
U5
3
LM741 P3
1
7
P2 U2 LS1 + 3 2
B 2 vo Q2 6 B
4
5
LM741 8R-1/2W BD136 - 2
D2
2 -
1
1
5
4
3 +
7
1
C14
R2 -15V
-15V
C12
+15V
A A
Title
SISTEMAS ELECTRÓNICOS. 4º CURSO INGENIERÍA INDUSTRIAL
Size Document Number Rev
B Sistema para el Control de Temperatura. ALARMA J.C.
Date: Sheet 2 of 3
5 4 3 2 1
5 4 3 2 1
D D
R4
-15V
BORNA 3P
1
6
5
J1A
C2
1
2
3
U2
1
2
3
+15 -15 D1 4N25
2
3
4
U1
4
5
J2
LM741
2 vi 2 -
2
C 1 1 6 C
D2 R5
3 +
R3 L
BORNA 2P
7
1
R7
C3
J4 R6
D3 2
+15V 2 R8
1 1
LED
BORNA 2P
R2
J3
3
2
8
7
6
5
RED 2
1 1
P1
VS
2 U3
OUT
GND
B B
1
RAMPE VSYNC
CRAMP
OP+
OP-
R1
1
2
3
4
C1 R9
A A
Title
SISTEMAS ELECTRÓNICOS. 4º CURSO INGENIERÍA INDUSTRIAL
Size Document Number Rev
B Sistema para el Control de Temperatura. ACTUADOR J.C.
Date: Sheet 3 of 3
5 4 3 2 1
PT100 TEMPERATURE / RESISTANCE TABLE
°C 0 1 2 3 4 5 6 7 8 9 °C
LM741
Operational Amplifier
General Description The LM741C is identical to the LM741/LM741A except that
the LM741C has their performance guaranteed over a 0˚C to
The LM741 series are general purpose operational amplifi- +70˚C temperature range, instead of −55˚C to +125˚C.
ers which feature improved performance over industry stan-
dards like the LM709. They are direct, plug-in replacements
for the 709C, LM201, MC1439 and 748 in most applications.
The amplifiers offer many features which make their applica-
tion nearly foolproof: overload protection on the input and
output, no latch-up when the common mode range is ex-
ceeded, as well as freedom from oscillations.
Connection Diagrams
Dual-In-Line or S.O. Package
Metal Can Package
DS009341-3
DS009341-6
Typical Application
Offset Nulling Circuit
DS009341-7
www.national.com 2
LM741
Electrical Characteristics (Note 5) (Continued)
3 www.national.com
LM741
Electrical Characteristics (Note 5) (Continued)
Note 3: For operation at elevated temperatures, these devices must be derated based on thermal resistance, and Tj max. (listed under “Absolute Maximum Rat-
ings”). Tj = TA + (θjA PD).
Thermal Resistance Cerdip (J) DIP (N) HO8 (H) SO-8 (M)
θjA (Junction to Ambient) 100˚C/W 100˚C/W 170˚C/W 195˚C/W
θjC (Junction to Case) N/A N/A 25˚C/W N/A
Note 4: For supply voltages less than ± 15V, the absolute maximum input voltage is equal to the supply voltage.
Note 5: Unless otherwise specified, these specifications apply for VS = ± 15V, −55˚C ≤ TA ≤ +125˚C (LM741/LM741A). For the LM741C/LM741E, these specifica-
tions are limited to 0˚C ≤ TA ≤ +70˚C.
Note 6: Calculated value from: BW (MHz) = 0.35/Rise Time(µs).
Note 7: For military specifications see RETS741X for LM741 and RETS741AX for LM741A.
Note 8: Human body model, 1.5 kΩ in series with 100 pF.
Schematic Diagram
DS009341-1
www.national.com 4
LM741
Physical Dimensions inches (millimeters) unless otherwise noted
5 www.national.com
LM741
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
www.national.com 6
Philips Semiconductors Product specification
FEATURES PINNING
• Low current (max. 100 mA) PIN DESCRIPTION
• Low voltage (max. 65 V). 1 emitter
2 base
APPLICATIONS 3 collector
• General purpose switching and amplification.
1
MAM281
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCBO collector-base voltage open emitter
BC556 − −80 V
BC557 − −50 V
VCEO collector-emitter voltage open base
BC556 − −65 V
BC557 − −45 V
VEBO emitter-base voltage open collector − −5 V
IC collector current (DC) − −100 mA
ICM peak collector current − −200 mA
IBM peak base current − −200 mA
Ptot total power dissipation Tamb ≤ 25 °C − 500 mW
Tstg storage temperature −65 +150 °C
Tj junction temperature − 150 °C
Tamb operating ambient temperature −65 +150 °C
1999 Apr 15 2
Philips Semiconductors Product specification
THERMAL CHARACTERISTICS
Note
1. Transistor mounted on an FR4 printed-circuit board.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
Notes
1. VBEsat decreases by about −1.7 mV/K with increasing temperature.
2. VBE decreases by about −2 mV/K with increasing temperature.
1999 Apr 15 3
Philips Semiconductors Product specification
MBH726
300
handbook, full pagewidth
hFE
200
VCE = −5 V
100
0
−10−1 −1 −10 −102 IC (mA) −103
BC556A.
MBH727
400
handbook, full pagewidth
hFE
VCE = −5 V
300
200
100
0
−10−2 −10−1 −1 −10 −102 IC (mA) −103
BC556B; BC557B.
1999 Apr 15 4
Philips Semiconductors Product specification
MBH728
600
handbook, full pagewidth
hFE
500
VCE = −5 V
400
300
200
100
0
−10−2 −10−1 −1 −10 −102 IC (mA) −103
BC557C.
1999 Apr 15 5
Philips Semiconductors Product specification
PACKAGE OUTLINE
d A L
1
e1
2
D e
b1
L1
0 2.5 5 mm
scale
UNIT A b b1 c D d E e e1 L L1(1)
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
1999 Apr 15 6
LM555 Timer
February 2000
LM555
Timer
General Description Features
The LM555 is a highly stable device for generating accurate n Direct replacement for SE555/NE555
time delays or oscillation. Additional terminals are provided n Timing from microseconds through hours
for triggering or resetting if desired. In the time delay mode of n Operates in both astable and monostable modes
operation, the time is precisely controlled by one external re- n Adjustable duty cycle
sistor and capacitor. For astable operation as an oscillator, n Output can source or sink 200 mA
the free running frequency and duty cycle are accurately
n Output and supply TTL compatible
controlled with two external resistors and one capacitor. The
circuit may be triggered and reset on falling waveforms, and n Temperature stability better than 0.005% per ˚C
the output circuit can source or sink up to 200mA or drive n Normally on and normally off output
TTL circuits. n Available in 8-pin MSOP package
Applications
n Precision timing
n Pulse generation
n Sequential timing
n Time delay generation
n Pulse width modulation
n Pulse position modulation
n Linear ramp generator
Schematic Diagram
DS007851-1
DS007851-3
Top View
Ordering Information
Package Part Number Package Marking Media Transport NSC Drawing
8-Pin SOIC LM555CM LM555CM Rails
M08A
LM555CMX LM555CM 2.5k Units Tape and Reel
8-Pin MSOP LM555CMM Z55 1k Units Tape and Reel
MUA08A
LM555CMMX Z55 3.5k Units Tape and Reel
8-Pin MDIP LM555CN LM555CN Rails N08E
www.national.com 2
LM555
Absolute Maximum Ratings (Note 2) Soldering Information
If Military/Aerospace specified devices are required, Dual-In-Line Package
please contact the National Semiconductor Sales Office/ Soldering (10 Seconds) 260˚C
Distributors for availability and specifications. Small Outline Packages
Supply Voltage +18V (SOIC and MSOP)
Power Dissipation (Note 3) Vapor Phase (60 Seconds) 215˚C
LM555CM, LM555CN 1180 mW Infrared (15 Seconds) 220˚C
LM555CMM 613 mW See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
Operating Temperature Ranges surface mount devices.
LM555C 0˚C to +70˚C
Storage Temperature Range −65˚C to +150˚C
3 www.national.com
LM555
Electrical Characteristics (Notes 1, 2) (Continued)
www.national.com 4
LM555
Typical Performance Characteristics
Minimuim Pulse Width Supply Current vs.
Required for Triggering Supply Voltage
DS007851-4 DS007851-19
DS007851-20 DS007851-21
DS007851-22 DS007851-23
5 www.national.com
LM555
Typical Performance Characteristics (Continued)
DS007851-24 DS007851-25
DS007851-26 DS007851-27
www.national.com 6
LM555
Applications Information
MONOSTABLE OPERATION NOTE: In monostable operation, the trigger should be driven
In this mode of operation, the timer functions as a one-shot high before the end of timing cycle.
(Figure 1). The external capacitor is initially held discharged
by a transistor inside the timer. Upon application of a nega-
tive trigger pulse of less than 1/3 VCC to pin 2, the flip-flop is
set which both releases the short circuit across the capacitor
and drives the output high.
DS007851-7
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (pins 2 and 6
connected) it will trigger itself and free run as a multivibrator.
DS007851-5 The external capacitor charges through RA + RB and dis-
FIGURE 1. Monostable charges through RB. Thus the duty cycle may be precisely
set by the ratio of these two resistors.
The voltage across the capacitor then increases exponen-
tially for a period of t = 1.1 RA C, at the end of which time the
voltage equals 2/3 VCC. The comparator then resets the
flip-flop which in turn discharges the capacitor and drives the
output to its low state. Figure 2 shows the waveforms gener-
ated in this mode of operation. Since the charge and the
threshold level of the comparator are both directly propor-
tional to supply voltage, the timing internal is independent of
supply.
DS007851-8
FIGURE 4. Astable
DS007851-6 In this mode of operation, the capacitor charges and dis-
VCC = 5V Top Trace: Input 5V/Div. charges between 1/3 VCC and 2/3 VCC. As in the triggered
TIME = 0.1 ms/DIV. Middle Trace: Output 5V/Div. mode, the charge and discharge times, and therefore the fre-
RA = 9.1kΩ Bottom Trace: Capacitor Voltage 2V/Div. quency are independent of the supply voltage.
C = 0.01µF
FIGURE 2. Monostable Waveforms
During the timing cycle when the output is high, the further
application of a trigger pulse will not effect the circuit so long
as the trigger input is returned high at least 10µs before the
end of the timing interval. However the circuit can be reset
during this time by the application of a negative pulse to the
reset terminal (pin 4). The output will then remain in the low
state until a trigger pulse is again applied.
When the reset function is not in use, it is recommended that
it be connected to VCC to avoid any possibility of false trig-
gering.
Figure 3 is a nomograph for easy determination of R, C val-
ues for various time delays.
7 www.national.com
LM555
Applications Information (Continued)
DS007851-11
DS007851-12
DS007851-13
www.national.com 8
LM555
Applications Information (Continued)
DS007851-16
FIGURE 12.
DS007851-14
VBE . 0.6V
FIGURE 10. Pulse Position Modulator
DS007851-17
9 www.national.com
LM555
Applications Information (Continued)
DS007851-18
Note that this circuit will not oscillate if RB is greater than 1/2
RA because the junction of RA and RB cannot bring pin 2
down to 1/3 VCC and trigger the lower comparator.
ADDITIONAL INFORMATION
Adequate power supply bypassing is necessary to protect
associated circuitry. Minimum recommended is 0.1µF in par-
allel with 1µF electrolytic.
Lower comparator storage time can be as long as 10µs
when pin 2 is driven fully to ground for triggering. This limits
the monostable pulse width to 10µs minimum.
Delay time reset to output is 0.47µs typical. Minimum reset
pulse width must be 0.3µs, typical.
Pin 7 current switches within 30ns of the output (pin 3) volt-
age.
www.national.com 10
LM555
Physical Dimensions inches (millimeters) unless otherwise noted
11 www.national.com
LM555 Timer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
Philips Semiconductors Product specification
FEATURES PINNING
• Low current (max. 100 mA) PIN DESCRIPTION
• Low voltage (max. 65 V). 1 emitter
2 base
APPLICATIONS 3 collector
• General purpose switching and amplification.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCBO collector-base voltage open emitter
BC546 − 80 V
BC547 − 50 V
VCEO collector-emitter voltage open base
BC546 − 65 V
BC547 − 45 V
VEBO emitter-base voltage open collector
BC546 − 6 V
BC547 − 6 V
IC collector current (DC) − 100 mA
ICM peak collector current − 200 mA
IBM peak base current − 200 mA
Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 500 mW
Tstg storage temperature −65 +150 °C
Tj junction temperature − 150 °C
Tamb operating ambient temperature −65 +150 °C
Note
1. Transistor mounted on an FR4 printed-circuit board.
1999 Apr 15 2
Philips Semiconductors Product specification
THERMAL CHARACTERISTICS
Note
1. Transistor mounted on an FR4 printed-circuit board.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
Notes
1. VBEsat decreases by about 1.7 mV/K with increasing temperature.
2. VBE decreases by about 2 mV/K with increasing temperature.
1999 Apr 15 3
Philips Semiconductors Product specification
MBH723
250
handbook, full pagewidth
hFE
200
VCE = 5 V
150
100
50
0
10−2 10−1 1 10 102 IC (mA) 103
BC546A.
MBH724
300
handbook, full pagewidth
hFE VCE = 5 V
200
100
0
10−2 10−1 1 10 102 IC (mA) 103
BC546B; BC547B.
1999 Apr 15 4
Philips Semiconductors Product specification
MBH725
600
handbook, full pagewidth
VCE = 5 V
hFE
400
200
0
10−2 10−1 1 10 102 IC (mA) 103
BC547C.
1999 Apr 15 5
Philips Semiconductors Product specification
PACKAGE OUTLINE
d A L
1
e1
2
D e
b1
L1
0 2.5 5 mm
scale
UNIT A b b1 c D d E e e1 L L1(1)
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
1999 Apr 15 6
BD135
BD139
DESCRIPTION
The BD135 and BD139 are silicon epitaxial
planar NPN transistors in Jedec SOT-32 plastic
package, designed for audio amplifiers and
drivers utilizing complementary or quasi
compementary circuits. 1
The complementary PNP types are BD136 and 2
3
BD140 respectively.
SOT-32
THERMAL DATA
o
R t hj-ca se Thermal Resistance Junction-case Max 10 C/W
2/4
BD135 / BD139
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
e 2.2 0.087
F 3.8 0.150
H 2.54 0.100
H2
c1
0016114
3/4
BD136
BD138/BD140
DESCRIPTION
The BD136, BD138 and BD140 are silicon
epitaxial planar PNP transistors in Jedec SOT-32
plastic package, designed for audio amplifiers
and drivers utilizing complementary or quasi
compementary circuits. 1
The complementary NPN types are the BD135 2
3
BD137 and BD139.
SOT-32
THERMAL DATA
o
R t hj-ca se Thermal Resistance Junction-case Max 10 C/W
2/4
BD136/BD138/BD140
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
e 2.2 0.087
F 3.8 0.150
H 2.54 0.100
H2 2.15 0.084
H2
0016114
3/4
PHOTOTRANSISTOR
Industry Standard
Single Channel
6 Pin DIP Optocoupler
DEVICE TYPES
Dimensions in Inches (mm)
Part No. CTR % Min. Part No. CTR % Min.
4N25 20 MCT2 20 3 2 1
pin one ID
4N26 20 MCT2E 20
Anode 1 6 Base
4N27 10 MCT270 50 .248 (6.30)
.256 (6.50)
4N28 10 MCT271 45–90 Cathode 2 5 Collector
4N35 100 MCT272 75–150 4 5 6
NC 3 4 Emitter
4N36 100 MCT273 125–250
.335 (8.50)
4N37 100 MCT274 225–400 .343 (8.70)
4N38 10 MCT275 70–90 .048 (0.45)
.300 (7.62)
.039 typ.
H11A1 50 MCT276 15–60 (1.00) .022 (0.55)
Min.
H11A2 20 MCT277 100 .130 (3.30)
.150 (3.81)
H11A3 20
4° 18°
H11A4 10 typ. .114 (2.90)
.031 (0.80) min. .130 (3.0)
H11A5 30 3°–9° .010 (.25)
.031 (0.80) typ.
.018 (0.45) .035 (0.90)
FEATURES .022 (0.55) .300–.347
• Interfaces with Common Logic Families .100 (2.54) typ. (7.62–8.81)
• Input-output Coupling Capacitance < 0.5 pF
• Industry Standard Dual-in-line 6-pin Package DESCRIPTION
• Field Effect Stable by TRIOS® This data sheet presents five families of Infineon Industry Standard
• 5300 VRMS Isolation Test Voltage Single Channel Phototransistor Couplers. These families include the
• Underwriters Laboratory File #E52744 4N25/26/27/28 types, the 4N35/36/37/38 couplers, the H11A1/A2/
• V VDE #0884 Approval Available with Option 1
D E A3/A4/A5, the MCT2/2E, and MCT270/271/272/273/274/275/276/
277 devices.Each optocoupler consists of Gallium Arsenide infra-
APPLICATIONS red LED and a silicon NPN phototransistor.
• AC Mains Detection
These couplers are Underwriters Laboratories (UL) listed to comply
• Reed Relay Driving
with a 5300 VRMS Isolation Test Voltage. This isolation performance
• Switch Mode Power Supply Feedback is accomplished through Infineon double molding isolation manu-
• Telephone Ring Detection facturing process. Compliance to VDE 0884 partial discharge isola-
• Logic Ground Isolation tion specification is available for these families by ordering option 1.
• Logic Coupling with High Frequency Noise Phototransistor gain stability, in the presence of high isolation volt-
Rejection ages, is insured by incorporating a TRansparent lOn Shield
Notes: (TRIOS)® on the phototransistor substrate. These isolation pro-
Designing with data sheet is covered in Application Note 45. cesses and the Infineon IS09001 Quality program results in the
highest isolation performance available for a commercial plastic
phototransistor optocoupler.
The devices are available in lead formed configuration suitable for
surface mounting and are available either on tape and reel, or in
standard tube shipping containers.
4N25/26/27/28—Characteristics TA=25°C
Emitter Symbol Min. Typ. Max. Unit Condition
Forward Voltage* VF — 1.3 1.5 V IF=50 mA
Reverse Current* IR — 0.1 100 µA VR=3.0 V
Capacitance CO — 25 — pF VR=0
Detector
Breakdown Voltage* Collector-Emitter BVCEO 30 — — V IC=1.0 mA
Emitter-Collector BVECO 7.0 — — IE=100 µA
Collector-Base BVCBO 70 — — IC=100 µA
ICEO(dark)* 4N25/26/27 — — 5.0 50 nA VCE=10 V, (base open)
4N28 10 100
ICBO(dark)* — — 2.0 20 nA VCB=10 V, (emitter open)
Capacitance, Collector-Emitter CCE — 6.0 — pF VCE=0
Package
DC Current Transfer Ratio* 4N25/26 CTR 20 50 — % VCE=10 V, IF=10 mA
4N27/28 10 30 —
Isolation Voltage* 4N25 VIO 2500 — — V Peak, 60 Hz
4N26/27 1500 — —
4N28 500 — —
Saturation Voltage, Collector-Emitter VCE(sat) — — 0.5 V ICE=2.0 mA, IF=50 mA
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA Phototransistor, Industry Standard
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178 3 March 27, 2000-00
MCT2/MCT2E—Characteristics TA=25°C
Emitter Symbol Min. Typ. Max. Unit Condition
Forward Voltage VF — 1.1 1.5 V IF=20 mA
Reverse Current IR — — 10 µA VR=3.0 V
Capacitance CO — 25 — pF VR=0, f=1.0 MHz
Detector
Breakdown Voltage Collector-Emitter BVCEO 30 — — V IC=1.0 mA, IF=0 mA
Emitter-Collector BVECO 7.0 — — IE=100 µA, IF=0 mA
Collector-Base BVCBO 70 — — IC=10 µA, IF=0 mA
Leakage Current Collector-Emitter ICBO — 5.0 50 nA VCE=10 V, IF=0
Collector-Base ICBO — — 20 —
Capacitance, Collector-Emitter — CCE — 10 — pF VCE=0
Package
DC Current Transfer Ratio CTR 20 60 — % VCE=10 V, IF=10 mA
Capacitance, Input to Output C IO — 0.5 — pF —
Resistance, Input to Output RIO — 100 — GΩ —
Switching Time tON, tOFF — 3.0 — µs IC=2.0 mA, RL=100 Ω, VCE=10 V
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA Phototransistor, Industry Standard
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178 4 March 27, 2000-00
Figure 9. Forward Voltage vs. Forward Current Figure 12. Normalized Non-saturated and Saturated
CTR, TA=70°C vs. LED Current
1.4 1.5
Normalized to:
1.3 Vce=10 V, IF=10 mA, TA=25°C
1.0
0.5
0.9 TA = 85°C
NCTR(SAT)
0.8 NCTR
0.7 0.0
.1 1 10 100 .1 1 10 100
IF - Forward Current - mA IF - LED Current - mA
Figure 10. Normalized Non-saturated and Saturated Figure 13. Normalized Non-saturated and Saturated
CTR, TA=25°C vs. LED Current CTR, TA=85°C vs. LED Current
1.5
Normalized to: 1.5
Normalized to:
Vce=10 V, IF=10 mA, TA=25°C
Vce=10 V, IF=10 mA, TA=25°C
CTRce(sat) Vce=0.4 V
CTRce(sat) Vce = 0.4 V
1.0 1.0
TA=25°C TA=85°C
0.5 0.5
NCTR(SAT)
NCTR(SAT)
NCTR
NCTR
0.0 0.0
0 1 10 100 .1 1 10 100
IF - LED Current - mA IF - LED Current - mA
Figure 11. Normalized Non-saturated and Saturated Figure 14. Collector-emitter Current vs. Temperature
CTR, TA=50°C vs. LED Current and LED Current
1.5 35
Normalized to:
Ice - Collector Current - mA
CTRce(sat) Vce=0.4 V
25
1.0 50°C
TA=50°C 20
70°C
15
25°C 85°C
0.5 10
NCTR(SAT)
5
NCTR
0.0 0
.1 1 10 100 0 10 20 30 40 50 60
IF - LED Current - mA IF - LED Current - mA
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA Phototransistor, Industry Standard
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178 5 March 27, 2000-00
Figure 15. Collector-emitter Leakage Current vs. Temp. Figure 18. Normalized Non-saturated HFE vs. Base
5 Current and Temperature
10
1.2
Iceo - Collector-Emitter - nA
4 70°C
10
50°C
10 –2
–20 0 20 40 60 80 100 0.4
1 10 100 1000
TA - Ambient Temperature - °C Ib - Base Current - µA
Figure 16. Normalized CTRcb vs. LED Current and Temp. Figure 19. Normalized HFE vs. Base Current and Temp.
1.5 1.5
NCTRcb - Normalized CTRcb
NHFE(sat) - Normalized
Vcb=9.3 V, IF=10 mA, TA=25°C Vce=10 V, Ib=20 µA
70°C 50°C TA=25°C
1.0 1.0
Saturated HFE
25°C
–20°C
0.5 0.5
25°C
50°C Vce=0.4 V
70°C
0.0 0.0
.1 1 10 100 1 10 100 1000
IF - LED Current - mA Ib - Base Current - µA
Figure 17. Normalized Photocurrent vs. IF and Temp. Figure 20. Propagation Delay vs. Collector Load Resistor
10 1000 2.5
Normalized to: tPLH - Propagation Delay - µs IF=10 mA, TA=25°C
tPHL
1 100 2.0
0.1 10 1.5
Nib, TA=–20°C
Nib, TA=25°C tPLH
Nib, TA= 50°C
Nib, TA=70°C
0.01 1 1.0
.1 1 10 100 .1 1 10 100
IF - LED Current - mA RL - Collector Load Resistor - kΩ
IF VCC = 5.0 V
F=10 KHz, RL
DF=50%
tD
VO tR VO
tPLH
IF =10 mA
VTH=1.5 V
tPHL tS tF
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA Phototransistor, Industry Standard
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178 6 March 27, 2000-00
Philips Semiconductors Product specification
1 main terminal 1
T2 T1
2 main terminal 2
3 gate
1 23 G
tab main terminal 2
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
-600 -800
VDRM Repetitive peak off-state - 6001 800 V
voltages
IT(RMS) RMS on-state current full sine wave; Tmb ≤ 102 ˚C - 8 A
ITSM Non-repetitive peak full sine wave; Tj = 25 ˚C prior to
on-state current surge
t = 20 ms - 65 A
t = 16.7 ms - 71 A
2 2
It I t for fusing t = 10 ms - 21 A2s
dIT/dt Repetitive rate of rise of ITM = 12 A; IG = 0.2 A;
on-state current after dIG/dt = 0.2 A/µs
triggering T2+ G+ - 50 A/µs
T2+ G- - 50 A/µs
T2- G- - 50 A/µs
T2- G+ - 10 A/µs
IGM Peak gate current - 2 A
VGM Peak gate voltage - 5 V
PGM Peak gate power - 5 W
PG(AV) Average gate power over any 20 ms period - 0.5 W
Tstg Storage temperature -40 150 ˚C
Tj Operating junction - 125 ˚C
temperature
1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may
switch to the on-state. The rate of rise of current should not exceed 6 A/µs.
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Rth j-mb Thermal resistance full cycle - - 2.0 K/W
junction to mounting base half cycle - - 2.4 K/W
Rth j-a Thermal resistance in free air - 60 - K/W
junction to ambient
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
BT137- ... ...F ...G
IGT Gate trigger current VD = 12 V; IT = 0.1 A
T2+ G+ - 5 35 25 50 mA
T2+ G- - 8 35 25 50 mA
T2- G- - 11 35 25 50 mA
T2- G+ - 30 70 70 100 mA
IL Latching current VD = 12 V; IGT = 0.1 A
T2+ G+ - 7 30 30 45 mA
T2+ G- - 16 45 45 60 mA
T2- G- - 5 30 30 45 mA
T2- G+ - 7 45 45 60 mA
IH Holding current VD = 12 V; IGT = 0.1 A - 5 20 20 40 mA
VT On-state voltage IT = 10 A - 1.3 1.65 V
VGT Gate trigger voltage VD = 12 V; IT = 0.1 A - 0.7 1.5 V
VD = 400 V; IT = 0.1 A; 0.25 0.4 - V
Tj = 125 ˚C
ID Off-state leakage current VD = VDRM(max); - 0.1 0.5 mA
Tj = 125 ˚C
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise stated
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
BT137- ... ...F ...G
dVD/dt Critical rate of rise of VDM = 67% VDRM(max); 100 50 200 250 - V/µs
off-state voltage Tj = 125 ˚C; exponential
waveform; gate open
circuit
dVcom/dt Critical rate of change of VDM = 400 V; Tj = 95 ˚C; - - 10 20 - V/ µs
commutating voltage IT(RMS) = 8 A;
dIcom/dt = 3.6 A/ms; gate
open circuit
tgt Gate controlled turn-on ITM = 12 A; VD = VDRM(max); - - - 2 - µs
time IG = 0.1 A; dIG/dt = 5 A/µs
4
4 117
2 121 2
0 125 0
0 2 4 6 8 10 -50 0 50 100 150
IT(RMS) / A Tmb / C
Fig.1. Maximum on-state dissipation, Ptot, versus rms Fig.4. Maximum permissible rms current IT(RMS) ,
on-state current, IT(RMS), where α = conduction angle. versus mounting base temperature Tmb.
ITSM / A IT(RMS) / A
1000 I TSM 25
IT
time 20
Tj initial = 25 C max
15
100
dI T /dt limit
10
T2- G+ quadrant
5
10 0
10us 100us 1ms 10ms 100ms 0.01 0.1 1 10
T/s surge duration / s
Fig.2. Maximum permissible non-repetitive peak Fig.5. Maximum permissible repetitive rms on-state
on-state current ITSM, versus pulse width tp, for current IT(RMS), versus surge duration, for sinusoidal
sinusoidal currents, tp ≤ 20ms. currents, f = 50 Hz; Tmb ≤ 102˚C.
ITSM / A VGT(Tj)
80
VGT(25 C)
1.6
IT ITSM
70
T time 1.4
60
50 Tj initial = 25 C max
1.2
40
1
30
0.8
20
0.6
10
0 0.4
1 10 100 1000 -50 0 50 100 150
Number of cycles at 50Hz Tj / C
Fig.3. Maximum permissible non-repetitive peak Fig.6. Normalised gate trigger voltage
on-state current ITSM, versus number of cycles, for VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.
sinusoidal currents, f = 50 Hz.
IGT(Tj) IT / A
25
IGT(25 C) Tj = 125 C
3
T2+ G+ Tj = 25 C
typ max
T2+ G- 20
2.5 Vo = 1.264 V
T2- G- Rs = 0.0378 Ohms
T2- G+
2 15
1.5
10
1
5
0.5
0 0
-50 0 50 100 150 0 0.5 1 1.5 2 2.5 3
Tj / C VT / V
Fig.7. Normalised gate trigger current Fig.10. Typical and maximum on-state characteristic.
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.
2.5 unidirectional
1 bidirectional
2
1.5
0.1 P tp
D
1
t
0.5
0.01
0 10us 0.1ms 1ms 10ms 0.1s 1s 10s
-50 0 50 100 150
Tj / C tp / s
Fig.8. Normalised latching current IL(Tj)/ IL(25˚C), Fig.11. Transient thermal impedance Zth j-mb, versus
versus junction temperature Tj. pulse width tp.
1.5 dIcom/dt =
10 A/ms 7.9 6.1 4.7 3.6 2.8
1 10
0.5
0 1
-50 0 50 100 150 0 50 100 150
Tj / C Tj / C
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C), Fig.12. Typical commutation dV/dt versus junction
versus junction temperature Tj. temperature, parameter commutation dIT/dt. The triac
should commutate when the dV/dt is below the value
on the appropriate curve for pre-commutation dIT/dt.
MECHANICAL DATA
Dimensions in mm
4,5
Net Mass: 2 g max
10,3
max
1,3
3,7
2,8 5,9
min
15,8
max
3,0 max
3,0
not tinned
13,5
min
1,3
max 1 2 3
(2x) 0,9 max (3x)
0,6
2,54 2,54 2,4
Notes
1. Refer to mounting instructions for SOT78 (TO220) envelopes.
2. Epoxy meets UL94 V0 at 1/8".
Description
The integrated circuit, U217B, is designed as a zero- by period group control, whereas full wave logic
voltage switch in bipolar technology. It is used to control guarantees that full mains cycles are used for load
resistive loads at mains by a triac in zero-crossing mode. switching.
A ramp generator allows to realize power control function
Features Applications
D Direct supply from the mains D Full wave power control
D Current consumption ≤ 0.5 mA
D Temperature regulation
D Very few external components
D Full wave drive – no dc current component in the load
D Power blinking switch
circuit
D Negative output current pulse typ. 100 mA – Package: DIP8, SO8
short circuit protected
D Simple power control
D Ramp generator
D Reference voltage
Block Diagram
95 10872
D1 BYT86/800 L
C2 R4 C1
2 8 5
100 kW 100 mF/ VM =
2.2 mF/ 1 7 16 V
Ramp 230 V~
10 V Synchronization Supply
generator TIC
GND 236N MT2
R5
15 kW 3
+ 6 100 W MT1
max 4 + Full wave logic
– Comparator Pulse R3 G
100 kW amplifier
min Reference voltage
R6 1.25 V
58 kW
N
Figure 1. Block diagram with typical circuit, period group control 0 to 100%
(GND), figure 9.
95 11306
IL ( mA)
0.10
200
100
50
0.01
Ramp 10 100 1000 10000
1 control 96 11939 P(W)
Figure 4.
2 C2
–V S 2000
1600
Figure 2. Pin 1 internal network
VM=230V AC
Tamb=25°C
W)
1200
t
RSync ( k
V1
Final voltage 800
1.4 V
Vmin
400
Figure 3. Figure 5.
50 6
5
VMains=230V X
40
VMains=230V X 4
R1 ( k )
PR1 ( W )
30
W
20
2
10 1
0 0
0 3 6 9 12 15 0 3 6 9 12 15
95 10114 Itot ( mA ) 95 10116 Itot ( mA )
Figure 6. Figure 7.
Thermal Resistance
Parameters Symbol Maximum Unit
Junction ambient RthJA 200 K/W
Electrical Characteristics
–V S = 8.5 V, Tamb = 25°C, reference point Pin 7, unless otherwise specified
Parameters Test Conditions / Pin Symbol Min Typ Max Unit
Supply voltage limitation –I S = 5 mA Pin 5 –V S 8.6 9.25 9.9 V
Supply current Pin 5 –I S 500 mA
Voltage limitation I8 = ± 1 mA Pin 8 ± VI 7.5 8.7 V
Synchronous current Pin 8 ±Isync 0.12 mA
Zero detector ±Isync 35 mA
Output pulse width VM= 230 V ,
Rsync = 220 k W tP 260 ms
Rsync = 470 k W 460
Output pulse current V6 = 0 V Pin 6 –I O 100 mA
Comparator
Input offset voltage Pin 3,4 VI0 5 15 mV
Input bias current Pin 4 IIB 1 mA
Common mode input Pin 3,4 –V IC 1 (VS–1) V
voltage
Threshold internal V3 = 0 V Pin 4 –V T 1.25 V
reference
Ramp generator, Pin 1, figure 1
Period –I S= 1 mA, Isync =1 mA,
m
C1 = 100 F, C2 = 1 F, m
R4= 100 k W T 1.5 s
Final voltage V1 0.9 1.40 1.80 V
Initial voltage 6.8 7.3 7.8
Charge current V2 = 0 V, I8 = –1 mA Pin 2 –I 2 13 17 26 mA
56 W 18 k W
1.5 W
N VDR
+5 V
8 7 6 5
CNY21
U217B
1 2 3 4
56 k W
m
47 F/
II 1.5 mA
10 V 39 k W
VI
95 11308
95 11309
D1 BYT86/800 L
m
2.2 F/ C2
10 V 220 kW R2
R1
W
18 k / Load
(250 V~) (Rsync) 2W 1000 W
R8
R4
470 k W 100 k W 2 8 5 C1
BC237 VM =
1 Ramp 7 230 V~
Synchronization Supply
NTC/M87 generator
R(25) R6 1)
B value =
3988 100 k W 100 k W R5
3
+ 6 100 W
4 + Full wave logic
R9 – Pulse R3
Comparator
150 W amplifier
Reference voltage
Rp R7 1.25 V
220 k W 130 k W
N
0.5 ...
2.2 kW 270 k W BYT86/800
82 W 56 W
N
8 7 6 5
U217B
1 2 3 4
150 k W 110 k W
Figure 10. Power blinking switch with f 2.7 Hz, duty cycle 1:1, power range 0.5 to 2.2 kW
680 kW
R2
R3 13 kW/2 W
IH = 50 mA 62 W
N
1N4148
R16
8 7 6 5
220 k W
R6
U217B 9.1 k W
R7
1 2 3 4 12 k W
R10 R15
W
910 k
C3
25 k W
R9 10 nF C1
NTC
12 k W W
33 k
2.2 mF
R8
C5 100 mF/ C4 C2
12 V 47 mF 56 k W 1 mF
95 11311
Figure 11. Room temperature control with definite reduction (remote control) for a temperature range 5 to 30°C
VM = 230 V ~
18 kW
1.5 W
VDR
56 W
N
8 7 6 5
220 kW
(680 kW)
U217B
500 kW
1 2 3 4 (2 MW)
10 nF 50 kW
68 mF/ (200 kW)
NTC
10 V
95 11312
92 W
N
R3
8 7 6 5
NTC
200 k W
U217B
D2
1N4148
1 2 3 4
R6
R15/ 50 k W
27 k W
330 k W
R5
R4/ 39 k W
R7/ 8.2 k W C2
150 nF
C3 C1
33 F/m 68 mF/
10 V 10 V
95 11313
Figure 13. Two-point temperature control for a temperature range 18 to 32°C and hysteresis of ± 0.5°C at 25°C
94 8873
Package: SO8
94 8862
E6 E12 E24 E48 E96 E192 E6 E12 E24 E48 E96 E192 E6 E12 E24 E48 E96 E192
100 100 100 100 100 100 215 215 215 464 464 464
101 220 220 220 218 470 470 470 470
102 102 221 221 475 475
104 223 481
105 105 105 226 226 226 187 187 187
106 229 193
107 107 232 232 499 499
109 234 505
110 110 110 110 237 237 237 510 511 511 511
111 240 240 517
113 113 244 244 523 523
114 246 530
115 115 115 249 249 249 536 536 536
117 252 542
118 118 255 255 549 549
120 120 120 258 556
121 121 121 261 261 261 560 560 562 562 562
123 264 569
124 124 267 267 576 576
126 270 270 271 583
127 127 127 274 274 274 590 590 590
129 277 597
130 130 130 280 280 604 604
132 284 612
133 133 133 287 287 287 620 619 619 619
135 291 626
137 137 294 294 634 634
138 298 642
140 140 140 300 301 301 301 649 649 649
142 305 657
143 143 309 309 665 665
145 312 673
147 147 147 316 316 316 680 680 680 681 681 681
149 320 690
150 150 150 150 150 324 324 698 698
152 330 330 330 328 706
154 154 154 332 332 332 715 715 715
156 336 723
158 158 340 340 732 732
160 160 344 741
162 162 162 348 348 348 750 750 750 750
164 352 759
165 165 357 357 768 768
167 360 361 777
169 169 169 365 365 365 787 787 787
172 370 796
174 174 374 374 806 806
176 379 820 820 816
178 178 178 383 383 383 825 825 825
180 180 180 390 390 388 835
182 182 392 392 845 845
184 397 856
187 187 187 402 402 402 866 866 866
189 407 876
191 191 412 412 887 887
193 417 898
196 196 196 422 422 422 910 909 909 909
198 430 427 920
200 200 200 432 432 931 931
203 437 942
205 205 205 442 442 442 953 953 953
208 448 965
210 210 453 453 976 976
213 458 988
4 bandas
5 bandas 6 bandas