Component Modeling and Three-Phase Power-Flow Analysis For Active Distribution Systems

Component Modeling and Three-Phase Power-Flow
Analysis for Active Distribution Systems
by
Mohamed Zakaria Kamh
A thesis submitted in conformity with the requirements

for the degree of Doctor of Philosophy
Graduate Department of Electrical and Computer Engineering
University of Toronto
Copyright 2011 by Mohamed Zakaria Kamh
Abstract
Component Modeling and Three-Phase Power-Flow Analysis for Active Distribution
Systems
Mohamed Zakaria Kamh
Doctor of Philosophy
Graduate Department of Electrical and Computer Engineering
University of Toronto
2011
This thesis presents a novel, fast, and accurate 3 steady-state power-ow analysis (PFA)
tool for the real-time operation of the active distribution systems, also known as the active
distribution networks (ADN), in the grid-tied and islanded operating modes. Threephase power-ow models of loads, transformers, and multi-phase power lines and laterals
are provided. This thesis also presents novel steady-state, fundamental-frequency, powerow models of voltage-sourced converter (VSC)-based distributed energy resource (DER)
units. The proposed models address a wide array of DER units, i.e., (i) variable-speed
wind-driven doubly-fed asynchronous generator-based and (ii) single/three-phase VSCcoupled DER units. In addition, a computationally-ecient technique is proposed and
implemented to impose the operating constraints of the VSC and the host DER unit
within the context of the developed PFA tool. Novel closed forms for updating the
corresponding VSC power and voltage reference set-points are proposed to guarantee that
the power-ow solution fully complies with the VSC constraints. All the proposed DER
models represent (i) the salient VSC control strategies and objectives under balanced
and unbalanced power-ow scenarios and (ii) all the operating limits and constraints of
the VSC and its host DER unit.
Also, the slack bus concept is revisited, associated with the PFA, where a 3 distributed slack bus (DSB) model is proposed for the PFA and operation of islanded ADNs.
Distributing the real and reactive slack power among several DER units is essential to
provide a realistic power-ow approach for ADNs in the absence of the utility bus. The
proposed DSB model is integrated with the developed 3 PFA tool to form a complete
ADN PFA package.
The new PFA tool, including the proposed DER and DSB models, is tested using several benchmark networks of dierent sizes, topologies, and parameters. Many case studies, encompassing a wide spectrum of DER control specications and operating modes,
ii
are conducted to demonstrate (i) the numerical accuracy of the proposed models of the
DER units and their operating constraints, (ii) the eectiveness of the proposed DSB
model for the islanded ADN PFA, and (iii) the computational eciency of the integrated
PFA software tool irrespective of the network topology and parameters.
iii
Dedication
To my parents, my wife, and my motherland Egypt..
iv
Acknowledgements
First, I would like to thank my Creator, for giving me the wisdom and foundation to
accomplish this thesis.
I am deeply indebted to my supervisor, Prof. Reza Iravani, for his continuous academic advice, constant encouragement, endless patience, and priceless guidance and support throughout this work. I am really grateful to him, not only for contributing many
valuable suggestions and improvements to this thesis, but most importantly for training
me to be an independent researcher, with the ability to identify interesting and important
research problems and to generate frameworks to solve them. Moreover, I am grateful to
him for exposing me to collaboration with dierent industrial and organizational institutions. I feel honored to have been given the opportunity to work under his supervision.
I would also like to acknowledge my Ph.D. external examiner, Prof. Liuchen Chang,
and the esteemed internal committee members: Prof. Peter Lehn, Prof. Aleksandar
Prodic, and Prof. Zeb Tate, for the valuable input they have given into my thesis. My
appreciation also goes to my colleagues, particularly Ali Mehrizi-Sani and Amir Etemadi,
and the Faculty members in the Energy Systems group, for the friendly academic atmosphere, the useful discussions, and their encouragement. I am particularly indebted to
Dr. Milan Graovac and Mr. Xiaoling Wang, from the Center for Applied Power Electronics (CAPE) at the University of Toronto, for their priceless help and valuable feedback
and comments throughout my Ph.D. project.
Next, I would like to pay my humble respect and the deepest thanks from my heart
to my mother, Prof. Sanaa Kamh, my father, General Zakaria Kamh, and my lovely
sisters, Mai and Yasmin, for their endless support, love, patience, and encouragement. I
am extremely grateful to my parents for giving me the best education, the warmest care,
the righteous upbringing and the best in everything.
My nal warmest thanks from my heart go to my precious wife, Angie Eldamak, who
really changed my life to the best in everything, and supported me throughout this long
Ph.D. path. She always lightened my bad days and perfected my good ones. No words
can express my gratitude and appreciation to her, and my in-laws, for the kind support
and tremendous care. Angie will always be my source of inspiration, the twin of my soul,
and the love of my life.
Mohamed Z. Kamh
July 2011
Contents
1 Introduction
1.1
Active Distribution Networks . . . . . . . . . . . . . . . . . . . . . . . .
1.1.1
Denitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1.2
Enabling Technologies . . . . . . . . . . . . . . . . . . . . . . . .
1.1.3
ADN Operating Modes . . . . . . . . . . . . . . . . . . . . . . . .
1.1.4
Smart Energy Management System . . . . . . . . . . . . . . . . .
Statement of the Problem and Thesis Motivations . . . . . . . . . . . . .
1.2.1
Lack of Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.2
Lack of DER Models . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
Thesis Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4
Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4.1
Modeling Methodology . . . . . . . . . . . . . . . . . . . . . . . .
1.4.2
Validation Methodology . . . . . . . . . . . . . . . . . . . . . . .
Thesis Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
1.5
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
Chapter 2: A Three-Phase Sequence-Frame Power-Flow Solver

(SFPS) Tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3: Steady-State Models of Three-Phase VSC-Coupled DER

Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapters 4 and 5: Steady-State Models of Type-3 WTG-Based

DER Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Chapter 6: Steady-State Models of Single-Phase VSC-Coupled

DER Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Chapter 7: Three-Phase Distributed Real- and Reactive-Slack Bus

Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Chapter 8: Conclusions . . . . . . . . . . . . . . . . . . . . . . . .
11
2 Sequence-Frame Power-Flow Solver (SFPS)

2.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
vi
12
12
2.2
Three-Phase Power-Flow Analysis: Critical Review . . . . . . . . . . . .
12
2.2.1
Three-Phase Power-Flow Algorithms for Radial Network Topology
13
2.2.1.1
Backward-Forward Sweep Algorithm (BFSA) . . . . . .
13
2.2.1.2
Compensation-Based Algorithms . . . . . . . . . . . . .
13
2.2.2
Three-Phase Power-Flow Algorithms for General Network Topologies 14

2.2.2.1
Newton-Rapshon Method . . . . . . . . . . . . . . . . .
14
2.2.2.2
Gauss-Seidel Methods . . . . . . . . . . . . . . . . . . .
15
2.3
Sequence-Frame Versus Phase-Frame in Three-Phase Power-Flow Analysis
16
2.4
Sequence-Frame Models of Basic ADN Components . . . . . . . . . . . .
17
2.4.1
Distributed Generation . . . . . . . . . . . . . . . . . . . . . . . .
17
2.4.2
Unbalanced Three-phase Distribution Line . . . . . . . . . . . . .
19
2.4.3
Three-phase Power Transformers . . . . . . . . . . . . . . . . . .
22
2.4.4
Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
2.4.4.1
Constant Power and Current Loads . . . . . . . . . . . .
22
2.4.4.2
Constant Impedance Loads . . . . . . . . . . . . . . . .
23
2.5
The SFPS Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
2.6
Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
3 Power-Flow Model of 3- VSC-Coupled DER Units
32
3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
32
3.2
Model Scope and Assumptions . . . . . . . . . . . . . . . . . . . . . . . .
33
3.3
Proposed Sequence-Frame Model of 3 VSC-Coupled DER Units . . . .
34
3.3.1
Interface VSC Positive-Sequence Model . . . . . . . . . . . . . . .
35
3.3.2
Interface VSC Negative- and Zero-Sequence Models . . . . . . . .
36
3.3.2.1
Three-Wire VSC Conguration . . . . . . . . . . . . . .
36
3.3.2.2
Four-Wire VSC Conguration . . . . . . . . . . . . . . .
38
Implementation of the VSC Unied Model in the SFPS . . . . . . . . . .
38
3.4.1
Accommodating the VSC-Coupled DER Model in the SFPS . . .
38
3.4.2
Calculating the Internal Parameters of the Interface VSC . . . . .
39
3.4.3
Mitigating the VSC Operating Limits Violation . . . . . . . . . .
41
3.4.3.1
Mitigating the Phase Current Limit Violation . . . . . .
41
3.4.3.2
Mitigating the Reactive Power Limit Violation . . . . .
41
3.4.3.3
Mitigating the Phase Modulation Index Limit Violation
42
3.4.3.4
Updating the Interface VSC Reference Set-Points . . . .
42
3.5
Sequential-SFPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42
3.6
3 VSC Model Validation . . . . . . . . . . . . . . . . . . . . . . . . . .
44
3.4
vii
3.6.0.5
Case-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
46
3.6.0.6
Case-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
46
3.6.0.7
Case-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
47
Case-4: Sequential-SFPS Validation . . . . . . . . . . . . . . . . .
49
3.7
Computation Eciency of the Proposed Sequential-SFPS . . . . . . . . .
49
3.8
52
3.6.1
4 Power-Flow Model of Type-3 WTG DER Units
53
4.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
53
4.2
Classication of Wind Turbine Generators . . . . . . . . . . . . . . . . .
54
4.2.1
Type-1 WTGU . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
4.2.2
Type-2 WTGU . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
4.2.3
Type-3 WTGU . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
4.2.4
Type-4 WTGU . . . . . . . . . . . . . . . . . . . . . . . . . . . .
56
4.3
Power-Flow Models of Type-3 DER Units: Review . . . . . . . . . . . . .
56
4.4
The Scope of the Chapter . . . . . . . . . . . . . . . . . . . . . . . . . .
57
4.5
Proposed Sequence-Frame Model of A Type-3 DER Unit . . . . . . . . .
58
4.5.1
Model Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . .
58
4.5.2
Positive-Sequence Model of Type-3 DER Unit . . . . . . . . . . .
58
4.5.2.1
PV mode of operation . . . . . . . . . . . . . . . . . . .
59
4.5.2.2
PQ mode of operation . . . . . . . . . . . . . . . . . . .
61
4.5.3
Negative-Sequence Model of Type-3 DER Unit . . . . . . . . . . .
61
4.5.4
Equivalent Negative-Sequence Model of Type-3 DER Unit . . . .
61
Evaluating Type-3 Negative-Sequence Model Parameters . . . . . . . . .
62
4.6.1
Case A: Idle Secondary Control of Type-3 Unit . . . . . . . . . .
63
4.6.2
Case B: Balancing Rotor Currents . . . . . . . . . . . . . . . . . .
63
4.6.3
Case C: Balancing Stator Currents . . . . . . . . . . . . . . . . .
63
4.6.3.1
Case C-1: Balancing Stator Currents Via RSC . . . . . .
63
4.6.3.2
Case C-2: Balancing Stator Currents Via GSC
64
4.6
4.7
. . . . .
4.6.4
Case D: Mitigating Stator Real Power Double-Frequency Component 65
4.6.5
Case E: Mitigating Double-Frequency Electromagnetic Torque (Power)

Component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.6.6
Case F: Coordinated Control of GSC and RSC . . . . . . . . . . .
66
Type-3 DER Internal Parameters Calculation . . . . . . . . . . . . . . .
67
4.7.1
Calculating Positive-Sequence Internal Parameters . . . . . . . . .
68
4.7.1.1
68
GSC Positive-Sequence Modulation Index . . . . . . . .

viii
4.7.1.2
GSC Positive-Sequence Current . . . . . . . . . . . . . .
69
4.7.1.3
RSC Positive-Sequence Modulation Index . . . . . . . .
69
4.7.1.4
Stator Positive-Sequence Current Calculation . . . . . .
70
Evaluating Negative-Sequence Internal Parameters . . . . . . . .
70
4.7.2.1
GSC Negative-Sequence Modulation Index . . . . . . . .
70
4.7.2.2
GSC Negative-Sequence Current . . . . . . . . . . . . .
70
4.7.2.3
RSC Negative-Sequence Modulation Index . . . . . . . .
71
4.7.2.4
Stator Negative-Sequence Current . . . . . . . . . . . . .
71
Implementing Type-3 Power-Flow Model . . . . . . . . . . . . . . . . . .
71
4.8.1
Accommodating the Type-3 DER Model in the SFPS . . . . . . .
71
4.8.2
Estimating Type-3 Maximum Operating Limits . . . . . . . . . .
71
4.8.2.1
Estimating the Maximum RSC Modulation Index . . . .
72
4.8.2.2
Estimating Maximum Stator Currents . . . . . . . . . .
72
4.8.2.3
Estimating Maximum GSC Currents . . . . . . . . . . .
72
DER Operational Limits . . . . . . . . . . . . . . . . . . . . . . .
73
4.8.3.1
Fullling GSC Positive-Sequence Modulation Index Limit
73
4.8.3.2
Fullling GSC Positive-Sequence Current Limit . . . . .
74
4.8.3.3
Fullling RSC Positive-Sequence Modulation Index Limit
74
4.8.3.4
Fullling Stator Positive-Sequence Current Limit . . . .
74
4.8.3.5
Updating Positive-Sequence Reference Set-Points . . . .
74
4.8.3.6
Fullling Negative-Sequence Operating Limits . . . . . .
75
Sequential SPFS . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
77
4.7.2
4.8
4.8.3
4.8.4
4.9
5 Applications and Validation of Type-3 WTG DER Model
78
5.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
78
5.2
Type-3 DER Model Validation . . . . . . . . . . . . . . . . . . . . . . . .
78
5.2.1
Case-1: Inactive Negative-Sequence Controllers . . . . . . . . . .
80
5.2.2
Case-2: Balancing Rotor Current Via RSC . . . . . . . . . . . . .
80
5.2.3
Case-3: Balancing Stator Current Via GSC . . . . . . . . . . . . .
82
5.2.4
Case-4: Mitigating Double-Frequency Stator Power Oscillations .
82
5.2.5
Case-5: Mitigating Double-Frequency Torque Oscillations and Balancing GSC Currents . . . . . . . . . . . . . . . . . . . . . . . . .
83
5.3
Case 6: Validating the Sequential-SFPS Feasibility . . . . . . . . . . . .
84
5.4
Application of the Sequential-SFPS to Benchmark Distribution Systems .
85
5.4.1
86
Case 7: CIGRE MV Distribution Network . . . . . . . . . . . . .

ix
5.4.2
Case 8: IEEE 34-Bus Test System . . . . . . . . . . . . . . . . . .
87
5.5
Convergence Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
88
5.6
88
6 Power-Flow Model of 1 VSC-Coupled DER Units
90
6.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
6.2
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
91
6.3
Topologies and Control Objectives of Single-Phase Interface VSC . . . .
91
6.4
Steady-State Model of Dual-Stage Single-Phase Interface VSC . . . . . .
92
6.4.1
Model Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . .
92
6.4.2
Incorporating Single-Phase VSC-Coupled DER Units in Power Flow

Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
6.4.2.1
VSC Model Tailored for the Single-Phase BFSA . . . . .
93
6.4.2.2
VSC Model Tailored for the SFPS . . . . . . . . . . . .
94
Evaluating the Interface VSC Internal Parameters . . . . . . . . . . . . .
95
6.5.1
Calculating the VSC Phase Current . . . . . . . . . . . . . . . . .
95
6.5.2
Calculating the VSC Modulation Index . . . . . . . . . . . . . . .
96
Imposing the VSC Operational Limits . . . . . . . . . . . . . . . . . . .
97
6.6.1
Phase Current Limit . . . . . . . . . . . . . . . . . . . . . . . . .
98
6.6.2
Modulation Index Limit . . . . . . . . . . . . . . . . . . . . . . .
98
6.6.3
PC Bus Voltage Limit . . . . . . . . . . . . . . . . . . . . . . . .
99
6.6.4
Updating the VSC Reference Power Set-Points . . . . . . . . . . . 100
6.6.5
Sequential Power-Flow Algorithm . . . . . . . . . . . . . . . . . . 100
6.5
6.6
6.7
1 VSC Model Validation . . . . . . . . . . . . . . . . . . . . . . . . . . 100

6.7.1
6.7.2
6.7.3
6.8
Validating the Single-Phase Sequential BFSA . . . . . . . . . . . 100

6.7.1.1
Case-1: Maximum Phase Current Limit Violation . . . . 102
6.7.1.2
Case-2: Maximum Modulation Index Limit Violation . . 103
Validating the Three-Phase Sequential-SFPS . . . . . . . . . . . . 104

6.7.2.1
Case-3: Violating the Maximum PCC Voltage Limit . . 105
6.7.2.2
Case-4: No DER Units Connected to the Violating Bus . 108
Computational Eciency of the Sequential Algorithms accommodating the 1 VSC-Coupled DER Model . . . . . . . . . . . . . . 109
Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
7 Power Flow Analysis of Islanded ADNs
111
7.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
7.2
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
x
7.3
The Scope of the Chapter . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.4
Proposed Distributed Slack Bus (DSB) Model . . . . . . . . . . . . . . . 113
7.5
7.4.1
Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.4.2
Participation Factors . . . . . . . . . . . . . . . . . . . . . . . . . 114
7.4.3
Distributed Slack Bus Model . . . . . . . . . . . . . . . . . . . . . 115

Real Power Balance Equation . . . . . . . . . . . . . . . 115
7.4.3.2
Reactive Power Balance Equation . . . . . . . . . . . . . 115
7.4.3.3
Super-PQ-Bus Equation . . . . . . . . . . . . . . . . . . 115
7.4.4
The Updating Equation . . . . . . . . . . . . . . . . . . . . . . . 116
7.4.5
DER Generation Limits . . . . . . . . . . . . . . . . . . . . . . . 117
Validations and Case Studies . . . . . . . . . . . . . . . . . . . . . . . . . 117

7.5.1
Assumption Validation . . . . . . . . . . . . . . . . . . . . . . . . 117
7.5.2
Impacts of Deploying the Proposed DSB Model . . . . . . . . . . 121
7.5.3
7.6
7.4.3.1
7.5.2.1
Reference Bus Power Output . . . . . . . . . . . . . . . 122
7.5.2.2
Real Power Losses . . . . . . . . . . . . . . . . . . . . . 123
7.5.2.3
Voltage Prole . . . . . . . . . . . . . . . . . . . . . . . 124
Imposing the DER Power Capacity Constraint . . . . . . . . . . . 124
Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
8 Conclusions
127
8.1
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
8.2
General Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
8.3
Quantiable Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
8.4
Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
8.5
8.4.1
Major Contributions . . . . . . . . . . . . . . . . . . . . . . . . . 129
8.4.2
Other Contributions . . . . . . . . . . . . . . . . . . . . . . . . . 129
Directions for Future Research . . . . . . . . . . . . . . . . . . . . . . . . 129
Appendices
127
A Data for Test Systems
131
A.1 Six-Bus Test System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

A.2 Three-Phase CIGRE MV Test System . . . . . . . . . . . . . . . . . . . 131
A.3 CIGRE MV Single-Phase Radial Feeder
. . . . . . . . . . . . . . . . . . 133
A.4 IEEE 34-Bus Test System . . . . . . . . . . . . . . . . . . . . . . . . . . 133

A.5 Modied IEEE 34-Bus Test System . . . . . . . . . . . . . . . . . . . . . 137
xi
B Steady-State Power-Flow Models of Distribution Power Lines

140
B.1 Three-Phase Power Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
B.2 Two-phase Power Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
C Steady-State Power-Flow Models of Electrical Loads
C.1 Constant Power Loads . . . . . . . . . . . . . . . . . .
C.1.1 Four-Wire/Three-Wire Wye-Connected Loads .
C.1.2 Three-Wire Delta-Connected Loads . . . . . . .
C.2 Constant Current Loads . . . . . . . . . . . . . . . . .
C.3 Constant Impendence Loads . . . . . . . . . . . . . . .
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144
144
144
145
146
146
147
148
148
149
D Schematic Diagrams of the PSCAD/EMTDC Models
150
Bibliography
153
xii
List of Tables
2.1
Sequence-Frame, Fundamental-Frequency, Steady-State Model of A ThreePhase Power Transformer . . . . . . . . . . . . . . . . . . . . . . . . . .
22
3.1
VSC Constant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
40
3.2
Parameters of G1 and G2 of Fig. 3.6 (Sbase = 1000 kVA) . . . . . . . . .
45
3.3
Power-Flow Results of Case-1 . . . . . . . . . . . . . . . . . . . . . . . .
47
3.4
47
3.5
48
3.6
49
3.7
Comparison Between the Sequential and the Non-Sequential Power-Flow

Algorithms in Terms of the Total Number of Jacobean Matrix Evaluations/Inversions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
51
Parameters of the Type-3 Negative-Sequence Model For the Six Cases of

Section 4.6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
67
5.1
Parameters of G2 of Fig. 5.1 (Sbase = 1000 kVA) . . . . . . . . . . . . . .
79
5.2
80
5.3
81
5.4
82
5.5
83
5.6
84
5.7
Load prole used in Section 5.3 (Vbase =13.8 kV, Sbase = 1 MVA) . . . . .
84
5.8
Power-Flow Results of Case-6: Operational Limits of G2 are Discarded .
85
5.9
Power-Flow Results of Case-6: Operational Limits of G2 are Imposed . .
86
6.1
Parameters of G1, G2, and G3 of Fig. 6.5 (Vbase = 7.2 kV and Sbase = 100
kVA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6.2
Power-Flow Results of Case-1: Maximum Phase Current Limit is Discarded102
4.1
xiii
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
Case-1: Updated Real and Reactive Power Set Points of the three DER
units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Flow Results of Case-1: Maximum Phase Current Limit is Imposed
Power-Flow Results of Case-2: Maximum Modulation Index Limit is Discarded . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-2: Updated Real and Reactive Power Set Points of the three DER
units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-Flow Results of Case-2: Maximum Modulation Index Limit is Imposed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-3: DER Phase Distribution* . . . . . . . . . . . . . . . . . . . . . .
Case-3: Three-Phase Voltage Prole Without Considering the Maximum
Bus Voltage Constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-3: Updated Real and Reactive Power Set Points of the DER Units.
Sbase = 1 MVA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-3: Three-Phase Voltage Prole After Adjusting the DER Power Set
Points Using (6.22) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-4: Three-Phase Voltage Prole Without Considering the Maximum
Bus Voltage Constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-4: Three-Phase Voltage Prole After Adjusting the DER Power Set
Points Using (6.22) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case-4: Updated Real and Reactive Power Set Points of the DER Units
at the Violating Busses. Sbase = 1 MVA. . . . . . . . . . . . . . . . . . .
A.1 Power Lines Phase-Frame Parameters (in pu) of the Study System of Fig.
A.1 (Vbase =13.8 kV, Sbase = 1000 kVA) . . . . . . . . . . . . . . . . . . .
A.2 Loads of the Study System of Fig. A.1 (Vbase =13.8 kV, Sbase = 1000 kVA)
A.3 Power Lines Phase-Frame Parameters (in ohms) of the Study System of
Fig. A.2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.4 Loads (in kVA) of the Study System of Fig. A.2 . . . . . . . . . . . . .
A.6 Power Lines Phase-Frame Parameters of the Study System of Fig. A.4 .
xiv
102
103
104
104
105
106
106
107
107
108
109
109
132
132
134
134
135
136
138
List of Figures
1.1
Schematic diagram of an Active Distribution Network . . . . . . . . . . .
1.2
Schematic diagram of an ADN operating as a virtual power plant . . . .
1.3
DER Model Validation Methodology . . . . . . . . . . . . . . . . . . . .
1.4
Schematic diagram of the thesis layout . . . . . . . . . . . . . . . . . . .
2.1
Classication of three-phase PFA methods . . . . . . . . . . . . . . . . .
13
2.2
Sequence-frame, fundamental-frequency, steady-state model of a threephase directly connected synchronous generator for the SFPS: (a) the
positive-sequence model, (b) the negative-sequence model, (c) the zerosequence model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
2.3
Equivalent -model of a three-phase distribution line . . . . . . . . . . .
19
2.4
Decoupled sequence-frame, fundamental-frequency, steady-state model of

a three-phase distribution line: (a) the positive-sequence model, (b) the
negative-sequence model, (c) the zero-sequence model . . . . . . . . . . .
21
2.5
Schematic diagram of a constant power/current load connected to Bus-k
23
2.6
Decoupled sequence-frame, fundamental-frequency, steady-state model of

a constant power/current load . . . . . . . . . . . . . . . . . . . . . . . .
23
Model of a constant impedance load connected to Bus-k: (a) phase-frame

model, (b) sequence-frame model . . . . . . . . . . . . . . . . . . . . . .
24
2.8
Decoupled sequence-frame model of a constant power/current load . . . .
25
2.9
Flow chart of the SFPS algorithm . . . . . . . . . . . . . . . . . . . . . .
26
2.7
2.10 Zero-sequence blocking scenario: (a) phase-frame network, (b) zero-sequence

impedance diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.1
Schematic diagram of three-phase VSC-coupled DER unit . . . . . . . .
33
3.2
Proposed sequence-frame, fundamental-frequency, steady-state model of

a 3 interface VSC, (a) positive-sequence model, (b) negative-sequence
model, (c) zero-sequence model . . . . . . . . . . . . . . . . . . . . . . .
34
Alternative VSC output lter congurations . . . . . . . . . . . . . . . .
37
3.3
xv
3.4
Equivalent sequence-frame circuits of a VSC-coupled DER unit . . . . . .
39
3.5
Flow chart of the proposed Sequential-SFPS . . . . . . . . . . . . . . . .
43
3.6
Single line diagram of the six-bus test system . . . . . . . . . . . . . . .
45
3.7
Comparison between the sequential and the non-sequential power-ow algorithms in terms of the convergence speed . . . . . . . . . . . . . . . . .
51
Schematic diagrams of the four types of wind-turbine generating systems:

(a) Type-1, (b) Type-2, (c) Type-3, and (d) Type-4 . . . . . . . . . . . .
55
4.2
Detailed schematic diagram of a Type-3 wind-driven generation system .
59
4.3
Proposed sequence-frame, fundamental-frequency, steady-state model of

Type-3 DER unit, (a) positive-sequence model, (b) negative-sequence model,
(d) equivalent negative-sequence model. . . . . . . . . . . . . . . . . . . . 60
4.4
Type-3 sequence-frame circuit used to calculate the converters internal

parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
68
Flow chart of the proposed Sequential-SFPS algorithm including the Type3 DER constraints evaluation and the proposed reference-set point updating strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
76
5.1
Single line diagram of the six-bus test system . . . . . . . . . . . . . . .
79
5.2
Voltage prole of the CIGRE distribution network with 2 Type-3 based

DER units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
87
Voltage prole of the IEEE 34-bus distribution feeder with 3 Type-3 based
DER units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
88
Convergence pattern of the Sequential-SFPS algorithm accommodating

the Type-3 DER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
6.1
Schematic diagram of dual-stage single-phase VSC-coupled DER unit . .
92
6.2
Steady-state, fundamental frequency BFSA model of a single-phase VSCcoupled DER unit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
Steady-state, fundamental frequency SFPS model of a single-phase VSCcoupled DER unit, (a) positive-sequence model, (b) zero- and negativesequence models. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
94
Equivalent circuit of the single-phase VSC-coupled DER unit used to calculate the VSC internal parameters . . . . . . . . . . . . . . . . . . . . .
96
4.1
4.5
5.3
5.4
6.3
6.4
6.5
Single line diagram of the radial test feeder . . . . . . . . . . . . . . . . . 101
6.6
Single line diagram of modied three-phase IEEE-34 bus radial feeder . . 105
7.1
Single line diagram of the CIGRE distribution benchmark network . . . . 119

xvi
7.2
7.3
7.4
Single line diagram of the modied IEEE 34-bus feeder . . . . . . . . . .

Validating the assumption stated in Section 7.4.1 . . . . . . . . . . . . .
Eect of the proposed DSB model on the apparent power output of the
reference bus DER unit . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Eect of the proposed DSB model on the real-power losses of the IEEE-34
bus test feeder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Eect of the proposed DSB model on the voltage prole of the IEEE-34
bus test feeder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Eect of imposing the DER power capacity constraint on the PQ-controlled
DER output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
119
120
A.1 Single line diagram of the six-bus test system used in Chapters 3 and 5 .
A.2 Single line diagram of the three-phase CIGRE MV distribution network
used in Chapters 3, 5, and 7 . . . . . . . . . . . . . . . . . . . . . . . . .
A.3 Single line diagram of the CIGRE MV single-phase radial feeder used in
Chapter 6. All power lines are identical. The series impedance of any
power line = 0.219+j0.14 . . . . . . . . . . . . . . . . . . . . . . . . .
A.4 Single line diagram of the IEEE 34-bus distribution system used in Chapters 3 and 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.5 Single line diagram of the Modied IEEE 34-bus distribution system used
in Chapters 6 and 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
132
7.5
7.6
7.7
B.1 Phase-frame model of three-phase power line

C.1
C.2
C.3
C.4
C.5
C.6
Phase-frame
Phase-frame
Phase-frame
Phase-frame
Phase-frame
Phase-frame
model
model
model
model
model
model
122
123
124
125
133
135
136
137
. . . . . . . . . . . . . . . 140
of three-phase four-wire, constant power load . . . . 144

of three-phase delta-connected constant power load . 145
of three-phase four-wire, constant current load . . . . 147
of three-phase delta-connected constant current load 148
of three-phase four-wire, constant impedance load . . 148
of three-phase delta-connected constant impedance load149
D.1 PSCAD model of the test system in Fig. A.1 . . . . . . . . . . . . . . . . 150

D.2 PSCAD model of a three-phase VSC-coupled DER unit . . . . . . . . . . 151
D.3 PSCAD model of a three-phase Type-3 based DER unit . . . . . . . . . . 152
xvii
Nomenclature
Acronyms
ADN
ADS
AVR
BESS
BFSA
DER
DFAG
DG
DNO
DS
DSB
FC
FIT
G-S
ICT
MPPT
MT
N-R
PC
PEV
PFA
Active Distribution Network

Active Distribution System
Automatic Voltage Regulator
Battery Energy Storage System
Backward-Forward Sweep Algorithm
Distributed Energy Resource
Doubly Fed Asynchronous Generator
Distributed Generator
Distribution Network Operator
Distributed Storage
Distributed Slack Bus
Fuel Cells
Feed-in-Tarrif
Gauss-Seidel Method
Information and Communication Technology
Maximum Power Point Tracking
Microturbine
Newton-Raphson Method
Point of Connection
Plugged Electric Vehicle
Power-Flow Analysis
xviii
PHEV
PLL
PQ
PV
SEMS
SFPS
SM
SPV
SPWM
SSB
SVM
TDSG
V2G
VPP
VSC
WTG
WTGU
Plugged Hybrid Electric Vehicle

Phase-locked loop
Power-controlled
Real-power and voltage-controlled
Smart Energy Management System
Sequence-Frame Power-ow Solver
Smart Meter
Solar Photovoltaic
Sinusoidal Pulse-Width Modulation
Single Slack Bus
Space Vector Modulation
Three-phase Directly-connected Synchronous Generator
Vehicle-to-Grid
Virtual Power Plant
Voltage-sourced converter
Wind turbine generator
Wind turbine generating unit
Symbols
In this thesis, italic symbols indicated phasor quantities, e.g., I, while multi-dimensional
matrices are shown in bold uppercase, e.g., I.
xix
Chapter 1
Introduction
1.1
1.1.1
Active Distribution Networks

Denitions
Driven by technical advancement, political readiness, social awareness, and economical

incentives, the anticipated proliferation of distributed energy resources (DER) units, including distributed generation (DG), distributed storage (DS), and controllable loads,
into the current distribution grids close to the load sites, is emerging as a complementary
infrastructure to the traditional central power plants [1,2]. Unless optimally coordinated
and eciently integrated, the high-depth of DER penetration will bring many technical
challenges in terms of planning and operation of the distribution networks including,
among others, protection mal-coordination, voltage level violations, power quality concerns, and increasing line losses. The need for ecient and safe DER integration schemes
brings about the concept of the active distribution systems.
The active distribution system (ADS), also known as active distribution network
(ADN), is the new generation of todays distribution networks where the DER units are
optimally operated and eciently integrated. The CIGRE C6.11 working group denes
the ADN as a distribution network whose operator can remotely and automatically control the DER units and network topology to eciently manage and optimally utilize the
network assets [3]. In the ADN, the power ow between busses is bidirectional, and
variables are measured (or estimated) and controlled based on a centralized and intelligent system. The central control system is capable of making decisions and operating
the ADN based on monitoring the network conditions. In general, the ultimate goal of
the ADN is to (i) enhance the DER observability and controllability, (ii) deliver cost
ecient integration of the DER units into the distribution network, and (iii) maximize
1
Chapter 1. Introduction
Figure 1.1: Schematic diagram of an Active Distribution Network

the technical and economical benets achieved by both the DER owners and the host
grid [46].
1.1.2
Enabling Technologies
A schematic diagram of an ADN is depicted in Fig. 1.1. As represented in Fig. 1.1, the
enabling technologies to realize the ADN include:
Information and communication technology (ICT) infrastructure to establish fast
and reliable two-way communication between the DER units, circuit breakers, interconnection switches, smart meters, and the local energy management system.
In the ADN, the bi-directional communication is essential for monitoring, control,
and protection. The most deployed communication standards are the IEC61850 [7]
and the IEEE802.15 (ZigBEE) [8] standards.
Smart meters (SM) installed at the load premises to monitor and send real-time
data of the load consumption, voltage prole, and total harmonic distortion to the
distribution network operator (DNO). In addition, proliferation of the SM allows
the DNO to control the load prole by utilizing the demand response functions [9].
Storage devices, e.g., batteries, to maximize the utilization of the renewable energy
resources, e.g., photovoltaic and wind energy. Integrating the storage devices with
renewable-based DER units overcome the intermittent nature of these resources
and enhance their dispatchability [10, 11].
Power electronic converters to interface the DER units to the grid. In particular, AC-DC and DC-AC voltage-sourced converters (VSC) are the most widelyadopted interface medium for DER units, e.g., battery energy storage systems,
ywheel energy storage systems, fuel cells, solar photovoltaic units, variable-speed
wind turbine generators with full-scale and partial power-electronic converters, and
micro-turbine systems [12].
Real-time centralized and decentralized control techniques to optimally control the
large eet of DER units [13, 14].
1.1.3
ADN Operating Modes
The ADN can operate in two distinct modes, i.e.,

Utility-Connected Mode: In the grid-tied scenarios, the SEMS optimally controls
the ADN components to maximize the technical and economical benets of the
existing DER eet. One way of achieving this is to coordinate the ADN apparatus
to provide a pre-specied performance prole at the point of common coupling
(PCC), i.e., the ADN operates as a virtual power plant (VPP) that is comparable
to a conventional plant [1517]. A conceptual representation of the VPP is given
in Fig. 1.2.
Islanded Mode: When the interconnection switch of Fig. 1.1 opens, either intentionally or in response to an accidental disturbance, the entire ADN, or pre-specied
parts of it, should be able to operate safely and reliably in the autonomous mode,
i.e., form an islanded microgrid (grid) [18, 19].
Figure 1.2: Schematic diagram of an ADN operating as a virtual power plant
1.1.4
Smart Energy Management System
The brain of the ADN is the Smart Energy Management System (SEMS), Fig. 1.1.
SEMS is a local energy and power control and management center that collects real-time
data about (i) the status of the ADN components, e.g., DER power output, on-load
tap changers, circuit breakers, the interconnection switch, (ii) load and voltage proles,
and (iii) line ows. Several intelligent distribution automation functions are integrated
with the SEMS, e.g., fault detection and isolation, network reconguration, congestion
management, blackout and brownout management, optimal asset utilization, and optimal
dispatch and control [2023].
1.2
Statement of the Problem and Thesis Motivations
For the SEMS to conduct all the aforementioned distribution automation functions, accurate power-ow analysis (PFA) results must be available. The PFA is the kernel of
the SEMS to guarantee a satisfactory and reliable operation of the ADN by calculating the appropriate voltage and power reference set points for all the DER units [24].
In addition, during the planning phase, PFA is required to (i) determine the eects
of adding/removing dierent apparatus, i.e., loads, interconnections, generation, voltage regulators, and VAr devices on the ADN performance and (ii) evaluate the optimal
sizing of dierent power system components. Moreover, the PFA is used to provide a
precise and ecient initialization approach for eigen analysis, transient stability, and
electro-magnetic transients programs [25, 26].
1.2.1
Lack of Tools
The PFA of large power systems is a mature subject and a wide array of production
grade power-ow software tools that represent various power-system components, e.g.,
HVDC converters and FACTS controllers, are widely available [2729]. However, such
tools are neither tailored for nor adequately address the PFA requirements of the ADN.
The main reasons are:
the inherent large degree of imbalance of distribution networks due to (i) singlephase and two-phase loads, (ii) single-phase DER units, (iii) untransposed lines,
and (iv) single-phase laterals [30]. As such, the distribution level PFA should
simultaneously address the three phases,
the presence of three-phase VSC-based DER units which can include (i) three-wire
congurations, (ii) four-wire congurations, and (iii) various control strategies that
can respond to selected sequence-frame voltage and current components [3137].
Some production grade software tools provide three-phase power-ow analysis for
distribution networks accommodating DER units [3840]. However, these tools have the
following shortcomings:
The commercially-available power-ow tools are developed for radial distribution
networks. However, the ADN may be mesh-connected to maximize the DER benets. Thus, the available tools cannot handle multi-directional power-ow and
general network topologies [34, 41].
The available three-phase PFA algorithms adopt the phase-frame rather than the
sequence-frame. As will be detailed in Chapter 2, sequence-frame based PFA algorithms are easier to implement, computationally more ecient, and provide exibility to model VSC-coupled DER units than their phase-frame counterparts.
The available three-phase power-ow engines are not suitable for the islanded grid
operating mode. The reason is that these tools lack an appropriate three-phase
distributed real- and reactive-slack bus model to conduct the PFA. As will be
discussed in Chapter 7 of this thesis, distributed slack bus (DSB)-based PFA is
vital to conduct the power-ow analysis of the islanded grid operating mode since
it guarantees that the DER unit connected to the reference bus need not to be an
innite power source [42].
1.2.2
Lack of DER Models
To obtain unerring three-phase PFA results, detailed and accurate three-phase, steadystate, fundamental-frequency DER models are required. These models should adequately
address (i) dierent DER types, i.e., rotating machine-based DER units, single-phase
VSC-coupled, three-phase three-wire VSC-coupled, and three-phase four-wire VSC-coupled
DER units, (ii) dierent control objectives under balanced and unbalanced grid conditions, i.e., voltage/frequency and real/reactive-power control, specic control actions to
mitigate the voltage and/or current unbalance at the point of connection, and (iii) the operating limits of the interface VSC and the host DER unit, e.g., the converter modulation
index limit, phase current limit, power capacity limit, and terminal voltage limit.
Modeling of electronic converters for interfacing DER units is one of the most challenging problems, and is becoming an area of active research relevant to power ow
studies [43]. Developing detailed single- and three-phase VSC-coupled DER models for
the ADN power-ow analysis applications has not been systematically addressed in the
technical literature. The reasons are (i) the current relatively limited proliferation of
the electronically-coupled DER units in the distribution grids and (ii) most of the currently available DER units are based on constant speed directly-coupled three-phase
synchronous generators. The available electronically-coupled DER models, both in the
technical literature and the production-grade software tools, (i) assume only positivesequence DER representation, (ii) do not represent the single-phase VSC-coupled DER
units, (iii) do not address most of the aforementioned control objectives, and (iv) neglect
the interface converter operating limits [31, 32, 34, 4454].
1.3
Thesis Objectives
Based on the discussion of Section 1.2, the thesis objectives are:

1. Develop detailed and accurate steady-state, fundamental-frequency models of VSCbased DER units for three-phase PFA. The DER units under study include:
DER units interfaced via a three-phase front-end three-wire or four-wire VSC,
Variable-speed wind-turbine-generator (WTG)-based DER units deploying a
three-phase doubly-fed asynchronous generator (DFAG), also known as Type3 WTG,

Single-phase VSC-coupled DER units,
The developed DER models should address (i) balanced and unbalanced power-ow
scenarios, (ii) various VSC control strategies under balanced and unbalanced grid
conditions, and (iii) the operating limits and constraints of the VSC and its host
DER unit.
2. Develop a three-phase PFA tool for PFA of analysis and real-time operation of
ADNs. The developed program must:
be fast and accurate for the real-time management and control of the ADN,
incorporate the developed single-phase and three-phase DER models, including the interface VSC operating constraints in a computationally-ecient manner,
be capable of analyzing dierent network topologies (radial, weakly meshed
and meshed networks), including high degrees of unbalance,
accommodate models of multi-phase power lines and single-phase laterals,
contain models of single, two, and three-phase loads with dierent connections,
including constant impedance, current, and power (ZIP) load models,
accommodate models of three-phase distribution transformers with various
connections, including the phase shift introduced by dierent transformer connections.
3. Develop a three-phase distributed slack bus (DSB) model. The developed DSB
model will be integrated with the aforementioned tool to conduct three-phase PFA
of islanded ADNs.
1.4
1.4.1
Methodology
Modeling Methodology
The developed DER models and the three-phase PFA tool are developed in the sequencecomponents frame. The merits of the sequence-frame compared to the phase-frame for
the three-phase PFA are detailed in Chapter 2 of this thesis.
Figure 1.3: DER Model Validation Methodology
1.4.2
Validation Methodology
The developed three-phase PFA tool, including dierent DER and ADN components
models, is implemented in the MATLAB platform. To verify the numerical accuracy
of the developed three-phase VSC-coupled and Type-3 WTG-based DER models, a relatively small three-phase unbalanced test system, with unbalanced loads and untransposed
lines, is used where a DER unit is connected to one of the system busses. The reason for
selecting this relatively small system is to be able to simulate the system, including all
the required details, in time-domain in the PSCAD/EMTDC platform, and consequently,
validate the numerical accuracy of the DER models and the proposed three-phase PFA
tool. The detailed time-domain model of the study system, including the DER converters
and controllers, is developed in the PSCAD/EMTDC time-domain software to serve as
the benchmark for validating the proposed DER models. The PSCAD/EMTDC simulation environment is selected since it contains detailed and widely used time-domain
models of power system components and allows representation of various controls for the
VSC-interfaced DER units. The single-line diagram and parameters of the test system
are given in Appendix A.1. A conceptual representation of the DER model validation
method is depicted in Fig. 1.3.
1.5
Thesis Structure
A schematic diagram of the thesis layout is shown in Fig. 1.4. This thesis is structured
as follows.
Figure 1.4: Schematic diagram of the thesis layout
1.5.1
Chapter 2: A Three-Phase Sequence-Frame Power-Flow

Solver (SFPS) Tool
In this chapter, a fast, accurate, and robust three-phase power-ow analysis software
tool is developed for ADN applications, i.e., the SFPS tool. Three-phase, sequence
frame-based, fundamental-frequency, steady-state mathematical models of transformers,
loads, and power-lines are described and accommodated in the SFPS. The SFPS is the
hub into which dierent types of DER units, including their interfacing media, control
capabilities, and operating limits, are accommodated and tested. This contribution is
detailed in Chapter 2, and published in an IEEE Power Delivery Transactions paper [55]
and a reviewed conference paper [56].
1.5.2
Chapter 3: Steady-State Models of Three-Phase VSCCoupled DER Units
In this chapter, a unied sequence frame-based, fundamental-frequency, steady-state

mathematical model of a DER unit interfaced to the grid via a three-phase front-end
VSC is proposed and developed. As detailed in Section 1.1.2, the developed model represents a wide spectrum of DER types, e.g., battery energy storage systems, fuel cells,
solar photovoltaic units, variable-speed wind turbine generators with full-scale power-
10
electronic converters (Type-4 WTG), and micro-turbine systems. The proposed model is
generic since it accurately addresses (i) three-wire and four-wire VSC congurations, (ii)
balanced and unbalanced power-ow scenarios, (iii) various VSC control strategies, and
(iv) the operating limits and constraints of the interface VSC and the host DER unit.
The developed model is incorporated with the SFPS tool of Chapter 2.
In addition, an enhancement to the basic SFPS algorithm, presented in Chapter 2,
is proposed to model and impose the VSC operating constraints in a computationallyecient way. The enhanced algorithm is called the Sequential-SFPS. The computational
eciency of the Sequential-SFPS is veried by comparing the convergence pattern of
the proposed algorithm against other reported methods. This contribution is detailed in
Chapter 3 and is published in an IEEE Power Delivery Transactions paper [57].
1.5.3
Chapters 4 and 5: Steady-State Models of Type-3 WTGBased DER Units
In Chapter 4, I applied the VSC model of Chapter 3 to develop a detailed sequence framebased, fundamental-frequency, steady-state mathematical model of a Type-3 WTG-based
DER unit subjected to unbalanced voltage and current conditions. The proposed model
is incorporated with the SFPS, and the Sequential-SFPS of Chapter 3 is extended to
accommodate all the operating limits of the WTG unit and its associated VSCs. A wide
array of case studies are conducted in Chapter 5 to verify the numerical accuracy and
the computational eciency of the Sequential-SFPS accommodating the proposed Type3 WTG-based DER model. A two-part IEEE Sustainable Energy Transactions paper,
describing the details of the proposed DER model and its applications, has been accepted
for publication [58, 59].
1.5.4
Chapter 6: Steady-State Models of Single-Phase VSCCoupled DER Units
In this chapter, I developed fundamental-frequency, steady-state models of a single-phase

VSC-coupled DER unit for the PFA of single-phase laterals and three-phase distribution
feeders. The proposed models represent dierent VSC operating modes and constraints.
The sequential approach of Chapter 3 is deployed to impose the VSC constraints into
the power-ow algorithm. The proposed models are integrated with (i) the SFPS for
the PFA of three-phase networks and (ii) a single-phase PFA algorithm to study the
radial single-phase laterals. Several case studies are conducted to evaluate and verify
11
the accuracy of the proposed model. This contribution is detailed in Chapter 6, and an
IEEE Power Delivery Transactions paper, describing the details and applications of the
proposed models, has been submitted and is in review [60].
1.5.5
Chapter 7: Three-Phase Distributed Real- and ReactiveSlack Bus Model
In this chapter, a novel three-phase sequence frame-based DSB model is described and
augmented with the SFPS of Chapter 2 to conduct three-phase PFA for islanded ADNs.
Unlike the existing DSB models, the proposed formulation (i) simultaneously distributes
the real and reactive power slack and (ii) involves DER units with dierent control
strategies in slack compensation. A wide array of case studies is conducted to investigate
the impacts of distributing the real and reactive power slack using the three-phase DSBSFPS tool. This contribution is detailed in Chapter 7. In addition, an IEEE Smart Grids
Transactions paper [61] is submitted to report this contribution, and is in review.
1.5.6
Chapter 8: Conclusions
The main conclusions of the thesis and the suggestions for future research topics are
listed in Chapter 8.
Chapter 2
Sequence-Frame Power-Flow Solver
(SFPS)1
2.1
Introduction
This chapter lays the foundation of a three-phase power-ow algorithm, in the sequencecomponents frame, for ADN applications. The algorithm is called Sequence-Frame
Power-ow Solver (SFPS). Basic ADN components (power-lines, transformers, and loads)
are modeled in the sequence-frame and accommodated in the SFPS to obtain an accurate three-phase steady-state solution. The SFPS is the hub to which models of dierent
types of electronically-coupled DER units, including their interfacing media, control capabilities, and operating limits under balanced and unbalanced power-ow scenarios, are
accommodated to construct the integrated 3 power-ow analysis (PFA) tool, as will be
detailed in the next four chapters.
2.2
Three-Phase Power-Flow Analysis: Critical Review
The concept of three-phase PFA has been extensively addressed in the literature. As
shown in Fig. 2.1, the related algorithms are classied according to (i) the network
1
The work presented in this chapter has been published and appears in M.Z. Kamh and R. Iravani,
Unbalanced Model and Power-Flow Analysis of Microgrids and Active Distribution Systems, IEEE
Trans. Power Delivery, vol.25, no.4, pp.2851-2858, Oct. 2010. An earlier version of this work has been
presented and appears in M.Z. Kamh and R. Iravani, Three-Phase Model and Power-Flow Analysis
of Microgrids and Virtual Power Plants, Proc. of the Fourth Canadian CIGRE Conference on Power
Systems, Toronto, Ontario, Canada, October 2009.
12
Chapter 2. Sequence-Frame Power-Flow Solver (SFPS)
13
structure, i.e., radial [48, 6268] and general network topologies [25, 30, 6975] and (ii)
the adopted reference frame to model the power system apparatus, i.e., the phase-frame
[25, 48, 6271, 75], the sequence-frame [72, 73], and a hybrid of both frames [74].
Figure 2.1: Classication of three-phase PFA methods
2.2.1
Three-Phase Power-Flow Algorithms for Radial Network

Topology
2.2.1.1
Backward-Forward Sweep Algorithm (BFSA)
BFSA, also known as the modied ladder network algorithm [62], exploits the radial
topology and unidirectional power ow of distribution feeders to evaluate the power-ow
solution by successively applying Kirchos circuit laws. Both unbalanced three-phase
and balanced single-phase power-ow problems are doable. Balanced and unbalanced
loads as well as shunt elements are modeled as an equivalent current injection. The
backward sweep calculates the currents through each line segment. Using these currents,
the voltage of each node is calculated in the forward sweep. The process continues until
convergence is achieved. The technique as described in [62] can accommodate neither
voltage-controlled (PV) busses nor weakly meshed networks in the algorithm.
2.2.1.2
Compensation-Based Algorithms
Current compensation PFA algorithm is developed in [63] to address weakly-meshed distribution networks with few number of PV buses. The algorithm is based on breaking
the loops at a number of breakpoints to convert the network to a radial equivalent. The
14
BFSA is then used to conduct the PFA of the equivalent radial network, where the breakpoints current injections are calculated using the multi-port compensation method. The
PV busses are modeled as PQ busses with negative real power consumption and variable
reactive current injection. Subsequent to each iteration, the reactive current injection
is updated using the secant method to regulate the voltage magnitude of PV nodes.
However, this algorithm diverges as the number of PV buses and/or loops increases.
An improved PV-bus model is introduced in [64] and [65]. The new PV model is
a linearized approximation of the automatic voltage regulator (AVR) of synchronous
generators. The PV bus is initialized as PQ bus with reactive power injection set to
the minimum. The algorithm consists of three independent iterative subroutines: the
BFSA, the breakpoint voltage compensation, and the PV node voltage compensation.
Power compensation, instead of current compensation, is proposed in [48] to adjust the
PV bus voltage. The convergence rate of this algorithm is very sensitive to the degree of
unbalance [65]. In addition, the compensation-based PFA algorithm was not tested on
real-size distribution networks.
Dierent load connections and shunt capacitors are modeled in [66, 67] using their
equivalent current injections, and are incorporated in the compensation-based PFA method.
Power-controlled (PQ) DER units are modeled as balanced negative constant power loads.
High-resolution one-minute time-series data is used to model the loads in [68]. However,
all the lines are assumed to be perfectly transposed and balanced.
2.2.2
Three-Phase Power-Flow Algorithms for General Network

Topologies
To enable ecient and economic DER integration, radial topology is less likely to suit
the ADN requirements. As such, Newton-Raphson (N-R) [25, 6974] and Gauss and/or
Gauss-Seidel (G-S) [30, 75] methods are more suitable for general network topologies.
Applying these methods for balanced PFA is well established in the literature [76]. The
former is known to have good convergence characteristics, but the continuous update of
the Jacobian matrix makes this approach less attractive. On the other, G-S method is
known to have oscillatory nature and more vulnerable to divergence.
2.2.2.1
Newton-Rapshon Method
In [25], a generalized three-phase power-ow solver is developed using the N-R method
in the rectangular co-ordinates. Phase-frame models of power lines, transformers, and
loads are developed. The only DER type considered in that work is the three-phase
15
directly-connected synchronous generator, which is modeled as a balanced 3 voltage

source behind an impedance. However, the N-R PFA in the rectangular coordinates is
not common since the size of the Jacobean matrix increases as the number of PV busses
increases.
A modied N-R method is developed in [69]. The Jacobian matrix is decomposed into
a constant upper triangular matrix and a diagonal matrix whose elements are updated
prior to each iteration. However, the results indicate that this method suers from weak
convergence patterns. In [70], new variables are dened to formulate the N-R power-ow
equations as a set of 3N equations (2N linear plus N non-linear equations), N being
the number of busses. The developed approach shows good convergence patterns when
applied to balanced networks.
In [71], optimal step-size multipliers are augmented with the N-R PFA algorithm to
improve its convergence when used to study networks with high R/X ratio. However, the
applicability of the algorithm for ADN is doubtful since it is not tested on distribution
networks with PV buses and loops.
Sequence-components frame is exploited in [72] and [73] to develop a three-phase
power-ow algorithm. The three-phase unbalanced power-ow problem is decomposed
into three sub-problems with weak mutuality. However, only three-phase four-wire constant power loads are considered in the analysis. In addition, only the voltage-controlled
synchronous generator-based DER unit is considered and modeled as an ideal balanced
voltage source.
Phase- and sequence-frames are combined to solve the 3 power-ow problem of
distribution networks with single-phase laterals [74]. The network is decomposed into
two parts, the three-phase trunk and the single-phase lateral. The algorithm of [72] and
the BFSA are iteratively interleaved leading to deteriorating the convergence speed of
the combined algorithm.
2.2.2.2
Gauss-Seidel Methods
In [30], optimal ordering and triangular factorization are used to develop a three-phase
distribution power-ow method using implicit bus impedance (Z-BUS) Gauss method.
Detailed phase-frame models of lines, loads and transformers are presented. The convergence behavior of the method is highly dependent on the number of the PV buses and
loops, which hinders the applicability of this method to ADN applications.
Phase-decoupled formulation is developed in [75] to solve the three-phase power-ow
problem. After decoupling the three phases, the implicit Z-BUS Gauss method is used
to solve the power-ow equations. The formulation cannot accommodate PV busses.
2.3
16
Sequence-Frame Versus Phase-Frame in ThreePhase Power-Flow Analysis
As indicated in Section 2.2, both the phase- and the sequence-frames are exploited in
developing three-phase power-ow algorithms. In the former method, the power system
components are modeled using their phase frame data. This method is very accurate since
it includes the coupling between the un-transposed lines as well as the phase shifts due to
dierent transformers connections. The main reported drawback of phase-frame-based
three-phase power-ow algorithms is the unaccepted computational time and requirements. For an N -bus power system, this is equivalent to solving a group of 6N strongly
coupled nonlinear simultaneous equations: real and imaginary parts of 3N equations,
one for each phase.
However, using the sequence-frame has the following merits:
Using the sequence-components frame in the power-ow analysis eectively reduces
the problem size and the computational burden as compared to the phase-frame
approach. This is true since solving the power-ow equations in the sequence-frame
is equivalent to solving three sets of weakly coupled equations: 2N nonlinear simultaneous equations for the positive-sequence network, and two sets of N complex
linear simultaneous equations for the negative- and zero-sequence networks [73].
As will be discussed in Sections 2.4 and 2.5, the coupling between the three-phase
power-ow equations is due to the non-zero o-diagonal elements of the 3x3 admittance matrices that represent untransposed power lines and unbalanced multi-phase
loads. However, the sequence-frame o-diagonal elements are smaller in magnitude
than their phase-frame counterparts [62].
The three sets of sequence-frame power-ow equations are weakly coupled compared
to their phase-frame counterparts. As such, the sequence-frame PFA algorithms
are less vulnerable to divergence and faster to convergence compared to the phaseframe algorithms [72]. In addition, the sequence-frame algorithms can easily be
implemented using the parallel programming techniques. Parallel implementation
of the sequence-frame power-ow analysis algorithm is beyond the scope of this
thesis.
Under the unbalanced grid conditions, the VSC controllers are realized based on
two synchronously and oppositely rotating reference frames [3537, 7783]. Thus,
it is easier to develop three-phase models of the VSC-coupled DER units in the
17
sequence-components frame compared to the phase-frame, as will be detailed in

the next two chapters.
Motivated by the aforementioned merits of the sequence-frame PFA algorithms, this
chapter develops an integrated Sequence-Frame Power-ow Solver (SFPS) tool for the
ADN planning and operation. The developed tool incorporates models of electronicallycoupled DER units representing their control characteristics and operating limits under
balanced and unbalanced grid conditions. In addition, unlike the algorithms of [72]
and [73], the proposed SFPS accommodates dierent classes of loads including singlephase, two-phase, and three-phase, three-wire (Wye and Delta connected) and four-wire
loads with constant power/current/impedance models.
2.4
Sequence-Frame Models of Basic ADN Components
This section briey describes the sequence-frame models of some basic ADN components, i.e., synchronous generators, power distribution lines, three-phase transformers,
and loads, tailored for the SFPS. More details of the sequence-frame-based, fundamentalfrequency, steady-state models of multi-phase power-lines and loads are given in appendices B and C, respectively.
2.4.1
Distributed Generation
Despite the fact that considerable attention has been paid to converter-based distribution generation technologies, e.g. fuel cells, photovoltaic arrays, and variable frequency
microturbines, some distributed generation sites in todays distribution grid still employ
synchronous generators for power and heat co-generation [84]. The basic DG model described in this section only encompasses TDSG in PV and PQ operating modes. The
next four chapters are dedicated to develop detailed sequence-frame-based, fundamentalfrequency, steady-state models of three-phase and single-phase VSC-coupled DER units
in the context of the SFPS.
Figure 2.2 shows the sequence-frame-based, fundamental-frequency, steady-state model
of a TDSG connected to Bus-k. The positive-sequence model, Fig. 2.2(a), represents its
control strategy. If the unit operates in the PV mode, it is modeled as an ideal voltage
source behind Bus-k. Under this mode of operation, the magnitude of the positivesequence component of the TDSG terminal voltage, |V1k |, and the corresponding injected
18
1
positive-sequence real power, PDER
, both in per-unit, are given by
|V1k | = Vsp ,
(2.1)
PspDER
,
(2.2)
3
where Vsp and PspDER are the specied per-unit positive-sequence terminal voltage and
the total three-phase injected real power of the TDSG unit respectively.
1
PDER
=
(a)
(b)
(c)
Figure 2.2: Sequence-frame, fundamental-frequency, steady-state model of a three-phase

directly connected synchronous generator for the SFPS: (a) the positive-sequence model,
(b) the negative-sequence model, (c) the zero-sequence model
If the TDSG unit operates in the PQ mode, its positive-sequence representation is a

constant power source (or negative constant power load) [85]. The positive-sequence real
1
power PDER
is given by (2.2). The positive-sequence reactive power (Q1DER ) injected by
the TDSG unit, in per-unit, is
Q1DER =
QspDER
,
3
(2.3)
where QspDER is the total three-phase reactive power injected by the TDSG unit. The
factor 1/3 in (2.2) and (2.3) is used to calculate the sequence-frame power components
from their phase-frame counterparts, assuming the same base-power is used in both
reference frames.
The negative- and zero-sequence models of the TDSG unit are shown in Fig. 2.2(b)
2,0
and 2.2(c), respectively. The negative- and zero-sequence admittances (yDER
) are [86]
2,0
yDER
=
1
2,0
RSG
2,0
+ jXSG
,
(2.4)
19
where
2
RSG
= RaSG ,
0
RSG
= RaSG + 3RnSG ,
(2.5)
and
2
=
XSG
0
XSG
=
Xdunsat
+ Xqunsat
/2,
2
XSG
+ 3XnSG ,
4
(2.6)
(Xqunsat
) is the direct (quadrature) unsaturated sub-transient reactance,
where Xdunsat
XnSG (RnSG ) is the TDSG neutral grounding reactance (resistance), and RaSG is the
armature resistance of the TDSG.
2.4.2
Unbalanced Three-phase Distribution Line
An (un)balanced three-phase distribution line connecting Bus-k and Bus-m, is modeled

as a single equivalent pi-section, Fig. 2.3. This model adequately addresses two-phase
and three-phase three-wire and four-wire multi-grounded distribution lines, which are
predominant the North Americans distribution systems [8789].
Figure 2.3: Equivalent -model of a three-phase distribution line

In Fig. 2.3, series and shunt branches are given by two 33 admittance matrices,
012
012
and Y012
are 31 vectors, and represent
shunt , respectively. Also, Ikm and Vk
the sequence-frame fundamental-frequency, steady-state current owing from Bus-k to
Bus-m and voltage components of Bus-k, respectively. I012
km is given by
Y012
series
I012
km =

Y012
shunt 012
012
012
Vk + Y012
V
V
,
series
k
m
2
(2.7)
20

which is equivalent to
I0km
1
I
km
I2km
01
02
y00
shunt yshunt yshunt
1
= y10
shunt
y11
shunt
y12
shunt
21
22
y20
shunt yshunt yshunt
V0k
V1
k
V2k
01
02
y00
series yseries yseries

10
+ y
series

y11
series
y12
series
21
22
y20
V0k V0m
V1 V1
k
m
V2k V2m
(2.8)
Equation (2.8) is the coupled sequence-frame model of the distribution line of Fig. 2.3.
The coupling between the sequence networks is due to the o-diagonal elements in Y012
series
012
and Yshunt . These terms are zero for a perfectly transposed power line, an uncommon
case in the North-American distribution networks. The magnitudes of the o-diagonal
012
elements of Y012
series and Yshunt are less than their diagonal counterparts [62, 73]. Thus,
(2.8) can be written as
I0km
1
I
km
I2km
=
2
y00
shunt
y11
shunt
y22
shunt
I0shuntkm
1

Ishuntkm
I2shuntkm
V0k
V1
k
V2k
I0serieskm

I1
serieskm

I2serieskm
y00
series
y11
series
y22
series
V0k V0m
V1 V1
k
m
V2k V2m
I0shuntkm
(2.9)
1
2
02
y01
shunt Vk + yshunt Vk
I1
shuntkm
1
= y10 V0 + y12 V2
shunt k
shunt k
I2shuntkm
I0serieskm
I1
serieskm
I2serieskm
and
0
1
21
y20
shunt Vk + yshunt Vk
(2.10)
1
1
2
2
02
y01
series Vk Vm + yseries Vk Vm

0
0
2
2
12
= y10
V
V
+
y
V
V
k
m
k
m
series
series

I0km
I1
km
I2km
0
0
1
1
21
y20
series Vk Vm + yseries Vk Vm
I0shuntkm
= I1
shuntkm
I2shuntkm
where
I0serieskm

+ I1
serieskm

I2serieskm
(2.11)
(2.12)
21
Equation (2.12) represents the equivalent compensation currents that should be injected into Bus-k to decouple the three sequence networks. The equivalent positivesequence compensation power (S1km ) injected at Bus-k is given by
1
+ jQ1km = V1k I1km
S1km = Pkm
(2.13)
The decoupled sequence-frame model of the three-phase distribution line is given by (2.9)(2.13), and is depicted in Fig 2.4. Implementing the model of Fig. 2.4 in the SFPS is
discussed in Section 2.5
(a)
(b)
(c)
Figure 2.4: Decoupled sequence-frame, fundamental-frequency, steady-state model of a

three-phase distribution line: (a) the positive-sequence model, (b) the negative-sequence
model, (c) the zero-sequence model
22
2.4.3
Three-phase Power Transformers
Several three-phase transformer connections exist in distribution networks. They can

be categorized into: /Yg , Yg /Yg , /Y, Yg /Y , and /. These transformer connections
introduce dierent phase shifts between their primary and secondary sides. Accurate
transformer models must consider these phase shifts in the sequence-frame PFA.
In the SFPS, a three-phase transformer that connects Bus-k to Bus-m and has a
short circuit admittance of ySC , is modeled using three decoupled 2 2 admittance
matrices [73]. The entries of these three matrices depend on the transformer connection,
as shown in Table 2.1.
Table 2.1: Sequence-Frame, Fundamental-Frequency, Steady-State Model of A ThreePhase Power Transformer
Positive-Sequence Model
y1trkk
y1trmk
y1trkm
y1trmm
Negative-Sequence
Model
y2trkk y2trkm
y2trmk y2trmm
Zero-Sequence Model
y0
y0trkm
trkk
y0trmk y0trmm
2.4.4
y1trkk
y1trmm
y1trkm
y1trmk
y2trkk
y2trmm
y2trkm
y2trmk
y0trkk
y0trmm
y0trkm
y0trmk
Bus-k
Yg
Bus-m
Yg
ySC
ySC
ySC
ySC
ySC
ySC
ySC
ySC
((ySC )1 + 3zn )
1
((ySC )1 + 3zn )
1
((ySC )1 + 3zn )
1
1
((ySC ) + 3zn )
Transformer Connection
Bus-m
Bus-k Bus-m Bus-k
Yg
ySC
ySC
ySC
ySC
ySC 30o
ySC 30o
ySC 30o
ySC 30o
ySC
ySC
ySC
ySC
ySC 30o
ySC 30o
ySC 30o
ySC 30o
Bus-k
Yg
((ySC )1 + 3zn )
0
0
0
0
0
0
0
Bus-m
Y
ySC
ySC
ySC
ySC
ySC
ySC
ySC
ySC
((ySC )1 + 3zn )
0
0
0
Bus-k Bus-m
ySC
ySC
ySC
ySC
ySC
ySC
ySC
ySC
0
0
0
0
Loads
The sequence-frame, fundamental-frequency, steady-state models of four-wire, constant

power loads only are considered in [72] and [73]. However, electric loads in the distribution networks include single-phase, two-phase, or three-phase three-wire constant
power/current/impedance loads [62]. This section briey describes the sequence-frame
models of 3 constant power/current/impedance loads in the context of the SFPS. The
detailed development of dierent load models is covered in Appendix C.
2.4.4.1
Constant Power and Current Loads
Figure 2.5 shows a schematic diagram of a generic constant power/current load connected
to Bus-k. A unied sequence-frame model for these kinds of loads is depicted in Fig. 2.6.
23
Figure 2.5: Schematic diagram of a constant power/current load connected to Bus-k
(a)
(b)
(c)
Figure 2.6: Decoupled sequence-frame, fundamental-frequency, steady-state model of a

constant power/current load
The positive-sequence load model is a power source, Fig. 2.6(a), whose value S1load is
the product of the positive-sequence voltage at Bus-k V1k and the complex conjugate of
the positive-sequence load current injected into Bus-k I1load . Subsequent to each powerow iteration, V1k , I1load , and consequently S1load are updated.
As shown in Fig. 2.6(b) and 2.6(c), the negative- and zero-sequence load models
are two current sources whose values are equal to the negative- and zero-sequence load
currents injected into Bus-k respectively (I2,0
load ). Three-wire load connection (Wye and
Delta) does not provide a path for the zero-sequence current. As such, I0load is set equal
to zero for such loads.
2.4.4.2
Constant Impedance Loads
Regardless of the load connection, the phase-frame representation of a constant impedance

load is a 3 3 diagonal admittance matrix, Fig. 2.7(a). The values of the three admitbb
cc
tances, yaa
load , yload , and yload , depend on the loads connection, rated voltage, and rated
power [62].
24
(a)
(b)
Figure 2.7: Model of a constant impedance load connected to Bus-k: (a) phase-frame
model, (b) sequence-frame model
In the sequence-frame, the equivalent sequence-frame load admittance matrix is
01
02
y00
load yload yload
10
y
load
y11
load
y12
load
21
22
y20
load yload yload
where
= T1
2
T=
1 a
yaa
load
ybb
load
ycc
load
T,
(2.14)
a
, a = 1 120 .
(2.15)
a2
The o-diagonal elements of the sequence-frame matrix are zero only for perfectly
bb
cc
balanced loads, i.e., yaa
load = yload = yload .
012
The sequence-frame load currents (I012
load ) and voltages (Vk ) of Fig. 2.7(b) are
I0load
1
I
load
I2load
01
02
y00
load yload yload
= y10
load
y11
load
y12
load
21
22
y20
load yload yload
V0k
V1
k
V2k
(2.16)
Eq. (2.16) can be written as
I0load
1
I
load
I2load
y00
load
y11
load
y22
load
V0k
V1
k
V2k
I0load

+ I1
load

I2load
(2.17)
25

where
I0load
I1
load
I2load
1
2
02
y01
load Vk + yload Vk
= y10 V0 + y12 V2
load k
load k
0
1
21
y20
load Vk + yload Vk
(2.18)
Equation (2.18) represents the sequence-frame compensation currents required to

decouple the three sequence networks. The equivalent positive-sequence compensation
power (S1load ) injected into Bus-k is given by
1
S1load = Pload
+ jQ1load = V1k I1load
(2.19)
The sequence-frame constant impedance load model incorporated in the SFPS is given
by (2.17)-(2.19), and is depicted in Fig. 2.8.
(a)
(b)
(c)
Figure 2.8: Decoupled sequence-frame model of a constant power/current load
2.5
The SFPS Algorithm
The SFPS algorithm is depicted in Fig. 2.9. The details of the SFPS steps follow.
Step 1: Construct the Sequence-Frame Bus Admittance Matrices:

The entry corresponding to the k th row and mth column of the positive-, negative-, and
1,2,0
zero-sequence bus admittance matrices (YBU
S ) is given by
1
yBU Skm =

11
A
i=1 yseriesi +
1
2
A
i=1
y11
shunti +
B`
A` y11
1
i=1 seriesi
i=1 ytrkmi
B
i=1
y1trkmi +
C
i=1
y11
loadi
, k = m,
, k = m,
(2.20)
Figure 2.9: Flow chart of the SFPS algorithm
26
27
y2,0
BU Skm

22,00
A
i=1 yseriesi +

2,0
= + D
i=1 yDERi
22,00
A`
1
2
A
y22,00
shunti +
B
i=1
y2,0
trkmi +
C
i=1
y22,00
loadi
, k = m,
B`
y2,0
trkmi
, k = m,
(2.21)
where A is the total number of power lines connected to Bus-k, B is the total number
of transformers connected to Bus-k, C is the total number of constant impedance loads
connected to Bus-k, A` is the total number of power-lines connecting Bus-k to Bus-m,
` is the total number of transformers connecting Bus-k to Bus-m, and D is the total
B
number of TDSG units connected to Bus-k.
i=1
yseriesi
i=1
i=1
Step 2: Check for the Zero-Sequence Blocking Condition:

In practical power systems, there will always be a path for zero sequence current. However, due to the components models incorporated in the SFPS, some buses of the zerosequence network might be isolated, Fig. 2.10. The clouded bus in Fig. 2.10(a) is
connected to a three-wire load and the delta side of a three-phase transformer. The
corresponding zero-sequence impedance diagram is given in Fig. 2.10(b). In the zerosequence network, the clouded bus becomes isolated from the rest of the network.
(a)
(b)
Figure 2.10: Zero-sequence blocking scenario: (a) phase-frame network, (b) zero-sequence
impedance diagram
In the SFPS, this condition causes some rows and columns of the Y0BU S with all-zero
entries. This is called zero-sequence blocking [90]. If this situation occurs, Y0BU S becomes
singular. In this work, once the zero-sequence blocking ag is raised, a modied Y0BU S
is constructed by eliminating the corresponding all-zeros rows and columns.
28
Step 3: Initialize the Positive-, Negative-, and Zero-Sequence Bus Voltages:

The sequence-frame components of the voltages at Bus-k are initialized according to
V1k =
1.0
Bus-k is a PQ bus,
Bus-k is a PV or slack bus,
sp
= 0.0.
V0,2
k
(2.22)
If the zero-sequence blocking ag is raised, omit the corresponding entries of V0BU S .

Step 4: Reset the Algorithm Counter:
ct = 0.
(2.23)
Step 5: Update the Negative- and Zero-Sequence Specied Bus-Current Injection Vectors:
Prior to the ctth iteration, the entry corresponding to the k th row of the negative- and
zero-sequence specied bus-current injection vectors (I2,0
BU S,ct ) is
2,0
IBU
Sk,ct
A

I2,0
kmi,ct
i=1
C

I2,0
loadi,ct
i=1
E

I2,0
loadi,ct ,
(2.24)
i=1
where E is the total number of constant power/current loads connected to Bus-k. If the
zero-sequence blocking ag is raised, omit the corresponding entries of I0BU S .
Step 6: Update the Positive-Sequence Specied Bus-Power Injection Vectors:
Prior to the ctth iteration, the k th entry of the positive-sequence specied bus-power
injection vectors (P1BU S,ct and Q1BU S,ct ) is given by
1
PBU
Sk,ct =
D

1
PDERi
+
i=1
Q1BU Sk,ct
D

i Q1DERi
i=1
where
i =
+
E

i=1
E

1
S1loadi,ct + Pkcomp,ct
,
(2.25)
S1loadi,ct
+ Q1kcomp,ct ,
(2.26)
i=1
DER-i is PQ controlled,
DER-i is PV controlled.
(2.27)
29
1
Pkcomp,ct
and Q1kcomp,ct are the positive-sequence real and reactive power compensation
at Bus-k, and are calculated prior to the ctth iteration using
1
=
Pk,comp
Q1k,comp =
A

S1kmi,ct +
C

i=1
i=1
C

A

S1kmi,ct +
i=1
S1loadi,ct ,
(2.28)
S1loadi,ct .
(2.29)
i=1
Step 7: Conduct the Positive-Sequence N-R PFA

Update the positive-sequence Jacobian matrix Jct and the positive-sequence power mismatch vector S1mismatch,ct . Solve (2.31) for the magnitudes and angles of the positivesequence bus voltages of the ct + 1th iteration.
1
1
BU S,ct+1 BU S,ct
1
Jct 1
= Smismatch,ct ,
1
VBU S,ct+1
VBU S,ct
where
(2.30)
PBU S / BU S PBU S /VBU S
J=
,
QBU S / BU S QBU S /VBU S
S1mismatch,ct
(2.31)
P1
P1
BU S,ct calc.,ct
= 1
,
QBU S,ct
Q1calc.,ct
(2.32)
and
1
= V1i
Pcalc.i
Q1calc.i = V1i
N

k=1
N

k=1
V1k y1BU Sik

V1k y1BU Sik
(2.33)
Step 8: Conduct the Negative- and Zero-Sequence PFA:

Solve the two complex matrix equations (2.34) for the negative- and zero-sequence bus
voltages at iteration ct + 1.
2,0
2,0
2,0
IBU
S,ct = YBU S VBU S,ct+1 .
(2.34)
30
Step 9: Evaluate the Phase-Frame Bus Voltages:

Reconstruct V0BU S by inserting a zero entry corresponding to each bus with a raised
zero-sequence blocking ag. Evaluate the phase-frame bus-voltages using

VaBU S,ct+1

VbBU S,ct+1

VcBU S,ct+1
V0BU S,ct+1

= T V1BU S,ct+1
V2BU S,ct+1
(2.35)
where (.) is the transpose of a vector.
Step 10: Evaluate the Termination Criterion:

Evaluate the termination criterion (ter cri) using
|VaBU S,ct+1 | |VaBU S,ct |
b
b
ter cri = max
|VBU S,ct+1 | |VBU S,ct |
|VcBU S,ct+1 |
|VcBU S,ct |
(2.36)
The maximum power mismatch could also be used as a termination criterion:

ter cri = max S1mismatch,ct
(2.37)
Update the algorithm counter (ct):

ct = ct + 1.
(2.38)
If ter cri is larger than a pre-specied tolerance, go to Step 5, else print the SFPS
results.
2.6
Summary and Discussion
This chapter presents the development of a three-phase power-ow analysis method for
the ADN applications, under balanced and unbalanced conditions. The power-ow
algorithm, Sequence-Frame Power-ow Solver (SFPS), is developed in the sequence-
31
component frame. This chapter also describes sequence-frame, fundamental-frequency,

steady-state models of:
a three-phase directly-connected synchronous generator DG unit under balanced
and unbalanced power-ow scenarios with dierent control characteristics, i.e., constant power (PQ) and voltage-regulated (PV) operating modes,
(un)transposed three-phase three- and four-wire power lines,
three-phase transformers with dierent connections,
multi-phase constant power/current/impedance loads.
The SFPS algorithm, including the details of incorporating the aforementioned components, is presented and discussed. The SFPS is the hub into which the VSC-based
DER models are incorporated and tested, as will be detailed in the next four chapters.
Chapter 3
Power-Flow Model of 3
VSC-Coupled DER Units1
3.1
Introduction
This chapter presents a unied fundamental-frequency, steady-state model of a threephase VSC, in the sequence-components frame, for PFA of VSC-interfaced DER units.
The proposed model is unied since it encompasses a wide array of DER units, e.g.,
battery energy storage systems (BESS), fuel cells (FC), solar photovoltaic units (SPV),
variable-speed wind turbine generators with full-scale power-electronic converters (Type4 WTG), and micro-turbine (MT) systems. In addition, the model represents (i) threewire and four-wire VSC congurations, (ii) balanced and unbalanced power-ow scenarios, (iii) various VSC control strategies, and (iv) operating limits and constraints of the
VSC and its host DER unit. To achieve numerical and computational eciency, the
SFPS algorithm, presented in Chapter 2, is modied to impose the the interface-VSC
operating limits. The accuracy of the developed model and the computational eciency
of the modied SFPS are demonstrated based on several case studies. Where applicable,
the numerical accuracy of the VSC model is validated based on comparison with the
exact time-domain solution, using the PSCAD/EMTDC platform.
1
The work presented in this chapter has been published and appears in M.Z. Kamh and R. Iravani,
A Unied Three-Phase Power-Flow Analysis Model for Electronically-Coupled Distributed Energy Resources, IEEE Trans. Power Delivery, vol.26, no.2, pp.899-909, April 2011.
32
Chapter 3. Power-Flow Model of 3- VSC-Coupled DER Units
33
Figure 3.1: Schematic diagram of three-phase VSC-coupled DER unit
3.2
Model Scope and Assumptions
As earlier stated in Chapter 1, three-phase DC-AC VSC is the most widely-adopted

interface medium for DER units [12]. To obtain an accurate power-ow solution of
ADN, three-phase VSC-coupled DER units should be modeled and incorporated in the
SFPS. The proposed model encompasses:
three-wire and four-wire VSC congurations under both balanced and unbalanced
power-ow scenarios,
various VSC control strategies, i.e., voltage/frequency and four-quadrant real/reactive
power controls, and specic control actions to inject an/or respond to negativeand/or zero-sequence components,
various VSC operational modes, e.g., four-quadrant real-/reactive-power exchange,
the VSC operational limits and constraints, i.e., maximum phase current, maximum
modulation index, and maximum reactive power limits.
Figure 3.1 shows a schematic diagram of a DER unit coupled to the host system at
Bus-k, which represents the point of connection (PC), via a three-wire or a four-wire
VSC. The primary source is connected to the VSC either (i) directly, e.g., BESS and
FC, (ii) by a DC-DC converter, e.g., SPV, or (iii) by an AC-DC converter, e.g., Type-4
WTG [12, 34]. The following assumptions are made:
The DER primary source is not directly represented in the model as the controllers
of the front-end interface-VSC or the back-end DC-DC converter are assumed to
fully regulate the DC-link voltage under steady-state conditions.
(a)
(b)
34
(c)
Figure 3.2: Proposed sequence-frame, fundamental-frequency, steady-state model of a

3 interface VSC, (a) positive-sequence model, (b) negative-sequence model, (c) zerosequence model
Only the fundamental frequency model of the interface-VSC is considered, i.e., the
harmonic eects are discarded.
The VSC synchronization to the grid is based on a phase-locked loop (PLL) system
that also extracts the sequence-frame components of the PC voltage [36, 77].
The interface VSC is equipped with dedicated controllers to provide specic control
functions with respect to the negative- and/or zero-sequence components of the PC
variables.
Double-frequency voltage and current components, present at the converter dc side
due to possible system unbalance, are assumed to be negligible.
the VSC losses are neglected.
The VSC negative- and zero-sequence power exchange with the host grid are negligibly small compared to their positive-sequence counterpart. As such, the VSC
positive-, negative-, and zero-sequence-frame models are assumed to be fully decoupled.
3.3
Proposed Sequence-Frame Model of 3 VSC-Coupled

DER Units
Figure 3.2 shows the proposed sequence-frame, fundamental-frequency, steady-state representation of a 3 VSC interfacing a DER unit. Under balanced/unbalanced grid conditions, the primary control objective of the interface VSC controllers is to either achieve
constant-power regulation (PQ) [91] or voltage and frequency regulation (PV) [92] at the
35
PC. This is realized by sensing the positive-sequence voltage and current components
at the PC, and utilizing them through a feedback process to control the coupling VSC
to generate the required positive-sequence voltage at its terminals. Thus, the positivesequence model of the VSC-coupled DER unit reects either the PQ or the PV control
mode.
Should the DER unit be subjected to unbalanced power-ow, the negative- and/or
zero-sequence components of the PC variables also can be exploited to augment the
VSC switching process to provide specic control functions. For example, a three-wire
VSC can be controlled to inject (i) only balanced three-phase currents [36], or (ii) in
addition, a pre-specied amount of negative sequence current [37], to counteract the
system imbalance or for active islanding detection. If desired, a four-wire VSC can be
controlled also to compensate for the neutral (zero-sequence) current of a local unbalanced
three-phase load [35]. The developed negative- and zero-sequence frame VSC models in
this chapter are intended to reect any/all of these VSC functionalities.
3.3.1
Interface VSC Positive-Sequence Model
The VSC positive-sequence model is similar to that of the TDSG shown in Fig. 2.2(a),
duplicated as Fig. 3.2(a) for ease of reference.
a) When the DER unit operates in the PV mode [92], its positive-sequence model with
respect to the PC is an ideal voltage source behind the PC bus. The specied voltage magnitude, |V1k |, at the PC and the positive-sequence real power injected (or
1
absorbed), PDER
, by the unit are
|V1k | = Vsp ,
(3.1)
PspDER
,
(3.2)
3
where Vsp and PspDER are the per-unit voltage and the three-phase real power reference set-points of the VSC.
1
PDER
=
b) When the DER unit is controlled to operate in the PQ mode, it is represented as a

constant power source. In this case, the real power injected/absorbed is given by (3.2)
and the exchanged reactive power, Q1DER , is
Q1DER =
QspDER
,
3
(3.3)
where QspDER is the per-unit three-phase reactive power reference set-point of the
36
VSC. In Fig. 3.2(a), I1DER is the positive-sequence current exchange between the DER
unit and the system.
3.3.2
Interface VSC Negative- and Zero-Sequence Models
The negative- and zero-sequence models of the interface VSC are shown in Figs. 3.2(b)
0,2
and 3.2(c), respectively. A parallel combination of a current source (ICT
RL ) and ctitious
0,2
admittance (YCT RL ) can represent any control objective for both the three-wire and fourwire VSC, corresponding to negative- and zero-sequence frames. In Fig. 3.2(b) (3.2(c)),
the net current exchange between the VSC negative- (zero-) sequence model and the
system is presented by I2DER (I0DER ).
3.3.2.1
Three-Wire VSC Conguration
If a three-wire interface-VSC is controlled only based on the positive-sequence dq current

control method [91], the DER unit also exchanges negative-sequence current with the
unbalanced system. In this case, the negative and zero sequence-frame components of
the model are specied as
I0,2
CT RL = 0,
Y2CT RL = 1/Zf ,
(3.4)
Y0CT RL = 0,
where Zf is the equivalent series impedance of the VSC output lter between the PC
and the short-circuited VSC terminals. The VSC output lter is used to reduce the
harmonic current injected in the utility system [93]. The simplest output lter topology
is a series-connected inductor, Fig. 3.1, for which Zf is given by
Zf = Rf + jXf ,
(3.5)
where Xf /Rf is the VSC output lter net reactance/resistance. Other output lter
congurations are reported in [94]. These alternative congurations lie under either one
of the two topologies shown in Fig. 3.3. The equivalent series impedance, Zf , for the
(a)
37
(b)
Figure 3.3: Alternative VSC output lter congurations
lter congurations shown in Fig. 3.3(a) and Fig. 3.3(b), is calculated as

Zf =
Z1 Z2
,
Z1 + Z2
Zf = Z3 +
Z1 Z2
,
Z1 + Z2
(3.6)
(3.7)
respectively, where Z1 , Z2 , and Z3 are shown in Fig. 3.3.

If a three-wire VSC is equipped with both positive- and negative-sequence current control schemes, and the negative-sequence current control is assigned to prevent negativesequence current exchange with the system [36], then the negative- and zero-sequence
models components are
I0,2
CT RL = 0,
Y0,2
CT RL = 0.
(3.8)
For some applications, the negative-sequence controller of the three-wire VSC is designed to inject a pre-specied negative-sequence current into the system, e.g., for islanding detection [37]. In this case, the negative and zero-sequence models of the interfaceVSC are
I2CT RL = IN SCI N SCI ,
I0CT RL = 0,
(3.9)
0,2
YCT
RL = 0,
where IN SCI and N SCI are the magnitude and phase angle of the pre-specied negative
sequence current injection. In (3.4), (3.8), and (3.9), the parameters of the zero-sequence
model of Fig. 3.2(c) are always zero since there is no path for zero-sequence current ow.

3.3.2.2
38
Four-Wire VSC Conguration
The split-capacitor and the four-leg interface-VSC congurations can enable neutral connection and establish a four-wire VSC system [35]. With respect to the steady-state
power-ow, both congurations are equivalent as long as the assumptions stated in Section 3.2 are applicable. In addition to the positive-sequence current control, a four-wire
interface-VSC can exchange controlled negative- and zero-sequence current components
with the system, e.g., to counteract the imbalance due to unbalanced load at the PC [35].
The models of Fig. 3.2(b) and Fig. 3.2(c) can represent this strategy by setting
0,2
ICT
RL
N

i=1
0,2
YCT
RL
0,2
0,2
V0,2
i yBU Ski Iloadk ,
= 0,
(3.10)
0,2
is the equivalent zero- and negative-sequence load current components
where Iloadk
injected into the PC (Bus-k).
If the four-wire interface-VSC only injects a controlled positive-sequence current in the

system and permits the system to determine the exchanged negative- and zero-sequence
current components, then the corresponding model parameters are
I0,2
CT RL = 0,
Y2CT RL =
1
,
Rf + jXf
Y0CT RL =
1
,
(Rf + 3Rn ) + j(Xf + 3Xn )
(3.11)
where Rn and Xn are dened in Fig. 3.1.
3.4
Implementation of the VSC Unied Model in the

SFPS
3.4.1
Accommodating the VSC-Coupled DER Model in the

SFPS
Consider a VSC-interfaced DER unit coupled to the host distribution network at Bus-k
(DER-k). To embed the model of Fig. 3.2 in the SFPS algorithm:
1. Add the terms Y0,2
CT RL to the entries of the zero- and negative-sequence bus admit-
39
Figure 3.4: Equivalent sequence-frame circuits of a VSC-coupled DER unit

tance matrices corresponding to the k th row and the k th column (y0,2
), given
BU Skk
by (2.21), respectively.
0,2
th
2. Add the terms ICT
entries of the zero- and negative-sequence busRL to the k
0,2
current injection vectors (IBU Sk ), given by (2.24), respectively.
1
3. Add the terms PDER
and Q1DER , given by (3.2) and (3.3), to the k th entry of the
1
1
specied real and reactive power vectors (PBU
Sk and QBU Sk ), given by (2.25)
and (2.26), respectively.
3.4.2
Calculating the Internal Parameters of the Interface VSC
To impose the operating limits of the interface-VSC of DER-k in the SFPS, its internal
parameters values, i.e., modulation indices, phase currents, and reactive power (for PV
units), must be determined rst. Figure 3.4 shows the equivalent sequence-frame circuits
of the interface VSC used to determine these parameters.
Subsequent to each power-ow iteration, the PC terminal conditions are evaluated.
The VSC net sequence-frame current components injected into the PC are
0,2
0,2
0,2
0,2
IDER
= ICT
k0,2 ,
RL YCT RL Vk
1
jQ1DER
PDER
,
I1DER =
Vk1 k1
where the elements of the VSC net current injection vector I012
DER =
(3.12)
(3.13)

I0DER I1DER
I2DER
are specied on Fig. 3.2. Then the three-phase current Iabc

DER injected by the DER unit
is calculated using
012
Iabc
(3.14)
DER = TIDER ,

40
Table 3.1: VSC Constant

Modulation Strategy
Kinv
Sinusoidal Pulse
1
Width Modulation (SPWM) 2 2

Space Vector
1
6
Modulation (SVM)
where the matrix T is given by (2.15) and

Iabc
DER =
IaDER IbDER IcDER

(3.15)
Finally, the sequence components of the interface-VSC terminal voltage, Fig. 3.4, can be
determined using

0,2
Vt0,2 t0,2 = I0,2
+ jX 0,2 + Vk0,2 k0,2 ,
(3.16)
DER R

Vt1 t1 =

1

PDER
jQ1DER 1
1
R
+
jX
+ Vk1 k1 ,
Vk1 k1
(3.17)
where
R1,2 = Rf ,
R0 = Rf + 3Rn ,
(3.18)
X 1,2 = Xf ,
X 0 = Xf + 3Xn .
The VSC sequence- and phase-frame modulation indices are given by
m012 =
V012
t
,
Kinv Vdc
(3.19)
mabc = Tm012 ,
(3.20)
where Kinv is the phase-to-neutral converter constant and is determined based on the
adopted modulation technique, as shown in Table 3.1 [95], and

abc
m012 =

ma ta mb tb mc tc

m0 t0 m1 t1 m2 t2
(3.21)
(3.22)

3.4.3
41
Mitigating the VSC Operating Limits Violation
Subsequent to evaluating the internal parameters of the interface-VSC, its operating

limits are checked to achieve a power-ow solution that satises all the VSCs constraints.
If any violation is detected, the voltage and/or power set points of each converter, i.e.,
Vsp , PspDER , and QspDER , are updated based on the following proposed strategies.
3.4.3.1
Mitigating the Phase Current Limit Violation
a,b,c
If any of the DER phase currents (IDER
) exceeds the maximum phase current limit, the
specied real and reactive power components associated with each VSC unit are updated
using
1
PDER,ct+1
|x =
1
Iphmax

,
PspDER,ct
a,b,c
3
max violate IDERct
Q1DER,ct+1 |x =
1
Iphmax

,
QspDER,ct
a,b,c
3
max violate IDERct
(3.23)
a,b,c
where ct is the SFPS current iteration index and maxviolate IDER,ct
is the magnitude
of the VSC largest violating phase current corresponding to iteration ct. Sux x refers to
the VSC power set-points satisfying the VSC maximum current constraint. It should be
noted that if the DER unit is controlled to operate at a constant power-factor, then the
real and reactive power set-points are simultaneously updated using (3.23). Otherwise,
the DER reactive power contribution is reduced rst to alleviate the violation while the
real-power set-point remains unaltered.
3.4.3.2
Mitigating the Reactive Power Limit Violation
For PV-controlled DER units, if the reactive power limit is hit, the specied positive
sequence voltage for the corresponding bus is updated using

Vsp,ct+1 |y =
where
Qmax X 1
,
cct
cct =
1
1
1
Vt,ct
cos t,ct
k,ct
Vsp,ct
(3.24)
1.
(3.25)
Equation (3.24) is the solution of (3.17) after replacing Q1 with Qmax and assuming
that R1 is much smaller than X 1 . Sux y refers to the VSC voltage set-point satisfying
42
the maximum reactive power constraint.

It should be noted that, unlike the conventional N-R power-ow algorithms where
the violating PV bus is switched to PQ bus [72, 96, 97], the proposed approach of Section 3.4.3.2 uses the closed form given by (3.24) and (3.25) to update the specied bus
voltage for the next iteration, Vsp,ct+1 , such that the reactive power remains within the
acceptable operating limits. Consequently, the Jacobean matrix and states vector do not
require restructuring, corresponding to bus-type changing. This simplies the algorithm
implementation and programming.
3.4.3.3
Mitigating the Phase Modulation Index Limit Violation
If any of the DER phase modulation indices (ma,b,c ) exceeds the maximum phase modulation index limit (mphmax ), the following procedure is executed:
1. Set the violating modulation index equal to mphmax
2. Re-evaluate Vt1 using (3.19) and (3.20)
1
1
3. Update PDER,ct+1
|z and Q1DER,ct+1 |z (PDER
|z and Vsp1 |z ) for PQ (PV) units using
(3.17). Sux z refers to the VSC set-points satisfying the maximum modulation
index constraint.
3.4.3.4
Updating the Interface VSC Reference Set-Points
The VSC reference set-points, selected prior to the (ct + 1)st power-ow iteration, must
1
satisfy all the aforementioned limits. As such, the VSC reference set-points (PDER,ct+1
,
1
QDER,ct+1 , Vsp,ct+1 ) are selected as:
1
1
1
= min(PDER,ct+1
|x , PDER,ct+1
|z , PspDER /3),
PDER,ct+1
(3.26)
Q1DER,ct+1 = min(Q1DER,ct+1 |x , Q1DER,ct+1 |z , QspDER /3) for PQ DER units,(3.27)

Vsp,ct+1 = min(Vsp,ct+1 |y , Vsp,ct+1 |z , Vsp ) for PV DER units.
3.5
(3.28)
Sequential-SFPS
The procedures of Sections 3.4.2 and 3.4.3 are implemented as an interleaved step that
is iteratively executed subsequent to each SFPS iteration. The complete algorithm is
depicted in the ow chart of Fig. 3.5.
As seen from Fig. 3.5, the entire algorithm is decomposed into three main subroutines.
First, the system power-ow solution and the interface-VSC terminal conditions are
Figure 3.5: Flow chart of the proposed Sequential-SFPS
43
44
evaluated using the SFPS. Then, the interface-VSC internal currents and voltages are
calculated. Finally, the VSC reference set-points are updated to full all the interfaceVSCs constraints prior to proceeding to the next SFPS iteration. Thus, the algorithm
sequentially iterates between the SFPS and the updating algorithm. This is the reason
the term sequential is emphasized for the proposed algorithm.
It should be noted that unlike the method presented in [32] and [34], where the
interface VSC constraints are evaluated after the nal convergence of the power-ow
algorithm, the proposed method detects the violation once it occurs at any iteration of
the SFPS and automatically updates the VSC power and/or voltage set-points prior to
succeeding to the following power-ow iteration to ensure that all the constraints are
fullled. Hereafter, the method presented in [32] and [34] will be referred to as nonsequential method.
3.6
3 VSC Model Validation
To evaluate the numerical accuracy of the proposed VSC models of Fig. 3.2 and verify
the validity of the Sequential-SPFS algorithm of Fig. 3.5, the six-bus study system of
Fig. A.1, duplicated as Fig. 3.6 for the ease of reference, is selected and four case studies (Case-1 to 4 ) are conducted. G1 is a voltage-controlled three-phase synchronous
generator with enough capacity to compensate the system slack, and is modeled as a
three-phase constant voltage source with negative and zero-sequence impedance. G2 is
a three-phase VSC-coupled DER unit, and is modeled as a controlled voltage source
behind the interface-VSC lter. As earlier stated in Chapter 1, the reason for selecting
this adequately small system is to be able to simulate the system in time-domain in the
PSCAD/EMTDC platform, and consequently, verifying the numerical accuracy of the
VSC models and the SFPS. The system parameters and loading prole are detailed in
Appendix A.1. The parameters of G1 and G2 are given in Table 3.2. Two applications of
the Sequential-SFPS to large distribution systems, with dierent R/X ratios and network
topologies, are presented in the next section.
To validate the proposed interface VSC model, the power-ow algorithm based on
the ow chart of Fig. 3.5, including the DER models of Section 3.3, is implemented
in the MATLAB platform. The detailed model of the study system is also developed
in the PSCAD/EMTDC time-domain software to serve as the benchmark for validation of the interface-VSC model and the SPFS results. As discussed in Chapter 1, the
PSCAD/EMTDC simulation environment is selected since it contains detailed and widely
used time-domain models of power system components and allows incorporating various
Figure 3.6: Single line diagram of the six-bus test system
Table 3.2: Parameters of G1 and G2 of Fig. 3.6 (Sbase = 1000 kVA)

G1
G2
Vbase =4.16 kV,
X 2 =0.004,
X 0 =0.02,
Vsp =1.045
Vbase =4.16 kV,

Rf =4 104 , Xf = 0.105
Vdc =3.2, Qmax =0.7
Iphmax =0.75, mphmax =1
Kinv = 21 2
45
46
controls for the interface VSC.

For Case-1 to Case-3 , the system operating point is adjusted to prevent any violation of the converter operating constraints. This enables direct validation of the
interface-VSC model without considering the sequential part of the algorithm of Fig.
3.5.
3.6.0.5
Case-1
For this case study, G2 is a 3 three-wire voltage-controlled VSC-coupled DER unit

equipped with voltage and real power controllers (PV mode) [92]. The unit is interfaced
to Bus-5 via a three-phase /Yg transformer. G2 is to regulate the positive-sequence
component of the voltage at Bus 6 to 1.05 pu and injects 1 pu real power. The powerow results and the calculated internal parameters of G2 are given in Table 3.3 which
concludes that:
The phase modulation indices of G2 from both solutions are equal and verify that
the DER unit is only generating balanced three-phase terminal voltage. The positive sequence component of Bus 6 is 1.05 as required. However, the voltage at
Bus-6 includes 0.011 pu of negative-sequence voltage due to the system unbalanced
conditions.
Since the VSC is not controlled with respect to the negative-sequence frame, it is
subjected to negative-sequence current exchange of about 0.1 pu. The magnitude
of this current depends only on the magnitude of the negative-sequence component
of the voltage at bus-6 and the impedance of the VSC lter. The ow of excessive
negative-sequence current, in addition to the positive-sequence current, can subject
the converter switches to over-current conditions.
Although G2 is controlled to inject 1.0 pu real-power, it actually injects 0.9994 pu
instead. The reason is that the uncontrolled negative-sequence current ow into
the DER unit causes 0.0006 pu of lter power losses.
3.6.0.6
Case-2
In this case study, G2 is a 3 three-wire current-controlled VSC-coupled, DER unit

equipped with positive- and negative-sequence dq-current controllers [37]. G2 is controlled to inject (i) 1.0 pu power at unity power factor and (ii) 0.03 pu negative-sequence
current for active islanding detection. The power ow results and the calculated internal
parameters of G2 are given in Table 3.4. Table 3.4 indicates:
47
Table 3.3: Power-Flow Results of Case-1

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
Magnitude (pu) Angle(degrees)
A
B
A
B
1.045
1.046
-0.016 -0.013
1.031
1.035
27.19
27.04
1.039
1.039
25.481 25.467
1.047
1.044
25.193 25.219
1.051
1.049
25.389 25.475
1.056
1.058
-3.905 -3.801
IaDER = 0.556 66.73
IbDER = 0.69 177.42
IcDER = 0.721 48.73
Phase B
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.043
1.044
-119.08 -120.026
1.039
1.031
-93.021
-92.675
1.021
1.025
-94.201
-94.148
1.024
1.024
-94.812
-94.707
1.029
1.032
-94.563
-94.581
1.049
1.052
-125.081 -124.714
Sa = 0.588 62.93
Sb = 0.731 52.71
Sc = 0.75 67.34
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.045
1.045
120.09 120.039
1.037
1.037
146.931 147.34
1.038
1.036
145.973 146.141
1.04
1.037
145.968 146.024
1.041
1.041
146.083 146.199
1.041
1.041
115.891 116.068
ma = 0.982
mb = 0.982
mc = 0.982
A: PSCAD/EMTDC Results, B: SFPS Results

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
A
B
A
B
1.046
1.046
0.0
0.001
1.022
1.021
27.701 27.624
1.013
1.011
26.483 26.455
1.003
1.009
26.391 26.276
1.006
1.007
26.512 26.636
1.009
1.012
-2.263 -2.567
IaDER = 0.364 2.44
IbDER = 0.321 127.43
IcDER = 0.318 121.89
Phase B
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.044
1.045
-119.991 -120.028
1.016
1.016
-92.236
-92.231
0.998
0.999
-92.967
-93.398
0.988
0.989
-93.681
-93.599
0.985
0.987
-92.812
-93.004
0.994
0.994
-123.641 -123.364
Sa = 0.368 0.12
Sb = 0.319 4.06
Sc = 0.316 3.95
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.045
1.045
119.996 120.026
1.018
1.02
147.828 147.879
1.007
1.007
147.161 147.138
1.005
1.004
147.159 147.282
1.002
1.003
147.641 147.717
0.991
0.991
117.832 117.939
ma = 0.895
mb = 0.882
mc = 0.875
The three-phase modulation indices are not equal and can be decomposed into
positive (0.884) and negative (0.012) sequence modulation indices. The negativesequence modulation index corresponds to 0.03 pu negative-sequence current injection.
The DER unit is controlled to inject 1.0 pu power at unity power factor. However,
the sum of the injected power components through the three phases of the VSC
is 1.002 pu. The 0.002 pu power corresponds to the 0.03 pu negative sequence
current injection. The total 3 real-power is dierent from that of (Case-1 ),
which indicates the impact of the negative-sequence control strategy on the DER
power-ow.
3.6.0.7
Case-3
In this case, G2 is a 3 four-wire current-controlled VSC-coupled DER unit controlled

to inject 1.0 pu power at unity power factor and compensate for the unbalanced load
48

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
A
B
A
B
1.044
1.046
0.12
0.007
1.021
1.019
27.381 27.176
1.013
1.01
25.601 25.675
1.014
1.01
25.135 25.307
1.01
1.008
25.395 25.462
1.005
1.005
25.091 25.091
IaDER = 0.322 25.89
IbDER = 0.378 91.24
IcDER = 0.315 141.24
Phase B
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.043
1.045
-120.035 -120.033
1.012
1.013
-92.326
-92.724
0.992
0.992
-93.921
-94.26
0.981
0.980
-95.036
-94.752
0.979
0.976
-94.643
-94.494
0.971
0.967
-95.124
-94.868
Sa = 0.324 0.8
Sb = 0.365 3.63
Sc = 0.311 5.09
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.049
1.045
119.823 120.026
1.015
1.018
147.231
147.4
1.003
1.003
146.023 146.234
0.998
0.998
145.968 146.199
0.994
0.996
146.632 146.455
0.991
0.990
146.256 146.329
ma = 0.889
mb = 0.853
mc = 0.878
A: PSCAD/EMTDC Results, B: Developed Software Results
currents at Bus-6 (PQ mode) [35]. To study the unbalanced performance of G2, an
unbalanced load, identical to the load at bus-4, is connected to Bus-6. Transformer T2
of Fig. 3.6 is altered to a Yg /Yg conguration to allow four-wire VSC connection. The
power-ow results and the calculated internal parameters of G2 are given in Table 3.5.
Table 3.5 indicates:
Since the VSC is controlled to compensate for the unbalanced load currents at Bus
6, the three-phase modulation indices force the VSC to generate negative (0.018
pu) and zero (0.006 pu) sequence voltages at its terminals corresponding to the
desired unbalanced currents.
The DER unit is intended to inject 1 pu power at unity power factor. However, due
to the compensation of the negative- and zero-sequence load currents of Bus-6, the
net injected power is 0.998 pu. Again, this value is dierent from those of (Case1 ) and (Case-2 ). This dierence could not been quantied unless the proposed
VSC model and the SFPS are used to study the DER 3 PFA.
As concluded from Tables 3.3-3.5, the maximum voltage magnitude error for the six
busses, in all three case studies, is less than 0.8%. This is an acceptable error and it arises
due to the dierent nature of the two solvers. The PSCAD/EMTDC, as an EMTP software, solves the system dierential equations. On the other hand, the developed program
solves the system steady-state power-ow equations, which are linearized simultaneous
algebraic equations. The good agreement between the results of the two solvers indicates
that the unied VSC-coupled DER model and the SFPS are accurate.
Bus
1
2
3
4
5
6
3.6.1
Table 3.6: Power-Flow Results

Phase A
Phase B
Mag. Angle Mag.
Angle
(pu) (deg.) (pu)
(deg.)
1.046 -0.012 1.044 -120.036
1.032 26.741 1.027 -92.943
1.032 24.860 1.016 -94.735
1.037 24.424 1.012 -95.510
1.044 24.733 1.019 -95.275
1.054 -4.357 1.042 -125.583
49
of Case-4
Phase C
Mag. Angle
(pu)
(deg.)
1.045 120.048
1.034 147.139
1.029 145.749
1.029 145.567
1.033 145.821
1.028 115.620
Case-4: Sequential-SFPS Validation
The fourth case study (Case-4 ) is conducted to validate the entire algorithm of Fig. 3.5,
including the sequential evaluation of the VSC operating limits. In this case study, G2 is
interfaced to Bus-6 via a 3 three-wire voltage-regulated VSC. The operating conditions
for Case-4 are identical to Case-1 except that the load at Bus-4 is 1.5 times higher.
However, when the algorithm of Fig. 3.5 is applied to scenario of Case-4 , without
imposing the operating limits of G2, the positive-sequence reactive power injected by
G2 is 0.734 pu and the phase modulation index is 1.005. According to Table 3.2, the
corresponding maximum positive-sequence reactive power injected by G2 and the phase
modulation index should not exceed 0.7 pu and 1.0 respectively. This indicates that the
power-ow solution is practically not acceptable and violates the limits.
When the operating limits of G2 are considered, the sequential-SFPS adjusts the
voltage set-point (Vsp ) of G2 to 1.042 corresponding to 0.565 pu reactive power injection
at 0.971 phase modulation index. The maximum phase current injected by G2 is 0.713
pu. Thus, all the operating constraints of G2 are satised. The algorithm converges in
three iterations. The complete power-ow solution for Case-4 is given in Table 3.6.
3.7
Computation Eciency of the Proposed SequentialSFPS
As indicated in Section 3.5, there are two distinct techniques to implement the interfaceVSC operating limits in the power-ow solver; the non-sequential [32,34] and the sequential approaches. This section reports the application of the Sequential-SFPS algorithm
of Fig. 3.5 to two benchmark distribution systems with dierent R/X ratios and network
topologies, i.e., the CIGRE MV distribution network [98] and the IEEE 34-bus feeder [99]
50
to (i) verify the feasibility of the developed Sequential-SFPS for large and realistic size
power systems and (ii) demonstrate the convergence superiority of the proposed approach
compared to the non-sequential method [32,34]. The single-line diagrams and parameters
of both test systems are detailed in Appendix A.2 and Appendix A.4, respectively.
The 12.47 kV, three-phase, four-wire CIGRE distribution network of Fig. A.2 is
equipped with two DER units:
1. DER1 is a 3 three-wire voltage-controlled VSC-coupled DER unit connected to
Bus-8 via a three-phase transformer (200 kVA, 12.47/4.16 kV, Yg /) and is rated at
200 kVA, 4.16 kV. DER1 operates as a PV unit to maintain the positive-sequence
voltage component of its corresponding bus at 1 pu and inject 200 kW into the
network.
2. DER2 is a 3 three-wire current-controlled VSC-coupled DER unit connected to
Bus-3 via a three-phase transformer (150 kVA, 12.47/4.16 kV, Yg /). DER2 is
rated at 150 kVA, 4.16 kV. DER2 operates as a PQ unit to inject 150 kVA at
unity power-factor and inject 0.03 pu negative-sequence current for active islanding
detection [37].
The 24.9 kV, three-phase, four-wire IEEE 34-bus feeder of Fig. A.4 is equipped with
three VSC-coupled DER units:
1. DER3 is a 3 four-wire current-controlled VSC-coupled DER unit connected to
Bus-814 via a three-phase transformer (100 kVA, 24.9/4.16 kV, Yg /Yg ). DER3 is
rated at 100 kVA, 4.16 kV and operates as a PQ unit to inject 100 kVA at unity
power-factor and compensate for the unbalanced load currents at Bus-814.
2. DER4 and DER5 are 3 three-wire voltage-controlled VSC-coupled DER units
connected to Bus-858 and Bus-836, respectively. Each unit is connected to the grid
via a three-phase transformer (100 kVA, 24.9/4.16 kV, Yg /). Each unit is rated
at 100 kVA and 4.16 kV. Both units operate as PV units to maintain the positivesequence voltage component of their corresponding bus at 1.0 pu and inject 1.0 pu
active power into the network.
The internal parameters of the DER1-DER5 are the same as those of unit G2 of Table
3.2.
The non-sequential power-ow algorithm, reported in [32, 34], is implemented in the
MATLAB platform. The sequential and the non-sequential programs are applied to
evaluate the power-ow solution of the CIGRE MV distribution network and the IEEE
34-bus feeder.
51
Figure 3.7: Comparison between the sequential and the non-sequential power-ow algorithms in terms of the convergence speed
Table 3.7: Comparison Between the Sequential and the Non-Sequential Power-Flow Algorithms in Terms of the Total Number of Jacobean Matrix Evaluations/Inversions
Test
Proposed
Non-sequential
System
sequential-SFPS
method
Six-bus
3
6
test system
CIGRE MV
4
6
distribution network
IEEE 34-bus
7
15
feeder
The power-ow results of both algorithms favorably agree. Fig. 3.7 compares the
convergence speed of the two algorithms and indicate that the Sequential-SFPS provides
a superior convergence rate.
Another gure of merit of the Sequential-SFPS with respect to the non-sequential
approach is the number of evaluations/inversions of the Jacobian matrix to obtain the
power-ow solution, as shown in Table 3.7. The results of Fig. 3.7 and Table 3.7 are
based an Intel Core2Duo , 3.16 GHz processor. Figure 3.7 and Table 3.7 show that
the sequential-SFPS outperforms the non-sequential method.
The computational eciency of the Sequential-SFPS, as compared to the non-sequential
method, is explained as follows. As indicated in Table 3.7, the Sequential-SFPS requires
less number of Jacobian matrix evaluations/inversions, which is the most time-consuming
part of the power-ow algorithm. In the proposed sequential approach, the VSC constraint evaluation of the DER units, and consequently updating the voltage and/or power
set-points, is formulated as an interleaved step with each SFPS iteration. Thus, the subsequent power-ow iteration is not executed until all the VSC constraints are fullled.
52
However, the non-sequential method evaluates the DER constraints subsequent to the
convergence of the entire SFPS algorithm. This results in larger number of power-ow
iterations and Jacobian matrix evaluations/inversions, as compared to the SequentialSFPS.
3.8
This chapter develops a unied sequence-frame-based, three-phase, fundamental-frequency

model for VSC-coupled DER units for balanced and unbalanced power-ow analysis. The
proposed model accommodates (i) both three-wire and four-wire VSC congurations, (ii)
various VSC control features/strategies, and (iii) the operating limits of the interfaceVSC, under balanced and unbalanced power-ow conditions.
This chapter also presents the necessary modications to embed the unied model
in the SFPS. In contrast to the existing methods, the algorithm utilizes a sequential
iterative process with respect to the network and the VSC solutions to guarantee that
the power-ow solution adheres to the interface VSC constraints and operating limits.
Chapter 4
Power-Flow Model of Type-3 Wind
Generation Unit: Mathematical
Formulation1
4.1
Introduction
This chapter develops a comprehensive mathematical model of the Type-3 DER unit,
i.e., a doubly-fed asynchronous generator (DFAG) and its associated converter system,
for three-phase PFA using the SFPS. First, a sequence frame, steady-state, fundamentalfrequency model of a generic Type-3 DER unit is developed to represent (i) the control
capabilities and (ii) the operating limits of the rotor-side and the grid-side converters
under balanced and unbalanced power-ow conditions. New strategies to determine the
reference set-points of the controllers for compliance with the operating limits, are also
presented. The model, including the proposed strategies, is incorporated with SFPS. For
numerically accurate and computationally ecient solutions, the sequential approach,
proposed in Chapter 3, is used to impose the operating limits of the Type-3 DER unit.
Applications and validation of the developed model and the set-points update strategies,
and evaluation of the computational eciency of the power-ow algorithm are covered
in Chapter 5.
1
The work presented in this chapter has been accepted for publication, and will appear in M.Z. Kamh
and R. Iravani, Three-Phase Model and Power-Flow Analysis of Wind-Driven Doubly-Fed Asynchronous
Generators Part I: Model Development, IEEE Trans. Sustainable Energy, April 2011, Manuscript ID
TSTE-00186-2010.
53
Chapter 4. Power-Flow Model of Type-3 WTG DER Units
4.2
54
Classication of Wind Turbine Generators
Over the past two decades, wind energy has gained the most attention as a clean,
environmentally-friendly, and free source of electricity generation [53, 54, 100]. Wind
turbines generating units (WTGUs) are classied into three main categories:
xed speed units (Type-1 WTGUs)
semi-variable speed units (Type-2 WTGUs)
variable speed units (Type-3 and Type-4 WTGUs)
4.2.1
Type-1 WTGU
This category deploys the squirrel cage induction generator (SCIG) which is driven by
a wind turbine either having a xed turbine blade angle (stall regulated xed speed
WTGU) or having a pitch controller to regulate the blade angle (pitch regulated xed
speed WTGU), Fig. 4.1(a) [100]. The rotor speed is almost xed. Type-1 WTGUs
are directly connected to the grid via a step-up transformer. For rotor speeds higher
than the synchronous speed, the unit injects active power into the grid. Reactive power
compensation is provided to Type-1 generators through the grid and xed shunt capacitors (for power factor correction purpose). The amount of real and reactive power
supplied/consumed by Type-1 WTGUs solely depend on the turbine and generator characteristics, wind speed, and grid voltage.
4.2.2
Type-2 WTGU
Pitch controlled turbines and wound rotor induction generators (WRIG) are deployed in
this category. Rotor speed can be varied within a range of 10% using an electronicallycontrolled variable resistor connected to the machines rotor, Fig. 4.1(b). Type-2 WTGUs
are directly connected to the grid via a step-up transformer. Reactive power compensation is identical to Type-1.
4.2.3
Type-3 WTGU
Figure 4.1(c) depicts a schematic diagram of a Type-3 variable-speed WTGU. A Type-3

unit consists of a (i) wind turbine and gear-box, (ii) a DFAG, (iii) a rotor-side converter
(RSC), and (iv) a grid-side converter (GSC). Both converters are VSCs, and connected
55
(a)
(b)
(c)
(d)
Figure 4.1: Schematic diagrams of the four types of wind-turbine generating systems:
(a) Type-1, (b) Type-2, (c) Type-3, and (d) Type-4
56
using the back-to-back (B2B) conguration with a common DC link to operate as a

frequency-converter.
Among the four types of WTGUs, Type-3 WTGUs are the most deployed due to their
salient capabilities, i.e., (i) constant frequency/variable speed operation, (ii) independent
four-quadrant active and reactive power control, (iii) reactive power support, and (iv)
reduced converter ratings [101103]. Hereafter, Type-3 is used to refer to the DFAG,
RSC, GSC, and the DC link.
4.2.4
Type-4 WTGU
Variable-speed operation can also be achieved using direct-driven squirrel-cage induction/permanent magnet synchronous generator units with a full-scale B2B VSC to interface the stator to the host grid, Fig. 4.1(d) [104]. For generators with large number of
poles, the gearbox may be eliminated to increase the overall system eciency. Type-4
WTGU has the same advantage of the Type-3 units. However, the power-electronic converter should be sized to overpass the full rating of the machine to provide the adequate
reactive power compensation [104].
4.3
Power-Flow Models of Type-3 DER Units: Review
The existing WTGU steady-state models focus on Type-1 and Type-2 arrangements
[46,47,5154,62,105]. While the DER model developed in Chapter 3 encompasses Type4 WTGU, the available Type-3 models neither consider the system unbalanced conditions
nor represent the unit operating limits [49, 50].
In [50], a primitive steady-state Type-3 model is developed to assess the voltage
stability limits of electrical power systems, where PV bus with reactive power limits is
used to model voltage-regulated Type-3 units while constant PQ bus is used to model
power-factor controlled units. Such model can neither address the unbalanced operation
of the Type-3 unit nor the impacts of the power-electronic converters operating limits.
An iterative method is developed in [49] to consider the RSC current limits. However,
the model neither includes all the other Type-3 operational limits nor considered the
unbalanced grid conditions on the units performance. The unbalanced models described
in [51] and [62] are developed in the sequence-components frame, but are only applicable
for xed-speed wind-driven units. The impact of the operational limits of the interfacing
57
power electronic converters should be considered for accurate modeling of the WTGUs
[106].
4.4
The Scope of the Chapter
The Type-3 WTGU is either connected to a distribution system as a single distributed

generation (DG) unit [107] or constitutes a WTGU of a large wind farm which is interfaced to a transmission system [108]. The former case is the main focus of this chapter.
As earlier emphasized in Chapter 2, distribution systems are inherently unbalanced. For
the scenario that a Type-3 WTGU is interfaced to a distribution system, the voltage
unbalance should be properly addressed and quantied for control and operation of the
unit. Unbalanced voltage at the Type-3 terminal can lead to erroneous tripping due to
excessive DFAG stator current unbalance, excessive rotor surface heating, and mechanical
damage as a result of power/torque oscillations [78].
The scope of this chapter is to develop a steady-state model and a PFA algorithm for
a generic Type-3 DER unit, operating as a DG unit under balanced/unbalanced network
conditions. Considering various control capabilities of Type-3 unit, the developed model
addresses:
voltage/frequency (PV) control mode (in case of islanded operation [109]) or constant power-factor or active/reactive power (PQ) controls (in the grid-connected
mode),
specic control actions to mitigate the stator voltage unbalance impact [7883],
operational limits of the unit and its associated power-electronic converters, i.e.,
maximum positive- and negative-sequence currents and modulation indices.
The developed model can also be adopted for power-ow analysis and parameter/setpoint adjustment of a wind farm composed of Type-3 WTGUs. The equivalent steadystate model of a Type-3 based wind farm, with respect to the wind farm point of connection, for power-ow analysis of an interconnected power system is provided in [110]
and not discussed in this chapter.
4.5
58
Proposed Sequence-Frame Model of A Type-3

DER Unit
This section extends the VSC model of Chapter 3 to develop a sequence-frame, steadystate model of the Type-3 DER unit. The VSC positive-sequence model is a power/voltage
source, while the negative- or the zero-sequence counterpart comprises a shunt combination of (i) a controlled current source and (ii) a ctitious impedance.
4.5.1
Model Assumptions
Figure 4.2 shows a schematic diagram of a Type-3 DER unit coupled to the host system
at the PC. The proposed Type-3 model is based on the following assumptions:
The GSC controllers regulate the common DC-link voltage under steady-state conditions.
The double-frequency component of the DC-link voltage, due to the system unbalance, is negligible.
Only the fundamental-frequency model of the Type-3 is of interest, i.e., the harmonic eects are discarded.
The DER unit is synchronized to the grid using a phase-locked loop (PLL) system
that also extracts the sequence-components frame of the PC voltage [36].
The RSC and/or GSC are equipped with dedicated controllers to provide specic
control functions with respect to the negative- and/or zero-sequence components
of the PC variables.
the losses associated with RSC and GSC are neglected.
The DER negative- and zero-sequence power exchange with the host grid are negligibly small compared to their positive-sequence counterpart. As such, the Type-3
WTG-based DER positive-, negative-, and zero-sequence-frame models are assumed
to be fully decoupled.
4.5.2
Positive-Sequence Model of Type-3 DER Unit
Under (un)balanced grid conditions, the RSC is primarily controlled to (i) extract the
maximum stator real power (Ps ) at a given wind speed, and (ii) regulate the stator
59
Figure 4.2: Detailed schematic diagram of a Type-3 wind-driven generation system
reactive power (Qs ). This is realized by regulating the rotor real and reactive power
components (Pr , Qr ), Fig. 4.2. At steady-state, (i)the GSC positive-sequence real power
set-point (Pg ) is adjusted to exchange Pr with the grid. Depending on the control strategy,
(ii) the GSC reactive power is adjusted to provide reactive power support to regulate
either the power-factor or the stator terminal voltage [109]. In this work, the Type3 operates in the PQ (PV) mode if a constant reactive power/power-factor (terminal
voltage) is desired. Figure 4.3(a) shows the positive-sequence model of the Type-3 unit.
4.5.2.1
PV mode of operation
When the Type-3 DER unit operates in the PV mode [109], its positive-sequence model
with respect to the PC is an ideal voltage source behind the PC bus. The specied
1
voltage magnitude |V1P C | at the PC and the injected positive-sequence real power PDER
,
in per-unit, are
|V1P C | = Vsp ,
(4.1)
Psspec + Pgspec
,
(4.2)
3
where Vsp , and Psspec (Pgspec ) are the per-unit terminal voltage and three-phase stator
(GSC) real power reference set-points respectively. At steady-state, the relation between
Pgspec , Prspec , and Psspec can be simplied to [111]
1
PDER
=
Pgspec = Prspec s1 Psspec .
(4.3)
60
(a)
(b)
(c)
Figure 4.3: Proposed sequence-frame, fundamental-frequency, steady-state model of

Type-3 DER unit, (a) positive-sequence model, (b) negative-sequence model, (d) equivalent negative-sequence model.
61
In (4.3), s1 is the positive-sequence slip and is given by

s1 =
s r
,
s
(4.4)
where s and r are the synchronous and rotor speeds, respectively.

4.5.2.2
PQ mode of operation
When the Type-3 unit is controlled in the PQ mode, it is represented as a constant power
source. In this case, the unit positive-sequence real power contribution is given by (4.2)
and the exchanged positive-sequence reactive power, Q1 , is
Q1DER =
Qsspec + Qgspec
.
3
(4.5)
In Fig. 4.3(a), I1snet /I1gnet is the net positive-sequence current exchange between the
stator/ GSC and the PC bus.
4.5.3
Negative-Sequence Model of Type-3 DER Unit
As earlier discussed in Section 4.4, the unbalanced operation of a Type-3 unit is detrimental to its performance and lifetime [78]. The RSC and/or the GSC can be controlled
to inject negative-sequence currents to mitigate the eects of unbalanced stator voltage.
As discussed in Chapter 3, the VSC negative-sequence model is a parallel combination
of a current source (ICT RL ) and an impedance (ZCT RL ). Replacing the RSC and GSC
with this model yields the negative-sequence model of Fig. 4.3(b), where Rs (Xs ) and Rr
(Xr ) are the stator and rotor resistances (leakage reactances), Xm is the magnetizing reactance. I2rCT RL , Z2rCT RL , I2gCT RL , and Z2gCT RL are selected to realize the secondary
(negative-sequence) control objective. The negative-sequence slip, s2 , is
s2 =
4.5.4
s + r
= 2 s1 .
s
(4.6)
Equivalent Negative-Sequence Model of Type-3 DER Unit
The negative-sequence model of Fig. 4.3(b) can be further simplied using the Norton circuit reduction technique, i.e., replacing the RSC and the asynchronous machine models,
shown in Fig. 4.3(b) inside the two leftmost dashed blocks, by an equivalent circuit consisting of a current source (I2sCT RLequiv ) in parallel with an impedance (Z2sCT RLequiv ),
62
Fig. 4.3(c). Z2sCT RLequiv and I2sCT RLequiv are given by (4.7) and (4.8), respectively.
Z2sCT RLequiv = Rs + jXs +
I2sCT RLequiv =
jXm
Rr
s2
Rr
s2
+ jXr + Z2rCT RL
+ j(Xr + Xm ) + Z2rCT RL
I2rCT RL Z2rCT RL jXm

Z2rCT RL +
Rr
s2
+ jXr +
jXm (Rs +jXs )

Rs +j(Xs +Xm )
(Rs + j(Xs + Xm ))
(4.7)
(4.8)
It should be noted that the zero-sequence model of the Type-3 unit is not required
since it is typically connected in delta or an un-grounded-Wye, and thus does not permit
the ow of zero-sequence current [62].
The next section describes the secondary control objectives that can be achieved
by the GSC/RSC controllers. Moreover, it provides the appropriate values of I2rCT RL ,
Z2rCT RL , I2gCT RL , Z2gCT RL , I2sCT RLequiv , and Z2sCT RLequiv to realize these objectives.
4.6
Evaluating Type-3 Negative-Sequence Model Parameters
The RSC and/or the GSC can be controlled to provide secondary control objectives under
unbalanced conditions. These may include:
1. Balancing the rotor currents.
2. Balancing the stator currents.
3. Mitigating the stator real power double-frequency component.
4. Mitigating the electromagnetic torque/power double-frequency oscillations to prevent rotor mechanical stresses.
5. Mitigating the double-frequency components of the electromagnetic torque/power
and the unit net real power contribution (Ps + Pg ) double-frequency component.
A combination of these control objectives can be realized by either the RSC [7880],
the GSC [81], or their coordinated operation [82,83]. This section deduces the parameters
of the Type-3 unit negative-sequence model, Figs. 4.3(b) and 4.3(c), to include the impact
of these control strategies on the power-ow analysis which is dominantly determined by
the positive-sequence model of Fig. 4.3(a).
4.6.1
63
Case A: Idle Secondary Control of Type-3 Unit
If both the RSC and the GSC are controlled only based on the positive-sequence dqcurrent control method [91], the DER unit will exchange negative-sequence current with
the unbalanced grid. In this case (i) I2rCT RL , Z2rCT RL , and I2gCT RL are all set to zero,
and (ii) I2sCT RLequiv and Z2sCT RLequiv are determined by (4.7) and (4.8) respectively.
Z2gCT RL is given by
Z2gCT RL = Rg + jXg ,
(4.9)
where Rg and Xg are dened on Fig. 4.2.
4.6.2
Case B: Balancing Rotor Currents
The negative-sequence control capability of the RSC can be used to prevent the negativesequence current ow in the rotor windings [78], [79], and [80]. The impact of this
control scenario on the steady-state power-ow is determined by setting I2rCT RL = 0
and imposing Z2rCT RL = . As a result, I2sCT RLequiv = 0, and by applying LHopital
rule to (4.7),
Z2sCT RLequiv = Rs + j(Xs + Xm ).
(4.10)
In addition, if the GSC is controlled to block its negative-sequence current exchange
with the PC bus, then
2
IgCT
RL = 0,
(4.11)
2
ZgCT
RL = .
(4.12)
Otherwise, Z2gCT RL is given by (4.9).
4.6.3
Case C: Balancing Stator Currents
The Type-3 unit can be controlled to block the negative-sequence stator current. This is
realized by controlling the RSC [78], [79], and [80] or the GSC [81] individually.
4.6.3.1
Case C-1: Balancing Stator Currents Via RSC
Applying the Kirchhos voltage law to the stator circuit of Fig. 4.3(b), while neglecting
the stator resistance voltage drop, yields
2
j(Xs + Xm )Isnet
+ jXm I2rnet = V2P C .
(4.13)
64
Thus, the negative-sequence stator current I2snet can be eliminated by controlling the
RSC to inject a net negative-sequence rotor current I2rnet , where
VP2C
.
jXm
(4.14)
Z2rCT RL = ,
(4.15)
I2rnet =
This is realized by setting
I2rCT RL =
V2P C
jXm
(4.16)
Consequently, Z2sCT RLequiv is given by (4.10) and I2sCT RLequiv is given by

I2sCT RLequiv =
4.6.3.2
V2P C
.
Rs + j(Xs + Xm )
(4.17)
Case C-2: Balancing Stator Currents Via GSC
The GSC is controlled to force a balanced stator current [81]. At steady-state, applying
Kirchhos current law at the stator bus (bus-PC ) yields
I2snet + I2gnet + I2loadP C =
N

i=1
V2i y2P Ci ,
(4.18)
where I2loadP C is the injected negative-sequence current corresponding to the loads at

the stator bus, V2i is the negative-sequence voltage at bus-i, y2P Ci is the the negativesequence admittance matrix entry corresponding to the P C th row and the ith .
Consequently, the stator current can be balanced by setting Z2gCT RL = and
I2gCT RL =
N

i=1
V2i y2P Ci I2loadP C .
(4.19)
For this case, the parameters of the RSC negative-sequence model, Figs. 4.3(b) and
4.3(c), are
Z2sCT RLequiv = ,
(4.20)
I2sCT RLequiv = 0,
(4.21)
Z2rCT RL = I2rCT RL = 0,
(4.22)
65
It should be noted that this scenario is unique since Z2sCT RLequiv and I2sCT RLequiv
are not evaluated using (4.7) and (4.8), but instead selected based on (4.20) and (4.21),
respectively.
4.6.4
Case D: Mitigating Stator Real Power Double-Frequency

Component
The stator real power is
Ps = 3VP C Isnet .
(4.23)
However, since a space phasor, e.g., F, can be decomposed into two oppositely and
synchronously rotating space vectors F1 and F2 [78], i.e.,
F = F1 + F2 ej2s t .
(4.24)
Thus, (4.23) can be expressed

Ps = V1P C (I1snet ) + V2P C (I2snet ) + V1P C (I2snet ) ej2s t

+ V2P C (I1snet ) ej2s t ,
(4.25)
where the double-frequency stator power (Ps2s t ) is the sum of the last two terms in
(4.25). Ps2s t can be eliminated by controlling the RSC to inject a negative-sequence
stator current (I2snet ) that satises (4.26) and (4.27).
V1P C (I2snet ) + V2P C (I1snet )

V1P C (I2snet ) V2P C (I1snet )
= 0,
(4.26)
= 0,
(4.27)
where (.) and (.) are the real and imaginary parts of a complex quantity, respectively.
Solving (4.26) and (4.27) simultaneously yields
I2snet
V2P C (Psspec + jQsspec )

,
=
3|V1P C |2
(4.28)
where |V1P C | is the magnitude of the positive-sequence stator voltage. Equation (4.28) is
used to calculate the following model parameters of Figs. 4.3(b) and 4.3(c) to guarantee
66
ripple-free stator output power

Z2rCT RL = ,
I2rCT RL =
I2snet
(4.29)
(Rs + jXs + jXm ) +
jXm
V2P C
(4.30)
From (4.29) and (4.30), I2sCT RLequiv is

I2sCT RLequiv = I2snet +
V2P C
,
Rs + jXs + jXm
(4.31)
where I2snet is given by (4.28) and Z2sCT RLequiv is given by (4.10).
4.6.5
Case E: Mitigating Double-Frequency Electromagnetic Torque

(Power) Component
Mitigating the double-frequency component in the electromagnetic power of Type-3 unit

is equivalent to eliminating the corresponding component in the stator reactive power
(Qs ) [7880,82,83]. Similar to the analysis of Section 4.6.4, this is realized by controlling
2
) to impose
the RSC to inject a negative-sequence stator current component (Isnet
V1P C (I2snet ) + V2P C (I1snet )

V1P C (I2snet ) V2P C (I1snet )
= 0,
(4.32)
= 0.
(4.33)
From (4.32) and (4.33), I2snet is deduced as

I2snet
V2P C (Psspec + jQsspec )

=
.
3|V1P C |2
(4.34)
Equations (4.29)-(4.31) are then used to evaluate the parameters of the Type-3 DER
negative-sequence model, Figs. 4.3(b) and 4.3(c).
4.6.6
Case F: Coordinated Control of GSC and RSC
GSC and RSC can be simultaneously controlled to (i) mitigate the double-frequency
electromagnetic power/torque component and (ii) dampen the associated real power
oscillations (Ps2s t + Pg2s t ) [82, 83]. The rst objective is realized via the RSC as
discussed in Section 4.6.5. To achieve the second objective, the GSC is controlled to
inject a negative-sequence current component (I2gnet ) that cancels out the summation of
67
Table 4.1: Parameters of the Type-3 Negative-Sequence Model For the Six Cases of
Section 4.6
Case
I2rCT RL
2
ZrCT RL
I2sCT RLequiv
Z2sCT RLequiv
I2gCT RL
Z2gCT RL
A
0
0
0
Eq. (4.7)
0
Eq. (4.9)
B
0
0
Eq. (4.10)
0
or Eq. (4.9)
C-1
Eq. (4.16)
Eq. (4.17)
Eq. (4.10)
0
or Eq. (4.9)
C-2
0
0
0
Eq. (4.19)
D
Eq. (4.28) and Eq. (4.30)
Eq. (4.28) and Eq. (4.31)

Eq. (4.10)
0
or Eq. (4.9)
E
Eq. (4.34) and Eq. (4.30)
Eq. (4.34) and Eq. (4.31)

Eq. (4.10)
0
or Eq. (4.9)
F
Eq. (4.34) and Eq. (4.30)
Eq. (4.34) and Eq. (4.31)

Eq. (4.10)
Eq. (4.36)
Ps2s t and Pg2s t , i.e.,

V1P C I2snet
+
V1P C I2gnet
ej2s t + V2P C I1snet
ej2s t + V2P C I1gnet
ej2s t

ej2s t = 0,
(4.35)
where I2snet is given by (4.34). Equation (4.35) yields

I2gnet
V2P C (2Psspec + Pgspec + j (2Qsspec + Qgspec ))

=
.
3|V1P C |2
(4.36)
The sum of the last two terms of (4.35) is equal to Pg2s t .

For the last three cases, D-F (Sections 4.6.4 - 4.6.6), the Type-3 DER negativesequence model of Fig. 4.3(c) is implemented in the SFPS by evaluating V1P C and V2P C
subsequent to the ctth power-ow iteration, then updating (4.28) (or (4.34)), (4.30),
(4.31), and (4.36) prior to the (ct + 1)st iteration.
Sections 4.5 and 4.6 reveal that the proposed steady-state fundamental frequency
model of the Type-3 DER unit of Figs. 4.3(a)-4.3(c) can represent the impacts of dierent
control actions on the steady-state power-ow solution. The expressions describing the
Type-3 negative-sequence model, for the six cases of Section 4.6, are summarized in Table
4.1.
4.7
Type-3 DER Internal Parameters Calculation
Before considering the operational limits of Type-3 unit in the SFPS, the internal parameters of the RSC and GSC, i.e., modulation indices, converters currents, and reactive
power, should be calculated. Figure 4.4 shows the Type-3 sequence-frame circuit used to
determine these parameters. Using the sequence components of the stator voltage (VP1,2C ),
which are evaluated subsequent to each power-ow iteration, the internal parameters of
the GSC and RSC are calculated as follows.
68
Figure 4.4: Type-3 sequence-frame circuit used to calculate the converters internal parameters
4.7.1
Calculating Positive-Sequence Internal Parameters
The positive-sequence internal parameters are calculated based on controlling the DER
unit in the stator voltage oriented (SVO) synchronously rotating reference frame, in
which the positive-sequence q-axis stator voltage component is zero [78]. In the powerow analysis, this is achieved by decomposing any phasor (voltage or current) into two
components, in-phase with V1P C (with subscript d ) and perpendicular to V1P C (with
subscript q). If any of these parameters exceeds its limit, voltage and/or real/reactive
power set-points should be updated to satisfy the constraints, as will be discussed in
Section 4.8.3.
4.7.1.1
GSC Positive-Sequence Modulation Index
The GSC positive-sequence modulation index (m1g ) can be decomposed into d-axis (m1gd )
and q-axis (m1gq ) components satisfying
m1g =
(m1gd )2 + (m1gq )2 ,
(4.37)
V1g
=
.
Kinv Vdc
(4.38)
where
m1gd
jm1gq
Kinv is the converter constant and is determined based on the adopted modulation strategy, as indicated in Table 3.1 [95]. V1g is given by
V1g = |V1P C | + I1gnet (Rg + jXg ) ,
(4.39)

where
I1gnet =
Pgspec jQgspec
.
3|V1P C |
69
(4.40)
Substituting for V1g and I1gnet from (4.39) and (4.40) in (4.38), and considering that Rg
is negligible compared to Xg , yields
m1gd
m1gq
4.7.1.2
|V1P C |
Xg Qgspec
=
+
Kinv Vdc 3Kinv Vdc |V1P C |
Xg Pgspec
=
.
3Kinv Vdc |V1P C |
(4.41)
(4.42)
GSC Positive-Sequence Current
The d-axis and q-axis components of the GSC positive-sequence current are
Pgspec
,
3|V1P C |
(4.43)
Qgspec
,
3|V1P C |
(4.44)
Ig1d =
Ig1q =
and
|I1gnet | =
4.7.1.3
(Ig1d )2 + (Ig1q )2
(4.45)
RSC Positive-Sequence Modulation Index
The RSC positive-sequence modulation index (m1r ) can be decomposed into d-axis (m1rd )
and q-axis (m1rq ) components, given by
|V1r |
,
Kinv Vdc
(4.46)
(m1rd )2 + (m1rq )2 .
(4.47)
m1rd + jm1rq =
where
m1r =
Based on the circuit of Fig. 4.4, and exploiting Xs , Xr << Xm , (4.46) can be rewritten as
m1rd = c1 + APsspec + BQsspec ,
(4.48)
m1rd = c2 + BPsspec AQsspec ,
(4.49)
70

where
s1 |V1P C |
,
Kinv Vdc
(Rr + s1 Rs )
,
A=
3Kinv Vdc |V1P C |
Rr |V1P C |
,
Kinv Vdc Xm
s1 (Xr + Xs )
B=
,
3Kinv Vdc |V1P C |
c1 =
c2 =
(4.50)
Equations (4.48)-(4.50) provide the RSC modulation index components m1rd and m1rq .
4.7.1.4
Stator Positive-Sequence Current Calculation
The d-axis and q-axis components of the stator positive-sequence current are
Psspec
,
3|V1P C |
(4.51)
Qsspec
,
3|V1P C |
(4.52)
Is1d =
Is1q =
and
|I1snet | =
(Is1d )2 + (Is1q )2
(4.53)
4.7.2
Evaluating Negative-Sequence Internal Parameters
4.7.2.1
GSC Negative-Sequence Modulation Index
The GSC negative-sequence modulation index (m2g ) is related to the GSC negativesequence terminal voltage (V2g ) based on
m2g =
|V2g |
,
Kinv Vdc
(4.54)
where
V2g = V2P C + I2gnet (Rg + jXg ) ,
and
I2gnet = I2gCT RL
4.7.2.2
V2P C
Z2gCT RL
GSC Negative-Sequence Current
The GSC negative-sequence current is given by (4.56).
(4.55)
(4.56)
71

4.7.2.3
RSC Negative-Sequence Modulation Index
Similar to (4.54), m2r is given by

m2r =
|V2r |
,
Kinv Vdc
(4.57)
where Vr2 is given by

Rr
V2r
= V2P C + I2rnet
+ jXr + I2snet (Rs + jXs ) ,
2
s
s2
(4.58)
and I2rnet is given by (4.13).

4.7.2.4
Stator Negative-Sequence Current
The stator negative-sequence current is determined by

I2snet = I2sCT RLequiv
4.8
4.8.1
V2P C
Z2sCT RLequiv
(4.59)
Implementing Type-3 Power-Flow Model

Accommodating the Type-3 DER Model in the SFPS
Consider a Type-3 unit connected to the host distribution system at Bus-k (TYPE3k).
To embed the model of TYPE3k, Fig. 4.3, in the SFPS algorithm:
1. Add the inverse of Z2sCT RLequiv and Z2gCT RL , corresponding to TYPE3k, to the
entry corresponding to the k th row and the k th column (y2BU Skk ), given by (2.21),
respectively.
2. Add the summation of the terms I2sCT RLequiv and I2gCT RL to the k th entry of the
negative-sequence bus-current injection vector (I2BU Sk ), given by (2.24).
1
and Q1DER , given by (4.2) and (4.5), to the k th entry of the
3. Add the terms PDER
1
1
specied active and reactive power vectors (PBU
Sk and QBU Sk ), given by (2.25)
and (2.26), respectively.
4.8.2
Estimating Type-3 Maximum Operating Limits
This section presents a simple and quick rule of thumb to estimate the maximum per-unit
sequence-frame operating limits for the Type-3 unit.

4.8.2.1
72
Estimating the Maximum RSC Modulation Index
Using Fig. 4.4, the rotor-side and stator-side voltages can be related using

V1,2
Rr
1,2
1,2
r
= V1,2
+ jXr ,
P C + Isnet (Rs + jXs ) + Irnet
1,2
s
s1,2
(4.60)
which can be roughly approximated to

|Vr1,2 |
1,2
1,2 s .
|VP C |
But
|V1r |
.
Kinv Vdc
(4.62)
1,2
s1,2
max VP Cmax
.

Kinv Vdc
(4.63)
mr1,2 =
Thus,
1,2
mrmax
(4.61)
For example, if Kinv = 21 2 , Vdc = 2.7 pu, VP1Cmax = 1.1 pu, VP2Cmax = 0.04 pu, and
s1max = 0.3, then m1rmax 0.4 and m2rmax 0.1.
4.8.2.2
Estimating Maximum Stator Currents
Combining (4.51) and (4.52), the following relation can be deduced

1
=
Isnetmax
where
Ssspecmax
,
3VP1Cmin
(4.64)
Ssspecmax =
2
Psspecmax
+ Q2sspecmax .
(4.65)
2
To avoid excessive stator and rotor heating, the negative-sequence stator current Isnet
can be limited to 10% of its positive-sequence counterpart. For example, if Ssspecmax =
1
2
1.1 pu and VP1Cmin = 0.88 pu, then Isnetmax
0.41 pu and Isnetmax
0.04 pu.
4.8.2.3
Estimating Maximum GSC Currents
Similar to (4.64), the following relation can be deduced

1
Ignetmax
=
Sgspecmax
.
3VP1Cmin
(4.66)
73
For the Type-3 units, it is a common practice to rate the GSC higher than the RSC
for reactive power support. Consequently, if the GSC is rated at 40% of the machine
1
rating, and for VP1Cmin = 0.88 pu, then Ignetmax
0.16 pu. Moreover, if the negativesequence GSC current is arbitrarily limited to 40 % of its positive-sequence counterpart,
2
then Ignetmax
0.06 pu.
4.8.3
DER Operational Limits
To deduce a feasible power-ow solution, none of the Type-3 DER unit internal parameters should exceed their corresponding limits. To impose this requirement, the internal
parameters are calculated as described in Section 4.7. In case of a violation, the reference
set-points of the Type-3 controllers are re-evaluated. This section presents a systematic
approach to update the Type-3 controllers set-points to full all the operational limits
within the context of the SFPS. These limits are:
GSC positive-sequence modulation index (m1gmax ).
GSC negative-sequence modulation index (m2gmax ).
1
GSC positive-sequence current (Igmax
).
2
GSC negative-sequence current (Igmax
).
RSC positive-sequence modulation index (m1rmax ).

RSC negative-sequence modulation index (m2rmax ).
1
Stator positive-sequence current (Ismax
).
2
Stator negative-sequence current (Ismax
).
4.8.3.1
Fullling GSC Positive-Sequence Modulation Index Limit
Subsequent to the ctth power-ow iteration, if m1g > m1gmax , then re-calculate m1gd
ct+1
and m1gq using
1
ct+1
ct m
m1gd,q = m1gd,q gmax
.
(4.67)
m1gct
ct
ct+1
Based on m1gd,q , solve (4.41) and (4.42) to determine the new set points used in (ct + 1)st
ct+1
ct+1
power-ow iteration, i.e., ( Vspct+1 |a and Pgspec
|a for PV mode, or Pgspec
|a and Qct+1
gspec |a
1
for PQ mode). Sux a identies the reference set-point that satises the mg limit.
ct+1

4.8.3.2
74
Fullling GSC Positive-Sequence Current Limit
1
If |I1gnet | > Ignetmax
, re-calculate Ig1d
ct
ct+1
and Ig1q
ct+1
Ig1d,q = Ig1d,q
ct+1
ct
using
1
Ignetmax
|I1gnet |
ct
(4.68)
ct+1
ct+1
Use Ig1d,q in (4.43) and (4.44) to calculate Vspct+1 |b and Pgspec
|b for PV mode (or Pgspec
|b
ct+1
and Qgspec |b for PQ mode). Sux b identies the reference set-point that satises the
1
Ignet
limit.
ct+1
4.8.3.3
Fullling RSC Positive-Sequence Modulation Index Limit
If m1r > m1rmax , re-calculate m1rd

ct
ct+1
and m1rq
ct+1
m1rd,q = m1rd,q
ct+1
ct
using
m1rmax
.
m1r ct
(4.69)
ct+1
ct+1
|c and Qct+1
Use m1gd,q in (4.48) and (4.49) to evaluate Psspec
sspec |c . Pgspec |c is then
evaluated using (4.3). Sux c refers to the reference set-point that satises the m1r limit.
ct+1
4.8.3.4
Fullling Stator Positive-Sequence Current Limit
1
, re-calculate Is1d
If |I1snet | > Isnetmax
ct
ct+1
ct+1
Is1d,q
and Is1q
ct+1
using
1
1ct Isnetmax
.
Isd,q
ct
|I1snet |
(4.70)
ct+1
Is1d
and Is1q
are used in (4.51) and (4.52), respectively, to evaluate Psspec
|d and
ct+1
ct+1
Qsspec |d . Pgspec |d is then evaluated using (4.3). Sux d identies the reference setpoint that satises the positive-sequence stator current limit.
ct+1
4.8.3.5
ct+1
Updating Positive-Sequence Reference Set-Points
The positive-sequence reference set-points, selected prior to the (ct + 1)st power-ow
iteration, must satisfy all the aforementioned positive-sequence limits. As such, GSC
ct+1
real power set-point (Pgspec
|) is selected as:
ct+1
ct+1
ct+1
ct+1
ct+1
= min(Pgspec
|a , Pgspec
|b , Pgspec
|c , Pgspec
|d ).
Pgspec
(4.71)
75

ct+1
Consequently, Psspec
is calculated using
ct+1
=
Psspec
ct+1
Pgspec
.
s1
(4.72)
For PQ units, Qh+1

gspec is given by
ct+1
ct+1
Qct+1
gspec = min(Qgspec |a , Qgspec |b ).
(4.73)
Similarly, the terminal voltage of PV controlled units is selected as

Vspct+1 = min(Vspct+1 |a , Vspct+1 |b ).
(4.74)
For both control strategies (PV or PQ modes), the stator reactive power is given by
ct+1
ct+1
Qct+1
sspec = min(Qsspec |c , Qsspec |d ).
4.8.3.6
(4.75)
Fullling Negative-Sequence Operating Limits
The Type-3 negative-sequence operating limits are fullled by adjusting the RSC and/or
GSC negative-sequence current injections (I2gCT RL , I2sCT RLequiv ) as follows.
Subsequent to the ctth power-ow iteration, if m2g > m2gmax , set m2g = m2gmax and
ct
update I2gCT RL |e using (4.54)-(4.56). Sux e is used to dene the GSC current injection
that satises the m2g limit.
ct
ct
2
2
Similarly, if |I2gnet | > Ignetmax
, set |I2gnet | = Igmax
and use it to update I2gCT RL |f
using (4.56). Sux f refers to the GSC current injection that satises the |I2gnet | limit.
ct
ct
ct+1
The GSC negative-sequence current injection used in the (ct+1)st iteration is selected
as
I2gCT RL = min(I2gCT RL |e , I2gCT RL |f ).
ct+1
ct+1
ct+1
(4.76)
Using (4.57)-(4.59), the same procedure is followed to specify I2sCT RL .

ct+1
4.8.4
Sequential SPFS
Subsequent to evaluating the internal parameters of TYPE3k, the corresponding operating limits are checked, and updated if necessary, to ensure no violations occur. The
steps to determine the internal parameters, evaluate the operating limits, and update the
DER reference set-points are performed sequentially at the end of each power-ow iteration. A ow chart of the Sequential-SFPS, accommodating the Type-3 DER operating
76
Figure 4.5: Flow chart of the proposed Sequential-SFPS algorithm including the Type-3
DER constraints evaluation and the proposed reference-set point updating strategies
77
limits, is shown in Fig. 4.5.
4.9
This chapter introduces a comprehensive, sequence-frame based, three-phase, fundamentalfrequency, steady-state model of the Type-3 DER unit. The developed model can be
adopted for (i) power-ow analysis, (ii) determination of the operating limits, and (iii)
reference set-points adjustment of the Type-3 DER under balanced and unbalanced grid
conditions. The developed model is intended for steady-state/power-ow analysis of a
Type-3 unit that is utilized as a DER unit and interfaced to a distribution system. However, it can also be used for steady-state and power-ow analysis within a wind farm that
is composed of Type-3 units.
This chapter also incorporates the developed Type-3 sequence-frame model in the
SFPS. Subsequent to each power-ow iteration, the internal parameters of the Type3 unit are calculated. If any of the parameters violate the corresponding limits, the
positive- and/or negative-sequence reference set-points of the corresponding Type-3 unit
are updated prior to proceeding to the next power-ow iteration. Thus, the developed
algorithm sequentially iterates between the power-ow of the AC network and the Type3 unit to obtain a feasible power-ow solution. The applications and verication of the
developed Type-3 model and the power-ow algorithm are presented in Chapter 5.
Chapter 5
Power-Flow Model of Type-3 Wind
Generation Unit: Model Validation
and Applications1
5.1
Introduction
This chapter presents the implementation and validation of the steady-state, fundamentalfrequency, sequence-frame model of the Type-3 DER unit, accommodated within the
Sequential-SFPS algorithm, developed in Chapter 4. A set of case studies are reported to
(i) validate the numerical accuracy of the developed model and the power-ow algorithm,
(ii) quantify the impact of the Type-3 control strategy on the steady-state three-phase
power-ow solution, and (iii) demonstrate the computational eciency of the SequentialSFPS with the imbedded Type-3 model. Three test systems of dierent topologies, sizes,
and parameters are examined. Where applicable the results are validated based on comparison with the exact time-domain solution, using the PSCAD/EMTDC simulation
platform.
5.2
Type-3 DER Model Validation
To evaluate the numerical accuracy of the proposed Type-3 DER model, accommodated
within the Sequential-SPFS algorithm of Chapter 4, the six-bus study system of Fig. A.1,
1
The work presented in this chapter has been submitted for publication, and is in revision, in M.Z.
Kamh and R. Iravani, Three-Phase Model and Power-Flow Analysis of Wind-Driven Doubly-Fed Asynchronous Generators Part II: Validation and Applications, IEEE Trans. Sustainable Energy, in Revision, Nov. 2010, Manuscript ID TSTE-00187-2010.R1
78
Chapter 5. Applications and Validation of Type-3 WTG DER Model 79
Figure 5.1: Single line diagram of the six-bus test system
Table 5.1: Parameters of G2 of Fig. 5.1 (Sbase = 1000 kVA)

G2
Vbase =2.3 kV, Vdc =2.7, Kinv = 21 2 , s1 =-0.1
Rg =1.89 103 , Xg = 0.032, Xr =Xs =0.0717,
Xm =4.13, Rr =0.007,Rs =0.0092
m1gmax =0.94, m2gmax =0.06
m1rmax =0.4, m2rmax = 0.1
1
2
Ismax
= 0.38, Ismax
= 0.04
1
2
Igmax = 0.11, Igmax = 0.06
duplicated as Fig. 5.1 for the ease of reference, is selected and ve case studies (Case-1
to Case-5 ) are conducted. In all cases, the DER unit is controlled to deliver 0.5 MW
at unity power-factor from its stator.
As earlier discussed in Chapter 1, the DER model validation is based on implementing
the Sequential-SFPS algorithm of Fig. 4.5, and its embedded Type-3 model, in the
MATLAB platform. The detailed time-domain model of the study system of Fig. 5.1
is also developed in the PSCAD/EMTDC software platform to serve as the benchmark
for validation of the Type-3 model and the SPFS results.
In the system of Fig. 5.1, G1 regulates the voltage of the system slack bus at 1.043
pu. G2 is a Type-3 WTG-based DER unit. The system parameters and loads are given
in Appendix A.1. The parameters of G2 are given in Table 5.1.

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
Phase B
Magnitude (pu) Angle(degrees) Magnitude (pu)
Angle(degrees)
A
B
A
B
A
B
A
B
1.043
1.043
-0.582 -0.591 1.042
1.043
-120.616 -120.609
0.974
0.975
23.843 23.889 0.981
0.972
-96.386
-96.285
0.880
0.879
18.513 18.501 0.908
0.899
-102.063 -102.063
0.851
0.852
16.604 16.599 0.859
0.875
-103.402 -103.902
0.886
0.886
18.931 18.939 0.876
0.895
-101.809 -101.409
0.893
0.893
49.120 49.150 0.895
0.894
-71.024
-71.019
|I1gnet |=0.019
|I1snet |=0.187
|I2gnet |=0.062
m1g = 0.936
m1r = 0.184
m2g = 0
a
b
S = 0.125 0.008i
S = 0.219 0.047i
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.043
1.043
119.351 119.391
0.976
0.971
143.971 143.972
0.894
0.891
138.129 138.136
0.856
0.867
136.152 136.222
0.885
0.894
138.194 138.650
0.873
0.891
169.125 168.997
|I2snet | = 0.012
m2r = 0
c
S = 0.206 + 0.054i
5.2.1
Case-1: Inactive Negative-Sequence Controllers
In Case-1 , the negative-sequence current controllers of G2 are disabled. The detailed

power-ow solution of Case-1 and the calculated internal parameters of G2 are given
in Table 5.2. Table 5.2 indicates that:
The RSC positive-sequence modulation index from both solutions is 0.184. This
veries the accuracy of (4.48) and (4.49) of Section 4.7.1.3.
The negative-sequence modulation indices of the RSC and GSC (m2r and m2g ) from
both solutions are equal to zero. This indicates that both converters only generate
balanced three-phase terminal voltages.
The three-phase real power injected by the DER unit is 0.55 pu. This is the summation of the real power delivered through the stator and the GSC simultaneously.
Since neither the RSC nor the GSC provides control with respect to the negativesequence components, both converters are subjected to negative-sequence currents
(I2gnet and I2snet ) of 0.062 pu and 0.012 pu, respectively. The magnitudes of these
currents are the same for both solutions, and depend only on the magnitude of
the negative-sequence component of the voltage at Bus-6 and the impedance of the
asynchronous machine and the GSC interface lter. The close agreement between
the current magnitudes, obtained by both solvers, veries the accuracy of the (4.56)
and (4.59).
5.2.2
Case-2: Balancing Rotor Current Via RSC
For this case study, the RSC is equipped with auxiliary controllers to balance the rotor
currents [79, 80], and the GSC negative-sequence controllers remain disabled. Table 5.3

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
Phase B
Angle(degrees)
A
B
A
B
A
B
A
B
1.042
1.042
-0.591 -0.591 1.043
1.043
-120.616 -120.607
0.974
0.975
23.968 23.975 0.969
0.974
-96.249
-96.275
0.881
0.879
18.395 18.589 0.911
0.902
-102.059 -102.040
0.849
0.851
16.849 16.853 0.891
0.880
-103.743 -103.853
0.885
0.884
19.148 19.243 0.909
0.902
-101.168 -101.328
0.897
0.897
49.805 49.613 0.915
0.901
-71.313
-71.363
|I1gnet |=0.019
|I1snet |=0.186
|I2gnet |=0.281
m1g = 0.937
m1r = 0.186
m2g = 0
a
b
S = 0.061 0.067i
S = 0.364 0.182i
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.043
1.043
119.379 119.384
0.970
0.971
143.895 143.889
0.892
0.891
137.989 137.996
0.863
0.867
135.992 135.997
0.892
0.894
138.335 138.334
0.888
0.885
168.887 168.892
|I2snet | = 0.002
m2r = 0.039
c
S = 0.246 + 0.242i
gives the power-ow solution of Case-2 and the internal parameters of G2. Based on
Table 5.3:
Both solutions show that the RSC negative-sequence modulation index is 0.039.
This veries the validity and accuracy of the formulae of Sections 4.6.2 and 4.7.2.3.
This value corresponds to the RSC terminal voltage component that is required to
balance the rotor currents.
It is evident that the RSC control strategy aects the system power-ow solution.
This is shown by comparing the magnitude of the negative-sequence voltage at
Bus-6 for Case-1 (0.002 pu) and Case-2 (0.009 pu). This dierence could not
be determined unless the proposed model of Fig. 4.3 of is deployed.
The elevated negative-sequence voltage at Bus-6 increases the magnitude of I2gnet
beyond its corresponding limit. However, this cannot be prevented by the GSC
since its negative-sequence controllers are deactivated. The very good agreement
between the values of I2gnet , evaluated by both solvers and depicted in Table 5.3,
validates (4.56) of Section 4.7.2.1. It should be noted that the ow of excessive
negative-sequence current, in addition to the positive-sequence current, can subject
the GSC switches to over-current and can lead to tripping the DER unit.
Although the DER unit is controlled to operate at unity power factor, i.e., Qg +Qs =
0, a three-phase reactive power of 0.007 pu is consumed by the unit. This reactive
power is due to the ow of negative-sequence currents into the stator windings and
the GSC interface lter. In addition, the total three-phase real power delivered
by the unit is 0.549 pu, as compared to 0.55 pu in Case-1 . The 0.001 pu real

power dierence compensates for the GSC interface-lter losses 3|I2gnet |2 Rg due
to the excessive GSC negative-sequence current unbalance. Although the power

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
Phase B
Angle(degrees)
A
B
A
B
A
B
A
B
1.043
1.043
-0.546 -0.592 1.043
1.043
-121.012 -120.610
0.975
0.974
23.981 23.962 0.973
0.973
-96.371
-96.295
0.876
0.877
18.572 18.572 0.900
0.901
-102.090 -102.090
0.848
0.848
16.854 16.838 0.877
0.877
-104.019 -103.920
0.882
0.881
19.306 19.244 0.906
0.899
-101.727 -101.400
0.891
0.893
49.469 49.558 0.894
0.896
-71.286
-71.414
|I1gnet |=0.019
|I1snet |=0.187
|I2gnet |=0.014
m1g = 0.934
m1r = 0.184
m2g = 0.02
a
b
S = 0.192 + 0.011i
S = 0.172 + 0.001i
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.043
1.042
119.778 119.380
0.965
0.966
143.998 143.884
0.887
0.888
137.980 137.980
0.863
0.864
136.110 135.981
0.891
0.890
138.772 138.326
0.880
0.881
168.607 168.910
|I2snet | = 0.000
m2r = 0.000
c
S = 0.185 0.012i
dierences are small, they can only be calculated and quantied using the developed
Type-3 model and the SFPS algorithm.
5.2.3
Case-3: Balancing Stator Current Via GSC
In Case-3 , the reference set-point of the GSC negative-sequence controller is adjusted

to balance the stator currents [81]. The power-ow results obtained using the developed SFPS and the time-domain solution are shown in Table 5.4. Table 5.4 shows the
magnitude of I2gnet , required to balance the stator currents, is 0.014 pu. This result
is obtained by incorporating (4.19) of Section 4.6.3.2 in the SFPS. The same value is
obtained from the PSCAD/EMTDC platform, and veries the numerical accuracy of the
proposed algorithm.
5.2.4
Case-4: Mitigating Double-Frequency Stator Power Oscillations
In this case, the RSC is equipped with auxiliary controllers to mitigate the doublefrequency stator power oscillations (Ps2s t ). Table 5.5 presents the detailed power-ow
solution and the internal parameters of G2 for Case-4 . Table 5.5 shows:
The magnitude of I2snet , associated with eliminating Ps2s t , is 0.002 pu for both
solutions. The corresponding RSC negative-sequence modulation index is 0.039.
This value is required to inject an adequate negative-sequence rotor current to
counteract Ps2s t . This veries the correctness of the formulae in Section 4.6.4.
The magnitude of I2gnet increases to 0.311 pu, compared to 0.281 pu in Case-2 ,
following an increase in the negative-sequence voltage at Bus-6 to 0.01 pu.

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
Phase B
Angle(degrees)
A
B
A
B
A
B
A
B
1.042
1.042
-0.557 -0.592 1.043
1.043
-120.608 -120.608
0.974
0.975
23.952 23.964 0.975
0.974
-96.186
-96.284
0.880
0.879
18.575 18.567 0.903
0.902
-102.180 -102.064
0.850
0.851
16.823 16.823 0.878
0.879
-103.764 -103.886
0.884
0.883
19.226 19.203 0.899
0.901
-101.488 -101.373
0.895
0.896
49.729 49.556 0.901
0.901
-71.324
-71.404
|I1gnet |=0.019
|I1snet |=0.187
|I2gnet |=0.311
m1g = 0.936
m1r = 0.184
m2g = 0.000
a
b
S = 0.086 0.074i
S = 0.383 0.201i
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.042
1.043
119.294 119.384
0.969
0.970
143.615 143.885
0.892
0.891
138.341 137.987
0.863
0.867
135.768 135.982
0.892
0.894
137.945 138.312
0.882
0.881
168.698 168.855
|I2snet | = 0.002
m2r = 0.039
c
S = 0.251 + 0.266i
This increase is anticipated due to the larger contribution of the DER unit in
the negative-sequence bus-current injection vector I2BU S (I2sCT RLequiv given by
(4.31) of Section 4.6.4) without changing the corresponding contribution in the
negative-sequence bus admittance matrix Y2BU S (sum of inverse of Z2gCT RL and
Z2sCT RLequiv given by (4.9) and (4.10) of Sections 4.6.1 and 4.6.2, respectively).
The increase in the magnitude of V2Bus6 is an indication that the Type-3 negativesequence control strategy impacts the system power-ow solution.
5.2.5
Case-5: Mitigating Double-Frequency Torque Oscillations

and Balancing GSC Currents
To avoid excessive GSC negative-sequence current ow, the RSC and GSC are controlled
to simultaneously mitigate the double-frequency electromagnetic torque oscillations and
balance the GSC current exchange. The detailed power-ow solution and the internal
parameters of G2 are given in Table 5.6. Table 5.6 concludes that in order to cancel the
GSC negative-sequence current, its modulation index should include 0.0189 negativesequence component. This value is equal for both solutions, which veries the accuracy
of the formulae of (4.11) and (4.12) in Section 4.6.2. In contrast to Case-3 , this control
strategy is highly eective to mitigate the GSC overload current caused by the negativesequence components.
As concluded from Tables 5.2-5.6, the maximum voltage magnitude dierence for the
six busses, in all ve case studies, is less than 0.9%. This is an acceptable dierence
and arises due to the dierent nature of the two solvers. The PSCAD/EMTDC solves
the system dierential equations while the SFPS solves the system algebraic steady-state
power-ow equations. The close agreement between the corresponding results of the two
solvers indicates that the proposed Type-3 DER model and the SFPS are accurate.

Bus
1
2
3
4
5
6
Calculated
Internal
Parameters of G2
Phase A
Phase B
Angle(degrees)
A
B
A
B
A
B
A
B
1.043
1.043
-0.582 -0.591 1.042
1.043
-120.515 -120.606
0.975
0.974
23.995 23.984 0.974
0.974
-96.074
-96.255
0.879
0.878
18.604 18.613 0.899
0.901
-102.264 -102.002
0.848
0.845
16.794 16.894 0.879
0.878
-103.620 -103.783
0.879
0.882
19.451 19.312 0.898
0.900
-100.951 -101.220
0.891
0.894
49.641 49.726 0.901
0.899
-71.160
-71.226
|I1gnet |=0.019
|I1snet |=0.187
|I2gnet |=0.000
m1g = 0.934
m1r = 0.184
m2g = 0.019
a
b
S = 0.184 + 0.000i
S = 0.186 + 0.000i
Phase C
Magnitude (pu)
Angle(degrees)
A
B
A
B
1.043
1.043
120.372 119.972
0.971
0.970
144.015 143.901
0.890
0.890
138.020 138.020
0.865
0.866
136.170 136.041
0.892
0.892
138.852 138.406
0.885
0.883
168.664 168.967
|I2snet | = 0.002
m2r = 0.04
c
S = 0.180 + 0.000i
Table 5.7: Load prole used in Section 5.3 (Vbase =13.8 kV, Sbase = 1 MVA)
Phase A Phase B Phase C
7.2958
0.000
7.2958
S1
+2.8403i +0.000i +2.8403i
2.2277
2.3391
2.1375
S2
+1.1139i 1.0025i
1.2375i
2.2277
0.000
0.000
S3 +1.1139i
0.000i
0.000i
0.0000
2.2275
2.2275
S4
+0.0000i 1.1138i
1.1138i
5.3
Case 6: Validating the Sequential-SFPS Feasibility
Tables 5.2-5.6 show that the internal parameters of G2 are within the acceptable operating
range. Consequently, the sequential part of the Sequential-SFPS algorithm of Fig. 4.5,
which updates the reference set-points of the Type-3 DER unit in case of a violation, is
eectively idle. To validate the entire algorithm, Case-6 is conducted.
In Case-6 , the positive-sequence controllers of G2 are designed to extract 1.0 pu real
power at unity power-factor from the DFAG stator, provided that the positive-sequence
slip is -28%. If the Type-3 unit is subjected to the stator voltage unbalance, (i) the
RSC negative-sequence controllers should mitigate the double-frequency electromagnetic
torque oscillations and (ii) the GSC controllers are to balance the GSC current. The load
prole of the six-bus system, used to conduct Case-6 , is given in Table 5.7. Although
the operating condition of this case is exaggerated, it explicitly veries (i) the validity of
the proposed Type-3 model and (ii) the robustness of the Sequential-SFPS when applied
to heavily loaded and highly unbalanced networks.
Table 5.8: Power-Flow Results of Case-6: Operational Limits of G2 are Discarded

Phase A
Phase B
Phase C
Bus
Mag. Angle Mag.
Angle
Mag. Angle
(pu) (deg.) (pu)
(deg.)
(pu)
(deg.)
1
1.036 -0.162 1.044 -119.564 1.049 119.726
2
0.922 20.869 0.973 -95.649 0.888 138.133
3
0.877 16.356 0.881 -104.081 0.829 132.023
4
0.891 16.148 0.850 -107.572 0.832 131.075
5
0.928 18.284 0.836 -106.348 0.823 130.718
6
0.909 44.434 0.829 -77.857 0.842 168.041
Calculated
|I1gnet |=0.109
|I1snet |=0.389
2
Internal
|Ignet |=0.000
|I2snet | = 0.037
Parameters
m1g = 0.900
m1r = 0.255
of G2
m2g = 0.052
m2r =0.123
Table 5.8 and Table 5.9 present the power-ow results and the calculated internal
parameters of G2 with and without relaxing the DER unit operating constraints. As
shown in Table 5.8, the positive-sequence stator current (I1snet ) and the RSC negativesequence modulation index (m2r ) exceed their corresponding limits given in Table 5.1.
These parameters are shown in boldface in Table 5.8. Consequently the power-ow
solution of Table 5.8 is practically not feasible.
On the other hand, Table 5.9 shows that all the operating constraints of G2 are met
when the DER unit operating constraints are imposed. The Sequential-SFPS adjusts the
stator real power set-point (Psspec ) of G2 to 0.977 pu, instead of 1.0 pu, corresponding
to positive-sequence stator current of 0.38 pu and RSC phase modulation index of 0.255.
Consequently, the GSC real-power set-point (Pgspec ) is adjusted to 0.273 pu, instead of
0.28 pu. Moreover, m2r is set to its limit. The magnitude of I2snet increases to 0.051 pu,
which guarantees that the double-frequency torque oscillations are partially counteracted.
5.4
Application of the Sequential-SFPS to Benchmark Distribution Systems
This section reports the application of the Sequential-SFPS and its embedded Type-3
model to two relatively large benchmark systems, i.e., the CIGRE distribution benchmark network [98] and the IEEE 34-bus feeder [99], to (i) verify the feasibility and (ii)
demonstrate the computational eciency of the Sequential-SFPS for large power systems with dierent topologies and X/R ratios. The single-line diagrams and parameters
Table 5.9: Power-Flow Results of Case-6: Operational Limits of G2 are Imposed

Phase A
Phase B
Phase C
Bus
Mag. Angle Mag.
Angle
Mag. Angle
(pu) (deg.) (pu)
(deg.)
(pu)
(deg.)
1
1.036 -0.173 1.044 -119.561 1.049 119.733
2
0.921 20.816 0.973 -95.615 0.889 138.138
3
0.875 16.257 0.881 -104.043 0.831 132.071
4
0.889 16.045 0.850 -107.511 0.834 131.127
5
0.926 18.180 0.836 -106.260 0.825 130.773
6
0.906 44.456 0.831 -77.702 0.842 167.870
Calculated
|I1gnet |=0.106
|I1snet |=0.380
2
Internal
|Ignet |=0.000
|I2snet | = 0.051
Parameters
m1g = 0.900
m1r = 0.255
of G2
m2g = 0.050
m2r =0.100
of both test systems are detailed in Appendix A.2 and Appendix A.4, respectively.
5.4.1
Case 7: CIGRE MV Distribution Network
The 12.47 kV, three-phase, four-wire CIGRE distribution network of Fig. A.2 is equipped
with two Type-3 DER units:
1. DER1 represents a voltage-controlled Type-3 DER unit (PV bus) connected to
Bus-8 via a three-phase transformer (150 kVA, 12.47/2.3 kV, Yg /), and is controlled to maintain the positive-sequence component of its terminal voltages at 1
pu while delivering 100 kW into the network. In addition to the positive-sequence
controllers, DER1 is controlled to balance the stator current via auxiliary GSC
negative-sequence current controllers. The GSC of DER1 is controlled to block the
negative-sequence GSC current exchange with the grid.
2. DER2 is a PQ unit that delivers 100 kW at unity power-factor, and is connected
to Bus-3 via a three-phase transformer (100 kVA, 12.47/2.3 kV, Yg /). Moreover,
DER2 is equipped with additional controllers to mitigate the double-frequency
torque oscillations.
The three-phase voltage prole of the CIGRE distribution network, obtained using
the Sequential-SFPS algorithm, is depicted in Fig. 5.2. The operating constraints of
all the DER units are satised. This veries the feasibility of the Sequential-SFPS for
non-radial ADN applications. The power-ow program converges in 0.264 seconds (3
iterations) using an Intel Core2Duo , 3.16 GHz processor, personal computer.
Figure 5.2: Voltage prole of the CIGRE distribution network with 2 Type-3 based DER
units
5.4.2
Case 8: IEEE 34-Bus Test System
In this case study, the 24.9 kV, three-phase, four-wire IEEE 34-bus feeder of Fig. A.4 is
equipped with three Type-3 DER units:
1. DER3 and DER4 are PV controlled units controlled to maintain the positivesequence voltage of the respective buses (Bus-814 and Bus-858 respectively) at
1 pu while injecting 100 kW power into the network. Each of these two units is
connected to the grid via a three-phase transformer (100 kVA, 24.9/2.3 kV, Yg /).
Moreover, DER3 is equipped with auxiliary controllers to balance its rotor and
GSC currents simultaneously.
2. DER5 is connected to Bus-836 via a three-phase transformer (100 kVA, 24.9/2.3
kV, Yg /), and is controlled to inject 100 kVA at unity power-factor.
Fig. 5.3 shows the three-phase voltage prole of the IEEE 34-bus distribution feeder.
The operating constraints of all the DER units are satised. This veries the feasibility
of the Sequential-SFPS for radial ADN applications. The power-ow program converged
in 0.824 seconds (4 iterations) using an Intel Core2Duo , 3.16 GHz processor, personal
computer.
It should be noted that the computational time of Case-7 and Case-8 is larger than
that reported in Section 3.7. The reason is that the number of Type-3 DER constraints
evaluated subsequent to each power-ow iteration are much more than those of a VSCcoupled DER unit. However, the convergence speed of the Sequential-SFPS, equipped
Figure 5.3: Voltage prole of the IEEE 34-bus distribution feeder with 3 Type-3 based
DER units
with the Type-3 model, is still acceptable for both test systems and could be even further
improved using the parallel programming techniques [73], which is beyond the scope of
this work.
5.5
Convergence Analysis
To further demonstrate the acceptable convergence behavior of the proposed algorithm,

regardless of the system parameters and topology, its convergence pattern is studied
for the three test systems. The value of the algorithm termination criterion (maximum
power mismatch) is changed and the corresponding number of iterations required by the
algorithm to converge is recorded. The algorithm convergence pattern is depicted in Fig.
5.4.
Figure 5.4 concludes that, regardless the system parameters and topology, the number
of iterations saturates when the termination criterion is reduced to 0.001 pu. This indicates that the power mismatch is eectively reduced to a level less than the termination
criterion value in less than or equal to four iterations. This veries that the computational eciency of the proposed algorithm is independent of the network topology (mesh,
radial, or radial with loops) and parameters (X/R ratio).
5.6
This chapter presents the applications and validation of (i) the steady-state sequenceframe-based model of a Type-3 DER unit of Chapter 4, (ii) the computational eciency
Figure 5.4: Convergence pattern of the Sequential-SFPS algorithm accommodating the

Type-3 DER
of the Sequential-SFPS accommodating the proposed model, and (iii) the feasibility of the
power-ow solver for large distribution networks. The developed DER model takes into
account all the control features and the operating limits of its power-electronic converters
under balanced and unbalanced power-ow conditions.
The proposed DER model is integrated with the Sequential-SFPS , implemented in
MATLAB , and applied to three test systems of dierent sizes (six, eleven, and thirtyfour bus systems), topologies (mesh, and radial), and parameters (low, medium, and high
X/R ratios). Several case studies are conducted and where applicable, the results are
compared and validated against those obtained via time-domain simulations using the
PSCAD/EMTDC software. The results demonstrate:
the numerical accuracy of the proposed Type-3 DER model,
the impact of the Type-3 unit negative-sequence control strategy on the distribution
system power-ow results,
the accuracy and computational eciency of the Sequential-SFPS power-ow algorithm irrespective of the network topology and parameters,
feasibility of the power-ow solver for large distribution networks.
Chapter 6
Power-Flow Model of Single-Phase
VSC-Coupled DER Units1
6.1
Introduction
This chapter presents the steady-state, fundamental-frequency model of a DER unit

which utilizes a single-phase VSC as the interface medium. The model represents (i)
dierent operating and control modes and (ii) the operational constraints and limits of
the VSC and the host system, e.g., maximum current, maximum modulation index, and
maximum voltage at the point of connection (PC). The model is tailored for the PFA of
(i) three-phase distribution networks using the SFPS of Chapter 2 and (ii) single-phase
radial laterals, widely spread in the North-American distribution systems, using the wellestablished Backward-Forward Sweep Algorithm (BFSA). The interface-VSC operating
limits are modeled and imposed on the power-ow solution using the sequential approach,
presented in Chapters 3 and 4, to increase the computational eciency of the PFA tool.
Case studies are conducted to evaluate and verify (i) the accuracy of the proposed model
and (ii) the computational eciency of the sequential method to handle the constraints
of the single-phase VSC.
1
The work presented in this chapter has been submitted for publication, and is in revision, in M.Z.
Kamh and R. Iravani, Steady State Model and Power-Flow Analysis of Single-Phase ElectronicallyCoupled Distributed Energy Resources, IEEE Trans. Power Delivery, in Revision, Jan. 2011,
Manuscript ID TPWRD-00003-2011.R1
90
Chapter 6. Power-Flow Model of 1 VSC-Coupled DER Units
6.2
91
Background
The increasing demand for the clean and renewable energy resources and the governmental policies, e.g., the feed-in tari (FIT) and microFIT programs [112, 113] are the
main driving forces to the wide-spread penetration of the small-size DER units into the
medium- and low-voltage distribution grids. The expected presence of the plugged electric vehicle (PEV) [114] will also impact the distribution grids due to the additional
load of charging the vehicles batteries. Moreover, PEVs with the vehicle-to-grid (V2G)
power-transfer capability can inject power into the distribution network, thus also act as
small scale distributed storage (DS) units [115119].
The single-phase AC-DC voltage-sourced converter (VSC) is the most widely-adopted
interface medium for small scale DER units [120123]. The single-phase VSC is ecient,
compact, expandable, bidirectional, and can be connected to single- and three-phase distribution networks [124, 125]. However, the steady-state power-ow model of the singlephase VSC-based DER units, including the operating constraints of the VSC and the host
grid, has not been previously reported. As such, this chapter develops and implements
a steady-state, fundamental frequency model of the single-phase VSC-coupled DER unit
for the three-phase PFA. The developed VSC-coupled DER model presents:
the VSC operational and control modes, e.g., bidirectional power exchange, constant power-factor, reactive power support [124],
the VSC operational limits and constraints, e.g., maximum current, maximum modulation index, and maximum voltage at the PC bus.
6.3
Topologies and Control Objectives of Single-Phase

Interface VSC
The power-electronic converters used to interface small scale DER units to the host
network, according to their congurations, are classied into (i) single-stage and (ii)
dual-stage [121]. In the single-stage conguration, a single-phase full-bridge VSC is
directly connected to the primary source of the DER unit, and is equipped with (i) a
maximum power point tracking (MPPT) controller and (ii) a grid-current controller to
inject sinusoidal currents into the grid [124].
The dual-stage converter conguration is widely deployed as the interface for the
small scale DER applications where bidirectional power exchange is desired, e.g., (i)
integrating residential PV systems, energy storage, and plugged hybrid electric vehicles
92
Figure 6.1: Schematic diagram of dual-stage single-phase VSC-coupled DER unit

(PHEV) [120122] and (ii) PEV with the V2G power transfer capability [115118]. In this
conguration, a DC-DC converter is located between the single-phase front-end VSC and
the primary source of the DER unit to perform the MPPT function. The front-end VSC
(i) regulates the real power transfer with the grid, and (ii) can provide additional ancillary
services such as reactive power compensation and power factor correction [121, 124].
Figure 6.1 shows a schematic diagram of a DER unit coupled to the host grid, at the PC
bus, via a dual-stage single-phase VSC. The DC-DC converter is conned in a dashed
box to highlight that it is an optional block and if removed, the single stage converter is
realized.
6.4
Steady-State Model of Dual-Stage Single-Phase

Interface VSC
6.4.1
Model Assumptions
The VSC model presented in this chapter corresponds to the dual-stage VSC system.
However, the model can be also tailored to represent the less common single-stage converter congurations. The following assumptions are made:
The DER primary source is not directly represented in the model since the controllers of the interface-VSC are assumed to perfectly regulate the DC-link voltage
under steady-state conditions.
Only the fundamental-frequency model of the interface VSC is considered, i.e.,
the model does not represent the possible active harmonic ltering function of the
single-phase VSC [123, 126].
As per dierent codes and standards, the single-phase VSC is not permitted to
regulate the system voltage [121], i.e., the VSC is not equipped with voltage con-
93
Figure 6.2: Steady-state, fundamental frequency BFSA model of a single-phase VSCcoupled DER unit.
trollers. The VSC is only allowed to regulate the real and reactive power exchange
with the grid [124].
6.4.2
Incorporating Single-Phase VSC-Coupled DER Units in

Power Flow Algorithms
Under steady-state conditions, the interface VSC exchanges constant real and reactive
power with the grid. The power set points, PDER and QDER , dictate the VSC reference
current set points of the current controllers [120, 123, 124]. Based on the power-ow
algorithm into which the VSC model is incorporated, the following two VSC-coupled
DER models are developed.
6.4.2.1
VSC Model Tailored for the Single-Phase BFSA
Figure 6.2 shows the steady-state, fundamental frequency model of a single-phase VSCcoupled DER unit, tailored for the single-phase BFSA. As earlier discussed in Chapter
2, the BFSA equations are developed based on the current injection rather than power
injection. Thus, the VSC is modeled as a current source given by

IDER,ct =
PDER + jQDER
VP C,ct
(6.1)
where (.) is the complex conjugate of a phasor quantity. In (6.1), VP C,ct and IDER,ct
are the phase-frame PC voltage and the DER current injection prior to the ctth BFSA
iteration.
The value of QDER depends on the VSC control mode as follows:
In the power factor correction mode, QDER is given by
QDER = PDER tan(arccos(pf )),
(6.2)
(a)
94
(b)
Figure 6.3: Steady-state, fundamental frequency SFPS model of a single-phase VSCcoupled DER unit, (a) positive-sequence model, (b) zero- and negative-sequence models.
where pf is a constant power factor greater than or equal to 0.9, as specied by

the codes and standards [121].
In the reactive power support mode, the interface VSC supplies the reactive power
requirements of the local load [124]. In this case QDER is a pre-specied value.
6.4.2.2
VSC Model Tailored for the SFPS
The single-phase VSC-coupled DER units also can be directly connected to the threephase trunk of a distribution system. In this case, the single-phase VSC model should be
incorporated with the SFPS of Chapter 2, to represent the unbalanced power exchange
between the single-phase DER unit and the three-phase power-ow of the grid. The
steady-state, fundamental-frequency SFPS-based model of a single-phase VSC-coupled
DER unit is illustrated in Fig. 6.3.
The positive-sequence SFPS-based VSC model, Fig. 6.3(a), is a constant power source
whose real and reactive power components are
1
PDER,ct
+ jQ1DER,ct = VP C,ct (IDER,ct ) ,
(6.3)
where (.)ct 1 is the positive-sequence component of a three-phase quantity, prior to conducting the ctth SFPS iteration. The zero- and negative-sequence SFPS-based models of
the single-phase VSC, Fig. 6.3(b), are constant current sources whose current injections
I0,2
DER,ct are updated prior to each power-ow iteration. The positive-, negative-, and
95
zero-sequence current components of Fig. 6.3 are

1
IDER,ct ,
3
r
IDER,ct ,
=
3
r2
IDER,ct ,
=
3
I0DER,ct =
I1DER,ct
I2DER,ct
(6.4)
where the multiplier r in (6.4) is
r = a = 1 120o
a2 = 1 240o
DER unit connected to phase-A,

DER unit connected to phase-B,
(6.5)
DER unit connected to phase-C.
The phase-frame DER current used in (6.4), IDER,ct , is given by (6.1).
6.5
Evaluating the Interface VSC Internal Parameters
To incorporate the operating constraints of the interface-VSC in the power-ow algorithm, its internal parameters, i.e., modulation index and phase current, must be determined in the phase-frame. Regardless of the type of the power-ow algorithm (SFPS
or BFSA), subsequent to each iteration, the PC terminal voltage is evaluated in the
phase-frame and used to calculate the VSC modulation index (m) and the DER current
(IDER ). Figure 6.4 shows the equivalent circuit of the single-phase VSC-interfaced DER
unit used to determine the converter parameters. The equivalent impedance of the VSC
series lter of Fig. 6.4 is
Rf eq + jXf eq =
(1
Rf + jLf
2
Lf Cf ) + jRf Cf
(6.6)
where Rf , Lf , and Cf are identied on Fig. 6.1.
6.5.1
Calculating the VSC Phase Current
Similar to the approach used in Chapter 4, the VSC phase current IDER is decomposed
into two components: in-phase with (IDERd ) and perpendicular to (IDERq ) the PC
voltage phasor. Subsequent to the ctth power-ow iteration, these two current components
96
Figure 6.4: Equivalent circuit of the single-phase VSC-coupled DER unit used to calculate
the VSC internal parameters
are evaluated using

PDER
,
|VP C,ct |
QDER
,
=
|VP C,ct |
IDERd,ct =
(6.7)
IDERq,ct
(6.8)
where |.| is the magnitude of a phasor quantity. The net VSC current is given by
|IDER,ct | =
6.5.2
(IDERd,,ct )2 + (IDERq,ct )2 .
(6.9)
Calculating the VSC Modulation Index
Analogous to the discussion in Section 6.5.1, the VSC modulation index is decomposed
into two perpendicular components, namely md and mq , such that

mct =
(md,ct )2 + (mq,ct )2 ,
(6.10)
where mct is the VSC modulation index after the ctth power-ow iteration, and is related
to the VSC terminal voltage Vt,ct by
mct =
|Vt,ct |
,
Kinv Vdc
(6.11)
where Kinv is the converter constant and is determined based on the adopted modulation
strategy [95]. For single-phase VSC, the most deployed modulation technique is the 3level, naturally sampled, sinusoidal PWM (SPWM), for which Kinv = 12 . Vt,ct is given
97
by

PDER jQDER
Vt,ct = |VP C,ct | +
(Rf eq + jXf eq ) (1 2 Lf Cf ) + jRf Cf .
|VP C,ct |
(6.12)
From (6.11) and (6.12)
md,ct = Act + c1,ct PDER + c2,ct QDER ,
(6.13)
mq,ct = B k + c2,ct PDER c1,ct QDER .
(6.14)
The coecients in (6.13) and (6.14) are

|VP C,ct |
(1 + 2 Cf Lf ),
Kinv Vdc
Rf
,
c1,ct =
Kinv Vdc |VP C,ct |
Act =
Cf Rf |VP C,ct |
,
Kinv Vdc
Lf
.
=
Kinv Vdc |VP C,ct |
Bct =
c2,ct
(6.15)
6.6
Imposing the VSC Operational Limits
To deduce a feasible power-ow solution, none of the interface VSC internal parameters
should exceed their corresponding limits. In addition, the single-phase DER contribution
(generation or storage) should be specied such that the corresponding PC bus voltage
does not exceed the maximum value dictated by the utility system (VP Cmax ).
The sequential technique, proposed in Chapter 3, imposes these constraints subsequent to each power-ow iteration by (i) calculating the VSC internal parameters as
discussed in Section 6.5 and (ii) modifying the reference power set-points (PDER and
QDER ) of the VSC controllers to satisfy the constraints in case of contravention. This
section presents a systematic approach to update the VSC power set-points to satisfy all
the operational limits of the interface VSC and the host grid, i.e.,
phase current limit (If max )
modulation index limit (mmax )
PC bus voltage limit (VP Cmax )
6.6.1
98
Phase Current Limit
A heavily loaded distribution network is often characterized by low-bus voltages, including the head busses of single-phase laterals. Consequently, the DER units connected to
single-phase laterals need to inject higher currents to meet their real and reactive power
requirements. However, to obtain a feasible power-ow solution, each DER current should
be within the acceptable limits.
Subsequent to the ctth power-ow iteration, if the magnitude of the VSC phaseframe current |IDER | (calculated by (6.7)-(6.9)) exceeds IDERmax , then IDERd,ct+1 and
IDERq,ct+1 are re-calculated using
IDERd/q,ct+1 = IDERd/q,ct
IDERmax
.
|IDER,ct |
(6.16)
Substituting for IDERd,q from (6.16) into (6.7) and (6.8), and solving for PDER and
QDER , yields the power set points used in the (ct + 1)th iteration. The updated power
set points are given by (6.17) and (6.18).
PDER,ct+1 |x = PDER,ct
IDERmax
,
|IDER,ct |
(6.17)
QDER,ct+1 |x = QDER,ct
IDERmax
.
|IDER,ct |
(6.18)
Sux x in (6.17) and (6.18) refers to the set-points that satisfy the DER phase current
limit.
6.6.2
Modulation Index Limit
Prior to proceeding to the (ct+1)th power-ow iteration, if m (evaluated by (6.11)-(6.15))

is greater than mmax (which is 1 for the SPWM [95]), then mk+1
and mk+1
are updated
q
d
using
mmax
md/q,ct+1 = md/q,ct
.
(6.19)
mct
The updated power set points, satisfying the modulation index limit, are evaluated
by substituting md,q from (6.19) into (6.13) and (6.14), and solving for PDER and QDER .
This procedure yields
PDER,ct+1 |y =
c1,ct (md,ct+1 Act) + c2,ct (mq,ct+1 Bct )

,
c1,ct 2 + c2,ct 2
(6.20)

QDER,ct+1 |y =
c2,ct (md,ct+1 Act ) c1,ct (mq,ct+1 Bct )

.
c1,ct 2 + c2,ct 2
99
(6.21)
Sux y in (6.20) and (6.21) refers to the reference set-points fullling the modulation
index constraint.
6.6.3
PC Bus Voltage Limit
The uncoordinated high-depth penetration of single-phase DER units can result in excessive voltage rise at dierent busses of the system. It is the utility common practice to
adjust the system voltage via three-phase voltage regulators. However, these regulators
are much slower compared to the DER response and do not provide the desired solution to the overvoltage problem. Instead, one or more of the following can address the
overvoltage issue:
A (relatively large) storage unit is connected to the substation bus. The storage unit is controlled to absorb the excessive DER power causing the overvoltage
phenomenon.
The real and reactive power set-points of the single-phase DER units, located at the
violated busses, are reduced until all the system busses comply with the maximum
voltage limit.
The latter solution is adopted in this work and implemented in the Sequential-SFPS as
follows. Subsequent to the ctth power-ow iteration, all the phase-frame bus voltages are
evaluated. If the three-phase voltage at a PC bus, to which a single-phase DER unit is
connected, exceeds the maximum allowable value, the DER power set points are updated
using
(P, Q)DER,ct VP Cmax
(P, Q)DER,ct+1 |z =
,
(6.22)
max violate (VP CABC,ct )
where max violate (VP CA,B,C ) is the magnitude of the maximum violating PC phase
voltage, and VP Cmax is the utility upper limit of the phase voltage magnitude at any
bus. For example, based on the Canadian Standards, the maximum voltage in the MV
networks (1 kV to 50 kV) should not exceed 1.06 pu [127]. As such, VP Cmax is set to
1.06 pu in this work. In (6.22), sux z refers to the reference set-points satisfying the
PC voltage constraint.
It should be noted that unlike (6.17)-(6.21), which are based on mathematical closed
forms, (6.22) is heuristically developed since deducing a closed form expression that
relates phase voltages at dierent busses to a specic DER contribution practically is not
100
feasible. In addition, since updating the real and reactive power set points of the DER
units at the violating busses is not based on a mathematical closed form, fullling the
bus voltage constraint is expected to be the most computationally demanding part of the
power-ow algorithm, as will be detailed in Section 6.7.
6.6.4
Updating the VSC Reference Power Set-Points
The power set-points, selected prior to the (ct+1)th power-ow iteration, must satisfy the
aforementioned three operating constraints. As such, the real power set-point (PDER,ct+1 )
is selected based on:
PDER,ct+1 = min(PDER,ct+1 |x , PDER,ct+1 |y , PDER,ct+1 |z ).
(6.23)
The same logic is deployed to select QDER,ct+1 .
6.6.5
Sequential Power-Flow Algorithm
Subsequent to evaluating the phase-frame internal parameters of each single-phase VSCcoupled DER unit, the corresponding operating limits are checked to ensure no violations
occur. Similar to the discussion in Chapters 3 and 4, the steps to determine the internal
parameters, evaluate the operating limits, and update the phase-frame reference power
set-points are conducted sequentially at the end of each power-ow iteration.
6.7
1 VSC Model Validation
To verify the accuracy and evaluate the computational eciency of the single-phase BFSA
and the three-phase SFPS, including the VSC model of Section 6.4 and the power set
point updating criteria described in Section 6.6, two benchmark feeders are used as test
systems. The rst feeder is the single-phase radial feeder of the CIGRE MV benchmark
distribution network [98], and is used to evaluate the performance of the single-phase
Sequential-BFSA. The computational eciency of the three-phase Sequential-SFPS is
evaluated based on the IEEE 34-bus feeder [99].
6.7.1
Validating the Single-Phase Sequential BFSA
The single-phase CIGRE radial lateral of Fig. A.3, duplicated as Fig. 6.5 for the ease of
reference, is equipped with three identical single-phase VSC-coupled DER units, namely
101
Figure 6.5: Single line diagram of the radial test feeder
G1, G2, and G3, connected to Bus-6, Bus-11, and Bus-12, respectively. Each DER unit
is controlled to inject 0.6 pu power at 0.9 power-factor. The system loads and parameters
are given in Appendix A.3. The DER parameters are extracted from [124], and are given
in Table 6.1. The sequential BFSA power-ow algorithm, including the proposed DER
model, is implemented in the MATLAB platform and two case studies are conducted.
Table 6.1: Parameters of G1, G2, and G3 of Fig. 6.5 (Vbase = 7.2 kV and Sbase = 100
kVA)
Rated Power
0.6 pu
Rated Voltage
1.0 pu
Lf
0.0254 pu
Cf
0.0 pu
Rf
0.0 pu
IDERmax
0.66 pu
1
Kinv
2
mmax
1.0
Vdc
1.4
102
Table 6.2: Power-Flow Results of Case-1: Maximum Phase Current Limit is Discarded
Bus Magnitude (pu) Angle(degrees)
1
0.9
0
2
0.8996
-0.0126
3
0.8995
-0.0138
4
0.8994
-0.0144
5
0.8997
-0.0154
6
0.8998
-0.0173
7
0.8989
-0.0294
8
0.8992
-0.025
9
0.8995
-0.0197
10
0.8997
-0.0187
11
0.9
-0.0171
12
0.8998
-0.0181
DER
IDER (pu)
m
G1
0.6668
0.9073
G2
0.6666
0.9075
G3
0.6668
0.9073
Table 6.3: Case-1: Updated Real and Reactive Power Set Points of the three DER units
DER P (pu) Q(pu)
G1
0.5345 0.2588
G2
0.5346 0.2589
G3
0.5345 0.2588
6.7.1.1
Case-1: Maximum Phase Current Limit Violation
In Case-1, the head node (Bus-1) voltage is 0.9 pu. The corresponding power-ow
solution and the DER internal parameters, associated with relaxing the DER maximum
phase current limit, are given in Table 6.2. The DER violated parameters are shown in
boldface.
As indicated in Table 6.2, the phase currents of the three DER units (IDER ) exceed
the maximum corresponding limit (0.66 pu) and indicate the power-ow solution is not
feasible.
If the DER current constraint of Section 6.6.1 is imposed, then once the violation is
detected subsequent to the rst power-ow iteration, the real and reactive power reference
set points of the three DER units are updated based on (6.17) and (6.18), respectively.
The new real and reactive power reference set points of the three DER units are given in
Table 6.3. The corresponding power-ow solution, the DER currents, and the modulation
indices are shown in Table 6.4.
103
Table 6.4: Power-Flow Results of Case-1: Maximum Phase Current Limit is Imposed
1
0.9000
0
2
0.8996
-0.0126
3
0.8995
-0.0139
4
0.8994
-0.0145
5
0.8996
-0.0155
6
0.8997
-0.0174
7
0.8989
-0.0295
8
0.8992
-0.0251
9
0.8995
-0.0198
10
0.8997
-0.0189
11
0.9000
-0.0173
12
0.8998
-0.0182
DER
IDER (pu)
m
G1
0.6600
0.9071
G2
0.6600
0.9074
G3
0.6600
0.9071
Table 6.4 shows that the constraints of the DER units are satised. The sequential power-ow algorithm adjusts the real and reactive power of G1, G2, and G3 to
0.5345+j0.2588, 0.5346+j0.2589, and 0.5345+j0.2588 pu, respectively. The results of
Tables 6.3 and 6.4 demonstrate the validity and accuracy of (6.17) and (6.18).
6.7.1.2
Case-2: Maximum Modulation Index Limit Violation
In Case-2 the head node (Bus-1) voltage is 1.0 pu. The corresponding power-ow
solution and the DER internal parameters, associated with relaxing the DER maximum
modulation index limit, are given in Table 6.5. The violated DER parameters are shown
in boldface.
Table 6.5 shows that the modulation indices of the three DER units (m) exceed their
maximum allowable limits. As such, this power-ow solution is not acceptable. However,
adjusting the real and reactive power set points of the three DER units to the values
given in Table 6.6 guarantees that the modulation indices of the three DER units are
bounded to 1.0 as required. The values in Table 6.6 are evaluated by (6.20) and (6.21).
The corresponding power-ow solution and the DER internal parameters are shown in
Table 6.7. The results of Tables 6.6 and 6.7 demonstrate the accuracy and validity of the
model given by (6.20) and (6.21).
As shown in Tables 6.2 and 6.5, all the bus voltages are below the maximum operating
104
Table 6.5: Power-Flow Results of Case-2: Maximum Modulation Index Limit is Discarded
1
1.0000
0
2
0.9997
-0.0102
3
0.9995
-0.0112
4
0.9995
-0.0117
5
0.9997
-0.0125
6
0.9997
-0.014
7
0.9990
-0.0239
8
0.9993
-0.0203
9
0.9996
-0.016
10
0.9997
-0.0152
11
1.0000
-0.0139
12
0.9998
-0.0147
DER
IDER (pu)
m
G1
0.6001
1.0065
G2
0.6000
1.0067
G3
0.6000
1.0066
Table 6.6: Case-2: Updated Real and Reactive Power Set Points of the three DER units
DER P (pu) Q(pu)
G1
0.5370 0.0451
G2
0.5367 0.0372
G3
0.5367 0.0412
limit of 1.06 pu. Consequently, updating the power set points according to Section 6.6.3
is neither required nor addressed in Case-1 and Case-2. The accuracy and validity of
(6.22) are presented in Section 6.7.2.
6.7.2
Validating the Three-Phase Sequential-SFPS
To investigate the overvoltage phenomenon associated with the DER penetration, (i)
the substation bus voltage (Bus 800) is adjusted to 1.05 pu, as recommended in [99],
and (ii) the feeder is equipped with multiple single-phase VSC-coupled DER units. The
SFPS is augmented with the DER model of Fig. 6.3 and implemented in the MATLAB
platform, and the following case studies are conducted.
The Modied IEEE 34-bus system of Fig. A.5, duplicated as Fig. 6.6 for the ease of
reference, is used to investigate the overvoltage phenomenon associated with the DER
penetration. In this test system, (i) the substation bus voltage (Bus 800) is adjusted to
1.05 pu and (ii) the feeder is heavily equipped with multiple single-phase VSC-coupled
105
Table 6.7: Power-Flow Results of Case-2: Maximum Modulation Index Limit is Imposed
1
1.0000
0.0000
2
0.9995
0.0057
3
0.9993
0.0047
4
0.9993
0.0041
5
0.9994
0.0086
6
0.9994
0.0122
7
0.9987
0.0027
8
0.9990
0.0063
9
0.9993
0.0106
10
0.9994
0.0167
11
0.9996
0.0234
12
0.9995
0.0172
DER
IDER (pu)
m
G1
0.5392
1.000
G2
0.5382
1.000
G3
0.5385
1.000
DER units. The SFPS is augmented with the DER model of Fig. 6.3 and implemented
in the MATLAB platform, and the following two case studies are conducted.
6.7.2.1
Case-3: Violating the Maximum PCC Voltage Limit
In Case-3 , the system of Fig. 6.6 is equipped with 23 single-phase DER units, one unit
at each bus except at Bus-800. Each DER unit is controlled to inject 0.12 pu power (1
MVA base value) at 0.9 power-factor according to Table 6.8.
First, the maximum bus voltage constraint of Section 6.6.3 is discarded and the SFPS
Figure 6.6: Single line diagram of modied three-phase IEEE-34 bus radial feeder
Table 6.8: Case-3: DER Phase Distribution*

Bus
800 802 806 808 812 814 850
DER at phase
C
B
B
A
B
C
Bus
824 828 830 854 852 832 858
DER at phase A
B
C
B
A
B
C
Bus
860 836 862 840 842 844 846
DER at phase A
B
B
C
A
B
C
*Each DER unit injects 0.1080 + j0.0523 pu power.
The base power is 1 MVA.
Table 6.9: Case-3: Three-Phase Voltage Prole
Voltage Constraint
Bus
800
802
806
|Va | 1.0523 1.0527 1.0529
|Vb | 1.0469 1.0473 1.0475
|Vc | 1.0507 1.0511 1.0513
Bus
850
816
824
|Va | 1.0615 1.0615 1.0620
|Vb | 1.0561 1.0561 1.0566
|Vc | 1.0599 1.0599 1.0604
Bus
852
832
858
|Va | 1.0614 1.0614 1.0614
|Vb | 1.0560 1.0560 1.0561
|Vc | 1.0597 1.0597 1.0598
Bus
862
840
842
|Va | 1.0616 1.0616 1.0614
|Vb | 1.0562 1.0562 1.0560
|Vc | 1.0600 1.0600 1.0598
106
816
A
834
B
848
A
Without Considering the Maximum Bus

808
1.0563
1.0509
1.0547
828
1.0620
1.0566
1.0604
834
1.0614
1.0561
1.0598
844
1.0614
1.0560
1.0597
812
1.0596
1.0542
1.0580
830
1.0623
1.0569
1.0607
860
1.0615
1.0561
1.0599
846
1.0614
1.0561
1.0598
814
1.0615
1.0561
1.0599
854
1.0623
1.0569
1.0607
836
1.0616
1.0562
1.06
848
1.0614
1.0561
1.0598
is used to determine the power-ow solution. The corresponding three-phase voltage

prole is reported in Table 6.9. Phase voltages exceeding 1.06 pu are shown in boldface.
According to Table 6.9, all the bus voltages, except those of busses 800, 802, 806, 808,
and 812, exceed the voltage limit of 1.06 pu. Therefore, the power-ow solution is not
feasible. When the maximum voltage constraint is considered, the real and reactive power
set points of the DER units at the violated busses are updated, according to (6.22), to
address the overvoltage condition. The updated DER power set points and the resulting
three-phase voltage prole are given in Table 6.10 and Table 6.11, respectively.
Table 6.10 shows that the power set points of the DER units connected to Busses 802,
806, 808, and 812 remain at the original value (0.1080 + j0.0523 pu). The reason is the
107
Table 6.10: Case-3: Updated Real and Reactive Power Set Points of the DER Units.
Sbase = 1 MVA.
Bus
802
806
808
812
814
850
PDER (pu) 0.1080 0.1080 0.1080 0.1080 0.1038 0.1038
QDER (pu) 0.0523 0.0523 0.0523 0.0523 0.0503 0.0502
Bus
816
824
828
830
854
852
PDER (pu) 0.1037 0.0962 0.0953 0.0918 0.0919 0.1063
QDER (pu) 0.0502 0.0466 0.0462 0.0444 0.0445 0.0515
Bus
832
858
834
860
836
862
PDER (pu) 0.1063 0.1061 0.1062 0.1061 0.1057 0.1057
QDER (pu) 0.0515 0.0514 0.0515 0.0514 0.0512 0.0512
Bus
840
842
844
846
848
PDER (pu) 0.1057 0.1063 0.1065 0.1062
0.1062
QDER (pu) 0.0512 0.0515 0.0516 0.0515
0.0515
Table 6.11: Case-3:

Points Using (6.22)
Bus
|Va |
|Vb |
|Vc |
Bus
|Va |
|Vb |
|Vc |
Bus
|Va |
|Vb |
|Vc |
Bus
|Va |
|Vb |
|Vc |
Three-Phase Voltage Prole After Adjusting the DER Power Set

800
1.0519
1.0474
1.0507
850
1.0596
1.0551
1.0585
852
1.0589
1.0545
1.0578
862
1.0591
1.0546
1.0579
802
1.0522
1.0477
1.0510
816
1.0596
1.0552
1.0585
832
1.0589
1.0545
1.0578
840
1.0591
1.0546
1.0579
806
1.0524
1.0479
1.0512
824
1.0600
1.0555
1.0588
858
1.0590
1.0545
1.0578
842
1.0589
1.0545
1.0578
808
1.0554
1.0509
1.0542
828
1.0600
1.0555
1.0588
834
1.0590
1.0545
1.0578
844
1.0589
1.0544
1.0577
812
1.0581
1.0536
1.0570
830
1.0600
1.0556
1.0589
860
1.0590
1.0545
1.0578
846
1.0590
1.0545
1.0578
814
1.0596
1.0551
1.0585
854
1.0600
1.0556
1.0589
836
1.0591
1.0546
1.0579
848
1.0590
1.0545
1.0578
heuristic updating strategy of 6.22 does not aect the power contribution of the DER
units at the non-violated busses. In addition, the three-phase voltage prole given in
Table 6.11 comply with the imposed maximum voltage constraint, which demonstrates
the accuracy and validity of (6.22).
108
Table 6.12: Case-4: Three-Phase Voltage Prole Without Considering the Maximum Bus
Voltage Constraint
Bus
800
802
806
808
812
814
|Va | 1.0521 1.0524 1.0526 1.0557 1.0586 1.0602
|Vb | 1.0472 1.0475 1.0477 1.0508 1.0537 1.0553
|Vc | 1.0508 1.0511 1.0513 1.0544 1.0573 1.0589
Bus
850
816
824
828
830
854
|Va | 1.0602 1.0602 1.0606 1.0606 1.0605 1.0605
|Vb | 1.0553 1.0553 1.0557 1.0557 1.0556 1.0556
|Vc | 1.0589 1.0589 1.0593 1.0593 1.0592 1.0592
Bus
852
832
858
834
860
836
|Va | 1.0590 1.0590 1.0590 1.0588 1.0589 1.0590
|Vb | 1.0541 1.0541 1.0541 1.0539 1.0540 1.0541
|Vc | 1.0577 1.0577 1.0576 1.0575 1.0576 1.0577
Bus
862
840
842
844
846
848
|Va | 1.0590 1.0590 1.0588 1.0587 1.0587 1.0587
|Vb | 1.0541 1.0541 1.0539 1.0538 1.0538 1.0538
|Vc | 1.0577 1.0577 1.0575 1.0574 1.0574 1.0574
6.7.2.2
Case-4: No DER Units Connected to the Violating Bus
In Case-3 , all the violated busses of Table 6.9 are connected to DER units. However,
there might be a scenario where a bus experiences overvoltage due to DER units connected to other busses. To investigate this scenario and verify the eectiveness of the
criterion of (6.22) in mitigating the corresponding overvoltages, Case-4 is conducted.
In Case-4 , the DER units at Busses 814 and 846 are removed. In addition, the power
set points of the remaining DER units is raised to 0.1102 + j0.0534 pu, as compared to
0.1080 + j0.0523 pu for Case-3 . The corresponding three-phase voltage prole, calculated by the SFPS when the maximum voltage constraint is relaxed, is given in Table
6.12. The voltages at the violated busses are shown in boldface.
In addition to the voltages at Busses 850, 816, 824, 828, 830, and 854, where a
DER unit is connected to each bus, Table 6.12 shows that the voltage at Bus 814 (not
connected to a DER unit) exceeds 1.06 pu. Thus the power-ow solution of Table 6.12
is not acceptable.
To be eective and valid, the updating criterion of Section 6.6.3 should address the
overvoltage at all busses, and not only at those with DER connections. The three-phase
voltage prole of Table 6.13 veries this fact. The voltage violation at all the busses,
including those without DER units, is resolved by updating the power set points of the
DER units at Busses 850, 816, 824, 828, 830, and 854. The updated real and reactive
Table 6.13: Case-4:

Points Using (6.22)
Bus
|Va |
|Vb |
|Vc |
Bus
|Va |
|Vb |
|Vc |
Bus
|Va |
|Vb |
|Vc |
Bus
|Va |
|Vb |
|Vc |
109
Three-Phase Voltage Prole After Adjusting the DER Power Set

800
1.0520
1.0473
1.0508
850
1.0597
1.0550
1.0585
852
1.0584
1.0537
1.0572
862
1.0584
1.0537
1.0572
802
1.0523
1.0476
1.0511
816
1.0597
1.0550
1.0585
832
1.0584
1.0537
1.0572
840
1.0584
1.0537
1.0572
806
1.0525
1.0478
1.0513
824
1.0600
1.0554
1.0588
858
1.0584
1.0537
1.0572
842
1.0582
1.0536
1.0570
808
1.0555
1.0508
1.0543
828
1.0600
1.0554
1.0588
834
1.0582
1.0536
1.0570
844
1.0581
1.0535
1.0569
812
1.0582
1.0535
1.0570
830
1.0600
1.0553
1.0588
860
1.0583
1.0536
1.0571
846
1.0581
1.0535
1.0569
814
1.0597
1.0550
1.0585
854
1.0599
1.0553
1.0587
836
1.0584
1.0537
1.0572
848
1.0581
1.0535
1.0569
Table 6.14: Case-4: Updated Real and Reactive Power Set Points of the DER Units at
the Violating Busses. Sbase = 1 MVA.
Bus PDER (pu) QDER (pu)
850
0.1097
0.0531
816
0.1096
0.0531
824
0.1030
0.0499
828
0.1023
0.0496
830
0.1058
0.0512
854
0.1061
0.0514
power set points of the six DER units of the violated busses are given in Table 6.14.
6.7.3
Computational Eciency of the Sequential Algorithms

accommodating the 1 VSC-Coupled DER Model
An Intel Core2Duo , 3.16 GHz processor is used to conduct the reported four case
studies. In both Case-1 and Case-2, the sequential power-ow algorithm converges in
two iterations and the computational times for the solutions, i.e., Tables 6.4 and 6.7, are
0.023 and 0.026 seconds, respectively. This demonstrates the computational eciency of
the proposed algorithm.
When the voltage constraint of the three-phase SFPS is discarded, the algorithm con-
110
verges to the solution of either Case-3 or Case-4, given in Tables 6.9 and 6.12 respectively, in 0.094 seconds. However, if the voltage constraint is imposed, the computational
time increases to 1.216 and 0.896 seconds for Case-3 and Case-4 , respectively. As
discussed in Section 6.6.3, satisfying the maximum voltage constraint, using the heuristic
expression of (6.22), is expected to be the most time demanding part of the algorithm
since it is not based on a mathematical closed form. This computational time can be
reduced using a fast parallel programming technique for the SFPS implementation [97],
which is beyond the scope of this work.
6.8
This chapter presents a steady-state, fundamental frequency model of the small-size DER
unit interfaced by a single-phase VSC to the distribution system. The proposed model addresses the converters dierent (i) operational modes, e.g., bidirectional power transfer,
constant power-factor, and reactive power compensation, and (ii) operational constraints,
i.e., maximum modulation index, maximum current, and maximum bus voltage. The developed model is incorporated in single-phase (BFSA) and three-phase (SFPS) power-ow
algorithms.
The developed model utilizes the sequential iterative process with respect to the network and the VSC solutions, to guarantee the power-ow solution adheres to the network
and the VSC constraints and operating limits. The proposed model and the developed
sequential power-ow solvers are implemented in MATLAB platform and applied to
single-phase and three-phase benchmark networks. Four case studies are conducted, and
the power-ow results demonstrate (i) the validity of the proposed VSC model and (ii)
the computational eciency of the sequential power-ow algorithms accommodating the
1 VSC model.
Chapter 7
Power Flow Analysis of Islanded
ADNs1
7.1
Introduction
In the context of real-time power management of islanded smart distribution systems, the
smart energy management system (SEMS) is anticipated to deploy optimal power-ow
(OPF) engines to dispatch the system components and update the associated power and
voltage set points every 15-30 minutes [23]. During this time interval, sudden incidents,
e.g., sudden load switching and/or sudden network reconguration, may happen. One
of the possible consequences of such incidents is that the reference bus DER output,
during islanded operation, exceeds its maximum permissible capacity. Due to the high
computational burden of running the OPF, which can be in the order of several minutes
for a medium-size distribution network [128], the SEMS should be equipped with a different tool that can rapidly estimate new set points, that are not necessarily optimal.
This is required to maintain the system integrity until the completion of the subsequent
OPF run. Distributing the real and reactive system slack among several DER units is an
emergency remedy to alleviate the violation of the reference bus power capacity limit.
This chapter proposes and develops a new distributed slack bus (DSB) model for realtime power-ow analysis of islanded ADNs whose reference bus, unlike utility-connected
systems, has severe limited power capacity. A three-phase DSB-based PFA approach,
in the context of the SFPS, is proposed. The DSB-SFPS can be integrated within the
1
The work presented in this chapter has been submitted for publication in M.Z. Kamh and R. Iravani,
A Sequence Frame-Based Distributed Slack Bus Model for Energy Management of Active Distribution
Networks, IEEE Trans. Smart Grids, in Revision, July 2011, Manuscript ID TSG-00230-2011
111
Chapter 7. Power Flow Analysis of Islanded ADNs
112
SEMS to conduct real-rime three-phase PFA for islanded ADNs.

Existing DSB models only distribute the real slack among grid-forming (voltagecontrolled) DER units. Such a practice is not satisfactory for ADNs where the DER eet
may consist of only one or two voltage-controlled (PV) sources and a majority of powercontrolled (PQ) DER units. In addition, distributing the reactive slack has not yet been
addressed in the technical literature. As will be shown in this chapter, distributing the
reactive slack can signicantly reduce the reference bus output, thus alleviate its power
capacity limit violation. Moreover, non of the existing DSB models consider the power
capacity limit of the participating DER units.
The proposed DSB model incorporates (i) the participation of DER units with dierent control strategies (PQ and PV) in the system real and reactive slack compensation
and (ii) the DER power capacity limits. Based on a new denition of the participating
sources, the SFPS is enhanced to incorporate the system real and reactive slack as state
variables in the power-ow equations. Case studies are conducted to evaluate the impacts
of adopting the proposed DSB model, instead of the conventional single-slack bus (SSB)
model, in the SFPS tool.
7.2
Background
Traditional power-ow analysis identies the slack bus as (i) the reference for all the
bus voltage angles and (ii) the power-balancing bus that makes up for the dierence
between the scheduled generation and the loads plus losses. As such, the slack bus
output compensates (i) the dierence between generation at all the other busses and the
total system load and (ii) the total system losses. Hence, the slack bus is considered
a voltage source with innite power capacity [129]. While this model is valid for the
utility-connected operation, where the utility bus can be assumed an innite power
source with respect to the DER units, it lacks the practicality for ADNs operating in
the islanded mode. The slack bus in an islanded ADN is essentially a grid-forming DER
unit whose generation capacity is comparable to the other operating DER units. If the
reference bus output, i.e., the slack, exceeds its DER unit capacity, it becomes essential
to distribute the system slack among other participating units based on pre-specied
criteria. The single slack bus (SSB) model does not allow for slack distribution analysis
since it assigns all the system slack to one bus.
The DSB power-ow analysis is addressed in the technical literature for balanced
transmission networks [130135] and three-phase unbalanced distribution grids [42, 129,
136138]. The existing three-phase DSB models permit the grid-forming DER units (PV
113
busses) to share the system real slack. Several slack distribution criteria were developed
where the system slack is shared among the participating sources according to:
constant participation factors based on the source scheduled output [130, 131, 138],
constant participation factors based on the source quadratic cost function [132],
constant participation factors based on the source characteristics and loads allocation strategy [133, 134],
iteratively calculated participation factors based on the source domains and commons [42, 129, 136138],
iteratively calculated participation factors based on the network sensitivity and
penalty factors [129, 137].
7.3
The Scope of the Chapter
The scope of this chapter is to:

develop and incorporate a sequence frame-based DSB model in the SFPS for the
real-time PFA of ADNs in the autonomous operating mode, and
extend the DSB model to include a sequence frame-based reactive slack distribution
model.
The rest of the chapter is as follows. Section 7.4 presents the sequence-frame DSB
model, and new bus types are proposed. In Section 7.5, several case studies are conducted
to investigate and quantify the impacts of deploying the proposed DSB -SFPS tool. Main
conclusions are stated in Section 7.6.
7.4
7.4.1
Proposed Distributed Slack Bus (DSB) Model

Assumptions
Although the voltage and current unbalance in a distribution grid could be signicant, the
power unbalance (which is dened as the ratio of the negative- plus the zero-sequence
power components to the positive-sequence power component) at the reference bus is
much smaller. Thus, it is reasonable to assume that the total system three-phase slack
is approximately three times the total positive-sequence slack. This postulate is veried
114
through case studies in Section 7.5.1. Hence, the DSB model proposed in this work is
dened based on the positive-sequence power-ow, and is incorporated with the positivesequence power-ow equations of the SFPS of Chapter 2, where the bulk of the system
slack is associated with.
7.4.2
Participation Factors
Based on the adopted control strategy, a DER unit can be categorized as (i) a grid-forming
(voltage-controlled) unit that dictates the voltage [92] and (ii) a power-controlled (PQ)
unit that exchanges pre-specied real and reactive power with the system [91]. The later
can be further divided, based on the DER capacity, into a large or a small PQ unit. To
formulate the DSB model, the DER units that participate in compensating the system
slack must be predetermined. The participating units are classied as
1. PV and large PQ DER units with spare real power capacity to compensate for the
system real slack. The ratio of the real slack contribution of each participating unit
to the total system real slack is the real-power participation factor, Kp , where
m

Kpi +
i=1
N

Kpi = 1.
(7.1)
i=m+1
In (7.1), i = 1 is the reference bus index, m 1 is number of PV busses, and N is

the total number of system busses.
2. Large PQ DER units with spare reactive power capacity to compensate for the
system reactive slack. The reactive-power participation factor, Kq , is dened as
the ratio of the reactive slack contribution of each participating unit to the total
system reactive slack, where
KqP V
N

Kqi = 1,
(7.2)
i=m+1
where KqP V is the combined reactive power participation factor for all the non-PQ
busses.
Developing formulae for the optimal real and reactive power participation factors is
not within the scope of this thesis. Therefore, constant participation factors are used to
demonstrate the concept.
7.4.3
115
Distributed Slack Bus Model
To augment the DSB model with the SFPS, the positive-sequence power-ow equations
are enhanced as follows.
7.4.3.1
Real Power Balance Equation

i
1
1
1
Fp1
= PDERi
+ Kpi Pslack
+ Pi,comp
P1iload
|V1i |
N

k=1
|V1k ||y1BU Sik | cos(i1 k1 Yik1 )
= 0 , i = 1, 2, . . . , m, m + 1, . . . N,
(7.3)
1
where P1iload is the load positive-sequence real power consumed at Bus-i, Pi,comp
is the
1
positive-sequence real power compensation at Bus-i, and is given by (2.28), and PDERi
is one-third of the DER three-phase real power contribution at Bus-i.
7.4.3.2
Reactive Power Balance Equation

i
Fq1
= Q1DERi + Kqi Q1slack + Q1i,comp Qi1load
|V1i |
N

k=1
|V1k ||y1BU Sik | sin(i1 k1 Yik1 )
= 0 , i = m + 1, . . . , N,
(7.4)
where Qi1load is the load positive-sequence reactive power at Bus-i, Q1i,comp is the positivesequence reactive power compensation at Bus-i, and is given by (2.29), and Q1DERi is
one-third of the DER three-phase reactive power load contribution at Bus-i.
7.4.3.3
Super-PQ-Bus Equation
To incorporate the positive-sequence reactive slack (Q1slack ) as a new state variable in

the power-ow problem, in addition to (7.3) and (7.4), one more equation is required.
The reactive slack consists of the combined reactive power contribution of the non-PQ
busses, i.e., contributions of the reference and the PV busses. Hence, the set of nonPQ busses can be considered as a super-PQ-bus whose reactive power contribution is
the dierence between the total system reactive load-plus-loss and the reactive power
116
injection of all the PQ sources. The corresponding power balance equation is given by
FQ1 slack = 0 =
N

i=1
Qi1load +
N

+KqP V Q1slack
m

Q1i,comp
i=1
Q1DERi
i=m+1
m

|V1i |
i=1
N

k=1
|V1k ||y1BU Sik | sin(i1 k1 Yik1 ).
(7.5)

i
Equation (7.5) is referred to as the super-PQ-bus equation. In (7.5), N
i=1 Q1load
N
i
i=m+1 Q1DER is the combined reactive load contribution of the non-PQ busses, and
KqP V Q1slack is the combined reactive slack contribution of the reference and PV busses.
7.4.4
The Updating Equation
As earlier detailed in Chapter 2, the SFPS algorithm simultaneously solves the decoupled
positive, negative, and zero-sequence power-ow equations to calculate the phase-frame
bus voltages. The system of (7.3)-(7.5) constitutes the modied SFPS positive-sequence
power-ow equations including the proposed DSB model. This system of equations is
solved iteratively using the Newton-Raphson (N-R) method. The corresponding updating
matrix equation is given by (7.6).
Fp1 N
F m+1
q1
..
Fq1 N
K2
p
..
Kp
..
Fp1 1
F 2
p1
.
..
FQ1 slack
Kp1
0
0
..
.
0
Kqm+1
..
.
KqN
KqP V
Fp1 1
21
Fp1 2
21
..
.
Fp1 N
21
Fq1 m+1
21
..
.
Fq1 N
21
1
FQ
slack
21
...
...
...
...
...
...
...
...
Fp1 1
1
N
Fp1 2
1
N
Fp1 1
1
Vm+1
Fp1 2
1
Vm+1
Fp1 N
1
N
Fq1 m+1
1
N
Fp1 N
1
Vm+1
Fq1 m+1
1
Vm+1
Fq1 N
1
N
1
FQ
Fq1 N
1
Vm+1
1
FQ
..
.
..
.
slack
1
N
..
.
..
.
slack
1
Vm+1
...
...
...
...
...
...
...
...
Fp1 1
VN1
Fp1 2
VN1
..
.
Fp1 N
VN1
Fq1 m+1
VN1
..
.
Fq1 N
VN1
1
FQ
slack
VN1
21
..
1
1
Vm+1
..
1
Pslack
Q1
slack
VN1
(7.6)
7.4.5
117
DER Generation Limits
To obtain a feasible power-ow solution, the DER operating constraints must not be
violated. Thus, real and reactive power limits of the participating DER units must be
checked and imposed in each SFPS iteration. This section describes a strategy to impose
the DER real and reactive generation limits in the proposed DSB-SFPS algorithm.
Subsequent to each SFPS iteration, the real-power spinning reserve (SRpi ) of each
participating DER unit is calculated using
i
i
1
i
1
= PDERmax
PDERi
Kp,ct
Pslack,ct
,
SRp,ct
(7.7)
i
is negative, the
where ct is the index for the current power-ow iteration. If SRp,ct
i
real-power participation factor Kp,ct
is updated by
i
=
Kp,ct+1
i
1
PDERi
PDERmax
.
1
Pslack,ct
(7.8)
For (7.1) to hold, the real-power participation factor of the DER unit with the largest
positive real-power spinning reserve, e.g., DERj , is updated using
j
j
i
i
= Kp,ct
+ Kp,ct+1
Kp,ct
.
Kp,ct+1
(7.9)
Based on this strategy, the least loaded participating DER units help in alleviating the
real-power limit violation of the more stressed units. The same strategy is adopted to
enforce the DER reactive generation limit.
7.5
Validations and Case Studies
This section presents (i) the validation of the assumption stated in Section 7.4.1, (ii)
quantication of the impacts of deploying the proposed DSB model to conduct the powerow analysis, and (iii) verication of the numerical accuracy of the participation factor
updating strategy of Section 7.4.5.
7.5.1
Assumption Validation
The proposed DSB model is based on the assumption stated in Section 7.4.1. As such,
it is essential to test the validity of this assumption prior to deploying the DSB model
for further analysis.
118
The assumption stated in Section 7.4.1 is formulated as

1
P3slack 3Pslack
,
Q3slack 3Q1slack ,
(7.10)
where
1
=
Pslack
Q1slack =
N

i=1
N

|V1i |
|V1i |
i=1
N

k=1
N

k=1
|V1k ||y1BU Sik | cos(i1 k1 Yik1 ),

|V1k ||y1BU Sik | sin(i1 k1 Yik1 ),
(7.11)
P3slack
N

Pir ,
r=a,b,c i=1
Q3slack
N

Qri ,
(7.12)
r=a,b,c i=1
and
Pir = |Vri |
N

x=a,b,c k=1
Qri
|Vri |
N

x=a,b,c k=1
|Vxk ||yrx
| cos(ir kx Yikrx ),
BU Sik
|Vxk ||yrx
| sin(ir kx Yikrx ).
BU Sik
(7.13)
To test the validity of this assumption, two benchmark distribution systems are used:
The 12.47 kV CIGRE distribution benchmark network of Fig. A.2, duplicated as
Fig. 7.1 for the ease of reference. The total system load is 1808.61 + j898.46 kVA
on phase-A, 2220.11 + j1062.24 kVA on phase-B, and 1985.61 + j1010.84 kVA on
phase-C.
The modied 24.9 kV IEEE 34-bus radial feeder of Fig. A.4, duplicated as Fig.
7.2 for the ease of reference. The total system load is set to 1212 + j714 kVA on
phase-A, 1168 + j688 kVA on phase-B, and 1158 + j686 kVA on phase-C.
The reference bus DER unit of each test system is a grid-forming gas-red or diesel
Figure 7.1: Single line diagram of the CIGRE distribution benchmark network
Figure 7.2: Single line diagram of the modied IEEE 34-bus feeder
119
120
Figure 7.3: Validating the assumption stated in Section 7.4.1

synchronous generator [34]. Thus, both ADNs are operating autonomously, i.e., forming
an islanded grid.
For each test system, the total three-phase real (P3slack ) and reactive (Q3slack )
slack are calculated by (7.10) and (7.12) for three distinct cases:
Case-A: no additional DER units are installed in the system.
Case-B: 10% of the total system load is supplied by one PQ-controlled electronicallycoupled DER unit.
Case-C: 30% of the total system load is supplied by one PQ-controlled electronicallycoupled DER unit.
The dierence between the total three-phase slack calculated by (7.10) and (7.12) is
expressed as a percentage of (7.12). All the reported power-ow calculations deploy the
conventional SSB concept. The results are plotted in Fig. 7.3, where the factor is given
by
P
1
3slack 3Pslack
100
P3slack
= max
Q3slack 3Q1slack
Q3slack
100
(7.14)
As depicted in Fig. 7.3, the maximum dierence between the total three-phase slack
calculated using (7.10) and (7.12) does not exceed 0.15% for the CIGRE distribution
benchmark network (with larger X/R ratio) and 0.23% for the IEEE 34-bus feeder (with
smaller X/R ratio). In addition, the dierence tends to vanish as the DER depth of
121
penetration increases since the total system losses decrease. Fig. 7.3 veries the validity
of the assumption stated in Section 7.4.1, i.e., the total three-phase slack is approximately
three times its positive sequence counterpart, regardless of the network topology and X/R
ratio.
7.5.2
Impacts of Deploying the Proposed DSB Model
The DSB model of Section 7.4 is augmented with the SFPS power-ow algorithm, and
the combined algorithm (DSB-SFPS) is (i) implemented in the MATLAB platform
and (ii) used to investigate the impacts of using the proposed DSB model, instead of the
conventional SSB model, on the:
1. reference bus DER unit output,
2. total three-phase real-power losses,
3. voltage prole,
To quantify the aforementioned impacts, the modied IEEE 34-bus feeder of Fig. 7.2
is used. The electronically-coupled PQ-controlled DER unit at Bus-858 is rated at 760
kVA (0.76 pu), and is controlled to inject balanced three-phase power at unity powerfactor. The following seven study cases are conducted:
Case-Base: The PQ DER unit injects 20% of the system real load while not participating in the slack compensation, i.e., Kp = Kq = 0. This case represents the
conventional SSB power-ow.
Case-1: Similar to Case-Base, but the PQ DER unit compensates for 10% of the
system real slack, i.e., Kp = 0.1 and Kpref,bus = 0.9.
Case-2: Ditto, but the PQ DER unit compensates for 10% of the system real and
reactive slack, i.e., Kp = Kq = 0.1 and Kpref.bus = Kqref.bus = 0.9.
Case-3: Similar to Case-1, but the PQ DER unit compensates for 15% of the system
real slack, i.e., Kp = 0.15 and Kpref,bus = 0.85.
Case-5: Similar to Case-1, but the PQ DER unit compensates for 20% of the system
real slack, i.e., Kp = 0.2 and Kpref,bus = 0.8.
122
Figure 7.4: Eect of the proposed DSB model on the apparent power output of the
reference bus DER unit
For each case, the DSB-SFPS tool is used to calculate the system voltage prole and
power-ow results. Fig. 7.4 illustrates the apparent power output of the reference-bus
DER unit. The real power losses of Case-1 through Case-6 are shown in Fig. 7.5 as a
percentage of the real power losses of Case-Base. The average voltage prole of the seven
cases is depicted in Fig. 7.6. Figs. 7.4-7.6 conclude the following.
7.5.2.1
Reference Bus Power Output
The apparent power output of the reference bus DER unit is reduced by 1.21% by reducing its real slack contribution from 100% to 80%, Fig. 7.4. The apparent power output
can be further reduced by 1.71% when the real and reactive slack contributions of the
reference bus DER unit are simultaneously reduced to 80%. In addition, comparing the
reference bus output for Case-1 versus Case-2, Case-3 versus Case-4, and Case-5 versus
Case-6 proves that simultaneously distributing the real and reactive slack reduces the
reference bus output power compared to distributing the real slack only.
It can also be concluded from Fig. 7.4 that if the reference bus DER unit capacity
123
Figure 7.5: Eect of the proposed DSB model on the real-power losses of the IEEE-34
bus test feeder
is, for example, limited to 3.64 pu, then assigning 20% of the real slack to the PQcontrolled DER would not alleviate the overload condition at the reference bus DER
unit. One option to mitigate the overload would be to shed some loads. Alternatively,
simultaneously distributing the total real and reactive slack, using the proposed DSBSFPS tool, guarantees that the reference bus DER unit does not exceed its capacity limit.
This veries the eectiveness of simultaneously distributing the real and reactive slack
for real-time operation of islanded ADNs. It should be noted that, in this particular
example, if Kp exceeds 0.2, the PQ-controlled unit will be overloaded.
7.5.2.2
Real Power Losses
The three-phase real power losses (P3loss ) are approximately 6% of the total system
load. In the conventional SSB model, these losses are entirely compensated from the
reference bus. However, distributing the slack inherently distributes the system loss
compensation among the participating units. As Kp increases, the real power losses
decrease, Fig. 7.5. Moreover, distributing the reactive-power losses further reduces
P3loss . This result is concluded by comparing the percentage reduction of the total
system losses, shown in Fig. 7.5, for Case-1 versus Case-2, Case-3 versus Case-4, and
Case-5 versus Case-6. As shown in Fig. 7.5, increasing Kp from 0.0 to 0.2 decreases
P3loss by 3.19%. If Kq is also increased to the same value, the real power losses
124
Figure 7.6: Eect of the proposed DSB model on the voltage prole of the IEEE-34 bus
test feeder
are further reduced by 4.4%. As such, the simultaneous distribution of the real and
reactive slack signicantly reduces the system losses, and consequently the total slack,
thus increases the ADN overall eciency.
7.5.2.3
Voltage Prole
The voltage prole is slightly improved by deploying the DSB model, Fig. 7.6. The
maximum voltage dierence exists at Bus-848, whose average voltage is depicted in the
top-right corner of Fig. 7.6. Simultaneously distributing the real and reactive slack
improves the voltage prole compared to distributing the real slack only. This is concluded by comparing the voltage prole of Case-1 versus Case-2, Case-3 versus Case-4,
and Case-5 versus Case-6. By increasing Kp of the PQ-controlled DER unit from 0 to
0.2, the average voltage at Bus-848 increases by 0.16% compared to Case-Base, i.e., the
SSB model. In addition, the voltage is further elevated by 0.22% when both real- and
reactive-power participation factors are simultaneously set to 0.2.
7.5.3
Imposing the DER Power Capacity Constraint
An additional case study, Case-7, is conducted to quantify the impact of the DER capacity
constraint on the performance of the DSB-SFPS, and to verify the numerical accuracy of
the participation factor update strategy proposed in Section 7.4.5. In Case-7, the rating
of the PQ-controlled DER unit of Fig. 7.2 is reduced to 0.75 pu instead of 0.76 pu, while
the unit continues to serve 20% of the system real power load.
125
Figure 7.7: Eect of imposing the DER power capacity constraint on the PQ-controlled
DER output
As indicated in Case-5, setting Kp = 0.2 and Kq = 0 requires the PQ-controlled DER
unit to inject 0.752 pu real power. However, if the DER unit capacity is limited to 0.75 pu,
the power-ow solution becomes infeasible. To overcome this violation, the DSB-SFPS
algorithm, including the formulae of Section 7.4.5, updates the PQ-controlled DER real
power participation factor to 0.1913. Consequently, Kpref.bus increases to 0.8087 instead
of 0.8. Figure 7.7 compares the PQ-controlled DER power contribution before and after
imposing the DER capacity constraint.
As illustrated in Fig. 7.7, reducing Kp to 0.1913 successfully limits the DER output to
0.75 pu. Thus, the constraint violation is prevented and the power-ow solution becomes
feasible. The results of Fig. 7.7 verify the validity and the numerical accuracy of the
updating strategy proposed in Section 7.4.5.
7.6
This chapter introduces a comprehensive distributed slack bus (DSB) model for threephase power-ow analysis of islanded ADN. Unlike the existing DSB models, the proposed
formulation (i) simultaneously distributes both real and reactive slack and (ii) involves
DER units with dierent control strategies to compensate the total slack. In addition,
the DER generation capacity constraint is integrated in the proposed DSB model to
guarantee the power-ow solution adheres to the DER operating limits. The developed
model is also incorporated in the SFPS of Chapter 2.
The resulting DSB-SFPS tool is implemented in the MATLAB platform, and ap-
126
plied to the modied IEEE 34-bus benchmark network. Eight dierent case studies are
conducted to investigate and quantify the impacts of distributing the real and reactive
slack. The results demonstrate
the eectiveness of the proposed DSB model for islanded ADN real-time operation,
the numerical accuracy of the developed DSB-SFPS tool, and
that simultaneously distributing the real and reactive slack positively impacts the
operation of the islanded ADN by reducing the system losses, thus increasing the
system overall eciency..
Chapter 8
Conclusions
8.1
Summary
This thesis presented the concept of the active distributions network (ADN) as the next
generation of existing distribution systems. Unlike the current distribution systems, the
ADN has a exible topology, includes large number of electronically-coupled distributed
energy resource (DER) units, and requires voltage and power regulation in the utility-tied
and islanded modes of operation.
This thesis described component modeling and power-ow analysis algorithms for
the development of a fast and accurate three-phase power-ow analysis (PFA) tool, the
S equence-F rame P ower-ow S olver (SFPS), for the ADN applications. The developed
PFA tool represents the kernel of the ADN smart power and energy management system.
Accurate and detailed steady-state fundamental-frequency models of dierent types of
electronically-coupled DER units, i.e., (i) variable-speed wind-driven doubly-fed asynchronous generator based and (ii) single-/three-phase voltage-sourced converter (VSC)coupled DER units, are developed and incorporated within with the proposed power-ow
analysis tool for the real-time operation and control of ADN. The developed tool and
models are used for the real-time adjustment of the reference set points of dierent DER
controllers to enable operation of the entire ADN.
8.2
General Conclusions
The thesis concludes that:

1. Developing the steady-state, fundamental-frequency models of VSC-based DER
units in the sequence-components frame provides exibility to address any DER
127
Chapter 8. Conclusions
128
control objective under balanced and unbalanced power-ow scenarios. The reason
is that all the controllers of the VSC-based DER units adopt the sequence-frame
under unbalanced grid conditions.
2. Incorporating all of the interface VSC and the host DER constraints, e.g., modulation index limit, current limit, power capacity limit, and the terminal voltage limit,
is essential to obtain an accurate power-ow solution.
3. Implementing the DER operating constraints, using the sequential approach, is
computationally more ecient compared to the other methods reported in the
literature, e.g., the non-sequential approach.
4. To mitigate the violation in the DER operating limits, the interface VSC reference
set points are updated based on closed forms or heuristic formulae. However, the
sequential implementation of the VSC-coupled DER constraints is computationally
more ecient when the DER reference-set point updating strategies are based on
accurate closed forms, rather than heuristic ones.
5. The PFA of ADN in the islanded operating mode should adopt the distributed slack
bus (DSB) model rather than the conventional single slack bus (SSB). In addition,
simultaneously distributing the real and reactive slack among several DER units
can noticeably (i) reduce the output power of the reference bus DER unit and (ii)
the total system losses, and (iii) improve the overall islanded system eciency.
8.3
Quantiable Conclusions
Based on the studies reported in this work, the following conclusions are deduced:
1. As indicated in Chapters 3 and 5, this thesis reported a negligible dierence of less
than 1 % between the PFA results of the developed SFPS tool, accommodating
the proposed DER models, and the exact solution obtained by the time-domain
simulations using the PSCAD/EMTDC platform.
2. As indicated in Chapter 3, a computational time reduction of 54 %, compared to the
non-sequential approach, was achieved when the proposed sequential method is used
to impose the VSC constraints. Speed of convergence and ease of implementation
are crucial for real-time management and control of the ADN.
129
3. It was veried in Chapter 6 that the heuristic update of the VSC reference setpoints, to mitigate any operating constraint violations, reduces the SFPS convergence speed. The SFPS converged about ten times slower when the single-phase
VSC power-set points are heuristically updated to alleviate the PCC voltage limit
violation, compared to updating the same set points using closed forms to mitigate
the phase-current or modulation index limit.
4. In Chapter 7, (i) 4.4 % reduction in the total system losses and (ii) 1.7 % reduction
in the reference-bus DER output power are reported by conducting the three-phase
PFA of the IEEE 34-bus test system using the proposed DSB model, compared to
its conventional SSB counterpart.
8.4
8.4.1
Contributions
Major Contributions
This thesis presents the following three main contributions:

1. Development of the SFPS: A fast, accurate, and robust power-ow analysis tool for
ADN applications. This tool is the kernel of the ADN smart energy management
system that optimally controls and operates the network.
2. Modeling of VSC-coupled DER units: The developed three-phase, steady-state,
fundamental-frequency models include accurate closed forms for updating the VSC
reference set-points to guarantee full compliance with the VSC and its associate
source constraints.
3. Development and integration of a sequence-frame DSB model for the power-ow
and cost analyses of islanded ADNs using the SFPS.
8.4.2
Other Contributions
In addition, this thesis introduces the sequential approach; a computationally ecient

method to impose the VSC constraints within the SFPS. This approach is integrated
with the SFPS to form the Sequential-SFPS algorithm.
8.5
Directions for Future Research
Future work in the continuation of the work in this thesis is to:
130
develop steady-state power-ow tools and models of VSC for the applications of
overlayed DC-AC grids.
incorporate the proposed three-phase PFA software tool and DER models in a
smart energy management system, where the performance of the entire control and
management system is tested using a real-time simulator.
Appendix A
Data for Test Systems
A.1
Six-Bus Test System
The six-bus test system, Fig. A.1, is used in Chapters 3 and 5 to verify the proposed
steady-state, fundamental frequency, sequence-frame-based models of the three-phase
VSC-coupled and Type-3 WTG-based DER units, respectively.
The six-bus distribution system is a three-phase, four-wire, multi-grounded, 13.8 kV
distribution network and includes untransposed lines and balanced/unbalanced loads.
The system is equipped with two DER units. G1 represents the system slack bus, and is
modeled as an ideal voltage source behind an impedance. G2 is an electronically-coupled
DER unit. The system parameters and loading prole are given in Tables A.1 and A.2,
respectively. The details of the system PSCAD model are given in Appendix D.
Although the six-bus system of Fig. A.1 is meshed and has relatively low R/X ratio,
which is not common for distribution networks, the performance of the Sequential-SFPS
algorithm is equally accurate when applied to a radial and loop network with a high R/X
ratio. This is veried using the test systems of Fig. A.2 and Fig. A.4.
A.2
Three-Phase CIGRE MV Test System
The three-phase CIGRE MV distribution network, Fig. A.2 [98], is used in Chapters 3
and 5 to verify the the computational eciency and the applicability of the developed
Sequential-SFPS software tool, including models and constraints of three-phase VSCcoupled and Type-3 WTG-based DER units, to non-radial distribution networks. In
addition, the same system is used in Chapter 7 to verify the validity of the DSB model
assumption.
131
132
Appendix A. Data for Test Systems
Figure A.1: Single line diagram of the six-bus test system used in Chapters 3 and 5
Table A.1: Power Lines Phase-Frame Parameters (in pu) of the Study System of Fig.
A.1 (Vbase =13.8 kV, Sbase = 1000 kVA)
Zseries
Yshunt
L1
0.0080 + 0.0550i 0.0040 + 0.0160i 0.0040 + 0.0110i

0.0040 + 0.0160i 0.0070 + 0.054i 0.0040 + 0.0160i
0.0040 + 0.0110i 0.0040 + 0.0160i 0.0080 + 0.0550i
0.14840i 0.0310i 0.0250i

0.0310i 0.1495i 0.0300i
0.0250i 0.0300i 0.1150i
L2
0.0066 + 0.0560i 0.0017 + 0.0270i 0.0012 + 0.0210i

0.0017 + 0.0270i 0.0045 + 0.0470i 0.0014 + 0.0220i
0.0012 + 0.0210i 0.0014 + 0.0220i 0.0062 + 0.0610i
0.1500i 0.0300i 0.0100i

0.0300i 0.2500i 0.0200i
0.0100i 0.0200i 0.1400i
L3 and L4
0.0033 + 0.0280i 0.0008 + 0.0135i 0.0006 + 0.0105i

0.0008 + 0.0135i 0.0022 + 0.0235i 0.0007 + 0.0110i
0.0006 + 0.0105i 0.0007 + 0.0110i 0.0031 + 0.0305i
0.1500i 0.0300i 0.0100i

0.0300i 0.2500i 0.0200i
0.0100i 0.0200i 0.1400i
Table A.2: Loads of the Study System of

Phase A
1.9652
S1
+0.7651i
S2
0.6001
and S3 +0.3000i
0.6000
S4
+0.3000i
Fig. A.1 (Vbase =13.8 kV, Sbase = 1000 kVA)

Phase B Phase C
1.9652
1.9652
+0.7651i +0.7651i
0.6301
0.5758
0.2700i
0.3333i
0.6000
0.6000
0.3000i
0.3000i
133
Figure A.2: Single line diagram of the three-phase CIGRE MV distribution network used
in Chapters 3, 5, and 7
The 12.47 kV, three-phase, four-wire CIGRE MV distribution network includes total
unbalanced load of 4.9 MW/2.36 MVAR. The system comprises one loop and two radial
sections, with an R/X ratio equals to 0.4. The system parameters and loading prole are
given in Tables A.3 and A.4, respectively. The three-phase power lines of the CIGRE
MV distribution network are perfectly transposed.
A.3
CIGRE MV Single-Phase Radial Feeder
The CIGRE MV single-phase radial feeder, Fig A.3 is used in Chapter 6 to evaluate
the numerical accuracy of the sequential PFA algorithm, incorporating the single-phase
VSC-coupled DER model, when applied to single-phase radial laterals. The test feeder
is a 7.2 kV single-phase radial lateral with R/X ratio of 1.56. The total system load is
248.75 kW and 90.16 kVAr. The system load prole is given in Table A.5.
A.4
IEEE 34-Bus Test System
The IEEE 34-bus MV distribution test system, Fig. A.4, is an actual feeder located in
Arizona [99]. According to the IEEE distribution system analysis subcommittee, this
system is vulnerable to convergence problems when conducting three-phase PFA due to
134
Table A.3: Power Lines Phase-Frame Parameters (in ohms) of the Study System of Fig.
A.2
From Bus To Bus Per-phase Resistance Per-phase Reactance
1
2
0.3460
0.7776
2
3
0.5190
0.6480
3
4
0.6920
0.3974
3
8
1.3840
0.8424
4
5
0.8650
0.3628
4
11
1.9030
0.3240
5
6
1.0380
0.9979
7
8
1.3840
1.0843
8
9
1.5570
0.2074
9
10
1.7300
0.5184
10
11
1.9030
0.2160
Table A.4: Loads (in kVA) of the Study System of Fig. A.2
Bus
Phase-A
Phase-B
Phase-C
1
161.68+j58.68
80+j60
260+j147.18
2
265+j136.58
217.5+j120.97
170+j105.36
3
64+j48
244+j135.18
109+j69.79
4
180+j87.18
90+j43.59
90+j43.59
5
232.5+j64.08 331.68+j136.14
42.5+j26.34
6
47.5+j15.61
95+j31.22
161.68+j58.68
7
95+j31.22
190+j62.45
95+j31.22
8
90+j43.59
135+j65.38
180+j87.18
9
95+j31.22
142.5+j46.84
95+j31.22
10
135+j65.38
90+j43.59
225+j108.97
11
175+j94.63
175+j94.63
127.5+j79.02
135
Figure A.3: Single line diagram of the CIGRE MV single-phase radial feeder used in
Chapter 6. All power lines are identical. The series impedance of any power line =
0.219+j0.14
Bus
Load (kVA)
1
13.5000+j 6.5383
2
14.2500+j 4.6837
3
13.5000+j 6.5383
4
13.5000+j 6.5383
5
9.5000+j 3.1225
6
47.5000+j 15.6125
7
47.5000+j 15.6125
8
9.5000+j 3.1225
9
47.5000+j 15.6125
10
13.5000+j 6.5383
11
9.5000+j 3.1225
12
9.5000+j 3.1225
136
Figure A.4: Single line diagram of the IEEE 34-bus distribution system used in Chapters
3 and 5
Table A.6: Power Lines Phase-Frame Parameters of the Study System of Fig. A.4
From Bus
800
802
806
808
808
812
888
814
816
824
828
830
832
834
834
836
836
842
844
846
850
852
854
858
860
816
818
820
824
854
858
862
To Bus
802
806
808
810
812
814
890
850
824
828
830
854
858
860
842
840
862
844
846
848
816
832
852
834
836
818
820
822
826
856
864
838
Length (miles)
0.49
0.33
6.10
1.10
7.10
5.63
2.00
0.02
1.93
0.16
3.87
0.10
0.93
0.38
0.05
0.16
0.05
0.26
0.69
0.10
0.06
0.02
6.98
1.10
0.51
0.32
9.12
2.60
0.57
4.42
0.31
0.92
Zseries (/mile)
Yshunt (Simenes/mile)
1.3368 + 1.3343i 0.2101 + 0.5779i 0.213 + 0.5015i

0.2101 + 0.5779i 1.3238 + 1.3569i 0.2066 + 0.4591i
0.2130 + 0.5015i 0.2066 + 0.4591i 1.3294 + 1.3471i
5.3350i 1.5313i 0.9943i

1.5313i 5.0979i 0.6212i
0.9943i 0.6212i 4.8880i
1.9300 + 1.4115i 0.2327 + 0.6442i 0.2359 + 0.5691i

0.2327 + 0.6442i 1.9157 + 1.4281i 0.2288 + 0.5238i
0.2359 + 0.5691i 0.2288 + 0.5238i 1.9219 + 1.4209i
5.1207i 1.4364i 0.9402i

1.4364i 4.9055i 0.5951i
0.9402i 0.5951i 4.7154i
2.7995+1.4855i (Phase A to ground)
4.2251i (Phase A to ground)
2.7995+1.4855i (Phase B to ground)
4.2251i (Phase B to ground)
1.9217+1.4212i (Phase B to ground)
4.3637i (Phase B to ground)
137
Figure A.5: Single line diagram of the Modied IEEE 34-bus distribution system used
in Chapters 6 and 7
the length of the feeder, the unbalanced loading conditions, and the high R/X ratio. [99].
As such, this feeder is used in Chapters 3 and 5 to verify the convergence robustness
of the proposed SFPS software tool, including models and constraints of three-phase
VSC-coupled and Type-3 WTG-based DER units.
The IEEE system is a 24.9 kV, three-phase, four-wire, radial system with total unbalanced three-phase spot and distributed load of 1.8 MW/1.04 MVAR of mixed models
(ZIP load model). The distributed loads are lumped and equally divided between the
sending and receiving busses of each power line. The average of the system R/X ratio is
1.4. The system accommodates six single-phase laterals: from Bus-808 to Bus-810, from
Bus-816 to Bus-822, from Bus-824 to Bus-826, from Bus-854 to Bus-856, from Bus-858 to
Bus-864, and from Bus-862 to Bus-838. In the original system, The system parameters
and loading prole are given in Tables A.6 and A.7, respectively.
A.5
Modied IEEE 34-Bus Test System
In Chapters 6 and 7, a modied version of the IEEE 34-bus test system of Fig. A.4 is used
to (i) evaluate the numerical accuracy of the sequential PFA algorithm, incorporating
the single-phase VSC-coupled DER model of Chapter 6, when applied to a three-phase
radial network with high R/X ratio , (ii) verify the validity of the DSB model assumption
stated in Chapter 7, and (iii) quantify the dierences between using the proposed DSB
and the conventional SSB models to conduct the three-phase PFA for islanded grids.
The modications to the original system are summarized as follows:
All the loads are modeled using the constant power load model.
Bus
Phase-A
Phase-B
Phase-C
802
0
15+j7.5
12.5+j7
806
0
15+j7.5
12.5+j7
808
0
8+j 4
0
810
0
8+j 4
0
816
0+j 0
2.5+j 1
0
818
17+j 8.5
0
0
820
84.5+j 43.5
0
0
822
67.5+j 35
0
0
824
0
22.5+j 11
2+j 1
826
0
20+j 10
0
828
3.5+j 1.5
0
2+j 1
830
13.5+j 6.5
10+j 5
10+j 5
832
3.5+j 1.5
1+j 0.5
3+j 1.5
834
10+j 5
12.5+j 7
61.5+j 31
836
24+j 12
16+j 8.5
21+j 11
838
0
14+j 7
0
840
18+j 11.5
20+j 12.5
9+j 7
842
4.5+j 2.5
0
0
844 139.5+j 109.5 147.5+j 111 145+j 110.5
846
0
24+j 11.5
10+j 5
848
20+j 16
44+j 27.5
30+j 21.5
854
0
2+j 1
0
856
0
2+j 1
0
858
6.5+j 3
8.5+j 4.5
9.5+j 5
860
43+j 27.5
35+j 24
96+j 54.5
862
0
14+j 7
0+j 0
864
1+j 0.5
0
0
890
150+j 75
150+j 75
150 +j75
Total
606j 359
591.5j 348
574j 343
138
139
All the single-phase laterals, and their loads, are merged into their corresponding
head nodes.
The 4.16 kV three-phase lateral (Busses 888 and 890), including its associated
loads, is lumped into node 832 as a three-phase constant power load.
The single line diagram of the modied IEEE 34 bus feeder is depicted in Fig. A.5.
The modied system comprises 24 busses.
Appendix B
Steady-State Power-Flow Models of
Distribution Power Lines
The equivalent -model is used to represent power lines in the phase-frame, Fig. B.1.
The series (shunt) branch of the line model is a 3 3 matrix. This model can encompass
(i) three-phase, four-wire multi-grounded, (ii) three-phase, three-wire, (iii) two-phase,
three-wire multi-grounded, and (iv) two-phase, two-wire lines. In this work, multigrounded does not necessarily refer to directly grounding the sending and the receiving
ends of the line, but rather refers to keeping the neutral potential very close to the
ground potential. This assumption is particularly true for medium voltage distribution
networks where the neutral-to-earth (NEV) voltage is negligibly small compared to the
phase voltages [62, 88, 89].
Figure B.1: Phase-frame model of three-phase power line

140
Appendix B. Steady-State Power-Flow Models of Distribution Power Lines141
B.1
Three-Phase Power Lines
The three-phase currents owing from Bus-k to Bus-m, for a three-phase four-wire line,
are given by
a
a
a
I
I
I
km
serieskm
shuntkm
b
I
km
c
Ikm
Ikm
where
Iserieskm
Vck Vcm
n
n
ca
series
na
Ishuntkm
ac
an
zaa
zab
series z
series z
series
series
ba
bb
bc
z
series zseries zbn
series z
series
zseries
Ia
serieskm
b
serieskm
c
Ishuntkm
yca
shunt
Ia
shuntkm
b
shuntkm
(B.1)
Ic
cc
cn
zcb
series z
series z
series
serieskm
n
nc
nn
Iserieskm
znb
series z
series z
series
Ishuntkm
b
I
shuntkm
+
c
Ishuntkm

n
Vak Vam
Vb Vb
k
m
Vk Vm
and
serieskm
=
Iserieskm
ac
an
yaa
yab
shunt yshunt yshunt
shunt
bb
bc
bn
ba
1 yshunt yshunt yshunt yshunt
yna
shunt
Vak
Vb
cc
cn
Vck
ycb
shunt yshunt yseries
n
nb
nc
nn
yshunt yshunt yshunt
Vk
(B.2)
(B.3)
For multi-grounded lines, Vnk and Vnm are both zero. Thus (B.3) is reduced to
Iashuntkm
b
I
shuntkm
Icshuntkm
1
=
ba
y
shunt
ab
ac
yaa
shunt yshunt yshunt
ybb
shunt
ybc
shunt
cb
cc
yca
shunt yshunt yshunt
Vak
Vb
k
Vck
(B.4)
Moreover, applying Kron matrix reduction technique to (B.2) eectively reduce it to
Vak Vam
Vb Vb
k
m
Vck
Vcm
ab
ac
zaa
series zseries zseries
= zba
series
zca
series
where
xy
zxy
series = z
series
Iaserieskm
b
bc
zbb
series zseries Iserieskm
cc
zcb
Icserieskm
series zseries
ny
zxn
series
series z
, x,y=a,b,c.
znn
series
(B.5)
(B.6)

For power-ow calculations, the equivalent phase-frame series admittance is given by
ab
ac
yaa
ba
y
series
ybb
series
ybc
series
cb
cc
yca
ab
ac
zaa
= zba
series
zbb
series
zbc
series
cb
cc
zca
(B.7)
As indicated in Chapter 2, the SFPS requires evaluating the 3 3 series and shunt
admittance matrices. This is achieved using
y00
y01
y02
x
x
x
10
y
x
y11
x
y12
x
y20
y21
y22
x
x
x
yaa
yab
yac
x
x
x
= T1 yba
ybb
x
ybc
x
yca
ycb
ycc
x
x
x
where
2
T=
1 a
T , x=series or shunt,
(B.8)
a
, a = 1 120 .
(B.9)
a2
Three-phase three-wire lines do not have a neutral conductor. The rows and the
columns corresponding to the neutral wire, in (B.1)-(B.3), are omitted. Consequently,
the Kron reduction step, conducted in (B.5), is unnecessary. Thus, (B.6) becomes
xy
zxy
series = z
series , x,y=a,b,c.
B.2
(B.10)
Two-phase Power Lines
Consider a two-phase, three-wire line connected between phase-a, phase-b, and the
grounded neutral. Eq. (B.2) and (B.3) become
Vak Vam
Vbk Vbm
Vnk Vnm
ab
an
zaa
series z
series z
series
ba
= z
series
zna
series
Iaserieskm
bn
zbb
series z
series Iserieskm
nn
Inserieskm
znb
z
series
series
(B.11)

and
Iashuntkm
b
f ourl ine12
Ishuntkm
Inshuntkm
1
=
yba
shunt
yaa
shunt
yna
shunt
an
yab
shunt yshunt
ybb
shunt
ybn
shunt
nn
ynb
shunt yshunt
Vak
Vbk
Vnk
(B.12)
respectively.
Since Vnk and Vnm are both zero, (B.12) can be simplied to
a
aa
ab
Ia
1 yshunt yshunt Vk
shuntkm
b
= ba
.
b
2 yshunt ybb
Ishuntkm
V
k
shunt
(B.13)
Using Kron matrix reduction, (B.11) is be reduced to
a
ab
Vak Vam zaa
series zseries Iserieskm
= ba
b
,
Vbk Vbm
zseries zbb
Iserieskm
series
where
zxy
series
zxy
series
ny
zxn
series
series z
, x,y=a,b.
nn
zseries
(B.14)
(B.15)
The equivalent 2 2 phase-frame series admittance matrix is given by
yaa
yab
zaa
zab
series
series
series
series
ba
= ba
bb
yseries yseries
zseries zbb
series
(B.16)
The 3 3 phase-frame series admittance matrix is reconstructed by adding a row

and a column with zero entries to the 2 2 admittance matrix of (B.16), corresponding
to phase-c. The same procedure is applied to the shunt admittance matrix of (B.13).
Finally, the two 3 3 phase-frame admittance matrices are plugged in (B.8) to evaluate
their sequence-frame counterparts.
are modeled the same way as shown in Section B.2, except that the Kron reduction
step performed in (B.14) is not conducted.
For un-grounded two-phase lines (also known as V-lines [62]), the rows and the
columns corresponding to the neutral wire, in (B.12) and (B.11), are omitted. Thus,
(B.15) becomes
xy
zxy
(B.17)
series = z
series , x,y=a,b.
Appendix C
Steady-State Power-Flow Models of
Electrical Loads
As discussed in Chapter 2, electrical loads are incorporated in the SFPS using their
sequence-frame model. The following analysis evaluate the phase-frame load parameters
and convert them to their sequence-frame counterparts.
C.1
C.1.1
Constant Power Loads

Four-Wire/Three-Wire Wye-Connected Loads
Fig. C.1 shows a schematic diagram of a four-wire (or a three-wire wye-connected)

constant power load connected to Bus-k. The phase-frame currents injected by the load
are given by
Figure C.1: Phase-frame model of three-phase four-wire, constant power load

144
Appendix C. Steady-State Power-Flow Models of Electrical Loads 145
Figure C.2: Phase-frame model of three-phase delta-connected constant power load
Iaload
b
I
load
Icload
(Saload /Vak )

= Sb /Vb
load
k
(Scload /Vck )
(C.1)
where Sxload is the complex power absorbed by phase-x. For single-phase and two-phase
loads, the corresponding missing phase current(s) is (are) substituted by zero in (C.1).
As indicated in Chapter 2, the load model incorporated in the SFPS requires evaluating the sequence-frame line currents. This is achieved using
I0load
1
I
load
I2load
where T is given by
Iaload
= T1 Ib
load
Icload
2
T=
1 a
1 a
a
, a = 1 120 .
a2
(C.2)
(C.3)
It should be noted that, for three-wire loads, I0load is equal to zero.
C.1.2
Three-Wire Delta-Connected Loads
The schematic diagram of a delta-connected constant power load, connected to Bus-k, is

depicted in Fig. C.2. Prior to evaluating the line currents, the line-to-line voltages are
calculated using
Vab
k
Vbc
k
Vca
k
= 0
Vak
1
Vk .
1
Vck
(C.4)
The phase-to-phase currents injected by the load are given by
Iab
load
bc
I
load
Ica
load
ab
Sab
load /Vk

= Sbc /Vbc
load
k
ca
(Sca
load /Vk )
(C.5)
xm
is the complex power absorbed by the load connected between phase-x and
where Sload
phase-m. Finally, the phase-frame line currents injected by the load are given by
Iaload
b
I
load
Icload
= 1
0
1
1
Iab
load
bc
0
Iload
Ica
load
(C.6)
The phase-frame line currents of (C.6) are then used to evaluate their sequence-frame
counterparts using (C.2).
C.2
C.2.1
Constant Current Loads

Fig. C.3 shows a schematic diagram of a four-wire (or a three-wire wye-connected)

constant power load connected to Bus-k. Constant current loads are characterized by
their constant current magnitude and constant power-factor [62].
The phase-frame currents injected by the load are given by
Iaload
b
I
load
Icload
a
Isp
+ Vka a

= I b + V b b
sp
k

c
Isp
+ Vkc c
(C.7)
where x and Vkx are the load power-factor and phase-x to neutral voltage angles,
x
respectively. Isp
is the specied current magnitude of the load connected to phase-x, and
Figure C.3: Phase-frame model of three-phase four-wire, constant current load

is given by
x
x
Isp
= Sload
/Vkx ,
(C.8)
x
and Vkx are the rated power and phase-to-neutral voltage of the load connected
where Sload
to phase-x, respectively. For single-phase and two-phase loads, the corresponding missing
phase current(s) is (are) substituted by zero in (C.7). The phase-frame line currents of
(C.7) are then used to evaluate their sequence-frame counterparts using (C.2).
C.2.2
Fig. C.4 shows a schematic diagram of a delta-connected constant current load connected
to Bus-k. Prior to evaluating the line currents, the line-to-line voltages are calculated
using (C.4).
The phase-to-phase currents injected by the load are given by
Iab
load
bc
I
load
Ica
load
ab
Isp
+ Vkab ab

= I bc + V bc bc
sp
k

ca
Isp
+ Vkca ca
(C.9)
where xm and Vkxm are the load power-factor and phase-x to phase-m voltage angles,
xm
respectively. Isp
is the specied current magnitude of the load connected between phasex and phase-m, and is given by
xm
xm
Isp
= Sload
/Vkxm ,
(C.10)
xm
and Vkxm are the rated power and phase-to-phase voltage of the load connected
where Sload
between phase-x and phase-m, respectively. The phase-to-phase currents calculated in
(C.9) are used to evaluate the injected line currents using (C.6). Finally, the phase-frame
Figure C.4: Phase-frame model of three-phase delta-connected constant current load
Figure C.5: Phase-frame model of three-phase four-wire, constant impedance load

.
line currents are used to evaluate their sequence-frame counterparts using (C.2).
C.3
C.3.1
Constant Impendence Loads

The phase-to-neutral admittances of the constant impedance load shown in Fig. C.5 are
given by
x
Sload
yxx
(C.11)
2 x , x=a,b,c,
load =
x
Vk
x
, Vkx , and x are dened in Section C.2.1. The sequence-frame admittances
where Sload
are calculated using
Figure C.6: Phase-frame model of three-phase delta-connected constant impedance load

.
01
02
y00
load yload yload
10
y
load
y11
load
y12
load
21
22
y20
load yload yload
C.3.2
= T1
yaa
load
ybb
load
ycc
load
T.
(C.12)
The phase-to-phase admittances of the constant impedance load shown in Fig. C.6 are
given by
xm
Sload
yxm
=
(C.13)

2 xm , n, m = a,b,c; n = m
load
Vkxm
xm
, Vkxm , and xm are dened in Section C.2.2.
where Sload
Using delta-star transformation, the equivalent phase-to-neutral admittances are given
by [76]
yaa
load
ybb
load
ycc
load
ca
yab
load yload
= ab
,
ca
yload + ybc
load + yload
yab ybc
= ab loadbc load ca ,
yload + yload + yload
ybc yca
= ab loadbc load ca .
yload + yload + yload
The sequence-frame admittances are then calculated using (C.12).
(C.14)
Appendix D
Schematic Diagrams of the
PSCAD/EMTDC Models
The schematic diagram for the developed PSCAD/EMTDC model of the six bus test
system of Fig. A.1 is shown in Fig. D.1. The simulation model is composed of (i) an
equivalent model of G1 formed by a constant three-phase voltage source with a negative
and zero-sequence impedance, (ii) user-dened model of three-phase, four-wire, untransposed, power-lines, (iii) three-phase constant power loads, (iv) three-phase transformers,
and (v) user-dened model of a three-phase VSC-based DER unit model.
Figure D.1: PSCAD model of the test system in Fig. A.1

The interface medium of a three-phase VSC-coupled DER unit is represented in
PSCAD by a controlled three-phase voltage source behind an RL lter impedance, Fig.
D.2. The VSC controllers are developed based on the methods described in [3537,91,92].
150
Appendix D. Schematic Diagrams of the PSCAD/EMTDC Models
151
Figure D.2: PSCAD model of a three-phase VSC-coupled DER unit

Fig. D.3 illustrates the PSCAD model of a three-phase Type-3 (DFAG) -based DER
unit. The RSC and GSC controllers are developed based on the methods described
in [7881,83]. All the elements constructing sub-circuits of both types of the three-phase
VSC-based DER units are selected from the PSCAD standard library.
Appendix D. Schematic Diagrams of the PSCAD/EMTDC Models
Figure D.3: PSCAD model of a three-phase Type-3 based DER unit
152
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Component Modeling and Three-Phase Power-Flow Analysis For Active Distribution Systems

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Component Modeling and Three-Phase Power-Flow

Analysis for Active Distribution Systems

Mohamed Zakaria Kamh

A thesis submitted in conformity with the requirements

Copyright 2011 by Mohamed Zakaria Kamh

Active Distribution Networks . . . . . . . . . . . . . . . . . . . . . . . .

ADN Operating Modes . . . . . . . . . . . . . . . . . . . . . . . .

Smart Energy Management System . . . . . . . . . . . . . . . . .

Statement of the Problem and Thesis Motivations . . . . . . . . . . . . .

Lack of DER Models . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 2: A Three-Phase Sequence-Frame Power-Flow Solver

Chapter 3: Steady-State Models of Three-Phase VSC-Coupled DER

Chapters 4 and 5: Steady-State Models of Type-3 WTG-Based

Chapter 6: Steady-State Models of Single-Phase VSC-Coupled

Chapter 7: Three-Phase Distributed Real- and Reactive-Slack Bus

2 Sequence-Frame Power-Flow Solver (SFPS)

Three-Phase Power-Flow Analysis: Critical Review . . . . . . . . . . . .

Three-Phase Power-Flow Algorithms for Radial Network Topology

Backward-Forward Sweep Algorithm (BFSA) . . . . . .

Three-Phase Power-Flow Algorithms for General Network Topologies 14

Sequence-Frame Versus Phase-Frame in Three-Phase Power-Flow Analysis

Sequence-Frame Models of Basic ADN Components . . . . . . . . . . . .

Unbalanced Three-phase Distribution Line . . . . . . . . . . . . .

Three-phase Power Transformers . . . . . . . . . . . . . . . . . .

Constant Power and Current Loads . . . . . . . . . . . .

Constant Impedance Loads . . . . . . . . . . . . . . . .

The SFPS Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 Power-Flow Model of 3- VSC-Coupled DER Units

Model Scope and Assumptions . . . . . . . . . . . . . . . . . . . . . . . .

Proposed Sequence-Frame Model of 3 VSC-Coupled DER Units . . . .

Interface VSC Positive-Sequence Model . . . . . . . . . . . . . . .

Interface VSC Negative- and Zero-Sequence Models . . . . . . . .

Three-Wire VSC Conguration . . . . . . . . . . . . . .

Four-Wire VSC Conguration . . . . . . . . . . . . . . .

Implementation of the VSC Unied Model in the SFPS . . . . . . . . . .

Accommodating the VSC-Coupled DER Model in the SFPS . . .

Calculating the Internal Parameters of the Interface VSC . . . . .

Mitigating the VSC Operating Limits Violation . . . . . . . . . .

Mitigating the Phase Current Limit Violation . . . . . .

Mitigating the Reactive Power Limit Violation . . . . .

Mitigating the Phase Modulation Index Limit Violation

Updating the Interface VSC Reference Set-Points . . . .

3 VSC Model Validation . . . . . . . . . . . . . . . . . . . . . . . . . .

Case-4: Sequential-SFPS Validation . . . . . . . . . . . . . . . . .

Computation Eciency of the Proposed Sequential-SFPS . . . . . . . . .

Summary and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . .

4 Power-Flow Model of Type-3 WTG DER Units

Classication of Wind Turbine Generators . . . . . . . . . . . . . . . . .

Power-Flow Models of Type-3 DER Units: Review . . . . . . . . . . . . .

The Scope of the Chapter . . . . . . . . . . . . . . . . . . . . . . . . . .

Proposed Sequence-Frame Model of A Type-3 DER Unit . . . . . . . . .

Positive-Sequence Model of Type-3 DER Unit . . . . . . . . . . .

Negative-Sequence Model of Type-3 DER Unit . . . . . . . . . . .

Equivalent Negative-Sequence Model of Type-3 DER Unit . . . .

Evaluating Type-3 Negative-Sequence Model Parameters . . . . . . . . .

Case A: Idle Secondary Control of Type-3 Unit . . . . . . . . . .

Case B: Balancing Rotor Currents . . . . . . . . . . . . . . . . . .

Case C: Balancing Stator Currents . . . . . . . . . . . . . . . . .

Case C-1: Balancing Stator Currents Via RSC . . . . . .

Case C-2: Balancing Stator Currents Via GSC

Case D: Mitigating Stator Real Power Double-Frequency Component 65

Case E: Mitigating Double-Frequency Electromagnetic Torque (Power)