Вы находитесь на странице: 1из 18

Computer Organization

Dr. Umer Farooq


umerfarooq@ciitlahore.edu.pk

Previous lecture

Introduction and evolution of microprocessors


Computer classes
Trends in technology
An abstract overview of components of a computer

Instruction set
Understanding the language of hardware is the key
to understand hardware/software interface
A program in C is compiled into machine language
This program must run on future machines too

Important design principles when defining an


Instruction Set Architecture (ISA)

Instruction set
Design principle 1
Keep the hardware simple: chip must implement basic
operations and run fast
Keep instructions regular: simplifies decoding/scheduling
of instructions

A basic MIPS instruction


C code
a = b+c
MIPS assembly language code
add

a, b, c

MIPS arithmetic instruction is rigid


Each instruction performs only one operation
Each instruction must have exactly three variables

Translate a = b+c+d+e into MIPS assembly code??

Example
C code a = b + c + d + e;
translates into the following assembly code:
add a, b, c
add a, b, c
add a, a, d
or
add f, d, e
add a, a, e
add a, a, f
Instructions are simple. Fixed number of operands unlike
C (Simple and regular)
A single line of C code is converted into multiple lines of
MIPS assembly code
Which of the above two sequences are better and why??
6

Subtract example
C code f = (g + h) (i + j);
Assembly code translation with only add and sub
instructions:
add t0, g, h
add t1, i, j
sub f, t0, t1

or

add f, g, h
sub f, f, i
sub f, f, j

Operands
In C, each variable is a location in memory
In hardware, each memory access is expensive if variable a
is accessed repeatedly, it helps to bring the variable into an
on-chip scratchpad and operate on the scratchpad (registers)
To simplify the instructions, we require that each instruction
(add, sub) only operate on registers
Note: the number of operands (variables) in a C program is
very large; the number of operands in assembly is fixed
there can be only so many scratchpad registers
8

MIPS registers
Design principle 2: Smaller is faster
MIPS has 32 registers each of which is 32 bit wide
(modern 64 bit architectures have 64 bit wide registers)
A 32 bit entity (4 bytes) is referred to as word
Large number of registers may increase the clock cycle
time
$S0, $S1, .. For registers that correspond to variables in
C or java
$t0, $t1, .. For registers needed to compile program
into MIPS instructions
9

Memory operands
Arithmetic operations (add, sub) occur only on
values present in registers.
From where do we get theses values? Memory!!
So MIPS must include instructions that transfer data
between memory and registers

Load word: transfer data from memory to register


lw

$t0, memory-address

Store word: transfer data from register to memory


Sw

$t0, memory address

10

Memory operands
Load word: transfer data from memory to register
lw

$t0, memory-address
Register

Memory

Store word: transfer data from register to memory


Sw

$t0, memory address


Register

Memory

How is memory address determined?


11

Memory address
The compiler organizes data in memory it knows
the location of every variable (saved in a table) it
can fill in the appropriate mem-address for loadstore instructions
a b c d[10] .

Memory

Base address
12

Immediate operands
An instruction may require a constant as input
An immediate instruction uses a constant number as one of the inputs
(instead of a register operand)
addi $s0, $zero, 1000 # the program has base address
# 1000 and this is saved in $s0
# $zero is a register that always
# equals zero
addi $s1, $s0, 0
# this is the address of variable a
addi $s2, $s0, 4
# this is the address of variable b
addi $s3, $s0, 8
# this is the address of variable c
addi $s4, $s0, 12
# this is the address of variable d[0]
Design Principle 3: Make common case fast
13

Memory instruction format


The format of a load instruction:
destination register
source address
lw $t0, 8($t3)
any register
a constant that is added to the register in brackets
14

Example
g = h + A[8]
If values of g, h is in $S1, $S2 respectively and base
address of array A is in $S3. Compile above code into
MIPS assembly language
lw
add

$t0, 8($S3)
$S1, $S2, $t0

#$t0 gets A[8]


# g= h + A[8]

A[12] = h + A[8] MIPS assembly code??


15

Recap Numeric Representation


123 10
11110112
0 to 15 decimal
0 to f hexadecimal
Direct conversion between binary and hexadecimal.
16

Instruction formats
Instructions are represented as 32-bit numbers (one word),
broken into 6 fields
R-type instruction
000000 10001
6 bits
5 bits
op
rs
opcode source

add $t0, $s1, $s2


10010 01000 00000 100000
5 bits 5 bits 5 bits 6 bits
rt
rd
shamt funct
source dest shift amt function

I-type instruction
lw $t0, 32($s3)
6 bits
5 bits
5 bits
16 bits
opcode
rs($S3)
rt($t0)
constant
Design Principle 4: good design demands good compromise
17

Logical operations
Logical ops
Shift Left
Shift Right
Bit-by-bit AND
Bit-by-bit OR
Bit-by-bit NOT

C operators
<<
>>
&
|
~

Java operators
<<
>>>
&
|
~

MIPS instr
sll
srl
and, andi
or, ori
nor

18

Вам также может понравиться