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Detection and Correction of Saturated

Current Transformer Measurements Using
Decaying DC Components
Chi-Shan Yu, Member, IEEE
AbstractWhen fault currents contain decaying dc components,
current transformers (CTs) face the risk of becoming saturated.
Traditionally, fault current waveform or CT model analyses were
used to detect CT saturation. This paper analyzes the decaying
dc components in fault currents to detect CT saturation. The
decaying dc component in fault currents is first estimated using
phasor-based computations. Such a component is then used to define a detection index. The proposed detection index can be easily
used to detect CT saturation because its value in an unsaturated
period is within a pre-known range. After CT saturation has been
detected, the current samples and phasors in the latest unsaturated period are used to correct the saturated current samples.
The proposed algorithm was tested using MATLAB/SIMULINK
simulator and realized on a DSP Starter Kit to demonstrate its
effectiveness and applicability.
Index TermsCurrent transformers, decaying dc component,
phasor, saturations.

I. INTRODUCTION

URRENT transformers (CTs) are used to measure the

fault currents in protection relays. If the fault currents are
purely sinusoidal, CTs can measure as much as 20 times the
rated currents with acceptable error [1]. However, if the measured fault current contains a decaying dc component or if an
auto-reclosure follows a permanent fault [2], the CT may become saturated even if the fault current is not very large. The
saturated CT may cause distorted measurements and inaccurate
relay operations.
In recent decades, many algorithms [3][10] have been published to address CT saturation problems. CT model-based algorithms [3][5] can simultaneously achieve detection and correction of CT saturation. In the fault period, the predicted excitation
currents are used to detect and correct the CT saturation. Mathematical equations [3] or neural networks [4], [5] can be used to
obtain the excitation currents. Another approach is to analyze
the time-domain fault current waveforms [6][10]. The main
idea behind this approach is that current waveforms are nonsmooth at the beginning and end of a CT saturated period. In [6],
[7], discrete wavelet transform (DWT) was used to detect the
non-smooth variations. In [8], the difference functions of current

Manuscript received May 27, 2009; revised October 01, 2009, November 24,
2009. First published April 19, 2010; current version published June 23, 2010.
This work was supported by the National Science Council under Grant NSC
96-2628-E-027-115-MY2. Paper no. TPWRD-00401-2009.
The author is with the Department of Digital Technology Design, National
Taipei University of Education, Taipei, Taiwan, R.O.C. (e-mail: chsyu@tea.
ntue.edu.tw).
Digital Object Identifier 10.1109/TPWRD.2010.2045137

samples were used to detect CT saturation. In [9], a gradientbased criterion was used to detect the non-smooth variations.
In [10], a simpler algorithm that used an identified reference
point was proposed to discriminate saturated periods. After the
saturated periods were identified, other algorithms were used to
correct the saturated current samples. Regression or least-square
analyses on the unsaturated samples [6], [10] were widely used
for corrections. An artificial intelligence method [7] was also
used to correct the saturated samples.
CT saturation can be accurately detected using the algorithms
proposed in [3][10]. However, some problems may still arise.
For example, the performances of CT model-based algorithms
[3][5] may be degraded when the CT parameters are changed.
Moreover, mild CT saturation cannot easily be detected using
waveform-based algorithms [6][9]. Because the detection algorithms of [6], [7] were developed based on edge-trigger concepts, the saturation period has the chance to be discriminated
as an unsaturated period.
Generally, CT saturation is caused by the decaying dc component in a fault current. When a CT is saturated, the parameters of the decaying dc component will be changed. Hence,
this paper attempts to use the information contained in such a
component to detect CT saturation. To achieve this goal, the decaying dc component is estimated using a phasor-based computation, and the decaying factor in the decaying dc component is
used to define a detection index. When a CT is unsaturated, this
index will be within a small pre-known range. When a CT is
saturated, this index will oscillate within a wide range. Thus, a
level-trigger concept can be developed to detect CT saturation.
When a saturated current is detected, the current samples and
phasors in the latest unsaturated period are used to correct the
saturated current. Although the proposed detection index is designed based on the variation of a decaying factor, ac saturation
can still be detected using the proposed index. The proposed algorithm was tested using the MATLAB/SIMULINK [11] simulator to demonstrate its effectiveness. A DSP Starter Kit (DSK)
for TMS32C6416 [12] was also used to evaluate the real-time
applicability of the proposed algorithm.
II. THE PROPOSED DETECTION ALGORITHM
A. The Saturation Detection Index
containing a
To define a detection index, a fault current
fundamental component and a decaying dc component is described as follows:

0885-8977/$26.00 2010 IEEE

(1)

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where
and
denote the magnitude and phase
and deangle of the fundamental component, respectively.
note the magnitude and time constant of the decaying dc component, respectively. If the fault current is measured by samples
per cycle, the th sample of the fault current can be represented
as follows:
(2)
, the sampling angle
where the sampling time
and the decaying factor
.
In an unsaturated current measurement, the decaying factor
varies within a small range, although the time constant for a decaying dc component varies within a wide range. For example,
and the posif the sampling frequency is 3840 Hz
sible time constant of a decaying dc component varies within
0.1 to 5 cycles, the corresponding decaying factor only varies
within a small range [0.8553, 0.9969]. However, when the current is saturated, the measured will be outside of that small
range. Thus, the value of a decaying factor can be used to
identify whether a CT is saturated or not.
In this paper, the decaying factor was estimated using the
phasor-based computations. To achieve this estimation as fast as
possible, the fractional cycle discrete Fourier transform (DFT)
[13] was used to compute a current phasor. The obtained current
has the following form:
phasor
(3)
denotes the accurate fundamental phasor and
where
denotes the phasor domain decaying dc component. Meanwhile,
denotes that the phasor is obtained just after
the subscript
th sample is
the th sample is measured. When the
measured, the phasor
can be represented as follows:
(4)
To reduce the computational burden, recursive DFT [13] was
. Comparing the phasors
used to update the new phasor
and
obtained by the recursive DFT, the relations
, and
are as follows:
between

(5)
. When the
th sample is meawhere
can also be obtained by the recursive
sured, the phasor
DFT computations. Using the relation (5), the division of two
and
can be
phasor differences
expressed as follows:

(6)

Thus, the magnitude of a decaying factor can be estimated as

follows:
(7)
Then, also using the relation (5), the magnitude of the phasor
domain decaying dc component can be estimated as follows:
(8)
can be used to detect CT satIn most cases, the estimated
uration. However, when the decaying dc component of a fault
current is very small and the CT is unsaturated, the relation between three consecutive current phasors will have the following
relation:
(9)
Substituting relation (9) into (7), the numerator and the denomwill be very small. Thus, if the estimated
is
inator of
directly used to detect CT saturation, numerical stability problems may be met when the decaying dc component is very small.
and are combined to
To increase the numerical stability,
define a detection index (DI) as follows:
(10)
where the constant is a weighting gain whose value depends
on the magnitude of the decaying dc component of a fault curis
rent. If the decaying dc component is large, the constant
set as a small value. While the decaying dc component of a fault
current is very small, the constant can be set as a large value
to prevent the numerical problem. Following these two ideas,
the rule to obtain the constant is designed as follows.

The rule to obtain the constant

IF

ELSE

END
In the rule mentioned above, the ratio
is used to evaluate the magnitude of a decaying dc component. The level value
is set when the de10 is selected to ensure the constant
caying dc component is very small.
To tolerate the measurement noise, the threshold boundary of
the detection index is defined as [0.85,1.05]. Thus, the proposed
CT saturation detection algorithm is described as follows.

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C. Adaptive Tuning of the Threshold Values

The algorithm to detect CT saturation:
IF four consecutive DI are in the boundary [0.85, 1.05]
The CT is not saturated and
ELSE
The CT is saturated and
END
Using the proposed algorithm, CT saturation can be detected.
The following three conditions are used to explain the operations of the proposed detection algorithm.
1) Condition 1: If the decaying dc component of a fault curwill be smaller than 10.
rent is large, the ratio
Under this condition, the constant will be set as 0.005,
and (10) is approximated to (7). Thus, CT saturation can
be detected by judging whether the value of (10) is in the
threshold boundary or not.
2) Condition 2: If the decaying dc component of a fault current is very small and the fault current is unsaturated, the
will be larger than 10. Under this condition,
ratio
the constant will be set as 1, and the weighting current
will dominate the numerator and the denomiphasor
nator of (10). Thus, the value of (10) will approximate to
unity, and an unsaturated period can be detected.
3) Condition 3: If the decaying dc component in a fault current is very small and the fault current is saturated, the magnitude of the current phasor will be decreased due to the
increase in the magnetizing current. The phasor differences
and
) and the magni(
tude of the phasor domain decaying dc component
will be increased due to the saturated waveform distortion.
Under this condition, the ratio
will be smaller than
10 and the constant is set as 0.005. Thus, CT saturation
can be detected by judging whether the value of (10) is in
the threshold boundary or not.
B. The Fault Detection Index
Generally, the CT saturation detection algorithm needs to be
activated by a fault detection algorithm. In this paper, the sudden
change in current phasor magnitude is used to detect a fault.
To achieve this, one adaptive threshold value
is defined as
follows:
(11)
where
and are the mean and standard deviation values of
the current phasor magnitude , respectively. The most recent
phasors were used to obtain
, while the most recent
phasors were used to obtain . Meanwhile, the gain
was
selected. To prevent this detection from being too sensitive, the
minimum value of the standard deviation was limited to
. If three consecutive
are larger than the threshold
, it can then be concluded that a fault is detected.
value
After a fault is detected, the CT saturation detection algorithm
is activated.

Generally, the threshold boundary [0.85,1.05] can be used to

detect CT saturation under various line impedance values. However, for a specific transmission line, the threshold boundary can
be adaptively tuned to improve the detection performance. The
proposed tuning procedures are described as follows.
1) After a fault is detected, the threshold boundary [0.85,1.05]
is used to discriminate the first un-saturated period.
2) After the end of the un-saturated period is detected, all
detection indices obtained in the latest unsaturated period are used to obtain the new threshold boundary as
. The threshold values
and
are
obtained as follows:

(12)
where
and
are the mean and standard deviation
values of all of the detection indices in the latest un-satuwas selected
rated period, respectively. The gain
. To prevent this detection from being
for gaining the
too sensitive, the minimum value of the standard deviation
.
is limited to
is used for
3) Next, the new threshold boundary
CT saturation detections.
III. THE PROPOSED CORRECTION ALGORITHM
Using the proposed detection algorithm, the saturated and
the unsaturated current waveform periods can thus be discriminated. When a CT is unsaturated or before the end of the first
unsaturated period is detected, the measured current samples are
used directly. When the end of an unsaturated period is detected,
the proposed algorithm begins to correct the saturated samples.
When a CT is saturated, the current measurements and the
current phasors in the latest unsaturated period are used to obtain
the current waveform parameters. Assume that the CT saturation
was detected just after the th current sample was measured, and
that there are unsaturated current phasors obtained in the latest
unsaturated period
. Using the
unsaturated phasors, three summation variables
, and
are defined as follows:
(13)

(14)

(15)
Using the three summation variables and the relation of (7), the
averaged decaying factor in the latest unsaturated period can
be obtained as follows:
(16)

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1343

Fig. 2. Single-line-diagram of a sample power system.

Fig. 1. Flowchart of the proposed CT saturation detection/correction algorithm.

Then, applying the concepts of (3)(5), the accurate fundamental phasor can be obtained as follows:

Fig. 3. CT magnetizing curve with the saturation point (9.52 A, 0.48 Vs).

TABLE I
PARAMETERS OF THE SIMULATION SYSTEM

(17)
Considering the time domain waveform,
can be obtained
using the averaged computations as follows:
(18)
Finally, the corrected current sample
follows:

can be obtained as

(19)
The proposed CT saturation detection/correction algorithm is
described using a flowchart shown in Fig. 1. At first, the proposed algorithm is in the no fault stage where the fault detection algorithm proceeds. After a fault is detected, the proposed
algorithm comes into the unsaturated stage and the CT saturation detection algorithm is activated. After the end of an unsaturated period is detected, the proposed algorithm comes into
the saturated stage. In the saturated stage, the current measurements and current phasors in the latest unsaturated period are
used to correct the saturated current measurements. The corrections continue until the beginning of a new unsaturated period
is detected. Then, the proposed algorithm goes back to the unsaturated stage and the CT saturation detection will continue.
The loop between the unsaturated and the saturated stages can
be stopped by a relay when a relay has received enough fault
measurements.
IV. SIMULATION EVALUATIONS
In this section, the proposed algorithm was evaluated by a
simple power system shown in Fig. 2. The parameters of this

system and the CT model are listed in Table I. The CT model

described in [14] was used to model the CT. The magnetizing
curve of the CT is shown in Fig. 3, which was generated by the
ATP [15] with the saturation point of (9.52 A, 0.48 Vs). The test
power system was simulated using the MATLAB/SIMULINK
simulator. Fault currents were measured at Bus S and pre-filtered using second order Butterworth low-pass filters with 360
Hz cut-off frequency. The filtered analog measurements were
then sampled by 3840 Hz (64 samples per cycle). The fractional
cycle DFT was used to obtain the phasors for all the simulations.
The window length of the fractional cycle DFT is eight samples
(1/8 cycle).
In the following simulations, the error index (EI) [10] is used
to evaluate the accuracy of the rms value. The rms value of a
current signal is defined as follows:
(20)
(the sample number per cycle). The error index
where
(EI) is defined as follows:
%

(21)

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where
denotes the rms current on the CT primary
denotes the rms current on the CT secondary side,
side,
denotes the turns ratio of a CT.
and
A. Demonstrations of the Proposed Algorithm Using Case
Studies
In the following tests, the proposed algorithm was evaluated
using some specific cases, such as severe saturation, mild saturation, high remanence, and ac saturation cases.
Case 1: Severe Saturation Case: In this case, a three phase
shorted fault was used to demonstrate the performances of the
proposed algorithm under a severe saturation condition. The
fault occurred at 0.05 s, at a 0.3 per-unit distance away from
BUS S, and with a 0.1 fault resistance. Fig. 4(a) depicts the
current waveforms, in which the corrected, saturated, and ideal
currents are compared. All currents are referred to the CT primary side. The ideal current denotes the current which ignores
the CT measurement effects. The proposed detection index is
presented in Fig. 4(b). The fault and CT saturation detection
results are shown in Fig. 4(c). Using the EI index to evaluate
accuracy, the EI index is significantly reduced from 48.8% (saturated current) to 1.71% (corrected current).
Fig. 4(b) shows that the detection index performs a transient
high value just after occurring a fault (0.05 s) to cause a momen. This is caused by the
tary saturation detection result of
mixed-data windowing effect of a DFT computation [13]. Since
the proposed correction algorithm begins to correct the saturated
current after the end of the first unsaturated period has been detected, this windowing effect will not affect the performance of
the proposed algorithm.
Fig. 4 also shows that the windowing effect delays the
proposed detection index entering the threshold boundary
at the end of each saturated period. However, the
proposed detection index can detect the beginning of a saturated
period very fast. Indeed, the main purpose of a saturation detection algorithm is to identify the unsaturated current samples
for waveform corrections. Thus, the accuracy of identifying an
unsaturated current sample is more important than the accuracy
of identifying a saturated current sample. Although a time delay
is inevitable for the proposed phasor-based algorithm to detect
the end of a saturated period, the proposed detection algorithm
can ensure the accuracy of the identified unsaturated current
samples. Thus, the identified unsaturated current samples can
be used to accurately correct the saturated current.
Case 2: Mild Saturation Case: In this case, an A-phase
grounded fault was used to demonstrate the performances of
the proposed algorithm under a mild saturation condition. The
fault occurred at 0.05 s, at a 0.7 per-unit distance away from
fault resistance. Fig. 5(a) shows the
BUS S, and with a 2
corrected, saturated and ideal A-phase current waveforms.
Notably, the CT is not saturated in the first fault cycle, and
the saturation is very mild in the second fault cycle. The corrected, saturated, and ideal current waveforms are shown in
Fig. 5(a), respectively. The obtained detection index is shown
in Fig. 5(b), while the saturation detection result is shown in
Fig. 5(c). Although the saturation is very mild, the proposed
algorithm can still be used to correct the saturated current. It
can be noted that the corrected and the ideal current waveforms

Fig. 4. Simulation results for a severe saturation case. (a) A-phase current
waveforms. (b) Proposed detection index. (c) Saturation and fault detection
results.

Fig. 5. Simulation results for a mild saturation case. (a) A-phase current waveforms. (b) Proposed detection index. (c) Saturation and fault detection results.

are almost overlapping because the corrected current is very

accurate. Using the EI index to evaluate accuracy, the EI index
is reduced from 2.18% (saturated current) to 0.61% (corrected
current). Thus, the proposed algorithm can work properly in a
mild saturation case.
Case 3: Various Remanence Case: The remanence in a CT
core may be large after the auto-reclosure operation for a permanent fault. The presence of larger remanence may make the

YU: DETECTION AND CORRECTION OF SATURATED CT MEASUREMENTS

Fig. 6. Simulation results of case 3. (a) Flux waveforms of various remanences.

(b) A-phase current waveforms under various remanences.

CT becoming saturated easily. In this case, the same A-phase

grounded fault used in case 2 was assumed to be already tripped,
and the fault was reclosed at 0.05 s. For ease of simulations, various remanences (25% (0.12 Vs) and 50% (0.24 Vs)) were directly set at the beginning of each simulation and the proposed
algorithm was activated as soon as the circuit was reclosed.
Fig. 6(a) shows the fluxes under various remanence conditions.
Fig. 6(b) shows the saturated and corrected current waveforms
under various remanence conditions. Meanwhile, the ideal current waveform is also compared in Fig. 6(b). Using the proposed
algorithm, the EI indices for the 25% and 50% remanence conditions are reduced from 24.9%% and 28.7% to 1.95% and 3.53%,
respectively. Thus, the proposed algorithm can work properly
when various remanences exist.
Case 4: Very Large Remanence Case: In this case, the same
reclosure condition of case 3 was used, and 96% remanence
(0.46 Vs) was directly set at the beginning of the simulation and
the proposed algorithm was activated as soon as the circuit was
reclosed. The simulation results are shown in Fig. 7. Fig. 7(a)
shows that the first unsaturated period is very short because the
remanence is very large. In Fig. 7(b), the obtained DI did not satisfy the unsaturated condition until the second fault cycle. After
the end of the first detected unsaturated period, the proposed algorithm begins to correct the saturated current. Since the current
distortions have been accurately corrected, the corrected and the
ideal current waveforms are almost overlapping. Using the EI
index to analyze the results after the second fault cycle, the EI
is reduced from 20.3% (saturated current) to 0.69% (corrected
current). Thus, the proposed algorithm can work properly under
a very large remanence condition.
Case 5: AC Saturation Case: If a fault current does not
contain a decaying dc component or a CT does not contain a
large remanence, a CT will not easily become saturated, unless
the fault current is very large [1] or a CT has a large burden.
This phenomenon is called ac saturation of a CT. In this case,
an A-phase grounded fault occurring at a 0.1 per-unit distance
away from BUS S with a 0.1 fault resistance is tested. To

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Fig. 7. Simulation results of case 4. (a) A-phase current waveforms. (b) Proposed detection index.

Fig. 8. Simulation results of case 5. (a) A-phase current waveforms. (b) Proposed detection index. (c) Saturation and fault detection results.

perform ac saturation condition, the CT burden is increased

from 0.7 to 4.5 and the fault inception time is changed
from 0.05 s to 0.0535 s. This fault inception time can cause
that the A-phase fault current does not contain a decaying dc
component. Meanwhile, such a large CT burden can make a
CT becoming saturated easily.
The simulation results are shown in Fig. 8. As can be seen
in Fig. 8(a), the first unsaturated period is too short to be detected. In Fig. 8(b), the obtained DI did not satisfy the unsaturated condition until the second fault cycle. After the end of
the first detected unsaturated period, the proposed algorithm begins to correct the saturated current. Notably, the corrected and
the ideal current waveforms are almost overlapping because the
corrected current is very accurate. Using the EI index to analyze the results after the first fault cycle, the EI is reduced from

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TABLE II
PERCENTILE ANALYSES OF THE EI INDEX FOR STATISTICAL EVALUATIONS

13.9% (saturated current) to 0.12% (corrected current). Obviously, although the proposed detection index is designed based
on the variations of a decaying factor, ac saturation can still be
detected using the proposed index.
B. Statistical Evaluations
To analyze and demonstrate the performance of the proposed
algorithm under normal fault conditions in detail, different fault
types, inception angles (0-degree to 270-degree), fault locations
(0.1 to 0.5 p.u. location from Bus S), short-circuit capacities
(1500 to 3000 MVA), fault resistances (0.1 to 4 ), phase angles
and
(10-degree to 20-degree), CT
between the voltages
burden impedance (0.7 to 1 ), and CT burden power factor (0.5
to unity) were considered to generate over 5800 cases. In all
the simulation cases, the CT saturation occurred in about 3900
cases.
The EI index was used to analyze the A-phase current waveforms of all cases, and the percentile method [10], [16] was used
to analyze the percentage distribution of all the computed EI results. Table II shows the analysis results of the saturated and
corrected currents. The maximum EI of the saturated currents is
60.6% which occurred in a severe three-phase shorted fault case.
Using the proposed algorithm, the maximum EI of the corrected
currents is therefore reduced to 7.77%, which also occurred in
a severe three-phase shorted fault case. The averaged EI for all
cases is 0.72%. In considering the corrected current results in
detail,90% of the EI are smaller than 2.05%. Thus, the proposed
algorithm can support accurate correction currents under various fault conditions and CT conditions.
C. Evaluation With Considering Low Order Harmonic
Current Sources
Here, harmonic current sources (4% at the second and 4%
at the third harmonics) were injected from the position of the
to evaluate the performance of the proposed algovoltage
rithm under an active low-order harmonic environment with cur% which exceeds the current harmonic limirent
tation recommended in [17]. For ease of comparison, the same
three-phase shorted fault used in case 1 is also tested in this case.
The simulation results are shown in Fig. 9. As can be seen, in
the pre-fault and the unsaturated periods, the computed detection index contains an oscillation which is caused by the injected
harmonics. Notably, the oscillation is larger in a pre-fault period
as the fault current with a larger fundamental component can

Fig. 9. Simulation results with considering harmonic sources. (a) A-phase current waveforms. (b) Proposed detection index. (c) Saturation detection results.

TABLE III
EI INDEX ANALYSES FOR THE HARMONIC CURRENTS
WITH DIFFERENT MAGNITUDES

reduce the effect of the injected harmonics. Using the proposed

algorithm, CT saturation detections are almost not affected by
the injected harmonics. However, the injected harmonics may
affect the accuracy of the corrected waveform. This is because
the proposed CT saturation detection algorithm does not need
very accurate phasor computations but the waveform correction
does. When using the EI index to evaluate the accuracy, the EI
index is reduced from 49.4% (saturated current) to 5.61% (corrected current). Compared with the results of case 1, the accuracy of the corrected current is moderately affected by the injected harmonic currents with 5.66% current THD.
To evaluate the performance of the proposed algorithm under
different harmonic magnitudes, all the magnitudes of the injected harmonic currents were reduced from 4% to 3%, 2%,
and 1%. The EI indices of the corrected currents are all listed
in Table III. Notably, the EI index decreases when the magnitudes of the injected harmonics decrease. Thus, if the magnitudes of the injected current harmonics satisfy the limitations
recommended in [17], the proposed algorithm is only slightly
affected by the injected harmonics.
D. Realization of the Proposed Algorithm on a DSP
In this subsection, the proposed algorithm was implemented
on a 1-GHz TMS320C6416T DSP Starter Kit (DSK) [12] to
verify whether the proposed algorithm could satisfy the real
time requirement.

YU: DETECTION AND CORRECTION OF SATURATED CT MEASUREMENTS

C language was used to develop the DSP program which includes the fractional cycle recursive DFT subroutine, the fault
detection subroutine, the saturation detection subroutine, and
the saturation correction subroutine. The transformation of a
phasor from a rectangle form to a polar form and the division
computation of phasors were accomplished using the CORDIC
algorithm [18]. To accelerate the program speed, the DSP program was programmed using the Q16 fixed-point arithmetic.
. Code
Thus, the precision for a number can be achieved as
Composer Studio (CCS) v3.1 [19] was used to develop the program, by which we can debug the program and analyze the program performances.
The performance of the DSP program was evaluated using the
profile analysis tool in CCS to indicate the memory usage and
the execution time. The total memory required for all DSP programs was less than 11 kbytes. The execution time per sample
under the unsaturated and saturated periods is different. The
maximum execution time per sample is almost 4200 DSP cycles which occurred at a saturated period. Since the DSP on the
DSK board operated at 1 GHz, the maximum execution time per
sample was less than 4.2 s, which is significantly smaller than
s).
the fault measurements sample period (
Thus, the proposed algorithm has the potential to be applied for
practical applications.
V. CONCLUSION
In this paper, a new algorithm was proposed to detect and correct the saturated CT measurements using the information contained in a decaying dc component. A great number of computer
simulations have been performed on the MATLAB/SIMULINK
simulator to demonstrate the performance of the proposed algorithm under various fault and system conditions. The results of
the performance studies indicate that the proposed algorithm has
the following features.
1) The threshold values of the proposed detection index are
pre-known. Thus, a level detection can be designed to detect CT saturation.
2) Even in a mild saturation case, smooth waveform distortion
can still be detected by the proposed algorithm.
3) In the case of large remanence, the proposed algorithm can
work properly.
4) Although the proposed detection algorithm is designed
based on the variations of a decaying factor, ac saturation
can still be detected using the proposed detection algorithm.
5) The proposed algorithm is effective under various fault and
system conditions.
6) The proposed algorithm has been realized on a DSP to
verify the real-time applicability.

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Chi-Shan Yu (M02) received the B.S. and M.S.
degrees in electrical engineering from National
Tsing Hua University, Taipei, Taiwan, R.O.C., in
1988 and 1990, respectively, and the Ph.D. degree
in electrical engineering from National Taiwan
University in 2001.
From 2001 to 2006, he was with the National Defense University. Currently, he is an Associate Professor of Electrical Engineering with the Department
of Electrical Engineering, National Taipei University
of Technology, Taipei. His research areas are computer relay and digital signal processing.