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SOIC8
W SUFFIX
CASE 751BD
TSSOP8
Y SUFFIX
CASE 948AL
Features
SOIC8
X SUFFIX
CASE 751BE
TDFN8**
ZD2 SUFFIX
CASE 511AM
UDFN8
HU4 SUFFIX
CASE 517AZ
PDIP8
L SUFFIX
CASE 646AA
MSOP8
Z SUFFIX
CASE 846AD
PIN CONFIGURATION
A0
VCC
A1
WP
A2
SCL
VSS
SDA
VCC
PIN FUNCTION
Pin Name
CAT24C256
A2, A1, A0
SDA
A0, A1, A2
WP
VSS
Function
Device Address
SDA
Serial Data
SCL
Serial Clock
WP
Write Protect
VCC
Power Supply
VSS
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
CAT24C256
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Storage Temperature
65 to +150
0.5 to +6.5
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
Symbol
NEND (Notes 3, 4)
TDR
Endurance
Min
Units
1,000,000
Program/Erase Cycles
100
Years
Data Retention
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Page Mode, VCC = 5 V, 25C.
4. The new product revision (E) uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when
a single byte has to be written, 4 bytes (including the ECC bits) are reprogrammed. It is recommended to write by multiple of 4 bytes in order
to benefit from the maximum number of write cycles.
(VCC = 2.5 V to 5.5 V, TA = 40C to +125C, and VCC = 1.8 V to 5.5 V, TA = 40C to +85C, unless otherwise specified.)
Symbol
Max
Units
ICCR
Read Current
mA
ICC
Write Current
mA
ISB
Standby Current
TA = 40C to +85C
mA
TA = 40C to +125C
TA = 40C to +85C
IL
Parameter
Test Conditions
Min
TA = 40C to +125C
mA
VIL
0.5
VCC x 0.3
VIH
VCC x 0.7
VCC + 0.5
VOL1
0.4
VOL2
0.2
(VCC = 2.5 V to 5.5 V, TA = 40C to +125C, and VCC = 1.8 V to 5.5 V, TA = 40C to +85C, unless otherwise specified.)
Symbol
Parameter
Conditions
Max
Units
CIN (Note 5)
VIN = 0 V
pF
CIN (Note 5)
VIN = 0 V
pF
IWP (Note 6)
WP Input Current
130
mA
120
80
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
6. When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively strong;
therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power, as
the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pulldown reverts to a weak current source. The
variable WP input impedance is available only for Die Rev. C and higher.
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CAT24C256
Table 5. D.C. OPERATING CHARACTERISTICS New Product (Rev E) (Note 7)
(VCC = 1.8 V to 5.5 V, TA = 40C to +85C and VCC = 2.5 V to 5.5 V, TA = 40C to +125C, unless otherwise specified.)
Symbol
Parameter
ICCR
Read Current
ICCW
Write Current
ISB
IL
Standby Current
Test Conditions
Min
Max
Units
mA
mA
TA = 40C to +85C
mA
TA = 40C to +125C
TA = 40C to +85C
TA = 40C to +125C
mA
VIL1
0.5
0.3 VCC
VIL2
0.5
0.25 VCC
VIH1
0.7 VCC
VCC + 0.5
0.75 VCC
VIH2
VCC + 0.5
VOL1
0.4
VOL2
0.2
Parameter
Conditions
Max
Units
CIN (Note 8)
VIN = 0 V
pF
CIN (Note 8)
VIN = 0 V
pF
75
mA
50
25
IWP, IA (Note 9)
7. The new product Rev E is identified by letter E or a dedicated marking code on top of the package.
8. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
9. When not driven, the WP, A0, A1, A2 pins are pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively
strong; therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power,
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pulldown reverts to a weak current source.
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CAT24C256
Table 7. A.C. CHARACTERISTICS Mature Product (Rev D) (Notes 10, 11)
(VCC = 2.5 V to 5.5 V, TA = 40C to +125C, and VCC = 1.8 V to 5.5 V, TA = 40C to +85C, unless otherwise specified.)
Standard
Parameter
Symbol
FSCL
tHD:STA
Min
Fast
Max
Clock Frequency
Min
100
FastPlus
VCC = 2.5 V 5.5 V
TA = 405C to +855C
Max
Min
400
Max
Units
1,000
kHz
0.6
0.25
ms
tLOW
4.7
1.3
0.55
ms
tHIGH
0.6
0.25
ms
4.7
0.6
0.25
ms
tSU:STA
tHD:DAT
ms
tSU:DAT
250
100
50
ns
tR (Note 12)
1,000
300
100
ns
tF (Note 12)
300
300
100
ns
tSU:STO
tBUF
tAA
tDH
Ti (Note 12)
0.6
0.25
ms
4.7
1.3
0.5
ms
3.5
100
0.9
100
100
0.50
50
100
ms
ns
100
ns
tSU:WP
WP Setup Time
ms
tHD:WP
WP Hold Time
2.5
2.5
ms
tWR
tPU
(Notes 12, 13)
0.1
ms
ms
10. The product Rev D is identified by letter D or a dedicated marking code on top of the package.
11. Test conditions according to A.C. Test Conditions table.
12. Tested initially and after a design or process change that affects this parameter.
13. tPU is the delay between the time VCC is stable and the device is ready to accept commands.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
50 ns
0.5 x VCC
Output Load
Current Source: IL = 3 mA (VCC 2.5 V); IL = 1 mA (VCC < 2.5 V); CL = 100 pF
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CAT24C256
Table 9. A.C. CHARACTERISTICS New Product (Rev E) (Notes 14, 15)
(VCC = 1.8 V to 5.5 V, TA = 40C to +85C and VCC = 2.5 V to 5.5 V, TA = 40C to +125C, unless otherwise specified.)
Standard
VCC = 1.8 V 5.5 V
Symbol
FSCL
tHD:STA
Parameter
Min
Max
Clock Frequency
START Condition Hold Time
Fast
VCC = 1.8 V 5.5 V
Min
100
Max
FastPlus
VCC = 2.5 V 5.5 V
TA = 405C to +855C
Min
400
Max
Units
1,000
kHz
0.6
0.25
ms
tLOW
4.7
1.3
0.45
ms
tHIGH
0.6
0.40
ms
4.7
0.6
0.25
ms
tSU:STA
tHD:DAT
ms
tSU:DAT
250
100
50
ns
tR (Note 16)
1,000
300
100
ns
tF (Note 16)
300
300
100
ns
tSU:STO
tBUF
tAA
tDH
Ti (Note 16)
0.6
0.25
ms
4.7
1.3
0.5
ms
3.5
50
0.9
50
50
0.40
50
50
ms
ns
50
ns
tSU:WP
WP Setup Time
ms
tHD:WP
WP Hold Time
2.5
2.5
ms
tWR
tPU
(Notes 16, 17)
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5
0.1
ms
ms
CAT24C256
Power-On Reset (POR)
The CAT24C256 Die Rev. C incorporates PowerOn
Reset (POR) circuitry which protects the internal logic
against powering up in the wrong state.
The device will power up into Standby mode after VCC
exceeds the POR trigger level and will power down into
Reset mode when VCC drops below the POR trigger level.
This bidirectional POR behavior protects the device
against brownout failure, following a temporary loss of
power.
Pin Description
SCL: The Serial Clock input pin accepts the Serial Clock
signal generated by the Master.
SDA: The Serial Data I/O pin receives input data and
transmits data stored in EEPROM. In transmit mode, this pin
is open drain. Data is acquired on the positive edge, and is
delivered on the negative edge of SCL.
A0, A1 and A2: The Address pins accept the device address.
These pins have onchip pulldown resistors.
WP: The Write Protect input pin inhibits all write
operations, when pulled HIGH. This pin has an onchip
pulldown resistor.
STOP
Functional Description
The CAT24C256 supports the InterIntegrated Circuit
(I2C) Bus data transmission protocol, which defines a device
that sends data to the bus as a transmitter and a device
receiving data as a receiver. Data flow is controlled by a
Master device, which generates the serial clock and all
START and STOP conditions. The CAT24C256 acts as a
Slave device. Master and Slave alternate as either
transmitter or receiver. Up to 8 devices may be connected to
the bus as determined by the device address inputs A0, A1,
and A2.
Acknowledge
The I2C bus consists of two wires, SCL and SDA. The
two wires are connected to the VCC supply via pullup
resistors. Master and Slave devices connect to the 2wire
bus via their respective SCL and SDA pins. The transmitting
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CAT24C256
SCL
SDA
START
CONDITION
STOP
CONDITION
A2
A1
A0
R/W
DEVICE ADDRESS
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
tHIGH
tF
tLOW
tR
tLOW
SCL
tSU:STA
tHD:DAT
tHD:STA
tSU:DAT
tSU:STO
SDA IN
tAA
tDH
SDA OUT
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tBUF
CAT24C256
WRITE OPERATIONS
Byte Write
Acknowledge Polling
Page Write
Delivery State
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CAT24C256
S
T
BUS ACTIVITY: A
MASTER R
T
SLAVE
ADDRESS
BYTE ADDRESS
A7 A0
A15 A8
SDA LINE S
S
T
O
P
DATA
*
A
C
K
A
C
K
A
C
K
A
C
K
SCL
SDA
8th Bit
Byte n
ACK
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
S
BUS
T
ACTIVITY: A
MASTER R
T
BYTE ADDRESS
A15 A8
A7 A0
SLAVE
ADDRESS
SDA LINE S
DATA
DATA n
S
T
O
P
DATA n+63
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
ADDRESS
BYTE
DATA
BYTE
a7
a0
d7
d0
SCL
SDA
tSU:WP
WP
tHD:WP
Figure 9. WP Timing
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A
C
K
A
C
K
CAT24C256
READ OPERATIONS
Sequential Read
Selective Read
S
T
O
P
SLAVE
ADDRESS
SDA LINE S
P
A
C
K
SCL
SDA
N
O
A
C
K
DATA
8th Bit
DATA OUT
NO ACK
STOP
S
T
A
R
T
BYTE ADDRESS
A15 A8
A7 A0
SLAVE
ADDRESS
SDA LINE S
S
T
O
P
DATA
*
A
C
K
SLAVE
ADDRESS
A
C
K
A
C
K
N
O
A
C
K
A
C
K
SLAVE
ADDRESS
DATA n
DATA n+1
S
T
O
P
DATA n+x
DATA n+2
SDA LINE
A
C
K
A
C
K
A
C
K
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A
C
K
N
O
A
C
K
CAT24C256
PACKAGE DIMENSIONS
PDIP8, 300 mils
CASE 646AA01
ISSUE A
SYMBOL
MIN
NOM
E1
5.33
A1
0.38
A2
2.92
3.30
4.95
0.36
0.46
0.56
b2
1.14
1.52
1.78
0.20
0.25
0.36
9.02
9.27
10.16
7.62
7.87
8.25
E1
6.10
6.35
7.11
e
PIN # 1
IDENTIFICATION
MAX
2.54 BSC
eB
7.87
2.92
10.92
3.30
3.80
TOP VIEW
E
A2
A1
c
b2
L
eB
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
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CAT24C256
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD01
ISSUE O
E1
SYMBOL
MIN
1.35
1.75
A1
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
5.80
6.20
E1
3.80
MAX
4.00
1.27 BSC
PIN # 1
IDENTIFICATION
NOM
0.25
0.50
0.40
1.27
TOP VIEW
A1
c
e
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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CAT24C256
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL01
ISSUE O
SYMBOL
MIN
NOM
1.20
E1
MAX
A1
0.05
A2
0.80
0.19
0.15
0.90
1.05
0.30
0.09
2.90
3.00
3.10
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.20
0.65 BSC
e
L
1.00 REF
L1
0.50
0.60
0.75
TOP VIEW
D
A2
q1
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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CAT24C256
PACKAGE DIMENSIONS
TDFN8, 3x4.9
CASE 511AM01
ISSUE A
D
DETAIL A
DAP SIZE
2.6 x 3.3mm
E2
PIN #1
IDENTIFICATION
A1
PIN #1 IDENTIFICATION
D2
TOP VIEW
SIDE VIEW
SYMBOL
MIN
NOM
MAX
0.70
0.75
0.80
A1
0.00
0.02
0.05
A2
0.45
0.55
0.65
A3
A2
A1
0.25
0.30
0.35
2.90
3.00
3.10
D2
0.90
1.00
1.10
4.80
4.90
5.00
E2
0.90
1.00
1.10
0.65 TYP
0.50
0.60
A3
FRONT VIEW
0.20 REF
BOTTOM VIEW
0.70
DETAIL A
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MO-229.
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CAT24C256
PACKAGE DIMENSIONS
SOIC8, 208 mils
CASE 751BE01
ISSUE O
SYMBOL
MIN
NOM
2.03
E1 E
MAX
A1
0.05
0.25
0.36
0.48
0.19
0.25
5.13
5.33
7.75
8.26
E1
5.13
5.38
1.27 BSC
e
L
0.51
0.76
PIN#1 IDENTIFICATION
TOP VIEW
A1
SIDE VIEW
c
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with EIAJ EDR-7320.
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CAT24C256
PACKAGE DIMENSIONS
UDFN8, 2x3 EXTENDED PAD
CASE 517AZ01
ISSUE O
D
e
L
PIN #1
IDENTIFICATION
A1
PIN #1 INDEX AREA
D2
TOP VIEW
SIDE VIEW
SYMBOL
MIN
NOM
MAX
0.45
0.50
0.55
A1
0.00
0.02
0.05
A3
0.127 REF
0.20
0.25
0.30
1.95
2.00
2.05
D2
1.35
1.40
1.45
2.95
3.00
3.05
E2
1.25
1.30
1.35
e
L
BOTTOM VIEW
DETAIL A
0.065 REF
A3 A
FRONT VIEW
0.50 REF
0.25
0.30
0.35
A3
Notes:
(1) All dimensions are in millimeters.
(2) Refer JEDEC MO-236/MO-252.
0.0 - 0.05
DETAIL A
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0.065 REF
Copper Exposed
CAT24C256
PACKAGE DIMENSIONS
MSOP 8, 3x3
CASE 846AD01
ISSUE O
SYMBOL
MIN
NOM
MAX
1.10
A1
0.05
0.10
0.15
A2
0.75
0.85
0.95
0.22
0.38
0.13
2.90
3.00
3.10
4.80
4.90
5.00
E1
2.90
3.00
3.10
E1
0.23
e
L
0.65 BSC
0.40
0.60
L1
L2
0.80
0.95 REF
0.25 BSC
TOP VIEW
A2
A1
DETAIL A
SIDE VIEW
END VIEW
q
L2
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
L
L1
DETAIL A
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CAT24C256
EXAMPLE OF ORDERING INFORMATION (Notes 1822)
Device
Marking*
Package
Type
CAT24C256LIG
24256E
CAT24C256LEG
Temperature Range
Lead Finish
Shipping
PDIP8
I = Industrial
(40C to +85C)
NiPdAu
24256E
PDIP8
E = Extended
(40C to +125C)
NiPdAu
CAT24C256WIGT3
24256E
SOIC8, JEDEC
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256WEGT3
24256E
SOIC8, JEDEC
E = Extended
(40C to +125C)
NiPdAu
CAT24C256WIG
24256E
SOIC8, JEDEC
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256XIT2
24256E
SOIC8, EIAJ
I = Industrial
(40C to +85C)
MatteTin
CAT24C256XET2
24256E
SOIC8, EIAJ
E = Extended
(40C to +125C)
MatteTin
CAT24C256YIGT3
C56E
TSSOP8
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256YEGT3
C56E
TSSOP8
E = Extended
(40C to +125C)
NiPdAu
CAT24C256YIG
C56E
TSSOP8
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256ZD2IGT2
(Note 23, 24)
CCHN
TDFN8
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256HU4IGT3
(Note 24)
C8U
UDFN8
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256HU4EGT3
(Note 24)
C8U
UDFN8
E = Extended
(40C to +125C)
NiPdAu
CAT24C256ZIGT3
C8
MSOP8
I = Industrial
(40C to +85C)
NiPdAu
CAT24C256ZEGT3
C8
MSOP8
E = Extended
(40C to +125C)
NiPdAu
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CAT24C256/D