Digital Design

Lecture 7

FUNCTIONS OF COMBINATIONAL LOGIC

(ENCODER & DECODER, MUX & DEMUX)
Dr. PO Kimtho
Department of Computer Sciences
Norton University (NU)

Topic Outlines

Encoder
Decoder
Multiplexers (MUX)
Demultiplexers (DEMUX)

Topic Outlines

Encoder
Decoder
Multiplexers (MUX)
Demultiplexers (DEMUX)

Encoder
Encoder converts information such as decimal
number, alphabetical character, or symbols into
some coded form, such as BCD or binary
Encoder is usually used for:
Data representation
Data security

Encoder
Question 1:
Design a Decimal to BCD Encoder

Hints:

(a) Draw a Truth-Table showing input and output

- How many inputs?
: 10 (0 to 9)
- How many outputs?
: 4 because we need 4 bits to express 9 (1001)
(b) From the Truth-Table, get the equation for each
output
- How many Boolean expression?
: 4 since there are 4 outputs
(c) Based on the output equation, draw a circuit for
basic decimal-to-BCD encoder

Encoder
Draw a Truth-Table showing input and output
DECIMAL
DIGIT

BCD CODE
A3

A2

A1

A0

Encoder
(a)

(b) From the Truth-Table, get the

equation for each output:
A3=
A2=
A1=
A0=

m(8,
m(4,
m(2,
m(1,

9)
5, 6, 7)
3, 6, 7)
3, 5, 7, 9)

(c) Based on the output

equation, draw a circuit for
basic decimal-to-BCD encoder
(a) Logic symbol for a 10-line-to 4
line encoder
(b) Logic diagram. A 0-digit input is
not needed because the BCD
outputs are all low when there
are no HIGH inputs

(b)

Decoder
A decoder is a circuit that creates an output
based on the binary states of a given input
Do the opposite of encoder

Decoder block diagram

Decoder
Basic Binary Decoder
Example:
To determine when a binary 1001 occurs on the input of a
digital circuit, AND gate can be used as the basic decoding
element.
AND gate -> produce HIGH output when all inputs are HIGH
How to ensure that inputs to the AND gate are HIGH when
binary 1001 occurs?

Other than this input

combinations, the
output is 0

Decoding logic for the binary code 1001 with an active-HIGH output.

Decoder
Question 2:
(a) Determine the logic required to decode the binary
11100 by producing a high level (active-HIGH) on
the output.

A4
A3
A2

Active-HIGH produce HIGH output

A1

Decoding function,

A0

Decodingfu nction , X A4 A3 A2 A1 A0

Decoder
4-bit Decoder
This type of decoder is called 4-line-to-16-line
decoder or 1-of-16 decoder
For a 4-bit decoder, there are 16 possible
combinations (24=16). This means that 16
decoding gates are required

Decoder
3 to 8
Binary
Decoder

Question: Is this active-HIGH or active-LOW output?

Decoder
Seven Segment Decoder

A seven segment decoder has

4-bit BCD input and the seven
segment display code as its
output:
In minimizing the circuits for
the segment outputs all nondecimal input combinations
(1010, 1011, 1100,1101, 1110,
1111) are taken as dont-cares

-- dont care inputs --

Example:

DC
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1

B A
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1

a
1
0
1
1
0
1
0
1
1
1
0
0
0
1
0
0

b
1
1
1
1
1
0
0
1
1
1
0
0
1
0
0
0

c
1
1
0
1
1
1
1
1
1
1
0
1
0
0
0
0

d e f
1 1 1
0 0 0
1 1 0
1 0 0
0 0 1
1 0 1
1 1 1
0 0 0
1 1 1
0 0 1
1 1 0
1 0 0
0 0 1
1 0 1
1 1 1
0 0 0

g
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
0

Multiplexers (MUX)
MUX is a device that allows
digital information from
several sources to be routed
onto a single line for
transmission
It is made up of several datainput lines and a single output
line. It also has data-select
inputs which permits digital
data on any one of the inputs
to be switched to the output
line.
MUX is also known as data
selectors

n select
inputs
1 data
output

2n data
inputs

Logic symbol for a 4-input

multiplexer (4:1 MUX)

Multiplexers (MUX)
2:1 MUX

Logic circuit

Truth-table

Multiplexers (MUX)
4:1 MUX
DATA-SELECT
INPUTS

2 data-select lines means that

any one of the 4 data-input lines
can be selected

D0
D1
D2

D0
D1

D3

D3 S
1

4-to-1 Z
D2 MUX

S0

INPUT
SELECTED

S0

S1

D0

D1

D2

D3

S1 S0
If a binary 0 (S0=0 and S1=0) is applied to the data-select lines,
the data on input D0 appear on the data-output line

Multiplexers (MUX)
4:1 MUX

Logic diagram
for 4:1 MUX

Total expression for the data output is:

Y D0 S1 S 0 D1 S1 S 0 D2 S1 S 0 D3 S1 S 0

Multiplexers (MUX)
Question 3:
Construct an 8:1 multiplexer using block diagram.

8 input lines means there must be 3 data select lines.

Demultiplexers (DEMUX)
DEMUX reverse the multiplexing functions
It takes digital information from one line and distributes it
to a given number of output lines
DEMUX is also known as data distributor
1 data
input

2n data
outputs

n select
inputs

1-line to 4-line DEMUX

Demultiplexers (DEMUX)
1:4 DEMUX

Demultiplexers (DEMUX)
Question 4:
Construct a 1:4 DEMUX using block diagram. Show the
equivalent Truth-Table.

I0

1 -4
DEMUX

Q0
Q1
Q2
Q3

S 1 S 0 Block diagram
S1
S0

I0
Q0

Truth-table

S1 S0

I1 Q3 Q2 Q1 Q0

Q1
Q2
Q3

Logic circuit