Digital Design

Lecture 8

FUNCTIONS OF COMBINATIONAL LOGIC

(DECODER & MUX EXPANSION)
Dr. PO Kimtho
Department of Computer Sciences
Norton University (NU)

Topic Outlines

Encoder
Decoder
Multiplexers (MUX)
Demultiplexers (DEMUX)

Topic Outlines

Encoder
Decoder
Multiplexers (MUX)
Demultiplexers (DEMUX)

Decoders Expansion
When a certain decoder size is needed, but only smaller
number of sizes is available.
Combine 2 or more decoders in a hierarchy, i.e. cascade the
smaller decoders to form a larger decoder size.

Decoder Expansion
Example:

A 3-to-8 Decoder Constructed with Two 2-to-4 Decoders

Decoder Expansion
The Operation
The MSB input, A2, functions:
As enable, EN, of one decoder
As its complement, EN to the other decoder

When A2=0,

Top decoder enabled Generates minterms D0 to D3.

Lower decoder disabled Outputs equal to 0.

When A2=1,

Top decoder disabled Outputs equal to 0.

Lower decoder enabled Generates minterms D4 to D7.

Decoder Expansion
The function of EN input
Very useful and convenient way to interconnect 2 or
more functional blocks
For the purpose of expanding digital functions into:

Similar functions with more inputs

outputs.

and

Decoder Expansion
Example:
Implementing a Binary Adder Using a Decoder
For an addition of X, Y, and Z (as Cin), the S and Cout
expression are as follows:
S(X,Y,Z) = m (1, 2, 4, 7)
C(X,Y,Z) = m (3, 5, 6, 7)

So, there are 3 inputs and 8 minterms

Use a 3-to-8 decoder.

Decoder Expansion
Implementing a Binary Adder Using a Decoder
- The logic circuit

Multiplexers (MUX)
MUX is a device that allows
digital information from
several sources to be routed
onto a single line for
transmission
It is made up of several datainput lines and a single output
line. It also has data-select
inputs which permits digital
data on any one of the inputs
to be switched to the output
line.
MUX is also known as data
selectors

n select
inputs
1 data
output

2n data
inputs

Logic symbol for a 4-input

multiplexer (4:1 MUX)

Multiplexers (MUX)
2:1 MUX
Data selector
SELECT input code determines
which input is transmitted to
output Z.

Multiplexers (MUX)
4:1 MUX
DATA-SELECT
INPUTS

2 data-select lines means that

any one of the 4 data-input lines
can be selected

D0
D1
D2

D0
D1

D3

D3 S
1

4-to-1 Z
D2 MUX

S0

INPUT
SELECTED

S0

S1

D0

D1

D2

D3

S1 S0
If a binary 0 (S0=0 and S1=0) is applied to the data-select lines,
the data on input D0 appear on the data-output line

Multiplexers (MUX)
4:1 MUX

Logic diagram
for 4:1 MUX

Total expression for the data output is:

Y D0 S1 S 0 D1 S1 S 0 D2 S1 S 0 D3 S1 S 0

Multiplexers (MUX)
Question 3
Construct an 8:1 multiplexer using block diagram.

8 input lines means there must be 3 data select lines.

Multiplexers (MUX)
Another design option for 8:1 mux
Using construction of larger multiplexers from smaller ones.

16-to-1 MUX: 74150

8-to-1-Line Multiplexer

16-to-1-Line Multiplexer

Multiplexers (MUX)
Implementing a Boolean Function with a MUX
A multiplexer is basically a decoder that includes the OR
gate within the block.
To implement a Boolean function of n variables with a
mux having n selection inputs and 2n data inputs, one for
each minterm.
The minterms are generated in a mux by the circuit associated
with the selection inputs.
Individual minterms can be selected by the data inputs.

Multiplexers (MUX)
Implementing a Boolean Function with a MUX
Another method (more efficient way)
Implementing a Boolean function of n variables with a mux
having only n-1 selection inputs and 2n-1 data inputs.

Multiplexers (MUX)
Implementing a Boolean Function with a MUX
General procedure:
1.
2.
3.

4.

5.

Produce Truth Table for Boolean function.

The first n-1 variables are applied to the selection inputs of
the mux.
The remaining single variable of the function is used for the
data input.
For each combination of the selection variables, we
evaluate the output as a function of the last variable, i.e. a
0, 1, the variable or its complement.
These values are then applied to the data inputs in the
proper order.

Multiplexers (MUX)
Example
Implement F (X,Y,Z) = m (1, 2, 6, 7) using
4:1 MUX

Multiplexers (MUX)
Example
Implement F (A, B, C, D) = m (1, 3, 4, 11,
12, 13, 14, 15) using 8:1 MUX

MUX Application Example

74157- consists of four

separate 2-input multiplexers

Content-selector Display

Demultiplexers (DEMUX)
DEMUX reverse the multiplexing functions
It takes digital information from one line and distributes it
to a given number of output lines
DEMUX is also known as data distributor
1 data
input

2n data
outputs

n select
inputs

1-line to 4-line DEMUX

Data input is transmitted to

only one of the outputs as
determined by the select
input code.

1-line-to-8-line multiplexer

Demultiplexers (DEMUX)
1:4 DEMUX

The expression of every output

Demultiplexers (DEMUX)
Question 4:
Construct a 1:4 DEMUX using block diagram. Show the
equivalent Truth-Table.

I0

1 -4
DEMUX

Q0
Q1
Q2
Q3

S 1 S 0 Block diagram
S1
S0

I0
Q0

Truth-table

S1 S0

I1 Q3 Q2 Q1 Q0

Q1
Q2
Q3

Logic circuit

Mux-Demux Application: Example

This enables sharing a single communication line

among a number of devices.
At any time, only one source and one destination
can use the communication line.

Solve this..
Design the following:
16-line-to-4-line encoder using the 8-line-to-3-line
encoder in cascade
A 4:1 MUX using 2:1 MUXes
A 8:1 MUX using 4:1 MUXes
A 1:4 DeMUX using 1:2 DeMUX
A 1:8 DeMUX using 1:4 DeMUX