2016

WORKBOOK
Detailed Explanations of

Try Yourself Questions

Electrical Engineering
Network Theory

KCL, KVL and Phasor Calculation

T1. : (d)

P1 = V1 I = 6 2 = 12 W
P2 = V2 I = 4(2) = 8 W

For element e1 :
For element e2 :
T2. : (c)

p (t), W

First we obtain power p(t) by multiplying v(t) and i(t) graphically,

t

8 t 2

For 0 t 3, w(0, t) =

0 p()d = 0 3 d = 3 2 = 3 t

For t 3,

0 p()d = 0 p()d + 3 p()d

w(0, t) =
=

38

0 3 d + 3 (4)d = 3

2 3

0 + 4(t 3)

= 12 + 4t 12 = 4t

0
3

T3. : (c)

t (sec)

We can solve this inequality with out going into calculation. Since 1 resistance is connected to node a,
Req must be greater than 1 . Now there is 1 . First shunt resistance which is connected with other
resistance across it on right, this 1 resistance is in parallel with rest of the network, so one ohm and other
resistance make equivalent resistance less then 1 . Thus, Req is must be less than 2 .
T4. : (b)
We can see that 18 V source is connected across the right most combination of 8 and 16 resistances.
So,

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I =

18
= 0.75 A
16 + 8

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T5. : (d)
10 V and 10 V sources are in series, which is equivalent to 10 10 = 0 volt.
Two 2 A current sources are in series which is equivalent simply 2 A source. Circuit is shown as
12
0V

12
2A

2A

2A
4

20 20

T6. : (a)
The power supplied by the current source will be maximum when the equivalent resistance across its
terminal is maximum. The equivalent resistance for complete circuit across current source is 360 . If the
900 resistance is open circuit equivalent resistance is 600 , on the other hand if 100 resistance is
open circuited the equivalent resistance is approximately equal to 639 .
T7. : (b)
Consider the super node corresponding to dependent source as shown below,
Applying KCL at super node
24 20 V1 20
+
+I = 1
4
2
28 20
(V1 = 28 V)
1+
+I = 1
2
1 + 4 + I = 1 or I = 4 A

Ix =

Ix

Ix

20 V

20 V

24 V

1A

24 V
I

22 24
= 1 A
4

T8. : (b)
Writing node equation at the top center node
V1 0 (V1 1) V1 Vx
= 0
+
+
2+3
1
5
V1 V1 1 V1 Vx
= 0
+
+
5
1
5

Since
Now, by substituting

2
2
V = V
Vx =
(Voltage Division)
2 + 3 1 5 1
V1 = (5/2) Vx into equation (1), we get

15 5
15

V + V 1 + V V x
5 2 x 2 x 5 2 x
Vx 5
V
+ V + x
2 2 x 2
V
7
Vx + x
2
5
35 Vx 2 Vx

= 0
= 1
= 1

Vx

+ V1

+
1V

3
(V1 1)

Vx

= 10

Vx =
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... (i)

10
(35 2)
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Electrical Engineering Network Theory

4
T9. : (a)

In this circuit, if we use nodal analysis it requires 3 nodal equation, 1 supermesh equation, then subtraction
division to obtain I. Mesh analysis requires 1 mesh equation, 2 simple KCL and one subtraction step to
obtain I. So mesh analysis requires less efforts of calculation.
T10. : (c)
Reciprocity theorem can be applied in AC domain same as in DC circuits.
V
V1
= 2
I2
I1
5045
1000
=
I2
245

I2 =

10045
= 145A
1000

T11. : (a)
Current in the circuit
I =

Vs
Vs
Vs
=
=
45A
800 + j1250 j 450 800 + j 800 800 2

VR = (800) I =

800 Vs
V
45 = s 45 = 0.70 Vs 45 V
800 2
2

VL = (j1250) I = 125090

Vs
45 = 1.10 Vs 45 V
800 2

VC = (j 450) I = 45090

Vs
45 = 0.40 Vs 135 A
800 2

T12. : (c)
Let voltage across inductor is VL, then applying KVL through loop 230 + 40 VL 20 + 230 = 0
In polar form

2[ 3 j ]

+42+2

( 3 + j)
= VL
2

2 + 2j = (jL) IL
2 + 2j = (j 100

1
)I
50 L

j IL = 1 + j
IL =
In time domain,

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1+ j
= 2 45
j

iL(t) = 1.414 cos (100t 45) A

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T13. : (c)
Option (c) is correct.
Consider the circuit as shown
j 40

I1
30

30

VAB
AB
j 40

1A
Vin

VAB = 1(30 j40) = 30 j40 V

I1 =

VAB
30 j 40
=
A
30 + j 40 30 + j 40

I = I1 + 1 =

30 j 40
60
+1=
A
30 + j 40
30 + j 40

Vin = I(5 + j0) + VAB =

60
5 + 30 j 40
30 + j 40

= 5653.13 V
= Vin = 56 V

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Transient and Steady State

Response

T1. : (a)

For
For

dv (t )
dt
30t2 V
20 106 (60t) = 1.2 t mA
30 (t 1)2
(20 106) [60 (t 1)] = 1.2(t 1) mA

i(t) = C

Current,

0 < t < 0.5 s, v(t)

i(t)
0.5 s < t < 1 s, v(t)
i(t)

=
=
=
=

T2. : (d)
The series connected capacitors can be replaced with an equivalent capacitor as shown
vo(0) = 20 V

Ceq =

(30)(45)
= 18F
30 + 45

vo(t) = v o (0) +

1
Ceq

30 V

= 20

30 F

0 i(t )dt

ve sign is taken because current flows from ve to +ve polarity.

vo(t) = 20 1
Ceq

10 V

0 i(t )dt

1
18 10 6

0 i(900 10

20 V

Ceq

45 F

)e 2.5t dt

6 2.5t
= 20 900 10 e

18 10 6 2.5 0
= 20 + 20 [e2.5t 1] = 20 e2.5t V

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T3. : (d)
The combination of inductor can be replaced with an equivalent as shown below:

30 H

Leq

10 H
12 A

4A

16 A

Leq =

(30)(10)
= 7.5 H
30 + 10

i(t)
+

For t > 0, current will be

i(t) =

1
Leq

Leq v(t) Black

Box

v ()d + i(0)

i(t)

ve sign is taken because current is flowing from ve polarity to +ve

i(t) =

1 t
1800e 20 d 12
7.5 0

i(0) = 12 A

1800 e 20

12
7.5 20
0

= 12[e20t 1]12 = 12 e20t A]

T4. : (c)
Equivalent Capacitance,

Ceq = 4 (4 + 4) =

4(8) 8
= F
4+8 3

Now, the circuit becomes as

t=0

9 k
i(t)

18 V

8 F
3

vC(t)

9 k

For t > 0, voltage across capacitor is given by

vC(t) = vC() + [vC()]et / ... (1)
For t < 0 : Capacitor reaches in steady state and acts as an open circuit
9 k
18 V

+
vC(0)

9 k

9
(using voltage division)
(18) = 9 V
9+9
For t < 0 : Again at t = capacitor is in steady state and acts as an open circuit

vC(0) =

vC() = 0
t = RthC

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Electrical Engineering Network Theory

9 k
18 V

9 k
+

18 V

vC()

9 k

RTh

9 k

RTh = 9 k
= 9 103 5

8
3
s
10 6 =
3
125

Substituting values into equation (1), we get

vC(t) = 0 + [9 0]e41.67t = 9e41.67t V, t > 0
Current, i(t) =

1
v (t ) = 1 e41.67t mA
9 C

T5. : (b)
1. Time constant,

15 k

=
RTh =
=
=

RTh C
5 5 = 2.5
15 103 0.02 106
0.3 ms

RTh

Statement 1 is true.
2. We can see that initial voltages across capacitor is zero, i.e. vC(0) = 0.
At t = , capacitor is in steady state (replaced by an open circuit)

vC(t) = vC () + [vC(0) vC()]et/

15 k

= 30 + [0 30] et/ = 30(1 et/)

iC(t) = C

dv C (t )
dt

30 V

1
= (0.02 10 6 ) 0 30 e t /

vC() = 30 V

0.02 10 6 30 t /
e
= 0.3 ms
0.3 10 3
= 2et/ mA
i(t) = iC(t) = 2et/ mA
i(t = 1.5 ) = 2e1.5/ mA = 2e1.5 = 0.446 mA

Statement 2 is incorrect.
3.
Statement 3 is true.
4.

vR(1.5) = i(1.5)R
= 0.446 15 = 6.69 V
i(t)
10% of i(0+)
0.1 i(0+)
et 1/

=
=
=
=

i(0+)et /
i(0+)et 1/
i(0+)et 1/
10

t1
= ln 10

t1 = ln 10 = 2.3

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i(0+) = 2 mA

Hence statement 4 is true.

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T6. : (b)
For t > 0, capacitor voltage is given by
vC(t) = vC() + [vC(0) + vC()]et/
For t < 0,
is,(t) = 10 mA
In steady state capacitor acts as open circuit
10 mA
8 k

+
vC(0)

20 k

12 k

Using source transformation

80 V

8 k

+
vC(0)

20 k

12 k

20
= 40 V
(Using voltage division)
8 + 20 + 12
For t < 0,
is,(t) = 25 mA
Again, in steady state capacitor is replaced by an open circuit at t = .

vC(0) =

25 mA
8 k

+
vC()

20 k

12 k

Using source transformation

8 k
200 V

20 k

+
vC(0)

12 k

20
(200) = 100 V
8 + 12 + 20
= RTh C

vC() =

(Using voltage division)

8 k

20 k

RTh

12 k

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Electrical Engineering Network Theory

10

RTh = (8 + 12)20 = 2020 = 10 k

1
s
20
vC(t) = 100 + (40 100)e20t, t > 0
= (100 60 e20t)u(t) V

= 10 103 5 106 =

So,
Thus,

dv C (t )
= 5 106 [60(20e20t)],
dt
= 6e20t u(t) mA

i(t) = C

t>0

T7. : (d)
For t > 0, when the switch is open the circuit shown in figure as
Writing KCL at top left node
v C (t ) 1 dv C (t )
+
+ iL (t ) = 0
2
4 dt
Writing KVL for right half loop
d i (t )
v C (t ) 4 L 8iL (t ) = 0
dt
d i (t )
vC(t) = 4 L + 8iL (t )
dt
Substituting vC(t) into equation (1)

... (1)

iL(t)

4H

+
2

1
F
4

vC(t)

2
d 2 iL (t )
1 d iL (t )
1 d iL (t )
4
8
(
t
)
4
8
+
+
+
i

+ i (t ) = 0
L
4
2
2 dt
dt L

dt

d iL (t )
d 2iL (t )
d 2iL (t )
+ 4iL (t ) +
+
+ iL (t ) = 0
2
dt
dt
dt 2
d 2 iL (t )

+4

dt 2
Characteristic equation

d 2 iL (t )
+ 5iL (t ) = 0
dt

s2 + 4 s + 5 = 0
roots,
s = 2 j = jd
Roots are imaginary and complex conjugate. So response will be under damped.
iL(t) = et (A cos dt + B sin dt)
iL(t) = e2t (A cost + B sint)
A and B are calculated using initial condition.
For t > 0, switch was closed, in steady state circuit becomes as

... (1)

iL(0 )

vC(0 )

iL(0)

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8
7A

1
2
(7) = 4A = iL (0+ )
=
1 1 1
+ +
2 4 8
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vC(0) = 2iL(0) = 8 V = vC(0+)

For t =
equation (1) becomes as
iL(0+) = A = 4
t = 0+
Differentiating equation (1) for
0+,

iL(0 )
+

d iL (0+ )
= 2 A + B
dt
At t =

0+

4H

1
F
4

vC(0 )

the circuit becomes as

v C (0+ ) 4

d iL (0+ )
8iL (0+ ) = 0
dt

84

d iL (0+ )
8(4) = 0
dt
d iL (0+ )
= 10
dt
2A + B = 10
B = 10 + 2A = 10 + 2(4) = 2
iL(t) = (4 cost + 2sint)e2t

So,
So,
T8. : (d)

For t > 0, the circuit is a lossless LC circuit with R = 0. So, the current iL(t) is given as
iL(t) = A cos 0t + B sin 0t
0 =

1
= 100 rad/sec
LC

iL(t) = A cos 100t + B sin 100t

At t =

0,

the circuit is shown as

5
= 1 A = iL (0+ )
3
vC(0) = vC(0+) = 0
Substituting t = 0+ into equation (1)
iL(0+) = A = 1
At t = 0+, when switch moved to other position circuit becomes as
vC(0+) = vC(0+) = 0

iL(0) =

5V

d iL (0+ )
= 0
dt

d iL (0 )
= 0
dt

vL(0 )

Differentiating equation (1) putting t = 0+,

iL(0 )

10

vC(0 )

iL(0 )

d iL (0+ )
= B (100) = 0
dt
So,

B = 0
iL(t) = 1 cos (100t) A

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Resonance

T1. : (d)
Let Z1 = 2 + j 3 , Z2 = 100 j 75 , we obtain equivalent circuit by reflecting the secondary circuit to the
primary circuit
Z2/n

Z1
+

I1

60 V

V1

Z2
n

100 j 75
(5)2
2 + j3

60 V

I1

= 4j 3
4 j3

+
V1

I1 =

6 / 0
6 / 0
=
= 10A
2 + j3 + 4 j3
6

V1 = I1(4 j3) = 536.86 V

For an ideal transform
V1
1
=
V2
n

V2 = nV1 = 5(536.86) = 2536.86 V

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13

T2. : (d)
4

Reflecting the secondary circuit to the primary side

R 2 =
X2 =

R2
n

X2
n

=2

(2)2
j4
(2)2

(n = 2)

R2

Source

X2

= j1

Impedance seen by the source

Zin = 4 + R2 + X2 = 4 + 2 + j1 = 6 + j1
T3. : (c)

L jL

In phaser domain,

1
1
=
= j160 k
j C j (105 )(62.5 10 12 )

C
j160 k
Vs

1:n

100

400

= 10 rad/s

jL

Load impedance,
ZL = 400 + j L
Reflecting the secondary impedance to the primary side
j 160 k
Vs

For maximum power transfer

ZL / n

100

ZL/n 2 = Z s
ZL
n2

Zs = (100 j160 103)

= (100 j160 103)

400 + j L
= 100 + j160 103
n2
Comparing real parts on both sides of the equation,
400
n2

= 100

n= 2

Comparing imaginary parts,

L
= 160 103
n2

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L =

160 103
4 = 6.4 H
105

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Electrical Engineering Network Theory

14
T4. : (c)

Reflecting the secondary impedances to the primary side

j 2

R3

j2
2:1

X3
5

R2 =
X2 =

R3
n

X3

n2

80

=5

(4)2

j16
(4)2

(n = 4)

= j1

Now circuit becomes as

j 2

R3

j2

j 2

2:1
5

j1
2:1

j 1

10

Again reflecting the secondary impedance to the primary side

R2

j 2

X2 =
R2 =

X2

j1
2

(n)

10
(n)

=
=

j1
(1/ 2)2
10
(1/ 2)2

= j4

(n = 1/2)

= 40

Total impedance seen by the source

Zin = j2 + R2 + X2 = j2 + j4 + 40 = j2 + 40
T5. : (c)
R
Zin( j)

1
jC

jC

Input impedance,
1
(R + j L) / j C
(R + j L) =
Zin(j) =

j C
R + j L + 1/ j C

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15

R + j L
(R + j L)[(1 2LC) j RC ]
=
2
(1 LC ) + j RC
(1 2LC )2 + 2R 2C 2

At resonance,
Im [Zin ()] = 0
2
So,
0L (1 0 LC) 0R2C = 0
0 =

1 R

LC L

T6. : (b)
For parallel equivalent circuit,
Here
So,
Reactance,

RP = Rs(1 + Q2)
20
=1
20
RP = 20(1 + 1) = 40

Q =

XP = X s 1 + 2 = 20(1 + 1) = 40
Q

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Network Functions and TwoPort Networks

T1. : (b)
The above network is consisted of two networks in series as show below
4

z11 = 4 , z12 = 0

First network,

z21 = 0, z22 = 6
z11 = 5 , z12 = 5

Second network,

z21 = 5 , z22 = 5
[z] = [z] + [z]

For the complete network

z11 = z11 + z11 = 9

z22 = z22 + z22 = 11
z12 = z12 + z12 = 5
z21 = z21 + z22 = 5
T2. : (b)
The open circuit Thevenins voltage is obtained as following
Zs
Vs

I1 = 0

I1
+
V1

+
Two-Port
Network

For the two port network,

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V1 = z11I1 + z12I2

VTh

... (1)

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V2 = z21I1 + z22I2

17
... (2)

I2 = 0 into equation (1), we get

Substituting,

V1 = z11I1
V1 = Vs Zs I1 = z11I1

Since

Vs
z11 + Z s

Substituting I1 into equation (2),

= I1

Vs
V2 = VTh = z 21
z11 + Z s

(I2 = 0)

T3. : (c)
Is(s)

M = 1.5 H

Is(s)

M=2H

+
3s

V1(s)

3s
3s

3s

V2(s)

For k = 1/2, mutual inductance is

M1 = k L1L2 =

1
3 3 = 1.5 H
2

M2 = k L1L2 =

2
33 = 2 H
3

For k = 3/2, mutual inductance is

Consider the circuit into s-domain as shown below

V1(s) = 3sI1(s) + 3sI1(s) + 3sI1(s) 1.5sI1(s) 1.5sI1(s) + 2sI2(s)
V1(s) = 6sI1(s) + 2sI2(s)
... (1)
V2(s) = 3sI2(s) + 2sI1(s)
V2(s) = 2sI1(s) + 3sI2(s)
... (2)
Comparing equation (1) and (2) with general equations, we get
6s 2s
[z] =

2s 3s

T4. : (d)
Writing KVL in the left bottom mesh

V1 = 2I1 + 2I2 + 1(I1 + I2)

V1 = 3I1 + 3I2
Writing KVL in the right bottom mesh
V1 = 1 (I2 4 V3) + 1(I1 + I2)
= 1 I2 4 1(I1 + I2) + 1(I1 + I2),
So,
V2 = 3 I2 2 I2
Comparing equation (1) and (2) with general equations, we have

... (1)

V3 = 1(I1 + I2)
... (2)

3
3
z =

3 2
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Electrical Engineering Network Theory

18
T5. : (c)

I1

I2
+

1000

V1

V2

[z]

10

z- parameter equation for the network is

V1 = z11 I1 + z12 I2
V2 = z21 I1 + z22 I2
V1 = 1000, V2 = 10I2
Substituting V1 and V2 into equation (1) and (2)
So,
100 = 40I1 + j 20I2
10I2 = j 30I1 + 50I2

60I2 = j 30I1
Substituting I2 into equation (3)

... (1)
... (2)

... (3)

I2 = I1 /j 2

I
100 = 40I1 + j 20 1 = (40 + 10)I1

j2

I1 = 20A
I2 =

20
= 1 90 A
j2

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Network Theorems

T1. : (c)
Combining the parallel resistance and adding the parallel connected current sources.
9 A 3 A = 6 A (upward)
3 6 = 2
14 V

6A
2

10

8V

Source transformation of 6 A source

6

14 V

12 V

18

+
10

14 V

12 V

8V

18

18 V
b

8V

T2. : (d)

Using voltage division,

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R
V = VTh R + R

TH

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Electrical Engineering Network Theory

20

3
6 = VTh 3 + R

From the table,

TH

RTh

VTh

8
8 = VTh 8 + R

TH

a
+
V

Dividing equation (1) and (2), we get

3(8 + RTh )
6
=
8(3 + RTh )
8

6 + 2RTh = 8 + RTh
Substituting RTh into equation (1)
3
6 = VTh
or VTh = 10 V
3 + 2

T3. : (c)
In circuit (b) transforming the 3 A source in to 18 V source all source are 1.5 times of that in circuit (a) as
shown in figure.
ib

+
18 V

18 V

12 V

Ib = 1.5 Ia

Using principal of linearity,

T4. : (d)

To obtain Thevenin resistance put a test source across the terminal a, b as shown.
0.01Vx
3Ix

150

I3

I2

600

300

I1

Vtest

Itest

900

Ix

Vtest = Vx, Itest = Ix

Writing loop equation for the circuit

Vtest = 600(I1 I2) + 300 (I1 I2) + 900(I1)

Vtest = (600 + 300 + 900) I1 600 I2 300 I3
Vtest = 1800 I1 600 I2 300 I3
The loop current are given as,
I1 = Itest, I2 = 0.01 Vtest, and I3 = 3Itest + 0.01 Vtest
Substituting theses values into equation (1),

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21

Vtest = 1800Itest 600(0.01 Vtest) 300 (3Itest + 0.01 Vtest)

Vtest = 1800Itest 6Vs 900Itest 3Vs
10Vtest = 900Itest or Vtest = 90Itest
Thevenin resistance

RTh =

Vtest
= 90
I test

Thevenin voltage or open circuit voltage will be zero because there is no independent source present in the
network, i.e. Voc = 0 V
T5. : (c)
According to passive sign convention, average power absorbed by box in the circuit is
1
V I cos(v i )
2 m m
Vm and Im are maximum value of voltage and current respectively.
v phase angle of voltage
i phase angle of current
V and I are maximum magnitude of voltage and current, is power factor angle.

P =

(P)
(Q)
(R)

P1 =

1
(40)(20) cos (10 50) = 200 W (absorbed)
2
v(t) = 400 cos (2t + 30)
i(t) = 10 sin (2t + 240) = 10 cos (2t + 240 90)
= 10 sin (2t + 150)

P2 =

P3 =
or
(S)

1
(100)(10) cos (50 + 10) = 250 W (absorbed)
2

P3 =
v(t) =
=
=
i(t) =

(P 2)
(Q 5)

1
(400)(10) cos (30 150) = 1000 W (absorbed)
2
1000 W (delivered)
(R 1)
200 sin (2t + 250)
200 sin (2t + 250 90)
sin = cos ( 90)
200 sin (2t + 160)
5 cos (2t + 40)

1
(200)(5) cos (160 40) = 250 W (absorbed)
2
P4 = 250 W (delivered)
(S 6)

P4 =
or
T6. : (b)
Current in the circuit,

Irms =

Vrms
100 / 0
100
=
=
= 6 + j8 A
Z
6 + j 7 j15 6 j 8

Complex power supplied by the source

S = Vrms rms = (1000)(6 j8)
= 600 j800 VA = 1000 53.13 VA
We know that,
S = P + jQ

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Electrical Engineering Network Theory

22

P
Q
P
Q
Power factor angle

=
=
=
=
=

real power or average power

reactive power
600 W,
800 VAR,
53.13

Power triangle
P

600 W
53.13

1000 VA

800 VAR

T7. : (d)
4 mH = j(103)(4 103) = j4
Let load impedance is ZL.
For maximum power transfer,

ZTh = j4 + 63 = j4 + 2
ZL = Z Th = 2 j4

1
= 2 j4
ZL = R +
j C

j4
ZTh

R = 2
1
1
= 4C=
= 250F
C
4 1000

T8. : (a)
For the first load
Real power
Reactive power,
Apparent power,
So,
Complex power
Similarly, for the second load
Complex power
Complex power of the source,

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P1 = 16 kW
Q1 = S1 sin 1
S1 =

1 > 0, because pf is leading

P1 16
=
pf 0.9

16
sin[cos10.9] = 7.75 kVAR
0.9
S1 = P1 + jQ1 = 16 + j7.75 VA

Q1 =

20
sin [cos10.8] = 20 + j15
0.8
S = S1 + S2 = 36 + j22.75 = 42.5932.29 kVA
= Vo I = Vo 6 = 42.5932.29
Vo = 7.132.29 V

S2 = P2 + jQ2 = 20 = j

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Workbook

23

T9. : (a)
Solving the circuit using mesh analysis
j10

10

1000

I1

I2

100 10I1 j5 (I1 I2)

(10 + j5)I1 j5I2
j5 (I2 I1) ( j10)I2 + 10090
j5I1 j5I2
Solving equation (1) & (2)
I1
Power absorbed by source,

j5

=
=
=
=

10090 V
+

0
1000
0
j100

= j10 A,

1
S1 = V1I1
2

(Left mesh)
... (1)
(Right mesh)
... (2)
I2 = 20 + j10 A
(Using passive sign convention)

1
(absorbed)
= 1000 [j10] = j500 VA
2
or, source S1 is delivering 500 VAR of reactive power. Statement 1 is true. Complex power absorbed by
source S2.
1
S2 = V2I2
2

(Using passive sign convention)

1
1
= (1000)(20 j10) = ( j100)(20 j10)
2
2
= 500 + j1000 VA

Real power absorbed by S2,

P2 = 500 W
Reactive power absorbed by S2,

Q2 = 1000 VAR
S2 is delivering 500 W of average power and absorbing 1000 VAR of reactive power
Statement 2 is false.

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Network Synthesis

T1. : (b)
The circuit can be redrawn as a balanced whitestone bridge circuit in which there is no voltage across R
and no current through R. Therefore, R has no effect effect on the transfer function.
T2. : (d)

500
Vi(s)

500

2000
Vo(s) = 5 I1(s)
s

I1(s)

1500

5I 1(s)

500
s

2 k

+
Vo(s)

106
500 / s 2000
5 I1(s)

= 5 I1(s)
=

500 / s + 2000
500 + 2000s
Vi (s)
V (s)
= i
500 + 1500 2000

Since.

I1(s) =

So,

Vo(s) = 5

Vi (s)
106

2000 500 + 2000s

Vo (s)
5
=
Vi (s)
(4s + 1)

T3. : (b)
Consider the circuit into s-domain as shown below
1 V1(s)
KV2(s)

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1
s

1/2s

V2(s)

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25

Workbook
Writing node equation at the top center node
V1(s) V1(s) KV2 (s) V1(s) V2 (s)
= 0
+
+
1/ s
1
1/ 2s
(3s + 1) V1(s) = (2s + K) V2(s)
V2 (s)
(3s + 1)
=
V1(s)
(2s + K )

V2(s) =

... (1)

1
V1(s)
1
+1
2s

(Using voltage division)

V2 (s)
2s
=
V1(s)
2s + 1

... (2)

Comparing equation (1) and (2)

3s + 1
2s + K
(3s + 1) (2s + 1)
6s2 + 5s + 1
2
4s + (5 2K)s + 1
For stable system,
5 2K
2K 5

=
=
=
=
>
>

K <

2s
2s + 1
2s(2s + K)
2s2 + 2sK
0
0
0
5
2

T4. : (b)
Drawing equivalent T-circuit of magnetically coupled inductor and analysing the circuit is s-domain
100 10s

60 +
s

I1

10s

10

10s

I2

100

Writing loop equations

60
100 I1 10s I1 10s( I1 I2 ) = 0
s
60
= (100 + 20s)I1 + 10 sI2
s
Similarly in second loop,
0 = 10sI2 + 50I2 + 100I2 + 10s(I2 I1)
0 = 10sI1 +(150 + 20s)I2
Combining equation (1) and (2) in matrix form

... (2)

10s I1
100 + 20s
60 / 2

0 = 10s
150 + 20s I 2

Solving the equations by Cramers method

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100 + 20s
10s
= 100 (3s2 + 50s + 150)
10s
150 + 20s

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Electrical Engineering Network Theory

26

60
s = 600

100 + 20s
I2 =

10s

I 2
600
6
=
= 2
2

100(3s + 50s + 150) 3s + 50s + 150

I2 =

Vo(s) = 100I2 =

600
3s + 50s + 150
2

T5. : (c)
From the given circuit

sC
Vc (j ) = Vi ( j )
1
2000 +

sC
1

Vc (j ) = Vi ( j )
2000sC + 1

Vo ( j ) =

and

30000
A Vi (j )
15000 + 30000

Vo ( j )
(2 / 3)A
=
Vi ( j )
2000 j C + 1

So by comparison, we get

and

2
A=6
A =4
3
2000 j C = 0.01 j

C=

0.01
2000

C = 5 F

T6. : (a)
We need to find

H (j) =

Vo ( j )
I s ( j )

So the given circuit can be drawn as

1
+
Is

s
s +1
s

I s (s )
s + 1

1
s

V0

+
1
s +1

Vo(s)

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Workbook

27

Now with voltage division rule

s
s
s +1
V o (s ) =
I (s)
= s + 1 Is (s ) 2(s + 1)
1
s + 1 s s
+
+ 1

s +1 s +1
Vo (s)
s
=
Is (s )
2(s + 1)2
Vo ( j )
j
=
I s ( j )
2(1 + j )2

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