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Procedure:
1. Double clicks at icon VMware Workstation, clicks Power on This Virtual Machine. Next, type in the
Username and password and press enter.
2. Red Hat Linux 4 will appear. Then right click and chose Open Terminal. In the terminal, type cd
silterraC13_Apr2011 command and press enter. Next, type virtuoso command and press enter.
3. After Virtuoso window appear, click Tools > Library Manager. The Library Manager:WorkArea will
appear.
4. To create your working directory in Library Manager, click File > New > Library, then insert your
library name for example Lab in the new pop up New Library window. Then click OK.
5. Then Technology File for New Library will pop up. Choose Attach to an existing techfile button and
click OK.
6. Select silterraC13 and click OK at Attach Design Library to Technology File window.
7. In the Library Manager:WorkArea window, the new library Lab has been created.
8. To create the schematic workspace, highlight your library name Lab , then go to File > New > Cell
View. Then insert your Cell Name Lab1 in the new Create New File window and click OK.
9. The Virtuoso Schematic Editor will apprear for you to create your schematic.
10. Construst the schematic given in Figure 1.
VGS
W
L
20 m
130 nm
M1
VDC = VDS
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/home/eda/silterraC13_smartPDK_4_1_21Apr2011/models/SPECTRE/bsim4c13_hprf_rev1_2.scs
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17. Then choose the analysis type by click Analyses > Choose > dc and click on Save DC Operating
Point. Then click at Design Variable box, insert the Variable Name and Sweep Range as shown in
Figure 6 and click OK.
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21. The graph obtained after simulation should be as shown in Figure 10. Record the reading in Table 1.
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(a)
(b)
Figure 10 : NMOS characteristics, (a) IDS vs VDS and (b) IDS vs VGS
VGS ( V )
0.7
IDS (A )
VDS ( V )
0.9
0.9
0.9
(Note: In the Analog Design Environment, save the dc analysis process that was evaluated by clicking
Session > Save State > dc_NMOS_analysis.)
22. What is the value of VDS when IDS = 150 A and VGS = 0.6 V?
23. Applying the same steps to obtain the IDS vs VDS , we can obtain the IDS vs VGS graph as shown in
Figure 10(b). The graph shows that the smaller the VSB is the higher IDS will flow through the NMOS.
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24. To plot the gm graphs ( gm vs VGS - VTN ), in Analog Design Environment, click Tools > Result
Browser. Result Browser window will pop up, click dcOpInfo-info > NM0 > main choose gm and
use right hand button to select Calculator. Calculator window will pop up containing the gm info that
was selected in Result Browser.
25. Go back to the Analog Design Environment, double click at the VDD/MINUS in the Outputs area to
pop up the Setting Output window. Click on New Expression button, follow by Get Expression
button. In the Expression column there is the detail about the gm that was selected before. Type in
any name in Name (opt.) column such as gm . Click OK.
26. Go back to the Result Browser window, select vgs then use right hand button to select Calculator.
Without do other things, repeat the same procedure to select vth following by clicking minus (-) button
in the Calculator. Now, in the calculator display both vgs and vth information will be appeared.
Repeat the same step as in procedure 25 and type in any name in Name (opt.) column such as vgsvth. Click OK.
27. Simulate the data that was in the Analog Design Environment. Ensure to sweep your VGS from 0 to
1 in Parametric Analysis and produce the graph as shown in Figure 11. (To change the axis, double
click on the axis and the Axis Attributes window will pop up for editing). Explain the graph.
28. Using the same procedure, plot gm vs IDS (when W/L constant) and gm vs VGS - VTN (when IDS
constant by adding a 2 mA Current Source to the Drain of schematic). Your graph will be as shown in
Figure 12 and Figure 13.
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