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Circuit

Simulation and
Synthesis
Project Report

Submitted To: -

Submitted By:-

Mr. Arun Kumar Chatterjee

Ravneet Singh
101386013(G2)
E.C.E.- 7

Index
Sr.
No

Content

Page No.

.
1.

Introduction to 555 timer IC

4-6

2.

Introduction to Voltage Regulator

3.

Circuit Diagrams

4.

Waveforms

10-11

5.

SPICE Netlist

12-26

8-9

Acknowledgement
I take this opportunity to express my profound gratitude and deep regards
to my guide
Mr. Arun Kumar Chatterjee for his exemplary guidance, monitoring and
constant encouragement throughout the summer training. The blessing,
help and guidance given by him time to time shall carry me a long way in
the journey of life on which I am about to embark.
I am obliged to staff members of this 6 weeks summer training, for the
valuable information provided by them in their respective fields. I am
grateful for their cooperation during the period of my training.
Lastly, I thank almighty, my parents and friends for their constant
encouragement without which this project would not be possible.

Introduction to 555 Timer

The 555 timer circuit is a popular IC that can be used to implement astable and monostable
multivibrator circuits as well as other circuits. The 555 is a linear IC (like an operational
amplifier or a voltage regulator) rather than a digital IC, thus it does not necessarily use TTL
voltage levels. In fact, the supply voltage for the 555 can range from 4.5V to 18V. If a 5V
supply if used, it can easily interface with TTL circuits.
Pin Diagram of 555 Timer IC:-

Working of Different Pins:-

1. Pin 1: Grounded Terminal: All the voltages are measured with


respect to the Ground terminal.
2. Pin 2: Trigger Terminal: The trigger pin is used to feed the trigger
input hen the 555 IC is set up as a monostable multivibrator. This
pin is an inverting input of a comparator and is responsible for the
transition of flip-flop from set to reset. The output of the timer
depends on the amplitude of the external trigger pulse applied to
this pin. A negative pulse with a dc level greater than Vcc/3 is
applied to this terminal. In the negative edge, as the trigger passes
through Vcc/3, the output of the lower comparator becomes high
and the complimentary of Q becomes zero. Thus the 555 IC output
gets a high voltage, and thus a quasi-stable state.
3. Pin 3: Output Terminal: Output of the timer is available at this
pin. There are two ways in which a load can be connected to the
output terminal. One way is to connect between output pin (pin 3)
and ground pin (pin 1) or between pin 3 and supply pin (pin 8). The
load connected between output and ground supply pin is called
the normally on load and that connected between output and
ground pin is called the normally off load.
4. Pin 4: Reset Terminal: Whenever the timer IC is to be reset or
disabled, a negative pulse is applied to pin 4, and thus is named as
reset terminal. The output is reset irrespective of the input
condition. When this pin is not to be used for reset purpose, it
should be connected to + VCC to avoid any possibility of false
triggering.
5. Pin 5: Control Voltage Terminal: The threshold and trigger levels
are controlled using this pin. The pulse width of the output
waveform is determined by connecting a POT or bringing in an
external voltage to this pin. The external voltage applied to this pin
can also be used to modulate the output waveform. Thus, the
amount of voltage applied in this terminal will decide when the
comparator is to be switched, and thus changes the pulse width of
the output. When this pin is not used, it should be bypassed to
ground through a 0.01 micro Farad to avoid any noise problem.

6. Pin 6: Threshold Terminal: This is the non-inverting input terminal


of comparator 1, which compares the voltage applied to the
terminal with a reference voltage of 2/3 V CC. The amplitude of
voltage applied to this terminal is responsible for the set state of
flip-flop. When the voltage applied in this terminal is greater than
2/3Vcc, the upper comparator switches to +Vsat and the output
gets reset.
7. Pin 7: Discharge Terminal: This pin is connected internally to the
collector of transistor and mostly a capacitor is connected between
this terminal and ground. It is called discharge terminal because
when transistor saturates, capacitor discharges through the
transistor. When the transistor is cut-off, the capacitor charges at a
rate determined by the external resistor and capacitor.
8. Pin 8: Supply Terminal: A supply voltage of + 5 V to + 18 V is
applied to this terminal with respect to ground (pin 1).
Block Diagram of 555 Timer:-

The block diagram of a 555 timer is shown in the above figure. A 555
timer has two comparators, which are basically 2 op-amps), an R-S flipflop, two transistors and a resistive network.

Resistive network consists of three equal resistors and acts as a


voltage divider.

Comparator 1 compares threshold voltage with a reference voltage


+ 2/3 VCC volts.

Comparator 2 compares the trigger voltage with a reference voltage


+ 1/3 VCC volts.
Output of both the comparators is supplied to the flip-flop. Flip-flop
assumes its state according to the output of the two comparators. One of
the two transistors is a discharge transistor of which collector is connected
to pin 7. This transistor saturates or cuts-off according to the output state
of the flip-flop. The saturated transistor provides a discharge path to a
capacitor connected externally. Base of another transistor is connected to
a reset terminal. A pulse applied to this terminal resets the whole timer
irrespective of any input.

Introduction to Voltage Regulator


7805 is a voltage regulator integrated circuit. It is a member of 78xx
series of fixed linear voltage regulator ICs. The voltage source in a circuit
may have fluctuations and would not give the fixed voltage output.
The voltage regulator IC maintains the output voltage at a constant value.
The xx in 78xx indicates the fixed output voltage it is designed to provide.
7805 provides +5V regulated power supply. Capacitors of suitable values
can be connected at input and output pins depending upon the respective
voltage levels.
Pin Diagram Of voltage Regulator 7805:-

Working of different Pins:-

1. Pin 1 (Input Pin): The Input pin is the pin that accepts the incoming
DC voltage, which the voltage regulator will eventually regulate
down to 5 volts.

2. Pin 2 (Ground): Ground pin establishes the ground for the regulator.
3. Pin 3 (Output Pin): The Output pin is the regulated 5 volts DC.

10

Bistable Multivibrator using 555 Timer IC


Aim: - Design a Bistable Multivibrator using 555 timer IC. For supply
voltage use a Full Wave Bridge Rectifier using 78XX series voltage
regulator.
Working: - In Bistable mode, the 555 timer acts as a basic flip-flop. The
trigger and reset inputs (pins 2 and 4 respectively on a 555) are held high
via Pull-up resistors while the threshold input (pin 6) is simply floating.
Thus configured, pulling the trigger momentarily to ground acts as a 'set'
and transitions the output pin (pin 3) to Vcc (high state). Pulling the reset
input to ground acts as a 'reset' and transitions the output pin to ground
(low state). No timing capacitors are required in a Biastable configuration.
Pin 5 (control voltage) is connected to ground via a small-value capacitor
(usually 0.01 to 0.1 uF); pin 7 (discharge) is left floating.

Circuit Diagram:Power Supply:-

11

Bistable Multivibrator Circuit:-

Bistable Multivibrator Circuit (With Power Supply):-

12

Waveforms:-

Power Supply:-

Bistable Multivibrator:-

13

Power Supply and Bistable Multivibrator:-

14

SPICE Netlist:-

** Design2 **
*
* NI Multisim to SPICE Netlist Export
* Generated by: RAVNEET
* Tue, Jul 22, 2014 09:39:52
*

*## Multisim Component V1 ##*


vV1 12 13 dc 0 ac 1 0
+

distof1 0 0

distof2 0 0

sin(0 {220*1.414213562} 50 0 0 0)

*## Multisim Component S2 ##*


* !!!BEGIN-INTERACT
* 2.0 constant high
* 0.0 constant low
* 2 constant max_states
* low VARIABLE volt
*
* :MAP_KEYBOARD_INPUT ++++K1 1 ++++k1 -1 ;
*
* : UPDATE_SETTINGS
*

*animation_state max_states low high STATE volt

GRADUAL_CHANGE_AT_RUN

* ;
*
* :KEYBOARD_INPUT locals| shift_state |

15

shift_state *animation_state max_states NEXT_STATE_WRAP

*
*

==>_*animation_state
UPDATE_SETTINGS

* ;
*
* :GRADUAL_CHANGE_AT_RUN locals| ref value |
*

value SET_INSTANCE Vsource ::V V2 dc

* ;
*
* : INIT_IMOUSE_OPTION
*

1 0 4 IMOUSE_SET

* ;
*
* : GET_IMOUSE_SUBCOMPS ( -- [iIdxN ... iIdx1] )
*

* ;
*
* : ON_SUBCOMP_IMOUSE_EVENT locals| eEventType nOptions
iSubCompIdx |
*

eEventType 2 = if

-1

-1 KEYBOARD_INPUT

else

endif

* ;
*
* ( Initialize the settings )
* UPDATE_SETTINGS
* INIT_IMOUSE_OPTION
*

16

* :BEGIN_PLOT
*

UPDATE_SETTINGS

* ;
*
* :BEGIN_ANALYSIS
*

UPDATE_SETTINGS

* ;
*
* !!!END-INTERACT

xS2 9 0 SwitchS2

.subckt SwitchS2 1 2
V2 5 0 DC 0
R1 5 6 20
V1 6 0 DC 0
W0 2 1 V1 NC_contact
.MODEL NC_contact ISWITCH (Ion=0.05 Ioff=0.025 Ron=1e-8 Roff=1e30)
.ENDS

*## Multisim Component S1 ##*


* !!!BEGIN-INTERACT
* 2.0 constant high
* 0.0 constant low
* 2 constant max_states
* low VARIABLE volt
*
* :MAP_KEYBOARD_INPUT ++++K1 1 ++++k1 -1 ;
*
* : UPDATE_SETTINGS

17

*animation_state max_states low high STATE volt

GRADUAL_CHANGE_AT_RUN

* ;
*
* :KEYBOARD_INPUT locals| shift_state |
*

shift_state *animation_state max_states NEXT_STATE_WRAP

*
*

==>_*animation_state
UPDATE_SETTINGS

* ;
*
* :GRADUAL_CHANGE_AT_RUN locals| ref value |
*

value SET_INSTANCE Vsource ::V V2 dc

* ;
*
* : INIT_IMOUSE_OPTION
*

1 0 4 IMOUSE_SET

* ;
*
* : GET_IMOUSE_SUBCOMPS ( -- [iIdxN ... iIdx1] )
*

* ;
*
* : ON_SUBCOMP_IMOUSE_EVENT locals| eEventType nOptions
iSubCompIdx |
*

eEventType 2 = if

-1

-1 KEYBOARD_INPUT

else

*
* ;

endif

18

*
* ( Initialize the settings )
* UPDATE_SETTINGS
* INIT_IMOUSE_OPTION
*
* :BEGIN_PLOT
*

UPDATE_SETTINGS

* ;
*
* :BEGIN_ANALYSIS
*

UPDATE_SETTINGS

* ;
*
* !!!END-INTERACT

xS1 8 0 SwitchS1

.subckt SwitchS1 1 2
V2 5 0 DC 0
R1 5 6 20
V1 6 0 DC 0
W0 2 1 V1 NC_contact
.MODEL NC_contact ISWITCH (Ion=0.05 Ioff=0.025 Ron=1e-8 Roff=1e30)
.ENDS

*## Multisim Instrument XSC1 ##*

*## Multisim Component R2 ##*


rR2 5 9 47000 vresR2

19

.model vresR2 r( )

*## Multisim Component R1 ##*


rR1 5 8 47000 vresR1
.model vresR1 r( )

*## Multisim Component C2 ##*


cC2 3 0 1e-008

*## Multisim Component U2 ##*


xU2 0 8 7 9 3 0 U2_OPEN_DIS 5 LM555__TIMER__1

*## Multisim Component C4 ##*


cC4 4 0 1e-007

*## Multisim Component C3 ##*


cC3 5 0 1e-007

*## Multisim Component U1 ##*


xU1 4 5 0 LM7805CT__VOLTAGE_REGULATOR__1

*## Multisim Component C1 ##*


cC1 4 0 0.00047

*## Multisim Component F1 ##*


* !!!BEGIN-INTERACT
* : delay_factor ++++i2 ;
* : imax
* 0
* 1e30

1.0

constant S_OK
constant blown

20

* 1e-3

constant Rinit

* 0

VARIABLE cnt

* 1

VARIABLE delaytime

* 0

VARIABLE S_BLOWN

* 0.0

VARIABLE resistance

* 0.0

VARIABLE r1Cur

* 0.0

VARIABLE r1TCur

* 0.0

VARIABLE r1CurAC

* 0.0

VARIABLE r1CurDC

* 0.0

VARIABLE flag

* 0

VARIABLE nTime

* 0

VARIABLE nTimeCur

*
* : DELAY
* *delaytime 0 do
*

*cnt 1+ ==>_*cnt

*cnt *delaytime = if

*S_BLOWN 1 + ==>_*S_BLOWN

0 ==>_*cnt

endif

* loop
* *S_BLOWN ==>_*animation_state
*;
* : R_BLOWN
*

blown resistance GRADUAL_CHANGE_AT_RUN

* ;
*
* : RESET
*

delay_factor 10000 * ==>_*delaytime

0.0 ==>_*flag

21

0.0 ==>_*r1TCur

S_OK ==>_*animation_state

0 ==>_*S_BLOWN

Rinit resistance GRADUAL_CHANGE_AT_RUN

1 RESET_ACDC

2 RESET_ACDC

GET_LOCAL_TIME ==>_*nTime

*;
* :GRADUAL_CHANGE_AT_RUN locals| ref value |
*

value SET_INSTANCE Resistor ::R r1 resistance

* ;
* :BEGIN_PLOT
*

RESET

* ;
*
*
* :OUT_DATA
*

1.0 *flag f.> if

GET_INSTANCE Resistor ::R R1 i ==>_*r1Cur

(( *r1Cur )) 1 ADD_ACDC

(( *r1Cur )) 2 ADD_ACDC

GET_LOCAL_TIME ==>_*nTimeCur

*nTimeCur *nTime - 6 >= if

(( 1 GET_DC )) ==>_*r1CurDC

(( 2 GET_AC )) ==>_*r1CurAC

*r1CurDC f.abs *r1CurAC f.+ ==>_*r1TCur

*nTimeCur ==>_*nTime

endif

imax *r1TCur f.< if

1.0 ==>_*flag

22

DELAY

DELAY

DELAY

DELAY

DELAY

DELAY

R_BLOWN

endif

endif

* ;
* : BEGIN_ANALYSIS
*

RESET

* ;
*
* 1 ACDC::ALLOC_INDEX
* 2 ACDC::ALLOC_INDEX
*
* : SIMULTATION_CHANGED
*

ACDC::CIRCUIT_CHANGE

GET_LOCAL_TIME ==>_*nTime

* ;
*
* !!!END-INTERACT
xF1 6 1 virtual_fuseF1
.subckt virtual_fuseF1 1 2
R1 1 2 1e-3
.ends

*## Multisim Component D4 ##*


dD4 2 4 1N4007__DIODE__1

23

*## Multisim Component D3 ##*


dD3 0 2 1N4007__DIODE__1

*## Multisim Component D2 ##*


dD2 1 4 1N4007__DIODE__1

*## Multisim Component D1 ##*


dD1 0 1 1N4007__DIODE__1

*## Multisim Component T1 ##*


xT1 12 13 6 2 Tran_T1
.subckt Tran_T1 p1pos p1neg s1pos s1neg
***Primary coil 1
G1 p1pos p1neg value={-1/10*(1*I(Es1))}

***Secondary coil 1
Es1 s1pos s1neg value={V(p1pos,p1neg)*1/10}

.ends

.subckt LM555__TIMER__1 0 2 3 4 5 6 7 8
rn1 8 5 5k
rn2 5 51 5k
rn3 51 0 5k
aop1 %vd(5 6) 56 op
aop2 %vd(2 51) 52 op
.model op limit (gain= 3000,
+ out_upper_limit=5,

24

+ out_lower_limit=-5,
+ limit_range=1 fraction=true)
aadc1 [56 52] [r s] ADC1
.MODEL ADC1 adc_bridge (in_low= 2.5 in_high = 2.5 rise_delay= 1e-12
fall_delay= 1e-12)
anand1 [r Q2] Q1 nand1
anand2 [s Q1] Q2 nand1
.model nand1 d_nand(rise_delay=1n)
adac1 [q1 q2] [66 62] DAC1
rad3 66 0 1
rad4 62 0 1
aadc4 [4] [40] ADC1
ainv2 40 41 inv1
adlatch q1 2u 41 3d Qb Qc dlt
.model dlt d_dlatch(rise_delay=1e-12)
apu1 2u pullup1
.model pullup1 d_pullup(load=10e-12)
apd1 3d pulldown1
.model pulldown1 d_pulldown(load=10e-12)
ainv1 Qb 31 inv1
.model inv1 d_inverter(rise_delay=1e-12)
adac72 [Qb] [72] DAC1
adac31 [31] [32] DAC1
r30 32 0 1g
b1 333 0 v=(v(32)*v(8)/5)
r3 333 0 1g
aslew %vd(333 0) %vd(3 0) Slew_Rate_Block
.MODEL Slew_Rate_Block slew(
+ rise_slope=10e+6
+ fall_slope=10e+6)
.MODEL DAC1 dac_bridge (out_low= 0.0 out_high= 5.0 out_undef=0.5)

25

rad5 72 0 1meg
rdisb 71 72 1
qdis 7 71 0 qdis
.MODEL qdis npn ()
.ends

.SUBCKT LM7805CT__VOLTAGE_REGULATOR__1 3 1 2
**************************************
*

Model Generated by MODPEX

*Copyright(c) Symmetry Design Systems*


*
*

All Rights Reserved

UNPUBLISHED LICENSED SOFTWARE *

* Contains Proprietary Information *


*
*

Which is The Property of

SYMMETRY OR ITS LICENSORS

**************************************
*node 1: VREG (OUTPUT)
*node 2: Ground (Common)
*node 3: Line Voltage
ECCX 131 2 135 2 1.0
VXX 133 2 DC 0
FSET6 2 135 VSENS2 1
FPP 3 2 VXX 1.0
R_YY 31 2 1e6
R_XX 15 2 1e8
R_ZZ 36 2 1e6
R_QQ 65 2 1e8
RXX 1 2 1e8
VSENS1 10 1 DC 0
ISET 2 15 DC 1e-3

26

DON1 15 16 DMOD1
VSENS2 16 19 DC 0
DON2 15 17 DMOD1
EON2 18 2 3 2 1
FYY 3 2 VSENS1 1
DON3 15 27 DMOD1
VDROP3 28 27 DC 2
EON3 28 2 3 2 4
ELINE 13 42 66 2 1
FSET2 2 36 VSENS2 1
DSC1 36 35 DMOD1
RCL1 36 37 10
DSC2 37 38 DMOD1
ESCCON 38 39 30 2 1
VSCCON 39 40 DC 0
FSC 19 2 VSCCON 1
FSET3 2 31 VSENS2 1
DOV1 31 32 DMOD1
EOV1 32 2 3 1 1
DOV2 31 33 DMOD1
ISET4 2 30 DC 1e-3
ELOAD 41 2 77 2 -1
ERIPPLE 42 41 72 2 1
EREF 12 13 19 2 1
E3 52 2 3 2 1
CBYPS 54 2 0.001
VORB 54 60 DC 0
RB 60 2 1e3
RBR 72 2 1000
CBS2 52 71 1

27

RSTEP 77 2 1
FRB 2 65 VORB 1
DRB2 65 67 DMOD1
VXRB 67 68 DC -1
EXRB 68 2 1 2 1
DRB1 65 66 DMOD1
RB1 66 2 1000
.MODEL DMOD1 D
*-- DMOD1 DEFAULT PARAMETERS
*IS=1e-14 RS=0 N=1 TT=0 CJO=0
*VJ=1 M=0.5 EG=1.11 XTI=3 FC=0.5
*KF=0 AF=1 BV=inf IBV=1e-3 TNOM=27
EXX 132 131 3 131 0.0444444
RST6 135 2 10000
RIQX 133 132 RQIX 2222.22
.MODEL RQIX R TC1=-0
RSET 19 2 RSET 5000
.MODEL RSET R TC1=1e-05 TC2=-1.5005e-06
RS1 10 12 0.0075
VDROPX 18 17 1.46
HSENSE1 35 2 VSENS1 4.16667
RISC 30 2 RISC 10000
.MODEL RISC R TC1=-0.0025
ROV 34 2 20000
VOV 33 34 10
EOV2 2 40 34 2 0.291667
FIQD 3 2 VSENS1 0.0003
RY 52 54 5e+06
RA 72 73 2162.75
RYR 71 72 9.999e+06

28

CRA 52 73 1.59136e-11
HSTEP 76 2 VSENS1 1
CSTEP 76 77 6e-06
.ENDS

.MODEL 1N4007__DIODE__1 d (
+IS=3.19863e-08 RS=0.0428545 N=2 EG=0.784214
+XTI=0.504749 BV=1100 IBV=0.0001 CJO=4.67478e-11
+VJ=0.4 M=0.469447 FC=0.5 TT=8.86839e-06
+KF=0 AF=1 )