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Integratedtemperaturesensorwithdigitaloutputfor
SoCpowermanagement
InthispaperanovelcompactCMOStemperaturesensorwithbuiltinanaloguetodigital
conversionandcalibrationispresented.IthasbeenimplementedinST's90nmand65
nmprocessesandispartofST'slowpowerplatformstrategytooptimizeSoCpower
consumptionandperformance.
Thispaperappearsin:Design&TechnologyofIntegratedSystemsinNanoscaleEra,2007.DTIS.
InternationalConferenceon,IssueDate:25Sept.2007,Writtenby:Vogt,LionelChara,Youness
Ouannani,HichamNazih,Maria
2007IEEE
SECTIONI.
INTRODUCTION
IntheNanometerera,SystemonChippowerdissipationhasincreaseddramaticallywiththeabilitytointegratemoreprocessingpower.Thetemperature
dependantbehaviorofdigitalcircuitshasalsobecomemorecomplextomanagewiththesharpincreaseofleakagecurrentsandtheapparitionof
temperatureinversion.
Therefore,monitoringtheinternaljunctiontemperatureismandatory,firstlytomaintaincircuitswithinsafeoperatingrange,secondlytooptimizetheir
performance.
Managingthedynamicpowerconsumption,leakageandoperatingspeedofacomplexSoCbyadaptingtheactivity,frequencyandsupplyaccordingto
certainindicators,suchasinternaljunctiontemperaturehasbeenpresentedin[1].
ImportanttemperaturegradientscanalsobeobservedacrossaSoCdependingoftheactivityofitssubsystems,givingrisetotheneedforlowareasensors
whichcanbedistributedconveniently.
IntegratedCMOStemperaturesensorshavethereforeemergedasacrucialenablingIPforsystemlevellowpowerandperformanceoptimization.
Wepresentanoriginaltemperaturesensorofferingthefollowingfeatures:compactarchitectureandcircuitarea,robustnessforintegrationinadigital
environment,embeddedanaloguetodigitalconversionandcalibration.
SECTIONII.
PRINCIPLESOFTEMPERATURE
SENSORS
Manyimplementationsoftemperaturesensorshavebeenreported,relyingonthewellknowntemperaturedependencyofbipolardevices,availableas
substratePNPsinaCMOSprocess.
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II.1.ProportionaltoAbsoluteTemperature(PTAT)source
Figure1:PTATvoltagesource.
Agoodapproximationofthebipolartransistorcollectorcurrentinthemediumlevelinjectionis:
qV
Ic = Is (e
qV
BE
KT
1) Is e
BE
(1)
KT
ViewSource
ButforPNPbipolarinCMOStechnology,onlytheemittercurrentisaccessible.
AsIeisrelatedtoIcbyforwardcurrentgain ,wecanwrite
1
Ie = Ic (1 +
qV
1
) = (1 +
) Is e
BE
(2)
KT
ViewSource
kT
V P T AT (T ) =
ln (m. n) = P T AT T
(3)
ViewSource
canberewrittenas:
k
P T AT
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(ln(m. n) + ln (
=
q
1 + 1/2
))
(4)
1 + 1/1
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ViewSource
Thiswillcauseaprocessandtemperaturedependenterror,thissensitivityto canbereducedbyincreasingm.n.
II2VBE&BandgapVoltagegeneration
Bandgapvoltagereferencesarebasedontheadditionoftwovoltagesourceswithoppositetemperaturecoefficient.TheVBEofbipolardevicesbiasedbya
PTATcurrent[3]is:
V BE (T ) = V BE0 P T AT T c(T )
(5)
ViewSource
VBEisessentiallyavoltagewithatemperaturecoefficientaround2mV/Kandatemperaturedependantcurvaturetermdescribedbyc(T).
Onemayobtainatemperatureindependentvoltagesource,bysummingtheVBEvoltageandaPTATsourceinordertocancelouttheirtemperature
coefficientsaroundacentervalue,bychoosingappropriatelyin(6).
V REF (T ) = V BE0 + V P T AT
(6)
ViewSource
Thecurvaturetermremains,techniquesexisttocorrectitbutitwillnotbenecessaryinourapplication.
Suchareferenceisrelatedtothesiliconbandgapvoltage,henceisanabsolutereferencewithgoodaccuracy.
II2TemperatureSensorswithaccurateA/Dconversion
SinceitispossibletogeneratePTATvoltageandabsolutereferencewithproventechniques,itisnaturaltoconverttemperaturetoadigitalvaluebyfeeding
aPTATinputtoanADCreferencedtoabandgapvoltage[2].
Unfortunately,sinceVPTATexhibitsaslopeintheorderof0.2mV/K,ahighprecisionamplificationisrequiredpriortoA/Dconversion,employing
sophisticatednoiseandoffsetreductiontechniquessuchasswitchedcapacitorintegratingchopperamplifier,whichareofutmostelegancebutcostly.
Analternativearchitecturehasbeenproposedin[3]and[4],smartlyavoidingtoamplifyVbeandVrefseparately,butintegratingthedifferenceina
sigmadeltaloopwhichnullsitsaverage,showninthefollowingdiagram.
Figure2:Simplifiedsensorpresentedin[3]and[4]
Solvingfortheaveragevalueofthebitstreamyields
V be
x =
N
=
V be + V be
(7)
D
ViewSource
Appropriatevaluesforand makeDtemperatureindependent,thusxisalinearrepresentationoftemperature.TheoptimumisactuallytogiveDa
positiveTCtoeliminatecurvatureerrorinthedigitaloutput[4]
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Unfortunately,firstorderSigmaDeltamodulatorsprocessingDCsignalssufferfromlimitationssuchaslimitcycles,whichleadtheauthorstoemploya
secondorderloopwitharesetsystemandcomplexdigitalfiltering.Althoughextremelyaccuratethisarchitectureistooareaandpowerconsumingforus.
AcontinuoustimesigmadeltaADCalsoofferslittleflexibilitywithregardstoclockfrequency.
However,thekeyadvantageistoprocessthedifferenceofPTATandVBEsource,actuallyintheformofcurrents.
SECTIONIII.
ProposedThermalSensor
Architecture
Weproposeanarchitecturemergingtheanalogreference,PTATsourceandanalogtodigitalconversion,toobtainacompactandrobustsensor.
Theconversionalgorithmprocessesanerrorsignalminimizedbyasuccessiveapproximationloop,similarlytoaSARADC.
Thearchitecturedescribedhereaftermakesuseofbothvoltageandcurrentsignals.
Figure3:Proposedtemperaturesensorstructure
ABandgapreferencecircuitprovidestwooutputs:
AstablevoltagereferenceVbg
APTATcurrent,
(8)
ViewSource
AD/Aconverterisdesignedtosinkacurrentequalto:
C
I DA =
I DAF S + I DA0
(9)
ViewSource
whereNisthenumberofbits,Ctheinputcode,I DA
FS
thefullscaleswingandI DA thevaluewhenC=0.
0
Thezerolevel,fullscalevaluesoftheD/AarefixedbyVbgandresistorsmatchedtotheonesdeterminingthetransconductanceGin(4).
TheopampAforcesVp=Vbg,whilealsoproducinganerrorsignal
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(10)
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ViewSource
ThecomparatorsensesthesignofVeandsendsalogicoutputcmptothestatemachine
Thelatter,withasimpleiterativealgorithm,adjuststhedigitalcodeCtoobtainVeasclosetozeroaspossible,whichtranslatesintothefollowing
condition:
G Vbe IDA = 0.
(11)
ViewSource
Fromtheaboveequationwecanderive:
N
C = (2
1)
G V be I DA0
(12)
I DAF S
ViewSource
FS
Letusnote:G V be
= (2
1)
= B T
With(11)wefindhowtofixtheD/Arange:
I DA0 = B T 0
(13)
I DAF S = B (T 1 T 0 )
(14)
ViewSource
and
ViewSource
Substitutionin(12)showsthat
N
C = (2
(T T 0 )
1)
(15)
(T 1 T 0 )
ViewSource
Atrivialexampleistochose T
,CisthentheintegervalueofTCelcius.
SECTIONIV.
Circuitimplementation
Theabovearchitecturecanbeimplementedsimply:
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Figure4:Circuitlevelimplementation
ThebuildingblockscorrespondingtoFigure3arehighlightedbythedottedboxes.
TheBandgapreferenceproducesavoltageoutput(nominally1.21V)andaPTATcurrent.
TheD/AconvertercanbeimplementedasasimpleR2Rladder(R=2*r),thankstoamplifierA,forcingVp=VbthusallowingtheR2Rladdertooperate
correctly.
TheuseofasimplepassiveD/Aeliminatestheneedforanadditionalvoltage/currentreferencecircuitandhighoutputimpedancecurrentsourceD/A
converterwhichwouldcausereplicationerrorsandextracircuitcomplexity.
AnothersubtledifferencewiththebasicblockdiagramisthattheD/Aoutputisadifferentialcurrent,IDNIDP.
Thankfully,theamplifierintheBandgaploopforcesnodeVbtobestable,bycontrollingVg,thegateofthematchedcurrentsourcesIo&I1.Doingso,the
IDPcurrentoutputaddstoIptatinthesourceIo,copiedintoI1,thensubtractedtoIDNatnodeVp,therebyperformingdifferentialtosingleended
conversionattheD/Aoutputbymeansofthisbuiltinactivecurrentmirror.
Accordingtofigure4thePTATvoltagedevelopsacross R ,andtheassociatedcurrentsumswith I
followstheequation:
0
IP T AT
R2
= IR1 + IR2 =
V BE
(1 +
R0
R1
R2
intothe I source,thereforethePTAToutputcurrent
0
) = G V BE
(16)
ViewSource
TheD/Afollowstheequations:
IDP =
2V REF
i=N 1
iN
bi 2
+ 2
(17)
i=0
ViewSource
SincethetotalcurrentthroughtheR2Rladderisconstant,fixedbyVref=VbandR,RTo:
2
IDP + IDN = V REF (
1
)
+
R
(18)
RT 0
ViewSource
TheD/Aoutputsformaxandmincodesaretherefore:
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) = I DAC (1) = (
(1) +
(1)) 2
(1)
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Iptat (T 1 ) = I DAC (1) = (IDN (1) + IDP (1)) 2IDP (1)
2
= V REF [(
2N
2
)
+
R
RT 0
(19)
ViewSource
and
Iptat (T 0 ) = I DAC (0) = (IDN (0) + IDP (0)) 2IDP (1)
2
= V REF [(
4
)
+
R
RT 0
(20)
ViewSource
Thus
I DAF S = I DAC (1) I DAC (0) =
1
I DA0 = V REF [
4V REF
(1 2
(21)
2
]
RT 0
(22)
ViewSource
Theaboveresultsallowtodetermineappropriatevaluesfortheresistorstoobtainthedesiredtemperaturerange.
SECTIONV.
ERRORSOURCESANDACCURACY
Theaccuracyofthemeasuredtemperatureisaffectedbyerrorson I
and V
generationandonmeasurementpart(ADC).Theseerrorsaredueto
mismatchandprocessdispersion.ThereimpactcanbemodeledbyoffseterrorandslopeerrorofthecurveC[0 : n 1] = F(T) in(figure5).
PTAT
REF
V.1Mismatcherrors
Mismatcherrorscanaffectseveralcomponentsonfigure3:
Between{RO,R1,R2}itimpactsslopeerroronIPTATandVBG
betweenR2Rladderelementsintroducesdifferentialnonlinearity(DNL)errors
betweenBandgapresistorsandR2Rladdercausesslopeandoffseterror
betweenI0andI1introducesslopeandoffseterror.
Figure5:Slopeandoffseterrors
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Butinpractice,themostimportanterrorsareduetoactivecircuitsoffsets:
Comparatoroffsetcausesoffseterror.
Itmustkeepitlowerthan1/2LSB
|V O
C OM P
I DACLSB R3
(23)
ViewSource
IncreasingR3reducesthesensitivitytothisoffset,howeverthisincreasestheopampsettlingtime,whichmustremainlowerthanoneSARclockperiod.
SubtractorOpAmpoffsetcausesslopeandoffseterror.Indeed,thisoffsetcausesVptodifferfrom V
fullscaleoftheDAC.With V
= 1.2V andoffsetof2mV,theslopeerrorwillnotexceed0.1%.
REF
,whichinturnaffectsbothzeroleveland
REF
BandGapOpAmpoffsetisthemostcriticalerrorsourcesinceitisdirectlyaddedtoV be andappliedtoR0. I
R0,soanadditionalcurrenterrorwillbemeasured:
PTAT
R1
IP T AT
= (1 +
IP T AT
= (1 +
V BE + V o
R2
BG
R0
R1
)
R2
isproportionalthevoltageacross
V BE
(1 +
R0
Vo
BG
(24)
V BE
ViewSource
V beisintheorderof70mV,thus V
willbealargesourceoferror,furthermoreoffsetcandriftintemperature.However,thecircuithasbeen
implementedwithoutchoppingandcalibrationbutreliesonverygoodmatchingpropertiesofourprocess,usinglargeenoughdevices.InadditionVREF
willalsobeaffected,butwiththesamesignasthePTATcurrentthusmitigatingthiseffect.
o BG
R1
V REF
of f
= V REF + (1 +
R0
) Vo
BG
(25)
ViewSource
V.2SystematicProcesserrors
in(4)willbeaffectedbycurrentgainvariationswhichhasbeenfoundtobethelargestsystematicsourceoferror.Polysiliconresistorvariationwill
haveonlyasecondordereffectbychangingthecurrentdensity.
PTAT
V.3Digitalcalibration
Asoffseterrorsaretemperatureindependent,theycanbesubtractedfromtheoutputwithaonepointcalibration:
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Figure6:Offsetremovalindigital
Beforecalibration(correctioncode=0):
C (T ) = T 0 + 0f f set + (1 + slopeerror )(T T 0)
(26)
ViewSource
Cm
ThecodeafterthiscalibrationforanothertemperatureTis:
C (T ) = T m + (1 + slopeerror )(T T m )
(27)
ViewSource
ThetemperatureerroristheS lope
error (T
Tm )
Wecannotethatthiserrorincreasewiththedifferencebetweenoperatingtemperatureand T .Sotheidealpointofcalibrationisthemiddleofthe
operatingrange(T0+T1)/2.
m
SECTIONVI.
EXPERIMENTALRESULTS
ThetemperaturesensorhasbeendesignedandfabricatedinST's90nmand65nmCMOSprocesses.Thetypicaltemperaturerangecoveredis127degrees
with7bits.Thiswaschosenasatradeoffbetweenareaandperformance,with1LSB/K,theA/Dconversionaccuracyisbetterthantheabsolutesensor
accuracyduetoanaloguenonidealitiesdepictedinsectionV.Thiswastheoptimum,asaddinganextrabitofresolutionnotonlyaddsanextraresistor
elementbuthalvesthemismatchbudgetonresistors,asthebinaryweightedladderisnotintrinsicallymonotonic.Verycarefullayouttechniqueshavebeen
employedtomergetheR2RarrayandtheBandgapresistorsladderstooptimizeD/ArangetoIptatrangemismatch.
Adedicatedtestchipwasdesigned,withdifferentorientationsofthesamesensor,alsoallowingautomatictilingonsomeinstancesonly,toexplorepossible
impactonperformance.Thetestchiplayoutisshownhereunder,withfoursensors
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Figure7:90nmtestchiplayout,4sensors
Figure8:90nmsensorlayout
Fullsiliconcharacterizationofthesensorhasbeenperformed,bothonamanualbenchandonatester,toreproducetheconstraintsofaproduction
environment.Athermalforcingunitregulatesthedietemperaturewithanairflow,aprecisionsensorisplacedunderthedietoreadtheexact
temperature.12integratedsensorshavebeenmeasured,showingthefollowingresults.
Figure7:Rawsensoroutput,4instances3chips
Figure8:Min/maxdeviationsw.r.t.averageandideal
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Thesensorsproduceanaccurateoutput,withlittledispersionfrominstancetoinstanceonthesamechip,showingnoeffectoforientationandtiling,and
nosignificantdispersionfromchiptochip.Theworstdeviationsobservedon12sensorsareplottedonfigure8,showingadeviationof+3/2degrees
comparedtoideal,withoutcalibration.Themeasurementscoveratemperaturerangeof20to120degrees,16degreeshavetobeaddedtothefigureson
thegraphs,becausethedigitalcorrectionoftheoutput(5bitsadder)wassettozeroduringthesemeasurementswithoutcalibration.
Figure9:Comparisonwithreportedsolutions
SECTIONVII.
CONCLUSION
ThispaperhaspresentedanovelcompacttemperaturesensorwithdigitaloutputforSoCpowermanagement.IthasbeensuccessfullyimplementedinST's
90nm&65nmCMOSprocess,measurementresultshaveshownverygoodcorrelationbetweensensorsintermsoflinearityandabsoluteaccuracy.I
representsgoodcompromisebetweenarea,accuracy,integrationrobustness.TheabsoluteaccuracyissufficientforSoCthermalmanagement,whilethe
smallareaallowstoimplementmultipleinstancesonthesamechip.
FOOTNOTES
"NoDataAvailable"
REFERENCES
1.ISSCCDigestoftechnicalpaper,vol.50,feb,2007,James&Al
ShowContext
2.IEEEJOURNALOFSOLIDSTATECIRCUITS,vol.33,no.7,JULY,1998,"ASwitchedCurrentSwitchedCapacitorTemperatureSensorin0.6umCMOS",Mike
Tuthill&Al
ShowContext
3.A.Bakker,J.H.Huijsing,"MicropowerCMOStemperaturesensorwithdigitaloutput",IEEEJ.SolidStateCircuits,vol.31,pp.933937,July,1996
ShowContext
4."ACMOSSmartTemperatureSensorWithaInaccuracyof0.5CFrom50Cto120C",IEEEJOURNALOFSOLIDSTATECIRCUITS,vol.40,no.2,FEBRUARY,
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2005
ShowContext
AUTHORS
LionelVogt
NoBioAvailable
YounessChara
NoBioAvailable
HichamOuannani
NoBioAvailable
MariaNazih
NoBioAvailable
CITEDBY
None
KEYWORDS
IEEEKeywords
Temperaturesensors,Energymanagement,Voltage,Temperaturedependence,Calibration,Energyconsumption,Circuits,CMOStechnology,Photonicbandgap,
Sensorsystems
INSPEC:ControlledIndexing
temperaturesensors,CMOSintegratedcircuits,systemonchip
INSPEC:NonControlledIndexing
size65nm,integratedtemperaturesensor,SoCpowermanagement,CMOStemperaturesensor,analoguetodigitalconversion,powerconsumption,size90nm
AuthorKeywords
Analoguetodigitalconversion,TemperatureSensor,TemperaturedependantSource
CORRECTIONS
None
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