Soft Radio

514 IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, VOL. 17, NO.
4, APRIL 1999
Software Radio Architecture:

A Mathematical Perspective
Joseph Mitola, III, Member, IEEE
Abstract— As the software radio makes its transition from band, multimode, multithreaded, multipersonality capabilities
research to practice, it becomes increasingly important to es- of software radios require an expansion of this simple model.
tablish provable properties of the software radio architecture
on which product developers and service providers can base
technology insertion decisions. Establishing provable properties A. Essential Functions of the Software Radio
requires a mathematical perspective on the software radio archi- Technology advances have ushered in a new level of
tecture. This paper contributes to that perspective by critically physical-layer flexibility of the radio. Multiband technology
reviewing the fundamental concept of the software radio, using
mathematical models to characterize this rapidly emerging tech- [1], first of all, accesses more than one RF band of
nology in the context of similar technologies like programmable communications channels at once. The RF channel of Fig. 1,
digital radios. The software radio delivers dynamically defined then, is generalized to the channel set of Fig. 2. This
services through programmable processing capacity that has the set includes RF channels, but radio nodes like personal
mathematical structure of the Turing machine. The bounded communications system (PCS) base stations [2] and portable
recursive functions, a subset of the total recursive functions, are
shown to be the largest class of Turing-computable functions military radios also interconnect to fiber and cable; therefore,
for which software radios exhibit provable stability in plug-and- these are also included in the channel set. The channel encoder
play scenarios. Understanding the topological properties of the functions are expanded to programmable RF/channel access,
software radio architecture promotes plug-and-play applications intermediate frequency (IF) processing, and modem. Antennas
and cost-effective reuse. Analysis of these topological properties and RF conversion that span multiple RF bands (and fiber-
yields a layered distributed virtual machine reference model
and a set of architecture design principles for the software optic interfaces) comprise the RF/channel access function. IF
radio. These criteria may be useful in defining interfaces among processing may include filtering, further frequency translation,
hardware, middleware, and higher level software components space/time diversity processing, beamforming, and related
that are needed for cost-effective software reuse. functions. Multimode radios [3] generate multiple air interface
Index Terms— Computability, digital radio, software radio, waveforms (“modes”) defined principally in the modem, the
topology. RF channel modulator–demodulator. These waveforms may be
in different bands, and may span multiple bands. The source
and channel coders of Fig. 1 therefore become the multiple
I. INTRODUCTION
personalities of Fig. 2. A personality combines RF band,
I T is well established that a communications system is the

set of devices by which one employs a communications
channel to convey information to a recipient. From a radio
channel set (e.g., control and traffic channels), air interface
waveform, protocol, and related functions.
Although many applications do not require information
engineering perspective, the communications device must first security (INFOSEC), there are incentives for its use. Authen-
encode the information from the source into a suitable elec- tication reduces fraud. Stream encipherment ensures privacy.
tronic representation. The device then must transform this Transmission security (TRANSEC) hides the fact of a com-
internal form into a waveform compatible with the radio munications event (e.g., by spread-spectrum techniques [4]).
frequency (RF) communications channel. The channel distorts INFOSEC is therefore included in Fig. 2, although the function
the RF signal, adds noise, and creates time-delayed distorted may be null for many applications.
replicas of the signal. The process is (imperfectly) reversed in In addition, the source coder/decoder pair of Fig. 1 must
the receiver as illustrated in Fig. 1. now be expanded to include the data, facsimile, video, and
In this venerable historical framework, control of the radio multimedia sources implicit in Fig. 2. Some sources will be
needs little attention, generally limited to power on/off, audio physically remote from the radio node, e.g., connected via the
volume control, a noise-riding receiver threshold (“squelch”), synchronous digital hierarchy (SDH) [5], a local area network
and a switch to manually select from among predefined RF (LAN) [6], or other network through service and network
channels. Several such transmitter(s) and receiver(s) located support of Fig. 2.
and working together comprise a radio “node.” The multi- These functions are implemented in multithreaded, multi-
processor software orchestrated by a joint control function.
Joint control assures system stability, error recovery, timely
Manuscript received November 11, 1997; revised March 17, 1998 and data flow, and isochronous streaming of voice and video.
August 23, 1998.
The author is with The MITRE Corporation, McLean, VA 22102 USA. As radios become more advanced, joint control becomes
Publisher Item Identifier S 0733-8716(99)02974-1. more complex, evolving toward autonomous selection of band,
0733–8716/99$10.00  1999 IEEE
Authorized licensed use limited to: K.S. Institute of Technology. Downloaded on January 23, 2009 at 19:37 from IEEE Xplore. Restrictions apply.
MITOLA: SOFTWARE RADIO ARCHITECTURE 515
Fig. 1. Traditional model of radio communications.
Fig. 2. Functional model of a software radio communications system.  Mitola’s STATISfaction, used by permission.
mode, and data format. Any of the functions may be singleton Traditionally, one may model the statistical demand for
(e.g., single band versus multiple bands) or null, further com- computational resources versus processing capacity using
plicating joint control. Agile beamforming supports additional queueing theory [14]–[16]. Real-time performance can be
users and enhances quality of service (QoS) [7]. Beamforming assured in a fixed architecture using this approach [17].
today requires dedicated processors, but in the future, joint Plug-and-play, however, creates a variable architecture as
space–time equalization algorithms may time-share a digital modules are introduced into the environment and removed.
signal processor (DSP) pool along with the Rake receiver This raises the complexity of the statistics, particularly in
[8] and other modem functions. Joint source and channel complex nodes such as a base station cell site in which
coding [9] also yields computationally intensive waveforms. hundreds of users can invoke dozens of variable-bandwidth
Dynamic selection of band, mode, and diversity as a function services in a pool of shared DSP’s. A deeper understanding
of QoS [10] introduces large variations into computational- of the statistical properties of such environments is no doubt
demand, potentially causing conflicts for processing resources. needed. Underlying such statistical analyses, there must be
Channel strapping, adaptive waveform selection, and other a predictable computational-demand relationship between the
forms of data rate agility [11] further complicate the statistical plug-and-play module and the environment. This calls for a
structure of the computational demand. In addition, processing theory of plug-and-play resource bounds for the software radio
resources are occasionally lost through equipment failures within which such predictable relationships will exist.
[12]. Joint control integrates fault modes, personalities, and An obvious challenge is to define interface points for
support functions on a limited resource of applications-specific plug-and-play hardware and software modules. Industry orga-
integrated circuits (ASIC’s), field-programmable gate arrays nizations including the Software-Defined Radio (SDR) Forum
(FPGA’s), DSP’s, and general-purpose computers to yield a (formerly the Modular Multifunction Information Transfer
reliable telecommunications object [13]. Systems—MMITS—Forum) are in the process of identifying
A software radio can upload new air interface personalities. such interface points using generalized applications program-
These may modify any aspect of the air interface, including mers interfaces (API’s) [18]. A less obvious challenge is
whether the waveform is hopped, spread, or otherwise con- to define architecture principles that assure that plug-and-
structed. The required resources (e.g., bandwidth, memory, play architectures will have the mathematical properties of
and processing capacity), of course, must not exceed those controllability and predictability necessary for true plug-and-
available. Some mechanism for evolution support is therefore play services. This paper focuses on that challenge. The
necessary to define the waveform personalities, to download relevant properties may be characterized in the following
them (e.g., over the air), and to assure that each new per- mathematical framework.
sonality is safe before being activated. To type certify such a
radio, one must guarantee that the properties specified by the B. Toward a Mathematical Model of
regulatory bodies are preserved in spite of this high degree of Plug-and-Play Architecture
flexibility. The need for such guarantees motivates the study The thesis of this paper is that the next-generation radio
of the mathematical properties of this architecture. functions of Fig. 2 have a mathematical structure that con-
516 IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, VOL. 17, NO. 4, APRIL 1999
Fig. 3. Topological structure of an illustrative radio.
strains the behavior and interfaces of plug-and-play modules. value “software.” Other dimensions may be continuous in ,
The mathematical framework abstracts away the details of the real numbers, such as the range of a control parameter.
the radio functions, interfaces, and implementations. It iden- In addition, there may be infinite-dimensional subspaces such
tifies the computational and geometric structure that diverse as analog signals. Each subspace represents an aspect of the
software, services, and hardware platforms share. architecture.
In the proposed framework, modules are modeled as map-
pings of signals among architecture interface points defined C. Architecture Goals
as vertices in a topological space. Topological spaces are very
general geometric spaces with a few set-theoretic axioms [19]. A successful plug-and-play architecture entails at least the
Mappings among interface points are represented as edges or following.
arcs in this space. An edge is that which joins two vertices. Compatibility: The structure of plug-and-play modules must
An RF ASIC, for example, transforms the RF signal at the be compatible with that of the software radio environ-
input vertex into the baseband signal at the output vertex. An ment—arcs plug into nodes for function composition.
arc, on the other hand, is a map that has properties in addition Predictability: Module composition must preserve radio
to its vertices, such as the power dissipated by the associated service-defining properties of the system, and when control
RF ASIC. This model may be used is exerted, it must not have unintended consequences. Mod-
1) to identify top level plug-and-play interfaces; ules must not consume excessive computational resources.
2) to predict and control system performance; An architecture is a framework in which a set of compo-
3) to define a reference model for standards setting; nents is used to achieve specified functions (services) within
4) to derive architecture principles for product evolution. specified constraints or design rules [21]. Compatibility and
Mathematical models of multiprocessor task specifications predictability are the properties of plug-and-play architecture
based on topological spaces have been used to prove important studied in this paper. A mathematical framework for a plug-
properties of shared memory multiprocessors [20]. The model and-play architecture should inductively establish the desired
used in this paper is akin to such models.1 The model in Fig. 3 properties of a given set of components within specified
shows radio hardware and software functional arcs joining design rules. Due to the open-ended nature of radio services
the interface points in a topological space. This example and technology, the framework must be extensible both to
shows a dual-band receiver with an analog-to-digital converter new services and to new implementation platforms. This
(ADC) IF, a channel filter ASIC, and software modem and paper begins the development of this framework with a top-
vocoder (voice coding) functions. Some arcs represent the down review of the properties of the software radio. A
movement of signals and data from one interface point to bottom-up analysis of the computational properties of software
another via isochronous, real-time streams (e.g., the high- radio components then sets the stage for the derivation of
band RF hardware and modem software of the figure). Others the layered virtual machine reference model. Architecture
represent the exertion of control over states (e.g., user choice principles that support plug-and-play modularity are developed
of a channel) and parameters that affect a stream (e.g., the in the process.
channel filter).
Any important properties of the arcs become dimensions
II. DEFINING THE SOFTWARE RADIO
of the topological space. For example, the interface node
between the IF ADC and the channel filter would have the This section defines the software radio from several per-
value “hardware” in an “implementation” dimension. The spectives: engineering design, topological structure, and com-
interface between the modem and vocoder would have the putational structure. The programmable digital radio (PDR) is
defined and differentiated from the software radio. Topological
1 Rather than present the mathematical ideas formally and at once, they are properties of components are introduced in this section and
introduced throughout the paper as needed. developed in Sections III and V. In Section IV, the bounded
Fig. 4. Key software radio functions and components.
recursive functions are developed. Section VI derives archi- B. The Software Radio
tecture partitions and design principles. The software radio imparts multiple personalities to a radio
in a specific way [26]. A software radio defines all aspects of
the air interface including RF channel access and waveform
A. Programmable Digital Radios
synthesis (not just selection) in software. In the software
There are many ways to impart more than one personality radio, then, wide-band analog-to-digital and digital-to-analog
to a radio. The term “PDR” applies to those radios that use a converters (ADC’s [27] and DAC’s) transform each RF service
hardware-intensive mix of hardware and software techniques band among digital and analog forms at IF as in Fig. 4.
to access more than one RF band with a choice of air interface The wide-band digitized receiver stream of bandwidth
modes [22]. A PDR’s programmability may be achieved using accommodates all subscriber channels, each of which has
baseband DSP’s. However, hardware modules or “slices” must bandwidth ( ). The mathematical framework
be interchanged for the radio to change RF band and air differentiates alternative ADC and DAC architectures, with
interface mode (“waveform”). the attendant differences in programmability.
The software-defined radio (SDR) was defined by BellSouth In the software radio of Fig. 4, IF ADC and DAC chan-
to describe an evolution toward greater programmability of nels are processed isochronously using programmable digital
a wireless infrastructure [23]. This evolution includes pro- hardware, and software.2 IF processing may include filtering
grammable multiband, multimode radios implemented using to isolate subscriber channels [28]; digital formation of nulls
the PDR approach. An IS-95/AMPS handset, for example, and beams [29]; joint space–time equalization [30]; integration
may employ a code-division multiple-access (CDMA) chip of space diversity [31], polarization, or frequency diversity
set for IS-95; an analog mobile phone system (AMPS) chip channels [32]; and other means of acquiring a high-quality
set; a dual-mode RF integrated circuit (RFIC) chip set [24]; a waveform. There may be multiple IF frequencies (in the
DSP chip [25] for filtering, voice coding, and computationally heterodyne receiver) or the IF frequency may be zero (in
intensive tasks; and a microcontroller for user interface and the homodyne receiver [33]). IF processing may be null,
system control. Many of the functions are programmable, but for example, in a direct conversion receiver [34]. Digital
the CDMA despreader, for example, is defined in an ASIC, and downconversion is the process of using the frequency-domain
may not be changed in the field. Over time, functions initially periodicity of sampled bandpass waveforms to translate the
implemented in hardware (e.g., the RF modem) will migrate
2 Software here means algorithms stored in random access memory of
to software and conversely. The mathematical framework
processors which may, in principle, be downloaded over the air. Firmware
must therefore capture SDR migration between hardware and is software to the degree that it can be downloaded; otherwise, it is part of
software. the hardware personality.
Fig. 5. (A) Topology of an RF ASIC and (B) its digital equivalent.
waveform to baseband without analog heterodyning [35]. and flexibility, fixed-function ASIC’s generally consume less
Preselection filters with the necessary 80+ dB of out-of-band power, take less space, weigh less, and cost less per device
attenuation are becoming available in superconducting RF than the programmable DSP equivalent. Therefore, increased
filters [36]. Local oscillator leakage may also be reduced flexibility comes at a price. One way of representing these
proportionally so that digital downconversion is becoming differences mathematically is to attribute equivalent computa-
more feasible. The mathematical framework represents plug- tional capacity to the nonprogrammable devices.
and-play aspects of such variations via sets of arcs and nodes In the topological model of the hypothetical radio illustrated
with subset relationships. in Fig. 5 (top), an RF ASIC (A) transforms the analog signal
In the software radio transmitter, baseband signals are from the antenna directly to input for the baseband modem.
transformed into sampled channel waveforms via channel The software-equivalent model (B, bottom) postulates an RF
modem functions implemented in software to drive high- ADC with exactly the bandpass characteristics of the RF ASIC.
performance DAC’s. These signals may be preemphasized The frequency translation behavior of RF ASIC (A) is modeled
or nonlinearly precoded [37] by the IF processing software. as the frequency translation software process of model (B). The
In some implementations, modem functions, IF processing, filtering behavior of the RF ASIC is modeled by the channel
and RF channel access may be amalgamated into a single filter software of (B). The sequence of RF ADC, frequency
component such as a direct conversion receiver RFIC [34]. In translation, and channel filter arcs constitute the software-
addition, dynamic compilation of software or real-time switch- equivalent model of this ASIC. The equivalent computational
ing among personalities can allow these discrete functions capability of RFIC (A) is the total computational demand of
to be integrated into a single component such as an FPGA the postulated software processes (B). Since analog hardware
[38]. The mathematical framework represents both discrete and has variable performance over time and over different devices,
integrated implementations. In discrete implementations, each
the exact filter model of a given RF ASIC will change over
edge in the topological space is also an arc corresponding to a
time. Thus, each device is represented in a set of models.
component. In an integrated implementation, a component arc
The variations are contained within “open balls” [39] in the
subsumes many topological edges.
parameter subspace of the topological model (Fig. 6). One may
also aggregate multiple device models into such a parametric
C. A Software-Equivalent Model of Hardware model by taking set unions. The set of all such arcs and
The ADC and DAC define the point at which functions open balls comprises the topological model of the ASIC.
are potentially software defined. We may call this the digital Each model may also have parameter sets in dimensions that
access point. Relatively inflexible analog and digital hardware characterize or predict such diverse properties as time delays
such as ASIC’s may be necessary in a handset, e.g., for and power dissipation.
direct conversion of the channel waveform to a bitstream. Although the sequel focuses on computational properties,
Although an ASIC may have a few control parameters, the this set-theoretic framework is general, capable of representing
personality of an ASIC cannot be changed in the field (e.g., local properties of a device including interface details, size,
from one air interface standard to another). To change the weight, and power. Since topological spaces are not neces-
air interface personality, one must replace the ASIC, switch sarily linear, aggregate properties of the radio system in the
among different ASIC’s, or switch among modes of one higher level spaces may have nonlinear relationships to the
ASIC. In the tradeoffs among size, weight, power, cost, properties of the components in the lower level spaces.
Fig. 6. Parameter uncertainty constrained to “open balls.”
Fig. 7. Hardware topology shows incompatibility.
D. Quantifying Degrees of Programmability the radio. As shown in the figure, its needs are incompatible
The degree of programmability of an implementation is fun- with the gate use of the existing timing recovery logic.
damental to software radio architecture. Since contemporary Assume that one redefines the personality of the FPGA to
radios use a mix of processor types, one must characterize this accommodate the new logic. The download size increases from
the 10% needed for the increment to 100% for the entire
mix precisely. Consider the highest level topological model of
personality, a 900% increase in the size of the download.
a radio (a single arc). This arc may be hierarchically divided
It is also possible that a moderately populated (70%) FPGA
into its primitive components. Hardware primitives are the
will be unable to accommodate the 10% download because of
discrete devices, while software primitives are single machine
hardware constraints such as the required placement of I/O
instructions. Primitives that may be redefined via software in
buffers, lack of registers, etc. A similar topological model
the field are labeled. The number of labeled primitive arcs
of a DSP chip is shown in Fig. 8. The additional 10% of
divided by the total number of primitive arcs is a measure of
DSP code associated with the advanced timing recovery logic
programmability. Since an ASIC’s programmability is limited (now implemented in software) is accommodated via space
to the modification of a few parameters, most of its gate-level available in the nonvolatile random access memory (RAM).
arcs will not be labeled. The memory map allocates this logic to RAM hardware.
FPGA’s are, in principle, completely programmable. In DSP may appear easier to program than FPGA’s because
practice, they are more programmable than ASIC’s, but subject RAM allocation is accomplished by loader software while
to gate and interconnect constraints. Programmable radios have gate allocation in an FPGA generally requires an experienced
been based almost entirely on reconfigurable FPGA’s [40]. designer. New waveforms also seem to outgrow the gates of
The field programmability of an FPGA is more constrained an FPGA more easily than they outgrow the program memory
than that of a DSP chip, in part because of the likelihood of of a DSP chip. On the other hand, the timing constraints of
running out of usable gates on the FPGA as radio functions DSP software are more severe than the timing of an equivalent
expand. The topological model of each type of device allows FPGA. Logic in an FPGA runs at nearly the chip’s clock rate,
one to characterize programmability more precisely. In the while the DSP code runs from one to three orders of magnitude
FPGA topology of Fig. 7, two dimensions (corresponding to slower than the system clock. The tradeoff of ASIC hardware
states and interconnect) represent the allocation of functions allocation and DSP task timing is reflected in these subsets of
to hardware. the topological model.
Suppose that an advanced timing recovery algorithm, com- Complex or reduced instruction set computers (CISC/RISC)
prising, say, 10% of the FPGA area is to be downloaded to provide less hardware acceleration than DSP chips. To quantify
Fig. 8. DSP hardware commitment subspace topology.
the degree of flexibility of DSP, CISC, and RISC processors, One places the radio on the horizontal axis according to the
one again defines an appropriate topological space. Let ISA aggregate degree of programmability of the device.
be the space of single-instruction register-state transforma- The HF STR-2000, a commercial product of Standard
tions in a processor with a given instruction set architecture Marine AB, shown at point employs baseband DSP
(ISA). From an arbitrary initial state, a DSP has many more using the TMS320C30. Most commercial off-the-shelf (COTS)
edges connecting reachable data states than a CISC processor, cellular telephone handsets fall near . ASIC’s provide much
which in turn has more arcs than an RISC processor. So, of the equivalent processing capacity, shifting these designs
from the perspective of ISA topology, the RISC processor toward the less programmable end of the axis. Current digital
is the simplest, and thus in some sense, the most general cell site designs , similarly, rely heavily on digital filter
programmable platform. CISC is more complex, and DSP ASIC’s for frequency translation and filtering, but they access
the most complex of the fixed ISA machines. Performance the spectrum at IF. SPEAKeasy II, , provides a GFLOP
of high-quality code underscores these differences. DSP code of programmable DSP, shifting this implementation to the
that employs zero-overhead loops with full register stacks and right. A product of research at the Massachusetts Institute of
processing elements yields higher throughput than CISC code Technology, the virtual radio [41] delivers a single channel
of a processor with the same system clock, memory, and I/O radio using a general-purpose processor, DEC’s alpha. This is
delays. FPGA’s, on the other hand, effectively have a variable the most general-purpose computing platform reported in the
ISA that makes them even more computationally efficient than literature. Point represents the ideal software radio with
DSP machines, with an attendant loss of flexibility. That is, the digital access point at RF and all functions programmed
once we employ an FPGA’s gates for a specific task (e.g., on RISC processors. Although maximally flexible, and thus of
a digital filtering algorithm), those gates in that configuration research interest, such designs tend to be economically imprac-
cannot be used for a different task (e.g., a timing recovery tical. This phase space quantitatively differentiates software
algorithm). A reconfigurable FPGA’s gates may support both radios in the upper right quadrant from the PDR’s elsewhere
functions, provided reconfiguration delays are tolerable. DSP in the figure.
chips use the same gates for both functions time shared through A PDR is not a software radio if any crucial aspect of
software. the channel waveform is implemented using programmable
These relationships define a phase space for the software hardware (such as a voltage-controlled oscillator) rather than
radio. Physicists use a phase space to represent states of using software (e.g., sin/cosine lookup table). A joint tactical
a substance (e.g., solid, liquid, and gas) as a function of information dissemination system (JTIDS) radio [42] imple-
parameters such as temperature and pressure. The software mentation, with a 3 MHz IF from which hop frequencies are
radio phase space of Fig. 9 represents the states of radio generated using a 250 MHz programmable local oscillator, is
implementations as a function of the digital access point and not a software radio for that waveform. On the other hand,
the degree of programmability. a 250 MHz digitized IF that could set every hop frequency
Fig. 9 places five types of radios in the phase space. The in software would be a software radio. The radio may meet
vertical axis represents the bandwidth at the digital access the software radio criterion for a large class of narrow-band
point. The horizontal axis represents the degree of flexibility, waveforms, while failing for wide-band waveforms. The phase
the fraction of functionality that may be changed in the field space of the topological model thus unambiguously defines the
using plug-and-play software. To place a system in the phase degree to which an implementation is reprogrammable. Given
space, one examines the ADC’s and DAC’s, placing the digital an unambiguous definition, one may consider the components
access point where the functionality is fully programmable. in more detail.
Fig. 9. Software radio phase space.  Mitola’s STATISfaction, used by permission.
TABLE I
ATTRIBUTES OF TOP-LEVEL SOFTWARE RADIO FUNCTIONAL COMPONENTS
III. TOP-LEVEL COMPONENT TOPOLOGY oriented design), the radio node is a black box mapping air
Radio components are represented as arcs in the topological interface, user, and network events to appropriate responses.
model. An arc may be a union or composition of other arcs, The functions of Fig. 2 define the second level of partitioning
defining a natural encapsulation hierarchy for the radio system. with the component attributes highlighted in Table I. The
At the top level of the hierarchy (the “context” level in object- attributes listed in this table indicate the allocation of functions
Fig. 10. Topological model of dual band handset streams.
Fig. 11. Interfaces constrain topological properties.
to top-level components. In a topological space, each allocated one level and visible at another. An RFIC, for example, may
function may be a singleton, a subset, or the null set. This subsume the IF waveform interface, exhibiting only baseband
corresponds to the occurrence of a function implemented in a and RF waveforms in the higher level of the topological space.
single component, implemented multiple times (e.g., in parallel Implementation topologies are constrained by these in-
channels) in multiple components, or not implemented at all. terfaces and related standards as summarized in Table II.
The remarks column highlights functional diversity leveraged Interfaces are represented in a space which includes the
by the software radio architecture. interface signal itself and related meta-level characteris-
The stream-oriented functional components are source cod- tics: implementation class (hardware or software), impedance,
ing and decoding, service and network support, INFOSEC, connector type, bandwidth, etc. The analog stream has infinite
RF/channel modem, IF processing, and RF/channel access. dimensionality in both time and amplitude, defined over . A
Each is represented topologically by a pair of arcs between digitized analog stream consists of an infinite stream of one-
data interfaces, the topological domain, and range of the maps. dimensional vectors, the samples. But, given a pair of sample
A topological model of a specific radio consists of those arcs buffers of length , this stream is reduced to dimension .
that correspond to the components. For example, the signal- In addition, as shown in Fig. 12, the topological model
stream topology of a dual-mode handset is shown in Fig. 10. structures the meta-level aspects of these interfaces. Each
The critical interfaces among dual-band antenna, IF ADC, dimension of the space must be identified, and the associated
baseband modem, and vocoder of this notional device are elements that apply must be specified. The syntactic and
readily apparent in the topological model. Additional interfaces semantic definition of the topological spaces of such a generic
associated with the functions of Table I are shown in Fig. 11. radio would constitute a knowledge representation language
Analog (audio and video) waveforms comprise the interface (KRL) [47] for radio (an RKRL). The definition of a complete,
between the source set and the source coding and decoding extensible RKRL is a significant undertaking that is beyond
functions. Source bits are encoded, but services and network the scope of this introduction. Important properties of plug-
support adds forward error control structure. If INFOSEC is and-play interfaces may be defined without a complete RKRL,
null, protected bits become clear bits. Interfaces may be null at however. In particular, general properties of the interfaces and
TABLE II
TOP-LEVEL INTERFACE TOPOLOGIES
2 A Nyquist-dynamic range subspace has been sampled so as to meet the Nyquist criteria for the bandwidth of the sampled signal; it has been quantized
with sufficient accuracy for the two-tone spurious-free dynamic range of the application.
Fig. 12. Illustrative meta-level topological space for analog stream interface, a topological domain.
computational components can be studied independently of The goal is that the system as a whole behave as desired
an RKRL. In addition, air interface specifications and radio if the plug-and-play modules and the host system each has
API’s constitute informal RKRL’s. the prescribed testable local properties. What properties can
Such interface domain descriptions could promote the as- be guaranteed? The composite system should use bounded
sured delivery of services in the software radio’s plug-and-play computational resources with guarantees against wait-induced
environment. A plug-and-play interface should effectively fault conditions. This property is necessary for isochronism of
separate the module from the rest of the system. Effective voice and video streams and acceptable timing of packet data
separability implies at least the following topological proper- flows. This property is also essential for type certification by
ties. induction.
1) Composition of module functions on the interface topol-
ogy yields a well-defined system-level function consum- IV. COMPUTATIONAL PROPERTIES
ing specified resources to deliver the intended service. OF FUNCTIONAL COMPONENTS
2) Performance (e.g., spectral purity, data formats, through- A fundamental aspect of software radio architecture is the
put, response time, etc.) under function composition is set of conditions under which plugging in a module results in
within specified bounds. acceptable use of computational resources. The composability
The separability of modules at plug-and-play interface of functions defined over general topological spaces is well
points is illustrated in Fig. 13. Plug-and-play modules may understood. Homeomorphisms are topology-preserving maps
comprise top-level functional components such as the modem. that may be composed to yield other homeomorphisms pro-
Or, they may be defined across arbitrary points deep in the vided the domain of one map and the range of the other are
hierarchy such as at the vocoder. topologically compatible [39]. From a topological perspective,
Fig. 13. Topology of plug-and-play interfaces.
the domain of software consists of those inputs over which its to establish tight upper bounds on processing resources, a
results are defined. The range consists of the corresponding necessary condition for predictable throughput.
results (including side effects and returned values). Under
what conditions can well-behaved software be composed with B. The Primitive Recursive Functions
other well-behaved software to yield a well-behaved system?
The recursive function model of computing consists of
This very general question may be undecideable. But software
a set of functions from , the natural numbers, onto
radios are engineering systems with timing constraints that
with closure properties that define classes of functions. The
allow us to prescribe constraints on the topological structure
primitive recursive functions consist of the following.
of the software, and to establish conditions under which the
composition of software modules consumes finite resources 1) The zero function : : , which yields
that can be predicted accurately. the constant zero for any natural number in .
The concept in addressing bounded resource use is to 2) The successor function : : , which
construct the largest set of functions for which predictable associates a successor to each in .
finite resource consumption may be guaranteed. In addition, 3) The projection function : :
the composition of such functions must also be bounded for by which arguments may be selected,
a proof that defines conditions under which plug-and-play with closure under:
modules will not use excessive resources. Furthermore, any 4) Composition: for , : and :
constraints on the radio functions that can be computed with , , , where
such functions must be specified. The analysis of this section is brief notation for , ; equivalently,
shows that the bounded recursive functions both guarantee .
predictably bounded resource use and present no constraints That is, the set is closed under composition of functions. One
on radio functionality. A system constructed using these can compose functions in a natural way that corresponds to
functions has the ability to maintain predicted throughput function calls and/or selection of data inputs in a random
across dynamic changes of plug-and-play software modules. access machine.
5) Primitive Recursion: for : , : ,
A. Models of Computation and finite , if , and
Earlier in this paper, the notion of software-equivalent for

hardware capability was introduced. To each ASIC and FPGA
may be attributed the computational capability of a canonical That is, the set of functions is closed under primitive recur-
processor, which may in turn be modeled as a (collection of) sion. Primitive recursion for and
von Neuman machine(s). Each procedure encoded in software , is simply the conditional execution of or based on
on a von Neuman processor may be modeled in terms of the value of [i.e., since but
computability and concrete complexity as a random access ]. This recursive pattern is equivalent
machine (RAM) [48]. A RAM consists of a state machine, to the if–then–else programming construct in terms of effective
input, and output arrays; internal registers; the capability to computability. Since appears in its own definition, it requires
load and store data via direct and indirect addresses; and a pushdown stack of successive arguments. But since initially
the capability to increment memory values. The RAM model and decreases at each invocation, the procedure will
provides an intuitive but mathematically precise description terminate, and a stack which is as large as will not overflow.
of a single von Neuman processor. The RAM model has It is assumed that the stack allocator in a specific ISA keeps
also been proven equivalent to the recursive function and the finite stack from overflowing, provided an upper bound for
Turing machine models of computing. Important theoretical is known in advance. The knowledge of such bounds is a
properties include the ability to simulate in polynomial time feature of the software radio application of this theory.
capabilities that require exponential time on Turing machines The primitive-recursive functions are the smallest set of
[49]. Let RAM represent the RAM model of the instruction such functions closed under composition and primitive re-
set architecture ISA of an arbitrary processor. Theorems cursion. Sequential logic, transversal and recursive filters,
outlined below use the recursive function and the RAM models bit manipulation, and data packing are common primitive-
recursive functions of software radios. They include addition, the maximum concrete complexity of the recursive function
subtraction,4 multiplication, and others that do not require structure from the ISA and a suitably chosen step-counting
iterative search. function [51]. Let the number of instructions from RAM be
the step-counting function. The resources used by any bounded
C. The Total Recursive Functions recursive function with a given set of calling parameters can be
computed from the calling parameters and the step-counting
Iterative loops are not primitive recursive, but they are
function.
essential to radio software. The simplest model of iteration
Lemma 1 (Primitive Bounded Execution Time): The dedi-
is bounded minimalization.
cated-processor RAM-equivalent of any bounded primitive
6) Bounded Minimalization: Let : be primi- recursive function executes in an amount of time that may
tive recursive; then be tightly bounded. One determines the maximum execution
time of each class of RAM instructions on a specific ISA.
The execution time bound is the product of the number
is also primitive recursive. of steps from Theorem 1 times the maximum execution
Read as “ is the least less than for which time for that class of instruction. The time used by the
”. The class of functions closed under composition, function tested in isolation on a specified dedicated machine
primitive recursion, and bounded minimalization is total. That is thus an alternative step-counting function. From a software
is, they are defined for all . The Fortran do loop exemplifies engineering perspective, this lemma states that the bounds
bounded minimalization. Ackerman’s function [50] is defined allocated may be specified in terms of execution time on a
everywhere, but uses resources faster than any known function dedicated processor.
due to the structure of its recursive calling sequences. It is not Relevance: Software radio incorporates isochronous
considered primitive recursive, although it is a total function. streams for which there is a fixed timing window during which
Yet, for small finite parameters of Ackerman’s function which specific functions must be accomplished in order for services
are known in advance, one can determine whether the function to be delivered properly and/or for the system to remain stable.
will exceed an upper resource bound by using a suitable step- Modules whose structure is not constrained as above may use
counting function. Any primitive recursive function induces resources that are bounded on test cases, but that “blow up”
a primitive-recursive step-counting function. Let the bounded in other conditions. All primitive recursive functions can be
primitive recursive functions5 be the primitive-recursive func- guaranteed to either: 1) complete within a specified window or
tions with the associated step-counting functions and finite 2) be easily computed in advance to be incapable of meeting
resource bounds. In software engineering terms, this model of that timing window (Lemma 1). If the system control algorithm
computing insists that when a module is tested, its resource use predicts such a fault, it can signal the network or the user and
in isolation [e.g., millions of instructions per second (MIPS)] preclude the (plug-and-play) module from being invoked.
be tested and resource bounds be established as a parameter of Such predictable timing properties provide the foundation
the module. Such characterization is regularly used software- necessary to allocate computational resources to plug-and-play
development practice for real-time systems. Integer division, modules safely. Queueing theory [14] translates service time
exponentiation, generation of primes, finite logic predicates, measured in isolation into statistical bounds on isochronous
and finite iteration are examples of bounded primitive func- performance in the service environment where other tasks
tions. These functions have properties attractive for software are sharing the same processor(s). The control algorithm may
radio implementations as expressed in the following theorems. employ such techniques to establish a statistical bound on
Theorem 1 (Primitive Bounded Resources): Any bounded aggregate resource use which, if exceeded, could degrade
primitive recursive function is equivalent to a RAM program services. But since the resource bounds may be computed, the
which terminates in a finite number of steps which can system should not become unstable.
be bounded tightly from above, given bounds , of the
minimalizations from which the composite functions are
created. D. Bounding the Partial Recursive Functions
Outline of the Proof 6: Associate a sequence of RAM Bounded primitive recursive functions do not express all
instructions with each bounded primitive function and closure of the programming constructs needed in software radios.
construct. Each corresponding RAM instruction sequence is Notably absent are the while and until loops. These loops
primitive recursive and bounded. These RAM instruction search for a condition under which to terminate. This condition
sequences are like in-line subroutines. Each such sequence may never occur, so the RAM programs may loop forever.
has a small finite number of steps (the bound). Compute Hardware and software processes that wait or search for a
4 Unconstrained subtraction and division are not primitive recursive, but condition that may not occur are computationally equivalent
appropriately constrained versions are primitive recursive. to while or until loops. Current research in wait-free com-
5 The class of total functions includes closure under restricted minimaliza- putation considers the related problem of defining instruction
tion (unbounded minimalization defined everywhere). This class of functions sequences (“protocols”) which assure that any process that
is too big for software radios because its resource use cannot be guaranteed
to be less than a bound specified in advance.
itself is not in a fault condition will terminate in a finite
6 Since these theorems are applications of well-known results from the number of steps [58]. The source code of software radios like
theory of computing, only the outline of the proof is given. SPEAKeasy I reveals the relatively widespread use of wait-
prone constructs, e.g., waiting for sufficient signal strength voice, video, and multimedia streams; packet networking; and
to initiate receiver processing. The process-dispatch loop of related control. This is a heavily time-constrained applications
the kernel operating system may “consume” infinite resources domain. The constraints imply timing, and hence resource
to deliver resources to applications software. Other infinite bounds that can be allocated to individual hardware and soft-
loops are computationally equivalent to the partial recursive ware components. These bounds constrain the logic (software
functions. The computational structure is called (unbounded) and hardware) to tightly boundable computational constructs
minimalization. without the loss of radio functionality. The formal assignment
7) Minimalization: for : , of such bounds is the basis for a theory of plug-and-play
software radio stability as follows.
Theorem 3 (Local Feasibility of Bounded Partial Recur-
sion): A single-threaded single processor software radio func-
that is, is “the least for which is zero.” tion may be synthesized in RAM instruction sequences equiv-
The search operator will continue to increment and test alent to a resource-constrained subset of the partial recursive
without bound. The partial recursive functions are the smallest functions.
set of functions closed under minimalization. Unlike bounded Outline of Construction (Locally Bounded Partial Recur-
minimalization which consumes finite resources, the extent of sion): This proof builds on Theorems 1 and 2. Unconstrained
which is computable in advance, unbounded minimalization While and Until loops and their “go-to” equivalents which
consumes resources until is satisfied. For many situations, cannot be guaranteed to terminate are precluded. Each such
may never be satisfied. For example, a carrier detection loop construct from a conventional implementation is allocated a
that is waiting for a signal that will never be transmitted due maximum number of iterations (or, equivalently, a maximum
to an impossible RF value will never terminate. It will keep processor time). These limits are coded into bounded-while
using resources until someone steps in to force the release or bounded-until loops as indivisible operations (in the same
of the resources. The partial recursive functions have been way one that a semaphore is an indivisible operation). Hard-
proven equivalent to the Turing computable functions, the Post ware that waits until a condition is met is similarly bounded,
productions, and to the RAM model [52]. These functions redesigned to generate a fault interrupt if the condition is not
compute essentially anything that we know how to compute. met after a specified time interval. Watchdog timers exemplify
Theorem 2 (Unbounded Loops): Software radio functions this principle.
implemented with while and/or until loops or their equivalents Hardware and software “read” operations that wait for a
(e.g., implemented using go-to programming styles) cannot be response from a port (which may wait forever) are also
guaranteed to use bounded computational resources. precluded. Poll and bounded-wait interrupt handshakes are
Outline of Proof: Construct a while loop that simulates
substituted. In these, the system will continue (with the read
minimalization:
task suspended if the port has no data available) to be
While NOT increment Return interrupted with a read failure condition if the read timer
expires. “Read” is thus allowed in which the reading software
One may show the equivalence of until, while, and for task waits a specified time to be interrupted, and then returns
loops to unbounded minimalization. They thus may be unde- an error condition. Write operations generate interrupts in
fined, and are not total. The equivalent RAM procedure may the receiver and acknowledgment to the transmitter. Since
consume unbounded computational resources, “crashing” the there are RAM instruction sequences that implement these
system. time-constrained search/wait loops, they are guaranteed to
The instruction set RAM of a programmable processor complete (either successfully or in a time-out state) in an
always includes instructions by which such unbounded loops amount of time that can be tightly bounded. This construction
may be constructed. There are, however, practical ways that constrains the structure of the software away from unbounded
radio engineers and real-time programmers have devised for minimalization, and hence from partial recursion to the set of
assuring system stability in spite of the regular use of such functions called bounded partial recursion. Since this construc-
constructs. One may assign time limits to each search con- tion applies to software within a given von Neuman processor,
dition. A time-out condition causes an error state that deals the proof establishes the local feasibility of bounded partial
with the excessive time used. Such programming techniques recursion (i.e., within a single processor).
informally convert unbounded minimalization to bounded min- Theorem 4 (Totality): The bounded partial recursive func-
imalization. The time limits must include the statistical effects tions are total.
of competition for resources with functions that have higher Outline of Proof: Total functions are those that are defined
priority. for all . Each of the primitive recursive functions is defined
Radio applications are distinct from general-purpose com- for all . The closure under composition, primitive recursion,
puting applications in that there is a rich set of timing and bounded minimalization is defined for all . Bounded
constraints imposed on the creation, emission, reception, pro- minimalization is defined for all as follows. Associate
cessing, conversion, network interoperation, and user interface with each range of arguments of a minimalization a step-
of radio signals. These timing constraints are often represented counting function with a limit . If the search terminates
in message sequence charts and state machines. Timing con- in fewer than steps, the loop yields the result of
straints apply to call setup and control; delivery of isochronous the minimalization. If not, then the result is FAIL for all
. Bounded minimalization is therefore total. The functions themselves could consume excessive resources. This
set of functions closed under such operations is therefore total. may be curtailed in building software radios by constraining
Lemma 2 (Bounded Stability): The RAM instruction se- the step-counting function to use the real-time clock. The
quences that are equivalent to the bounded recursive functions existence proof is therefore a first-order result (it assumes
are total. (Proof: If not, then the RAM model is not two levels of priority and only isolated clock faults), not a
equivalent to the recursive function model, which would completely general result. But it isolates the risk of exceeding
be a contradiction.) resources to the reliability of the real-time clock (versus the
Relevance: A software radio has to deliver services pre- millions of lines of code of the radio applications). It is much
dictably. When combinations of inputs and states occur for easier to make highly reliable clocks than to make error-free
which responses have not been defined, the system’s behavior totally defined software.
is unpredictable; hence, it will produce undesired results, and Generalizations: The degree to which Theorem 5 may
may ultimately go into an unrecoverable “crash” state. Soft- be generalized to the asynchronous multithreaded heteroge-
ware radios—in particular those with downloaded applications neous multiprocessors of software radios touches on much
modules—have many modes and control parameters which current research in computer science. The degree of further
result in a combinatorial explosion of control states, making generalization is, no doubt, limited. Communications paths,
it impossible to test every combination of states in advance. data-sharing mechanisms, and process control protocols (e.g.,
However, if the software radio is constructed of modules that Compare and Swap, Load Linked/Validate/Store Conditional
are each guaranteed to be total, then any state combinations are [56]) would have to be bounded in a more general setting
also total by induction. Thus, some specific system behavior than [53] for a fully general proof. Topological models of
(noncrash) will be defined under all conditions. The results computation have produced relevant results including nec-
of such stable computations may or may not be as intended essary and sufficient conditions for wait-free protocols [57],
(i.e., “correct”), but if some specific state is defined, behavior the asynchronous complexity theorem [58], nonuniform and
will be repeatable. Unintended results, then, may be more uniform iterated intermediate snapshot models of wait-free
readily diagnosed and corrected. Crash states due to undefined computation [59], and related results. In addition, practical
unstable behavior, on the other hand, often require heroic nonblocking primitives can be implemented on contemporary
labor-intensive debugging efforts. Radio systems fielded with machines like the DEC Alpha, MIPS R4000, and PowerPC
software that is not total appear unreliable to the user. [56]. The question of task termination has been proven to
Theorem 5 (Global Bounded Recursion): Multithreaded be undecideable if even one process can be faulty (e.g., fail-
multiprocessor software radio functions implemented using stop [60]). Theorem 5 asserts that a mechanism for ensuring
RAM sequences that are equivalent to the bounded recursive bounded recursive interprocessor communications together
functions may be guaranteed to run to complete or to cause a with locally bounded-recursive software modules guarantees
resource fault. The number of instructions before a fault may globally bounded resources provided the step-counting func-
be tightly bounded using polynomial resources to compute tion uses a reliable real-time clock. This analysis yields an
the bound. architecture principle for the software radio.
Outline of Proof: (Existence of Globally Bounded Recur- Architecture Principle 1—Bounded Modules: Software ra-
sion): Nielson and Nielson [53] present a process algebra dio architectures which limit (software and hardware) control
for a polymorphic subset of concurrent ML, a parallel mul- structures to those that constrain partial recursion to the
tiprocessing language [54], [55]. With this, they show that ISA-equivalent of bounded recursion will consume bounded
the number of processes and interprocessor communications resources, possibly entering a resource fault condition. Com-
channels associated with a subset of concurrent ML is finite. ponents that conform to this criterion may be called total
They point out that their analysis is not complete: some bounded modules.
programs with finite resource use will be rejected as potentially Implications: There are many implications to such an
infinite due to an inability to infer the finiteness of sequences architecture principle. Setting resource bounds so tight that
of (unbounded) recursions which terminate. In addition, their the statistical structure of the demand causes them to be
semantics admit sequences in which an infinite number of tasks exceeded frequently can drive resource use to zero due to
terminate before a finite number begins, again resulting in an thrashing over resource-use fault conditions. Loss of service
erroneous rejection of a finite resource use case. from misallocating resource bounds is no less painful on the
Substitute bounded recursion into their schema to preclude service provider than other types of resource loss, but it is
the partial recursive constructs, rendering the analysis com- easy to avoid.
plete. The formal language (the subset of concurrent ML) In addition, the theorems above do not preclude combinato-
and semantics constrain the entire system (all processors, rial explosion. That is, using these constrained hardware and
applications, and the concurrent ML) to bounded recursion. software structures, one may create data sets and instruction
In addition, the above guarantees that a step-counting function sequences with concrete complexity of . One is guar-
exists, but not that it will be effective in halting a process that anteed, however, that is small enough for the exponential
is consuming inordinate resources. Therefore, global bounded resources to be within those allocated in advance. One must
recursion requires a two-level priority system in which the know both the structure of the dependency and the bounds
step-counting function can interrupt the function being mon- on in advance in order to establish the time-out criteria
itored. An infinite regression can occur when step-counting for each potentially exponential loop in the system. Such
(a) (b)
Fig. 14. Interface waveform topology. A permitted, and B prohibited. (a) Time domain and (b) frequency domain.
controlled combinatorial explosion balances the needs of an topology is the family of subsets which has the geometric
algorithm to search a large space (e.g., in an equalizer) against and algebraic structure.
the finite resources of the system. It will also guarantee that In a topological space, one can represent the geometric
such algorithms will not consume more than the allocated properties of interfaces among software radio modules. An
resources. In addition, although the type of constructs that interface to an analog source, for example, may be modeled
yield Ackerman’s function cannot, in general, be ruled out, as a subset of functions on that obeys certain constraints.
bounded recursion assures that such a construct would yield a The constraints include bandwidth, adjacent channel interfer-
resource fault after a specified amount of resource use. Such ence, and minimum and maximum transmitted power. An
limits may be proscribed in the type certification process. uncountable number of such waveforms is possible in an
Thus, any modules that meet the constraints when tested in analog interface, but regulatory bodies and the hardware
isolation will not exceed them when inserted into the plug- limit the waveform to a structured subset of the possible
and-play environment. In addition, the system will not become waveforms. Since the space of randomly perturbed signals is
unstable because of undefined states since all functions are also a metric space [61], one can precisely define distance
total. Such guarantees help assure reliable, predictable, plug- among waveforms, and thus the topological structure of analog
and-play software radios. interfaces. Fig. 14, for example, shows two analog waveforms
This section has presented an initial examination of the in the time domain (a) and in the frequency domain (b).
computational properties of software radio functions. The A range of waveforms is allowed and prohibited .
heterogeneous mix of ASIC’s, FPGA’s, DSP’s, and general- Time-domain waveform is within the allowed geometry,
purpose computers can be constructed so as to consume while waveform is not, e.g., due to unacceptable power or
predictable, tightly bounded resources. One must constrain RF. Such widely used interface constraints are set theoretic
the logic to the bounded recursive constructs with prioritized in that they limit the elements in the interfaces to a subset
step-counting fault handling. The theorems provide an initial with specified properties. These constraints are also geometric,
outline of a theory of resource integrity needed for plug- defining an interior , the conforming region, and an exterior
and-play modules. The constructions from the proofs suggest , the nonconforming regions. The representations (a) and (b)
engineering techniques for applying the theory to development are homeomorphic because the Fourier transform provides a
projects. This stability theory must then be combined with topology-preserving map among the two.
queuing theory [16], [26] and other resource management
techniques that address the statistical nature of the demand
for robust management of processing resources. B. Finite Interface Topologies
If a set has a finite number of elements , all subsets
are open sets (and are also closed sets). If , then
V. INTERFACE TOPOLOGIES the number of topologies that induce a topological space on
AMONG PLUG-AND-PLAY MODULES is , a double exponential. Not all of the candidate
Constraints on the computational structure of modules can topologies satisfy closure under union and finite intersection
ensure bounds on resource use for plug-and-play. Are there as required for a topological space [62]. The huge number
constraints on the interface structure among these modules of possible topologies compels one to define finite interface
that further facilitate plug-and-play? The answer requires topologies more compactly.
additional aspects of the topological model. Definition (Basis): A set is a basis for if the
members of are the union of members of . A basis is a
smaller set than from which may be induced by taking
A. Topological Spaces unions.
Definition (Topological Space): A topological space, de- From a hardware perspective, a pin in a connector is an
noted ( , ), is a set and a family of subsets , the “open interface point . The set is a basis
sets,” which include and the empty set , and which are for . The set , , which contains
closed under countable union and finite intersection [39]. The three subsets , , and the union of all the other interface
pins works just as well. The basis with the most subsets is
, , the sets that include the empty set and
each element of taken as a singleton set. If all of the pins
are needed for a viable connection, then is the only
subset of that consummates a connection, and therefore
is the only element in the interface topology. In this case,
and the topology is just the fixed set of required
inputs . This may be called the rigid topology. It is not a
topological space because it lacks the empty set. The empty set
is not a valid member of the interface set if the interface will Fig. 15. Simplicial complex consists of two simplexes.
not “work” if no pins are present. If the system will “work”
with the connector unplugged (e.g., resort to a default or fail- simplex (e.g., [ , ]), denoted by the pairs of vertices. A
soft mode), then the empty set is a member of the interface second triangle that shares one line segment with the
topology. first is also a simplex. Each triangle together with its edges
These principles apply to software. An API may specify a and vertices comprise a simplicial complex. The two triangles
call to the synthesize() function, for example, with arguments also comprise a simplicial complex in which the simplexes are
RF (frequency) and (bandwidth). If both are required, then 1-connected by the line [ , ].
RF and . This is just as inflexible Interface parameter sets may be modeled as simplexes with
as the equivalent hardware interface. On the other hand, a a large number of dimensions. In the Synthesize() function
tagged API with the expressions RF 859 or 30 or above, suppose RF is discrete and has as its explicit basis
both or neither would be defined over the space containing the range [400.001, 2400.000] MHz and resolution 1 kHz.
RF , , RF , and : The RF’s that are valid parameters of Synthesize() constitute
a simplex consisting of the 2 million RF’s in this range. Let
RF RF be defined for 25, 30, 200 kHz. The parameter space
RF, contains 6 million points, a simplicial complex
The empty set is included in the topology because the
consisting of the union of three simplexes of 2 million RF
interface “works” even if no arguments are provided. Thus,
points each, indexed by . Then the set of RF’s reachable
RF , the set of all subsets of
from Synthesize(925.000, 30) is exactly one, [925, 30] .
or power set, which is a topological space. This power-set
Synthesize( ), on the other hand, may reach any
topology is the discrete topology; it may also be called the
of the 2 million point RF simplex through a global default.
flexible API topology. This flexible interface geometry may be
Synthesize() reaches all 6 million points through a global
implemented if synthesize() uses default values for the missing
default, connecting them in a single simplex.
arguments. Since the power set is the largest set of subsets, the
For the example function Synthesize() to have an explicit
discrete topology maximizes the number of combinations of
basis, its definition must include basis tuples expressed as
API parameters over which a function call is valid. The basis
parameter (Type, Range). Parameter indicates the parameter
for the power set consists of the singleton arguments plus the
being defined. Type chooses among predefined subspace types
empty set: RF .
(e.g., Discrete, Continuous). Range establishes the valid val-
ues. In the example above, an explicit basis could be
C. Function-Call Parameter Topologies (Discrete, 25, 30, 200 ) and RF (Discrete, [400.001, 400.002;
The geometric structure of interface spaces may be better 2400.000]) using Mathcad range notation. This explicit basis
understood using additional notions. can be enforced by the environment to yield an error result “out
Simplex: A simplex is an ordered set of points in a topo- of range” for arguments that violate the basis description. Such
logical space that are adjacent in some sense, such as sharing semantics define Synthesize() as an effectively computable
a relation .7 Higher dimensionality simplexes induce lower function over all inputs. A product topology on these bases
dimensionality simplexes. Simplexes may be embedded in yields the 6 million points of ( RF) as the input space
Euclidean space, but need not be [63]. to this function. However, it is often necessary to limit the
Complex: A simplicial complex is a union of simplexes that parameters to subsets of this space. One might limit the 200
includes the union of all of the lower dimensionality simplexes kHz bandwidth to the RF’s allocated to GSM, say, 925 to 960
of a given simplex. MHz. The simplex
-Connected: Simplicial complexes that share a face NOT
are -connected [64].
The three vertices of a plane triangle [ , , ] in Fig. 15 “bandwidth-out-of-range”
comprise a two-dimensional simplex, adjacent in the sense defines the set-complement subspace for which the 200 kHz
that they are connected by the points in the plane. Each line bandwidth choice is mapped to a fault condition. To the degree
segment joining these vertices comprises a one-dimensional that such subspaces can be changed while the radio node is in
7 An n -simplex is the convex hull of n+1
independent points in - m the field, the service provider has a “future proof” interface.
In order to be changed in the field, the “capability” implicit
dimensional Euclidean space subject to completeness and closure axioms.
The full geometric treatment is not needed at this point. in the interface constraints must be defined in such a way that
Fig. 16. Interface geometry reflects design decisions.
the control algorithms can test and manipulate the constraints,

e.g., to decide whether to accept a download. The geomet-
ric structure of the interfaces can be expressed naturally in
strongly typed languages to define plug-and-play constraints.
More appropriately, for plug-and-play environments, they can
be expressed in execution time interface parameter sets.
D. Plug-and-Play Interface Geometry

The implementation decisions made during design, devel-
opment, integration, and test may constrain an interface to a
point in the simplicial complex of interfaces as illustrated in
Fig. 16.
Fig. 17. Resource topology extension: ADC buffering.
Each domain and range of a conventional interface consists
of a designated point in its simplicial complex. A plug-and- ically, the text has been normative, while the computer-based
play interface, however, defines an interoperable subset of the representations have been auxiliary.
interface space. The physical interface subspaces must change Another disadvantage of capability tags is that capability
as a function of the hardware in which the service is delivered. cannot be defined dynamically by the radio itself. Com-
The logical interface subspaces also may have to change as a putational manipulation of tags by the software radio joint
function of the software modules configured to deliver the control function is also limited. For control of dynamically
services. To be fully extensible, plug-and-play modules have defined software radio-based services, the constraints must
to be combined dynamically. To do this in a controlled way, be computer processable, and the system must be able to
the control algorithm(s) must have a way of comparing the act on them during operations. Automated reasoning over the
range of one function to the domain of the next to determine constraint spaces and capabilities of the host system could
whether the functions are compatible. enable the radio itself to construct the level of capability
necessary for a desired service. SDL falls somewhat short
of this vision since the application semantics are left to the
E. Extensible Capabilities designer. Dynamic capability requires designer-independent
Capabilities may be represented as levels (“tags”) such semantics.
as the type of video teleconferencing interface in the ITU It is easy to define designer-independent semantics in a
H.320 Recommendation [65]. The level of call control support way that is readable by people. To do this in a way that is
from Microsoft’s telephony applications programmer interface processable by a control algorithm requires a radio knowledge-
(TAPI) [66] provides another example of tagged capability representation language (RKRL). Parts of RKRL that are
levels. The advantage of tags is simplicity. Capability tags are defined a priori may be extended dynamically. For example,
defined during the standards-setting process and documented to add a control that selects from either the or buffer in a
in the text of the standards. One disadvantage of this approach double-buffered interface of a notional ADC requires extension
is the possible misinterpretation of the text of the standard. of the interface topology, adding sets and subsets to ( , )
To counter this chronic problem in telecommunications stan- as suggested in the example of Fig. 17.
dardization, ETSI promulgated language that makes the formal The meta-level expressions Buffering , Buffer-Size ,
specification of the ITU Z.100 specification and description Buffer , and Buffer-flag introduce the meta-level primitives
language (SDL) [67] the normative expression of the standard Buffering, Buffer-Size, Buffer, and Buffer-flag to an
[68], with text providing amplification and explanation. Histor- extensible RKRL. The RKRL is assumed to include a priori
TABLE III
SPEAKEASY I SOFTWARE MODULES, DMA: DIRECT MEMORY ACCESS
semantics for Resource, Type, Set-Extension, Output-Space, modules to support as yet undefined software modules for as
Range, None, Double, and Singleton topologies. The set yet undefined services. The following architecture analysis ap-
extension augments the interface topology ( ) with new plies the computational and topological properties introduced
subsets. Range expressions define the new subspaces. Discrete above to begin to identify the mathematically based partitions
values constrain the subspace to an interface point. of a software radio system.
The resource extension indicates that if Buffering none, The source code of a widely published military software
then the effect is null. This effectively glues this new subspace radio, SPEAKeasy I [70], is considered. A sequence of virtual
to the existing subspaces in which there was no buffering. machines is then derived that both expand the RAM equivalent
In addition, the new subspace Buffering(Double) has the instruction set model and constrain the computational geom-
rigid interface topology. Topological spaces represent radio etry, yielding a layered virtual machine reference model for
capability in a way that is readily processed by control the software radio.
algorithms. The extensibility of interface topologies may be
expressed in the following architecture principle.
A. SPEAKeasy I
Architecture Principle 2—Explicit Extensible Interface
Topology: API’s and hardware interfaces which exhibit an SPEAKeasy I resulted in the software radio source code
explicit topological basis for each interface parameter space structure summarized in Table III. The as-built code has some
and which are extensible in the field exhibit the level of strong features—such as real-time performance and accurate
flexibility necessary for extensible plug-and-play services. handling of timing differences between radio networks. Since
Implications: The requirement for an explicit basis as- an Ada implementation was mandated, the real-time executive
sures that the interface topology is defined completely, in- is the Ada run-time kernel.
cluding error states. The full extensibility of the topological The Ada modules can be viewed as software objects.
bases in the field requires an RKRL-like representation of They include databases, channels, and agents. Databases store
radio resources. This is an area of current research in wireless personalities, filter parameters, lengthy chunks of compiled
computer-communications systems [69]. code, and data sets to be loaded into a personality at run time.
Channels are abstractions around which modes (e.g., HAVE
QUICK) are organized. A channel is supported by several
VI. ARCHITECTURE PARTITIONS Ada packages that perform the systems-level functions of
One goal of a plug-and-play software radio architecture is to RF control, modem processing, INFOSEC, and related in-
provide computing resources from as yet undefined hardware ternetworking. A channel gets the system resources (paths
Fig. 18. Processor simplexes (S 1, S2 ), interconnect simplexes (I ), and an equivalent simplicial complex SC(P 1; I; P 2 ; k = 3 111 5).
or threads through the system). It installs its personality on processor hardware connects the states of data in its registers.
these resources to implement a mode. It then keeps track of The set of data states reachable in one clock cycle from
the overall state of the processing thread that delivers the any initial state is the processor’s characteristic simplex. A
associated services. In SPEAKeasy I, lower level modules processor with 20 32-bit address registers, cache pointers,
implement the personalities of the channels. They also serve general-purpose registers, with multiple direct memory access
as hosts for buses, manage IO processes, access timing and (DMA) registers and other registers can, in principle, assume
positioning data, and control the radio. Channels also keep any of 2 states 10 0.358846241 2—see
track of the status of the mode, number of resources employed, the Appendix for magnitude notation. This is the size of
volume, data rate, throughput, network parameters such as the processor’s instantaneous characteristic simplex. Fewer
network number, and assigned time slot(s). registers yield a smaller simplex. A more complex instruction
Timing packages manipulate the system clock, time of day set architecture yields a larger simplex. An FPGA’s simplex
(ToD), the day/time format, and the timing resolution. The is determined by its use of state memory, which will generally
RF control packages determine RF direction (i.e., transmit or be much larger than a DSP chip of the same area and device
receive); the RF mode (e.g., linear or nonlinear amplification); feature size. The size of the simplex indicates how many
preemphasis for predistortion; and frequency of transmis- different things the processor could accomplish in a single
sion. The modem packages include modulation (AM, FM, clock cycle.
QAM, USB, and MSK), demodulation, automatic gain control
1) Paths in Simplexes Induce Partitions: Sequential sim-
(AGC), packing, and unpacking of protected bits.
plexes are -connected to each other by the clock
The system may also perform a loop-back function for
sequence. Over time, a series of RAM instructions traces
network testing or local diagnosis. The back-end functions in-
a path through a sequence of simplexes, the union of
clude message processing, internetworking, managing protocol
stacks, and the user interface. Radio control handles system which is a simplicial complex (SC). In 1 s, a processor
boot up, initial ToD, current hop, calibration, status requests, with a 100 MHz instruction clock may assume any
and security level. Comparing the Nbg, Hvq, and Hfm mode of (10 ) (10 ) or 0.87822 5 states. In addition, a
software shows a common pattern of control module(s), global software radio with distributed multiprocessor hardware
parameters, transmit and receive (modem) modules, along with and interconnect devices has additional connectedness
specialized modules such as hop generation for frequency- among processor simplexes as illustrated in Fig. 18.
hopping modes. At each clock cycle, an edge in the simplex is traversed (e.g.,
The as-built code includes four distinct types of software. the solid arrow in processor 1’s simplex at time in the
One type delivers voice, data, and channel bridging ser- figure). The path traversed through a sequence of simplexes
vices. Another type structures the radio applications using may be subsumed into a simplicial complex, e.g., SC( , ,
state machines. The infrastructure-type software moves data ; ) in the figure. The dotted arrow in the SC
packets and isochronous streams. The fourth type consists indicates the path traversed by data sent from to during
of hardware-specific support software including the operating clock sequence [3, 5]. The way in which software constrains
system. About 30–40% of the application-specific code is such paths implicitly defines architecture partitions. A larger
infrastructure, 30% structures the radio applications, and 30% number of possible paths indicates greater built-in flexibility,
implements services. These different functions are almost while topological loops in such paths suggest partitions.
inextricably intertwined in the SPEAKeasy code. Much of 2) Interrupt Service Routine (ISR) Topological Loops: Con-
the code is hardware dependent. The partitioning analysis that sider hardware-dependent software such as operating
follows is oriented toward reuse. The most primitive level of system services. This software consumes processing
code is the hardware-specific operating system. resources in a way that is tightly coupled to hardware-
related processor states. A typical ISR, for example,
B. The Hardware-Specific Partition might turn off hardware interrupts, push the processor
The hardware–software interfaces define the lowest level state onto a stack, test the interrupt condition, set a
partition of a radio system. From a topological perspective, dispatch pointer, restore the registers, and exit. In a
Fig. 19. Infrastructure software function calls.
real-time system, this process could take from 10 to modules can be viewed as a machine with an extended
100 instructions. Windows NT requirements for template instruction set, ISA RAM kernel . The set
data might expand this to 1000 instructions or more. kernel may have a distinguished sequence of RAM
During this sequence, the path through machine’s simpli- instructions for the idle state. Idle RAM in that,
cial complex, normally arbitrary, is constrained to a path during the Idle state, an arbitrary RAM sequence is
that involves states of a the interrupt register. In addition, possible. Let kernel represent the kernel-less idle.
the instruction sequence that is so constrained is defined Minimizing the number of RAM sequences needed
temporally by the interrupt event and the termination of for the kernel maximizes the RAM capacity left
the ISR. This produces a path in the temporal simplicial for higher level radio services. The simplex of RAM
complex that begins with a hardware interrupt “set” kernel contains a distinguished subspace corre-
and a particular configuration of registers and ends with sponding to the paths reachable through kernel .
the interrupt “clear” and the identical configuration of
registers. Adopt a convenient distance measure on data C. Topology of Infrastructure Software
states such as Hamming distance, the number of bits Given a set of kernel software, the next step in a bottom-
that are not identical. A topological loop over ([RAM], up definition of virtual machines identifies those functions
) at , a point in the simplicial complex [RAM], is that allocate, set up, and control physical resources to create
the shortest path in [RAM] that returns to within of logical resources. Fig. 19 lists the function calls required for
. An ISR is a topological loop in [RAM] for in distributed processing. These functions include the structures
the above example. Input/output drivers, task schedulers, recommended in ITU’s X.900 open distributed processing
disk access control, real-time clock support software, reference model [71]. They also include structures unique
and the like have short characteristic topological loops. to radio applications such as frequency distribution. This
3) The Topology of the Kernel Substrate: The set kernel infrastructure code manages control flow paths; signal flow
comprises the software most closely aligned to hardware paths; and timing, frequency, and positioning information.
states and having the shortest topological loops. The It also includes features needed for isochronous delivery
kernel is the lowest level software substrate. Kernel se- of voice, video, and other real-time streams. The control
quences can be modeled as extensions to the processor’s flow paths mediate message passing among most objects in
native ISA. The hardware interrupt ISR, for example, the system. Error logging, semaphores that manage shared
could be modeled as the function Service() defined over resources, and bus access protocols are examples of control
the set Interrupt-Registers . Service() then becomes an message flows.
instruction in kernel . From a topological perspective, The infrastructure functions initialize the system, create and
Service() defines a subgraph within the processor’s SC. manipulate logical and physical ports, move messages, and
A processor with a library of such hardware-dependent perform remote procedure calls (RPC). They also provide
multicast services, handle error messages, and support standard

protocol interactions such as Internet protocol (IP). Multicast
simplifies programming of multichannel operations such as
initializing 100 subscriber channels distributed among 25 DSP
chips. The control-flow methods listed in the figure constitute
a minimum set necessary for multiprocessor software radio
infrastructure.
The signal-flow methods listed in the figure, similarly, set up
and manage signal flow paths among processes on the same
or on different processors. These isochronous streams must
meet tight timing constraints. Due to the overhead associated
with path setup and tear down, these paths must be opened
and closed multiple times without being set up and torn down
again. Timing, frequency, and positioning is a very involved Fig. 20. Infrastructure state machine.  Mitola’s STATISfaction, used by
process, a complete discussion of which is beyond the scope of permission.
this brief treatment. Time references obtained during network
synchronization must be maintained on a per-network basis.
Since the software radio generally participates in multiple
networks simultaneously, it must maintain absolute time per
network. This is accomplished not by changing the software
radio’s clock, but rather by defining time offset and drift rate
for each network. Additional ancillary functions related to
queueing data messages (e.g., load, clear, test status, and reset)
are also part of infrastructure.
Applying the virtual machine paradigm to this set of soft-
ware yields a new virtual instruction set Infrastructure
which consists of Message-Passing , Isochronous Paths ,
Timing , Frequency , and Positioning instruction subsets.
These extensions build on the facilities of kernel . The Fig. 21. Channel control state machine.  Mitola’s STATISfaction, used by
expanded RAM simplex contains Message-Passing , etc. permission.
Each subspace depends on kernel services, the lowest layer
of the emerging virtual machine hierarchy. Lower level modem state machines track the states for active
plain text receive and transmit, crypto-sync, receiving analog
and digital, and bridging fades. The SPEAKeasy state ma-
D. Radio State Machines chines also have built-in timing and error-recovery procedures.
State machines control access to many software radio Automatic gain control (AGC) and squelch (Sq) are adjusted
resources. State machines typically control the transmit and on all transitions in the lower level state machines.
receive channels and fault recovery actions. A resource- Thus, the state machines schedule both routine processes
allocation state machine is illustrated in Fig. 20. Three states such as AGC and processes driven by channel conditions
are shown in boxes: waiting for instantiation, fetching a such as bridging across fades. States also reflect failure modes.
waveform, and waiting for a response. The arcs are labeled These include sync failure, loss of carrier, and loss of system
with conditions that cause one to transition from one state to resources. Such state machines are a central mechanism for
the next and with actions performed upon such a transition. controlling system and radio resources in the software radio.
This control structure may be implemented as a software From a geometric perspective, the topological loops of these
object with a set of slots (the states) and attached methods. state machines begin and end on conditions of identical state
Methods test for state transitions and perform required actions. values. That is, the states “setup,” “transmit,” “receive,” etc.,
Recommendations for defining and simulating state machines are the constants or fixed points in the evolution of the [RAM]
are provided in the SDL Recommendation Z.100. simplicial complex. Periodically, the processor’s register set
Such state machines may operate on several levels. At will return to topologically close states for some suitably
the top level, each channel (e.g., HAVE QUICK) has a defined distance. Since the functions called from these state
channel-setup state machine that keeps track of resources. The transitions (e.g., “transmit next block”) employ facilities from
next-level state machine manages the mode, as illustrated in Message-passing , Isochronous stream , etc., these state
Fig. 21. The channel is initially idle. When it has been set machines define the next level of virtual machine built on
up, it enters the Ready state. If the user (or network) initiates top of the infrastructure machine. The boundary of this layer
a “talk” sequence, the transmit ( ) state is entered, upon of virtual machine is based on the function calls attached to
which the radio will alternate between and states the state-machine objects. This new layer of virtual machine is
until conditions are met which either suspend or deactivate the State machine instruction set, consisting of the RAM
the channel. sequences that set up, execute, and control the state-machine
Fig. 22. Channel agent software objects.  Mitola’s STATISfaction, used by permission.
TABLE IV These radio functions are relatively generic. Thus, each

FUNCTIONS OF RADIO SOFTWARE AGENTS waveform or mode of operation may be expected to have
either its own set of agents or a set of parameters and a
script that tell the agent how to treat that specific mode. Radio
services, like bridging across waveforms, could be constructed
as scripts or Java-like applets that interconnect channel agents
and other high-level functions. The semantics of such top-
level modules are readily represented in the unified modeling
language (UML) [72].
The timing and overall behavior of the channel agents are
constrained by the lower level state machines that manage the
channels. From a geometric perspective, agent subspaces in the
[RAM] simplex subsume the State machine subspace. The
extended instruction set for channel agents Channel agents
is more of a category than a virtual instruction set. The top-
level radio functions Antenna and RF Control , Channel
Control , IF Processor , Waveform Processor , etc., each
constitute a set of virtual instructions. Since these channel
agents must be mutually consistent in order to work together,
the class Channel agents refers to a mutually consistent set
of such instruction set extensions comprising a radio mode.
objects. The state-machine objects themselves comprise a
virtual processor. F. Distributed Layered Virtual Machine Reference Model
The preceding sections have described essential software
E. Channel Agents mechanisms employed in the construction of software radios.
The characteristics of SPEAKeasy I and other software When viewed in terms of the topological spaces defined by
radios have been abstracted to the top-level software object the paths traced in the simplex of an equivalent RAM proces-
diagram of Fig. 22. These high-level objects may be called sor, layers of successively less machine-dependent software
channel agents. Each software object has been allocated cor- emerge. The distributed layered virtual machine is a way of
responding functions from the software radio functional block representing the resulting hierarchy. Each layer is a virtual
diagram of Fig. 2. machine built on subordinate layers. The virtual machine
Those agents in the top row of the figure control the system, interfaces may be held constant so that the implementation
while those in the lower rows implement the traffic channels details and intellectual property present within a component at
and related services. The objects of Fig. 22 implement the a given layer are hidden from all other layers. The software
functions summarized in Table IV. radio architecture that results from this process is illustrated
Each of these high-level software objects has subordinate in Fig. 23.
objects, to the level of primitive functions like filters, modu- As the capacity of FPGA’s and DSP’s continues to grow,
lators, bit decisions, etc. The protocol and speech processing the processing to support such virtual machines becomes more
“back end” of the software radio employs a protocol stack such affordable. The services offered from the top-layer virtual
as ATM, TCP/IP, Mobile IP, etc. Consequently, internetwork- machines thus are independent of the hardware implemen-
ing to the wireline infrastructure consists of a few monolithic tations in the bottom-layer virtual machine. The FPGA and
predefined software objects. DSP hardware vendors or software tool suppliers, for example,
Fig. 23. Software radio distributed layered virtual machine.  Mitola’s STATISfaction, used by permission.
could offer infrastructure layer software. This layer could should emerge which suppress unnecessary levels of function
be implemented in part using an augmented message-passing calls and make compile-time translations, enhancing run-time
interface (MPI) [73]. The state machines in the infrastructure efficiency. In addition, late bindings that are computationally
and radio applications layers would naturally fall into the efficient should also emerge. Until they do, the penalties for
domain of SDL. Third-party waveform vendors could offer the layered architecture implementations will remain high.
middle layers. Interfaces among components may be repre- Second, the computational capacity of the underlying chips
sented in UML or the interface definition language (IDL) continues to double every 18 months or so, making the
[74], possibly including abstract syntax notation (ASN.1) [75]. performance of the layered machines acceptable in spite of
Systems integrators and service providers could then define the inefficiency. In particular, the internetworking functions
their unique added value in the top layers, building on the that a few years ago were implemented in special-purpose
broad base of industry support at the lower layers. In addition, hardware are now supported by general-purpose computers.
computer-aided software/systems engineering (CASE) vendors These observations may be summarized in a third architecture
could embrace the wide range of reusable components to assist principle.
developers to encompass the entire software radio distributed Architecture Principle 3—Distributed Layered Virtual Ma-
virtual machine hierarchy for reduced time to market. chine Reference Model: Modules partitioned according to the
The joint control function is distributed over these layers. distributed virtual machine reference model will insulate lower
Joint control at the top layer sets up channel objects and layer hardware-dependent modules from upper layer service-
orchestrates services. In the radio applications layer, it consists defining modules.
of state machines that manage the radio channels. In the The economic incentives for such a model center on inte-
infrastructure layer, it establishes paths for signal and data grating markets for economy of scale. The global wireless
flow. And in the hardware layer, it interacts with the operating marketplace now consists of dozens of niches defined by
system. Each layer accepts commands from higher layers, and unique hardware platforms and waveform-unique infrastruc-
returns status including fault conditions. With layering of the ture. Industry is attempting to organize itself to integrate these
joint control function, the layered virtual machine insulates the diverse markets so that the next generation of wireless will
higher layer applications from the details of the hardware. offer low-cost plug-and-play services. The process of defining
There are generally significant computational resource the required industry standards has already begun. The SDR
penalties in making the translations among the layers. Two Forum, for example, has defined an architecture framework
factors mitigate these penalties. Compilers, first of all, have based on functional threads in which a generic applications
become fairly efficient in the use of machine register sets. programmer interface (API) is being defined across the virtual
As radio API’s become more widely used, precompilers machine. The forum is integrating the GloMo radio device API
[76] into its own. The object management group (OMG), on (10 ) as a base and raising it to the power million
the other hand, has requested technology for CORBA real-time is not, perhaps, a familiar concept, but it establishes an upper
objects [77] including multimedia at video data rates. A real- bound on the size of the simplicial complex associated with
time CORBA might provide software radio infrastructure like just 1 s of use of such a processor. This notation is useful in
an SDR API. The partitioning strategy and layered reference comparing the huge numbers associated with simplexes and
model presented here may provide insights helpful in evolving large simplicial complexes.
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514 IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, VOL. 17, NO.

Software Radio Architecture:

I T is well established that a communications system is the

Fig. 1. Traditional model of radio communications.

Fig. 3. Topological structure of an illustrative radio.

Fig. 4. Key software radio functions and components.

Fig. 5. (A) Topology of an RF ASIC and (B) its digital equivalent.

Fig. 6. Parameter uncertainty constrained to “open balls.”

Fig. 7. Hardware topology shows incompatibility.

Fig. 8. DSP hardware commitment subspace topology.

Fig. 9. Software radio phase space.  Mitola’s STATISfaction, used by permission.

Fig. 10. Topological model of dual band handset streams.

Fig. 11. Interfaces constrain topological properties.

Fig. 13. Topology of plug-and-play interfaces.

Earlier in this paper, the notion of software-equivalent for

Fig. 16. Interface geometry reflects design decisions.

the control algorithms can test and manipulate the constraints,

D. Plug-and-Play Interface Geometry

Fig. 19. Infrastructure software function calls.

multicast services, handle error messages, and support standard

TABLE IV These radio functions are relatively generic. Thus, each

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