RF Oscillator

9 - RF Oscillator
The information in this work has been obtained from sources believed to be reliable.
The author does not guarantee the accuracy or completeness of any information
presented herein, and shall not be responsible for any errors, omissions or damages
as a result of the use of this information.
September 2010
2006 by Fabian Kung Wai Lee
References
[1]* D.M. Pozar, Microwave engineering, 2nd Edition, 1998 John-Wiley

& Sons.
[2] R. Ludwig, P. Bretchko, RF circuit design - theory and applications,
2000 Prentice-Hall.
[3] B. Razavi, RF microelectronics, 1998 Prentice-Hall, TK6560.
[4] J. R. Smith,Modern communication circuits,1998 McGraw-Hill.
[5] P. H. Young, Electronics communication techniques, 5th edition,
2004 Prentice-Hall.
[6] Gilmore R., Besser L.,Practical RF circuit design for modern wireless
systems, Vol. 1 & 2, 2003, Artech House
September 2010
Agenda
Positive feedback oscillator concepts.

Negative resistance oscillator concepts (typically employed for RF
oscillator).
Equivalence between positive feedback and negative resistance
oscillator theory.
Oscillator start-up requirement and transient.
Making an amplifier circuit unstable.
Constant |1| circle.
Fixed frequency oscillator design.
Voltage-controlled oscillator design.
September 2010
1.0 Oscillation Concepts
September 2010
Introduction
Oscillators are a class of circuits with 1 terminal or port, which

produce a periodic electrical output upon power up.
Most of us would have encountered oscillator circuits while
studying for our basic electronics classes.
Oscillators can be classified into two types: (A) Relaxation and
(B) Harmonic oscillators.
Relaxation oscillators (also called astable multivibrator), is a
class of circuits with two unstable states. The circuit switches
back-and-forth between these states. The output is generally
square waves.
Harmonic oscillators are capable of producing near sinusoidal
output, and is based on positive feedback approach.
Here we will focus on Harmonic Oscillators for RF systems.
Harmonic oscillators are used as this class of circuits are
capable of producing stable sinusoidal waveform with low phase
September 2010
5
noise
Classical Positive Feedback Perspective on

Oscillator (1)
Consider the classical feedback system with non-inverting amplifier,

Assuming the feedback network and amplifier do not load each other,
we can write the closed-loop transfer function as:
Non-inverting amplifier
Si(s)
E(s)
A(s)
So(s)
So
(s ) = 1 AA(s(s)F) (s ) (1.1a)
Si
High impedance
Positive
Feedback
Feedback network
High impedance
F(s)
T (s ) = A(s )F (s ) (1.1b)
Loop gain (the gain of the system
around the feedback loop)
Writing (1.1a) as: S o (s ) = 1 AA(s()sF) (s ) S i (s )

We see that we could get non-zero output at So, with Si = 0, provided
1-A(s)F(s) = 0. Thus the system oscillates!
September 2010

Oscillator (2)
The condition for sustained oscillation, and for oscillation to startup from
positive feedback perspective can be summarized as:
For sustained oscillation
1 A(s )F (s ) = 0
For oscillation to startup
A(s )F (s ) > 1
Barkhausen Criterion
arg( A(s )F (s )) = 0
(1.2a)
(1.2b)
Take note that the oscillator is a non-linear circuit, initially upon power
up, the condition of (1.2b) will prevail. As the magnitudes of voltages
and currents in the circuit increase, the amplifier in the oscillator begins
to saturate, reducing the gain, until the loop gain A(s)F(s) becomes one.
A steady-state condition is reached when A(s)F(s) = 1.
Note that this is a very simplistic view of oscillators. In reality oscillators

are non-linear systems. The steady-state oscillatory condition corresponds
to what is called a Limit Cycle. See texts on non-linear dynamical systems.
September 2010

Oscillator (3)
Positive feedback system can also be achieved with inverting amplifier:

Inverting amplifier
Si(s)
E(s)
-A(s)
So(s)
So
(s ) = 1 AA(s(s)F) (s )
Si
Inversion
F(s)
To prevent multiple simultaneous oscillation, the Barkhausen criterion

(1.2a) should only be fulfilled at one frequency.
Usually the amplifier A is wideband, and it is the function of the
feedback network F(s) to select the oscillation frequency, thus the
feedback network is usually made of reactive components, such as
inductors and capacitors.
September 2010

Oscillator (4)
In general the feedback network F(s) can be implemented as a Pi or T

network, or as a transformer.
Consider the Pi network with all reactive elements. A simple analysis in
[2] and [3] shows that to fulfill (1.2a), the reactance X1, X2 and X3 need to
meet the following condition:
E(s)
So(s)
-A(s)
X 3 = ( X 1 + X 2 ) (1.3)
If X3 represents inductor, then

X1 and X2 should be capacitors.
X3
X1
X2
September 2010
Classical Feedback Oscillators
The following are examples of oscillators, based on the original circuit

using vacuum tubes.
+
-
Colpitt
oscillator
+
Armstrong
oscillator
September 2010
Hartley
oscillator
Clapp
oscillator
10
Example of Tuned Feedback Oscillator

(1)
A 48 MHz Transistor Common
-Emitter Colpitt Oscillator
2.0
1.5
1.0
R
RB1
R=10 kOhm
R
RC
R=330 Ohm
C
CD1
C=0.1 uF
VB, V
VL, V
V_DC
SRC1
Vdc=3.3 V
VL
C
Cc2
C=0.01 uF
VB
R
RE
R=220 Ohm
-1.0
-1.5
R
RL
R=220 Ohm
pb_mot_2N3904_19921211
Q1
R
RB2
R=10 kOhm
0.0
-0.5
VC
C
Cc1
C=0.01 uF
0.5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
time, usec
C
CE
C=0.01 uF
Si(s)
E(s)
So(s)
-A(s)
L
C
L1
C1
L=2.2 uH
C=22.0 pF R=
C
C2
C=22.0 pF
F(s)
September 2010
11

(2)
A 27 MHz Transistor Common-Base
Colpitt Oscilator
600
R
RB1
R=10 kOhm
R
RC
R=470 Ohm
VC
VB
C
Cc1
C=0.1 uF
Si(s)
R
RB2
R=4.7 kOhm
400
C
CD1
C=0.1 uF
200
VL
C
C1
C=100.0 pF
C
Cc2
C=0.1 uF
R
RE
R=100 Ohm
L
L1
L=1.0 uH
R=
C
C2
C=100.0 pF
A(s)
0
-200
-400
pb_m ot_2N3904_19921211
Q1
VE
E(s)
VE, mV
VL, mV
V_DC
SRC1
Vdc=3.3 V
C
C3
C=4.7 pF
R
R1
R=1000 Ohm
-600
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
time, usec
So(s)
September 2010
F(s)
12

(3)
V_DC
SRC1
Vdc=3.3 V
R
RB1
R=10 kOhm
R
RC
R=330 Ohm
A 16 MHz Transistor Common-Emitter

Crystal Oscillator
C
CD1
C=0.1 uF
VC
VB
VL
C
Cc2
C=0.1 uF
R
RL
R=220 Ohm
pb_mot_2N3904_19921211
Q1
C
Cc1
C=0.1 uF
R
RB2
R=10 kOhm
C
C1
C=22.0 pF
September 2010
R
RE
R=220 Ohm
C
CE
C=0.1 uF
sx_stk_CX-1HG-SM_A_19930601
XTL1
Fres=16 MHz
C
C2
C=22.0 pF
13
Introduction RF Oscillator (1)
In RF oscillator (foscillator > 300 MHz) , feedback method to induce

oscillation can also employed. However it is difficult to distinguish
between the amplifier and the feedback path, owing to the coupling
between components and conductive structures on the printed circuit
board (PCB).
An alternative perspective is to use the 1-port approach.
We can view an oscillator as an amplifier that produces an output
when there is no input,
Thus it is an unstable amplifier that becomes an oscillator!
The concept of stability analysis of small signal amplifier using stability
circles can be applied to RF oscillator design.
Here instead of choosing load or source impedance in the stable
region of the Smith Chart, we purposely choose load or source
impedance in the unstable region. This will result in either |1 | > 1 or
|2 | > 1 .
September 2010
14
For instance by choosing the load impedance L at the unstable region,

we could ensure that |1 | > 1. We then choose the source impedance
properly so that |1 s | > 1 and oscillation will start up (refer back to
Chapter 7 on stability theory).
Once oscillation starts, an oscillating voltage will appear at both the
input and output ports of a 2-port network. So it does not matter
whether we enforce |1 s | > 1 or |2 L | > 1, enforcing either one will
cause oscillation to occur (It will be shown later that when |1 s | > 1 at
the input port, |2 L | > 1 at the output port and vice versa).
The key to fixed frequency oscillator design is ensuring that the criteria
|1 s | > 1 only happens at one frequency, so that no simultaneous
oscillations occur at other frequencies.
September 2010
15
A typical RF oscillator block diagram with the one-port criteria for

oscillation. One-port means we induce oscillation by either
concentrating on Port 1 or Port 2 of the oscillator system.
This one-port criteria is also referred to as the negative-resistance
criteria.
Power Supply
This is usually
called the
Resonator
Port 1
Port 2
Destabilized
Amplifier
Zs
|1 s | > 1
@ foscillator
September 2010
Or
ZL
|2 L | > 1
@ foscillator
16
Wave Propagation Stability Perspective (1)
From our discussion of stability from wave propagation in Chapter 7

Zs or s
Source
b1
Port 1
Port 2
2-port
Network
a1
Z1 or 1
a1 = bs + bs 1s + bs 12s 2 + ...
bs
a1 =
1 1s
b1 = bs 1 + bs 12s + bs 13s 2 + ...
b1 =
bs
bs1
bss 1
b
1=
bs
bss 12
bss 314
September 2010
1
1 1s
Compare with
equation (1.1a)
bss 212
bss 213
bss 313
bs 1
1 1s
So
A(s )
(
s) =
Si
1 A(s )F (s )
Feedback is
provided by the
reflection due to
17
source mismatch
Wave Propagation Stability Perspective (2)
Thus oscillation will occur when | s1 | > 1.

Similar argument can be applied to port 2, and we see that the
condition for oscillation is |L2 | > 1.
It is easier to work with impedance (admittance) in circuit design, since
this can be related to lumped passive components.
The following slides, with are adapted from Chapter 7, shows how the
above requirements can be cast into impedance form.
September 2010
18
Oscillation Start-Up Requirements (1)
We will derive the oscillation start-up requirement in terms of impedance

for Port. Assume Port 2 of the unstable amplifier is terminated with a
suitable load impedance.
s =
(Rs Z o ) + jX s
(Rs + Z o ) + jX s
1 =
Zs
Z1
(R1 Z o ) + jX1
(R1 + Z o ) + jX1
Rs
R1
Z2
jXs
ZL
Vamp
jX1
Port 2
Source Network
Port 1
R1 + jX 1
Z1
Vs =
V=
Vs
R1 + Rs + j ( X 1 + X s )
Z s + Z1
September 2010
(1.3)
19

From:
(R Z o ) + jX
(R + Z o ) + jX
Let o be the desired oscillation frequency
(R1 Zo ) + jX1 (Rs Zo ) + jX s

o
(R1 + Zo ) + jX1 (Rs + Zo ) + jX s
R R Z o (R1 + Rs ) + Z o2 X1 X s + j (R1 X s + Rs X1 Z o ( X1 + X s ))
= 1 s
R1Rs + Z o (R1 + Rs ) + Z o2 X1 X s + j (R1 X s + Rs X1 + Z o ( X1 + X s ))
1s =
1s =
o
(R R Z (R + R ) + Z
(R R + Z (R + R ) + Z
1 s
1 s
September 2010
2
o
2
o
X1 X s
X1 X s
) + (R X
) + (R X
2
+ Rs X 1 Z o ( X 1 + X s ))2
(1.4)
+ Rs X 1 + Z o ( X 1 + X s ))
20
10
From (1.4), it is easily seen that if

Rs + R1 |o = 0
(1.5a)
Then | s1 | = 1 at o independent of the value of Zo.

Moreover if
X s + X 1 | o = 0
Rs + R1 | o < 0
X s + X 1 | o = 0
(1.5b)
(1.6a)
(1.6b)
Then | s1 | > 1 at o.
Since Rs is > 0, (1.6a) implies that R1 must be negative.
Thus in designing an oscillator, we try to make an amplifier unstable so
that R1 or R2 will be negative. Then we try to have the condition
R1+Rs|o<0, X1+Xs|o= 0 at port 1 or R2+RL|o<0, X2+XL|o= 0 at port 2.
September 2010
21

Equations (1.6a) and (1.6b) are equivalent to requiring the denominator
of (1.3) to have a complex conjugate pole pair at the frequency o where
oscillation occurs, this means:
Z1 (s )
V (s ) =
Vs (s )
Z s (s ) + Z1 (s )
When:
Rs + R1 | o < 0
X s + X 1 | o = 0
September 2010
Im
Pole pair on the

right half plane
Re
22
11
What Happens During Oscillation

Start-Up?
Usually the transient signal or noise signal from the environment will
contain a small component at the oscillation frequency. This forms the
seed in which the oscillation built up.
As the voltage amplitude in the two-port network increases, the
assumption of small signal operation become invalid.
For instance in BJT, nonlinear effects such as transistor saturation and
cut-off will happen, this limits the beta of the transistor and finally limits
the amplitude of the oscillating signal.
Therefore, the design of oscillator in a nutshell is: Use linear analysis to
design an unstable system which would let any small transient signal to
built up gradually. As the transient signal increases, let the nonlinearity
of the circuit limits the final oscillation amplitude.
September 2010
23
Parallel Representation
Take note that in this discussion we represent the source and input
of the oscillator using series network.
We can also use the parallel or shunt representation as shown
below.
Port 1
Gs
jBs
Gs + G1 |o = 0
Bs + B1 |o = 0
Steady-state
September 2010
Z2
G1
(1.7a)
(1.7b)
jB1
ZL
Vamp
Gs + G1 |o < 0
Bs + B1 |o = 0
(1.8a)
(1.8b)
Start-up
24
12
Series or Parallel Representation?
The question is which to use? Series or parallel network representation

for the oscillator input?
At present there is no concrete answer to this question, we can derive
a simplified small-signal equivalent electrical circuit of the destabilized
amplifier, analyze its Z1 or Y1 mathematical expression and decide
which is more suitable. Or we have to rely on computer simulation to
determine the Z1 and Y1, then decide whether a series or parallel
network best approximate input characteristics in the frequency range
of interest.
Also we can assume series representation, and worked out the correct
resonator impedance. And after computer simulation we discover that
the actual oscillating frequency is far from our prediction, or the circuit
is not oscillating, then it probably means that the series representation
is incorrect, and we should try the parallel representation.
September 2010
25
Frequency Stability
The process of oscillation depends on the non-linear behavior of

the negative-resistance network.
Actually the conditions discussed, e.g. equations (1.5), (1.6), (1.7)
and (1.8) are not enough to guarantee a stable state of oscillation.
In particular, stability requires that any perturbation in current,
voltage and frequency will be damped out, allowing the oscillator to
return to its initial state.
The stability of oscillation can be expressed in terms of the partial
derivative of the sum Z1 + Zs or Y1 + Ys of the input port (or output
port) as a function of change in frequency, terminal voltage
amplitude and attenuation factor of the initial sinusoidal wave.
September 2010
26
13
Frequency Stability (contd)
The discussion is beyond the scope of this chapter for now, and the
reader should refer to [1] and [6] for the concepts.
Interest reader can also read:

A. V. Grebennikov, Stability of negative resistance oscillator circuits,
International journal of Electronic Engineering Education, Vol. 36, pp. 242-254, 1999.
September 2010
27
2.0 Fixed Frequency

Oscillator Design
September 2010
28
14
Procedures of Designing Fixed

Frequency Oscillator (1)
Step 1 - Design a transistor/FET amplifier circuit.

Step 2 - Make the circuit unstable by adding positive feedback at radio
frequency, for instance, adding series inductor at the base for commonbase configuration.
Step 3 - Determine the frequency of oscillation o and extract Sparameters at that frequency.
Step 4 - With the aid of Smith Chart and Load Stability Circle, make R1
< 0 by selecting L in the unstable region.
Step 5 - Find Z1 = R1 + jX1.
September 2010
29
Procedures of Designing Fixed

Frequency Oscillator (2)
Step 6 - Find Rs and Xs so that R1 + Rs<0, X1 + Xs=0 (in order for | 1

s |>1) at o. The rule of thumb is to make Rs=(1/3)|R1| .
Step 7 - Design the impedance transformation network for Zs and ZL.
Step 8 - Built the circuit or run a computer simulation to verify that the
circuit can indeed starts oscillating when power is connected.
Note: Alternatively we may begin Step 4 using Source Stability Circle
and work on | 2 L |> 1 at o .
September 2010
30
15
Making an Amplifier Unstable (1)
An amplifier can be made unstable by providing some kind of

feedback.
Two favorite transistor amplifier configurations used for oscillator
design are the Common-Base configuration with Base feedback and
Common-Emitter configuration with Emitter degeneration.
September 2010
31

This is a practical model
of an inductor
Base bypass
capacitor
At 410MHz
S-PARAMETERS
DC
DC
DC1
S_Param
SP1
Start=410.0 MHz
Stop=410.0 MHz
Step=2.0 MHz
SStabCircle
S_StabCircle
S_StabCircle1
SSC=s_stab_circle(S,51)
StabFact
V_DC
SRC1
Vdc=4.5 V
R
Rb1
R=10 kOhm
L
LC
L=330.0 nH
R=
StabFact
StabFact1
K=stab_fact(S)
Common Base
Configuration
LStabCircle
L_StabCircle
L_StabCircle1
LSC=l_stab_circle(S,51)
Vout
Term
Term2
Num=2
Z=50 Ohm
C
Cc2
C=10.0 nF
L
LB
L=22 nH
R=
R
RLB
R=0.77 Ohm
C
Cb
C=10.0 nF
C
CLB
C=0.17 pF
Positive feedback
here
September 2010
pb_phl_BFR92A_19921214
Q1
R
Rb2
L
R=4.7 kOhm
LE
L=330.0 nH
R=
Vin
C
Cc1
C=10.0 nF
Term
Term1
Num=1
Z=50 Ohm
An inductor is added
in series with the bypass
capacitor on the base
terminal of the BJT.
This is a form of positive
series feedback.
R
Re
R=100 Ohm
32
16
freq
410.0MHz
freq
410.0MHz
K
-0.987
S(1,1)
1.118 / 165.6...
L Plane
s22 and s11 have magnitude > 1

S(1,2)
0.162 / 166.9...
S(2,1)
2.068 / -12.723
S(2,2)
1.154 / -3.535
Unstable Regions
September 2010
s Plane
33

S-PARAMETERS
DC
DC
DC1
V_DC
SRC1
Vdc=4.5 V
S_Param
SP1
Start=410.0 MHz
Stop=410.0 MHz
Step=2.0 MHz
SStabCircle
S_StabCircle
S_StabCircle1
SSC=s_stab_circle(S,51)
StabFact
R
Rb1
R=10 kOhm
StabFact
StabFact1
K=stab_fact(S)
L
LC
L=330.0 nH
R=
LStabCircle
L_StabCircle
L_StabCircle1
LSC=l_stab_circle(S,51)
Vout
C
Cc1
C=1.0 nF
Term
Term1
Num=1
Z=50 Ohm
C
Cc2
C=1.0 nF
Q1
R
Rb2
R=4.7 kOhm
C
Ce1
C=15.0 pF
C
Ce2
C=10.0 pF
September 2010
Term
Term2
Num=2
Z=50 Ohm
Feedback
Common Emitter
Configuration
R
Re
R=100 Ohm
Positive feedback here
34
17

S22 and S11 have magnitude > 1
freq
410.0MHz
freq
410.0MHz
K
-0.516
S(1,1)
3.067 / -47.641
S(1,2)
0.251 / 62.636
S(2,1)
6.149 / 176.803
S(2,2)
1.157 / -21.427
L Plane
s Plane
Unstable
Regions
September 2010
35
Precautions
The requirement Rs= (1/3)|R1| is a rule of thumb to provide the excess

gain to start up oscillation.
Rs that is too large (near |R1| ) runs the risk of oscillator fails to start up
due to component characteristic deviation.
While Rs that is too small (smaller than (1/3)|R1|) causes too much nonlinearity in the circuit, this will result in large harmonic distortion of the
output waveform.
Clipping, a sign of
too much nonlinearity
V2
V2
Rs too small
For more discussion about the Rs = (1/3)|R1| rule,
and on the sufficient condition for oscillation, see
[6], which list further requirement.
September 2010
Rs too large
36
18
Aid for Oscillator Design - Constant

|
1| Circle (1)
In choosing a suitable L to make |L | > 1, we would like to know the

range of L that would result in a specific |1 |.
It turns out that if we fix |1 |, the range of load reflection coefficient that
result in this value falls on a circle in the Smith chart for L .
The radius and center of this circle can be derived from:
S D
1 = 11 L
1 S 22L
Assuming = |1 |:
By fixing |1 | and changing L .
Tcenter =
2 S 22* + D*S11
September 2010
D S 22
(2.1a)
Radius =
S12 S 21
2
D 2 S 22
(2.1b)
37
Aid for Oscillator Design - Constant

|
1| Circle (2)
The Constant |1 | Circle is extremely useful in helping us to choose a

suitable load reflection coefficient. Usually we would choose L that
would result in |1 | = 1.5 or larger.
Similarly Constant |2 | Circle can also be plotted for the source
reflection coefficient. The expressions for center and radius is similar
to the case for Constant |1 | Circle except we interchange s11 and s22,
L and s . See Ref [1] and [2] for details of derivation.
September 2010
38
19
Example 2.1
In this example, the design of a fixed frequency oscillator operating at

410MHz will be demonstrated using BFR92A transistor in SOT23
package. The transistor will be biased in Common-Base configuration.
It is assumed that a 50 load will be connected to the output of the
oscillator. The schematic of the basic amplifier circuit is as shown in
the following slide.
The design is performed using Agilents ADS software, but the author
would like to stress that virtually any RF CAD package is suitable for
this exercise.
September 2010
39
Example 2.1 Cont...
Step 1 - DC biasing circuit design and S-parameter extraction.

S-PAR AME T ER S
DC
S t ab F ac t
DC
D C1
V_DC
SR C1
Vdc =4.5 V
R
Rb1
R=10 kO hm
L
LC
L=330.0 nH
R=
S_Param
SP1
Start=410. 0 MH z
Stop=410.0 MHz
Step=2. 0 MH z
Port 2 - Output
C
Cb
C =1.0 nF
L3 is chosen carefully so that the

unstable regions
in both L and s
planes are large
September 2010
enough.
R
Rb2
R=4.7 kOhm
Term
Term 2
Num=2
Z=50 Ohm
C
Cc1
C =1. 0 nF
S S tabC irc le
S_StabCircle
S_StabCircle1
source_s tabc ir=s_st ab_c irc le(S ,51)
pb_phl_BF R 92A_19921214
Q1
L
LE
L=220.0 nH
R=
LSt abC irc le
L_St abCircle
L_St abCircle1
load_s tabcir=l_s tab_c irc le(S, 51)
C
Cc2
C =1. 0 nF
L
LB
L=12. 0 nH
R=
StabFact
StabFact 1
K=st ab_f act (S )
Term
Term 1
Num=1
Z=50 O hm
Port 1
Amplifier
Port 2
R
Re
R =100 Ohm
Port 1 - Input
40
20
Example 2.1 Cont...

freq
410.0MHz
freq
410.0MHz
K
-0.987
S(1,1)
1.118 / 165.6...
S(1,2)
0.162 / 166.9...
S(2,1)
2.068 / -12.723
S(2,2)
1.154 / -3.535
Unstable Regions
Load impedance here will result

in |1| > 1
September 2010
Source impedance here will result

in |2| > 1
41
Example 2.1 Cont...
Step 2 - Choosing suitable L that cause |1 | > 1. We plot a few

constant |1 | circles on the L plane to assist us in choosing a suitable
load reflection coefficient.
LSC
This point is chosen

because it is on
real line and easily
matched.
|1 |=1.5
|1 |=2.0
L = 0.5<0
|1 |=2.5
Note: More difficult
to implement load
impedance near
edges of Smith
Chart
ZL = 150+j0
L Plane
September 2010
42
21
Example 2.1 Cont...
Step 3 - Now we find the input impedance Z1 at 410MHz:
S DL
1 = 11
= 1.422 + j 0.479
1 S 22 L
Z1 = Z o
1 + 1
= 10.257 + j 7.851
1 1
R1
X1
Step 4 - Finding the suitable source impedance to fulfill R1 + Rs<0, X1

+ Xs=0:
1
R1 3.42
3
X s = X1 7.851
Rs =
September 2010
43
Example 2.1 Cont...
The system block diagram:

Port 1
Port 2
Zs = 3.42-j7.851
Common-Base (CB)
Amplifier
with feedback
September 2010
ZL = 150
44
22
Example 2.1 Cont...
Step 5 - Realization of the source and load impedance at 410MHz.

Zs= 3.42-j7.851
ZL=150
49.44pF
3.42
27.27nH
CB Amplifier
@ 410MHz
3.49pF
50
1
C
1
C=
= 49.44 pF
7.851
7.851 =
September 2010
45
Example 2.1 Cont... - Verification Thru

Simulation
Vpp
BFR92A
Vpp = 0.9V
V = 0.45V
Power dissipated in the load:
2
September 2010
PL =
1V
2 RL
= 0.5
0.452
= 2.025mW
50
46
23
Example 2.1 Cont... - Verification Thru

Simulation
Performing Fourier Analysis on the steady state wave form:

The waveform is very clean with
little harmonic distortion. Although
we may have to tune the capacitor
Cs to obtain oscillation at 410 MHz.
484 MHz
September 2010
47
Example 2.1 Cont... The Prototype

Voltage at the base terminal and 50 Ohms load resistor of the
fixed frequency oscillator:
1.4
1.2
Vbb
1.0
0.8
0.6
0.4
0.2
0.0
Vout
-0.2
Output port
-0.4
-0.6
-0.8
0
10
20
30
40
50
60
70
80
90
100
110
120
Startup transient ns
September 2010
48
24
Example 2.2 - Sample Oscillator

Design 2 Using Agilents ADS Software
T R ANS IE NT
DC
A UHF Voltage Controlled Oscillator:
VtP WL
Vtrig
V_Tran=pwl(t ime, 0ns, 0V, 1ns,0. 01V, 2ns ,0V)
R
Rb
R=47 kOhm
V_DC
Vc c
Vdc=3.0 V
L
Lc
L=220.0 nH
R=
ParamSweep
Sweep1
SweepVar="R load"
SimI nstanceNam e[1] ="Tran1"
SimI nstanceNam e[2] =
St art=100
St op=700
Var
VAR
Eqn
St ep=100
VAR 1
X=1. 0
R load=100
R
C
Rout
C c2
C =330. 0 pF R=50 O hm
L
L2
L=47. 0 nH
R=
C
C b1
C =2. 2 pF
R
RL
R=Rload
Q1
C
Cb3
C=4. 7 pF
C
C b2
C =10. 0 pF
R
V _D C
R1
R=4700 Ohm
S R C1
V dc=-1.5 V
P ARAM ET ER SWE EP
Tran
Tran1
StopTim e=100. 0 nsec
MaxTimeS tep=1.2 nsec
DC
D C1
R
Re
R=220 O hm
di_sms_bas40_19930908
D1
C
C b4
C =4.7 pF
September 2010
49
Example 2.2 - Oscillator Start-up

Waveform and Hardware 2
Voltage across the load resistor RL:
1.0
0.5
Vout
0.0
Auxiliary
trigger
signal
-0.5
-1.0
-1.5
0
10
20
30
40
50
60
70
80
90
10 0
ns
Power splitter
Output port
September 2010
50
25
End Notes
To improve the frequency stability of the oscillator, the following steps

[5] can be taken.
Use components with known temperature coefficients, especially
capacitors.
Neutralize, or swamp-out with resistors, the effects of active device
variations due to temperature, power supply and circuit load changes.
Operate the oscillator an low power.
Reduce noise, use shielding, AGC and bias-line filtering.
Use an oven or temperature compensating circuitry (such as
thermistor).
September 2010
51
3.0 Voltage Controlled

Oscillator
September 2010
52
26
About the Voltage Controlled

Oscillator (VCO) (1)
A simple VCO using Clapp-Gouriet configuration.

The transistor chosen for the job is BFR92A, a wide-band NPN
transistor which comes in SOT-23 package.
Similar concepts as in the design of fixed-frequency oscillators are
employed. Where we design the biasing of the transistor, destabilize the
network and carefully choose a load so that from the input port (Port 1),
the oscillator circuit has an impedance:
Z1 ( ) = R1 ( ) + jX 1 ( )
Of which R1 is negative, for a range of frequencies from 1 to 2.

Lower
September 2010
Upper
53

Clapp-Gouriet
Oscillator Circuit
with Load
Zs
ZL
Z1 = R1 + jX1
September 2010
54
27

If we can connect a source impedance Zs to the input port, such that

within a range of frequencies from 1 to 2:
Z s ( ) = Rs ( ) + jX s ( )
Rs ( ) < R1 ( ) R1 ( ) < 0
X s ( ) = X 1 ( )
The circuit will oscillate within this range of frequencies. By changing

the value of Xs, one can change the oscillation frequency.
The rationale is that only the initial spectral of the noise
signal fulfilling Xs = X1 will start the oscillation.
For example, if X1 is +ve, then Xs must be -ve, and it can be generated

by a series capacitor. By changing the capacitance, one can change
the oscillation frequency of the circuit.
If X1 is ve, Xs must be +ve. A variable capacitor in series with a
suitable inductor will allow us to adjust the value of Xs.
September 2010
55

Usually we will design the transistor biasing so that X1 is +ve within the
intended range of frequencies. This will be carried out in the example
shown here.
The design of the transistor biasing is achieved by using computer
aided design, where first we design the d.c. biasing, then run smallsignal simulation to obtain the S-parameters or Z-parameters of the
input port. Of course Load Stability Circle is also used to ensure that
real part of Z1 is -ve.
September 2010
56
28
Schematic of the VCO

Initial noise
source to start
the oscillation
VtP WL
Vtrig
V_Tran=pwl(t ime, 0ns , 0V, 1ns,0. 01V, 2ns ,0V)
R
Rb
R=47 k Ohm
V_DC
Vcc
Vdc =3.0 V
Variable
capacitance
tuning network
R
V _D C
R1
R=4700 Ohm
S RC1
V dc=-1.5 V
Tran
Tran1
StopTim e=100. 0 ns ec
MaxTimeS tep=1.2 nsec
L
Lc
L=220.0 nH
R=
P ARAM ET ER SWEEP
ParamSweep
Sweep1
SweepVar="R load"
SimI ns tanc eNam e[1] ="Tran1"
SimI ns tanc eNam e[2] =
St art=100
St op=700
V ar
VAR
E qn
St ep=100
VAR 1
X=1. 0
R load=100
R
C
Rout
C c2
C =330. 0 pF R=50 O hm
L
L2
L=47. 0 nH
R=
C
Cb1
C=2. 2 pF
C
Cb3
C=4. 7 pF
C
Cb2
C=10. 0 pF
September 2010
T R ANS IE NT
DC
DC
D C1
pb_phl_BF R92A_19921214
Q1
R
RL
R=Rload
R
Re
R=220 O hm
di_s ms _bas 40_19930908

D1
C
2-port network
C b4
C =4.7 pF
57
More on the Schematic
L2 together with Cb3, Cb4 and the junction capacitance of D1 can

produce a range of reactance value, from -ve to +ve. Together these
components form the frequency determining network.
Cb4 is optional, it is used to introduce a capacitive offset to the junction
capacitance of D1.
R1 is used to isolate the control voltage Vdc from the frequency
determining network. It must be a high quality SMD resistor. The
effectiveness of isolation can be improved by adding a RF choke in
series with R1 and a shunt capacitor at the control voltage.
Notice that the frequency determining network has no actual
resistance to counter the effect of |R1()|. This is provided by the loss
resistance of L2 and the junction resistance of D1.
September 2010
58
29
Time Domain Result
1.0
0.5
0.0
-0.5
-1.0
-1.5
0
10
20
30
40
50
60
70
80
90
100
Vout when Vdc = -1.5V
September 2010
59
Load-Pull Experiment
Peak-to-peak output voltage versus Rload for Vdc = -1.5V.
Vout(pp)
1
100
200
300
400
500
600
700
800
RLoad
September 2010
60
30
Controlling Harmonic Distortion (1)
Since the resistance in the frequency determining network is too small,

large amount of non-linearity is needed to limit the output voltage
waveform, as shown below there is a lot of distortion.
Vout
September 2010
61
The distortion generates substantial amount of higher harmonics.

This can be reduced by decreasing the positive feedback, by adding a
small capacitance across the collector and base of transistor Q1. This
is shown in the next slide.
September 2010
62
31

The observant
person would
probably notice
that we can also
reduce the harmonic
distortion by introducing
a series resistance in
the tuning network.
However this is not
advisable as the phase
noise at the oscillators
output will increase (
more about this later).
Capacitor to control
positive feedback
DC
DC
DC1
VtPWL
L
Vtrig
Lc
V_Tran=pwl(time, 0ns, 0V, 1ns,0.01V, 2ns,0V)
L=220.0 nH
R
R=
Rb
R=47 kOhm
I_Probe
V_DC
I_Probe
Iload
Vcc
IC
Vdc=3.0 V
C
Ccb
C=1.0 pF
L
L2
L=47.0 nH
C
R=
Cb1
C=6.8 pF
Q1
C
Cb3
C=4.7 pF
C
Cb2
C=10.0 pF
R
R1
V_DC
R=4700 Ohm
SRC1
Vdc=0.5 V
September 2010
TRANSIENT
Tran
Tran1
StopTime=280.0 nsec
MaxTimeStep=1.2 nsec
C
Cc2
C=330.0 pF
R
Rout
R=50 Ohm
R
RL
R=50 Ohm
R
Re
R=220 Ohm
di_sms_bas40_19930908
D1
C
Cb4
C=0.7 pF
63
The output waveform Vout after this modification is shown below:
Vout
September 2010
64
32
Finally, it should be noted that we should also add a low-pass filter

(LPF) at the output of the oscillator to suppress the higher harmonic
components. Such LPF is usually called Harmonic Filter.
Since the oscillator is operating in nonlinear mode, care must be taken
in designing the LPF.
A practical design example will illustrate this approach.
September 2010
65
The Tuning Range
Actual measurement is carried out, with the frequency measured using

a high bandwidth digital storage oscilloscope.
410
D1 is BB149A,
a varactor
manufactured by
Phillips
Semiconductor (Now
NXP).
405
f
MHz
400
395
0.5
1.5
2.5
Vdc
September 2010
Volts
66
33
Phase Noise
In a practical oscillator, the instantaneous frequency and magnitude of

oscillation are not constant. These will fluctuate as a function of time.
As a result, the output in the frequency domain is smeared out.
This is known as Phase Noise.
To show the time and frequency domains expressions

of sinusoidal signal with small random amplitude
and phase variation with time.
T = 1/fo
v(t)
t
f
fo
Large phase noise

v(t)
- 90dBc/Hz
100kHz
Small phase noise

September 2010
fo
Phase noise is
mathematically
modeled as random phase
and amplitude modulation.
It is measured in dBc/Hz @
foffset.
dBc/Hz stands for dB down
from the carrier (the c) in 1 Hz
bandwidth.
For example
-90dBc/Hz @ 100kHz offset
from a CW sine wave at
2.4GHz.
67
Reducing Phase Noise (1)
Requirement 1: The tuning network (or the resonator) of an oscillator

must have a high Q factor. This is an indication of low dissipation loss
in the tuning network (See Chapter 3a impedance transformation
network on Q factor).
Xtune
X1
Tuning
Network with
High Q
Variation in Xtune
due to environment
causes small change
in instantaneous
frequency.
Xtune
X1
f
f
-X1
September 2010
2|X1|
Tuning
Network with
Low Q
f
-X1
Ztune = Rtune +jXtune
2|X1|
68
34
A Q factor in the tuning network of at least 20 is needed for medium

performance oscillator circuits at UHF. For highly stable oscillator, Q
factor of the tuning network must be in excess or 1000.
We have looked at LC tuning networks, which can give Q factor of up
to 40. Ceramic resonator can provide Q factor greater than 500, while
piezoelectric crystal can provide Q factor > 10000.
At microwave frequency, the LC tuning networks can be substituted
with transmission line sections.
See R. W. Rhea, Oscillator design & computer simulation, 2nd edition
1995, McGraw-Hill, or the book by R.E. Collin for more discussions on
Q factor.
Requirement 2: The power supply to the oscillator circuit should also
be very stable to prevent unwanted amplitude modulation at the
oscillators output.
September 2010
69
Requirement 3: The voltage level of Vcontrol should be stable.

Requirement 4: The circuit has to be properly shielded from
electromagnetic interference from other modules.
Requirement 5: Use low noise components in the construction of the
oscillator, e.g. small resistance values, low-loss capacitors and
inductors, low-loss PCB dielectric, use discrete components instead of
integrated circuits.
September 2010
70
35
More on Varactor
The varactor diode is basically a PN junction optimized for its linear

junction capacitance.
It is always operated in the reverse-biased mode to prevent
nonlinearity, which generate harmonics.
Vj
As we increase the negative

biasing voltage Vj , Cj decreases,
hence the oscillation frequency increases.
Cj
The abrupt junction varactor has high
Q, but low sensitivity (e.g. Cj varies
little over large voltage change).
The hyperabrupt junction varactor
Cjo
Forward biased has low Q, but higher sensitivity.
Reverse biased
Linear region
0
September 2010
Vj
71
A Better Variable Capacitor Network
The back-to-back varactors are commonly employed in a VCO circuit, so that

at low Vcontrol, when one of the diode is being affected by the AC voltage, the
other is still being reverse biased.
When a diode is forward biased, the PN junction capacitance becomes
nonlinear.
The reverse biased diode has smaller junction capacitance, and this dominates
the overall capacitance of the back-to-back varactor network.
This configuration helps to decrease the harmonic distortion.
At any one time, at least one of

the diode will be reverse biased.
The junction capacitance of the
reverse biased diode will dominate
the overall capacitance of the
network.
September 2010
To suppress
RF signals
To ve
resistance
amplifier
Vcontrol
Vcontrol
Vcontrol
Symbol
for Varactor
72
36
Example 3.1 VCO Design for

Frequency Synthesizer
To design a low power VCO that works from 810 MHz to 910 MHz.
Power supply = 3.0V.
Output power (into 50 load) minimum -3.0 dBm.
September 2010
73
Example 3.1 Cont
Checking the d.c. biasing and AC simulation.

DC
DC
DC1
V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm
S-PARAMETERS
S_Param
SP1
Start=0.7 GHz
Stop=1.0 GHz
Step=1.0 MHz
b82496c3120j000
LC
param=SIMID 0603-C (12 nH +-5%)
100pF_NPO_0603
Cc2
Q1
4_7pF_NPO_0603
Term
Cc1
Term1
Num=1
Z=50 Ohm
Z11
September 2010
2_2pF_NPO_0603
C1
R
RL
R=100 Ohm
3_3pF_NPO_0603
C2
R
RE
R=100 Ohm
74
37
Example 3.1 Cont
Checking the results real and imaginary portion of Z1 when output is

terminated with ZL = 100.
m1
freq=775.0MHz
m1=-89.579
m2
freq=809.0MHz
m2=-84.412
-40
-50
imag(Z(1,1))
real(Z(1,1))
-60
-70
m2
-80
m1
-90
-100
-110
-120
0.70
0.72
0.74
0.76
0.78
0.80
0.82
0.84
0.86
0.88
0.90
0.92
0.94
0.96
0.98
1.00
freq, GHz
September 2010
75
Example 3.1 Cont
The resonator design.

S-PARAMETERS
PARAMETER SWEEP
ParamSweep
Sweep1
SweepVar="Vcontrol"
SimInstanceName[1]="SP1"
SimInstanceName[2]=
SimInstanceName[3]=
SimInstanceName[4]=
SimInstanceName[5]=
SimInstanceName[6]=
Start=0.0
Stop=3
Step=0.5
S_Param
SP1
Start=0.7 GHz
Stop=1.0 GHz
Step=1.0 MHz
September 2010
L
L2
L=33.0 nH
R=
100pF_NPO_0603
C2
VAR
VAR1
Vcontrol=0.2
L
L1
L=10.0 nH
R=
Vvar
V_DC
SRC1
Vdc=Vcontrol V
Var
Eqn
BB833_SOD323
D1
C
C3
C=0.68 pF
Term
Term1
Num=1
Z=50 Ohm
76
38
Example 3.1 Cont
The resonator reactance.
-X1 of the destabilized amplifier
120
m1
freq=882.0MHz
m1=64.725
Vcontrol=0.000000
-imag(VCO_ac..Z(1,1))
imag(Z(1,1))
100
80
m1
60
40
Resonator
reactance
as a function of
control voltage
The theoretical tuning

range
20
0
0.70
0.75
0.80
0.85
0.90
0.95
1.00
freq, GHz
September 2010
77
Example 3.1 Cont
The complete schematic with the harmonic suppression filter.

TRANSIENT
Tran
Tran1
StopT ime=1000.0 nsec
MaxTimeStep=1.0 nsec
DC
Low-pass filter
VtPWL
Src_trigger
V_T ran=pwl(time, 0ns,0V, 1ns,0.1V, 2ns,0V)
DC
DC1
V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm
b82496c3120j000
L3
100pF_NPO_0603
Cc2
b82496c3150j000
L4
b82496c3100j000
L1
4_7pF_NPO_0603 C
Cc1
C6
C=2.2 pF
b82496c3330j000
L2
Vvar
R
R1
R=100 Ohm
V_DC
SRC2
Vdc=1.2 V
BB833_SOD323
D1
Q1
2_7pF_NPO_0603
C8
C
C5
C=0.68 pF
C
C7
C=3.3 pF
0_47pF_NPO_0603
C9
R
RL
R=100 Ohm
R
RE
R=100 Ohm
100pF_NPO_0603
C4
September 2010
78
39
Example 3.1 Cont
The prototype and the result captured from a spectrum analyzer (9 kHz
to 3 GHz).
Fundamental
-1.5 dBm
September 2010
Harmonic
VCO
suppression filter
- 30 dBm
79
Example 3.1 Cont
Examining the phase noise of the oscillator (of course the accuracy is
limited by the stability of the spectrum analyzer used).
-0.42 dBm
Span = 500 kHz

RBW = 300 Hz
VBW = 300 Hz
300Hz
September 2010
80
40
Example 3.1 Cont
VCO gain (ko) measurement setup:
V_DC
SRC1
Vdc=3.3 V
Variable
power
supply
R
RB
R=33 kOhm
b82496c3150j000
L4
100pF_NPO_0603
Cc2
b82496c3100j000
L1
R
Rattn
R=50 Ohm
4_7pF_NPO_0603
Cc1
C
C5
C=0.68 pF
Vvar
Port
Vcontrol
Num=1
b82496c3120j000
L3
R
Rcontrol
R=1000 Ohm
C
C6
C=2.2 pF
C
C7
C=3.3 pF
BB833_SOD323
D1
September 2010
Q1
2_7pF_NPO_0603
C8
Port
Vout
Num=2
Spectrum
Analyzer
0_47pF_NPO_0603
C9
R
RE
R=100 Ohm
81
Example 3.1 Cont
Measured results:
fVCO / MHz
950
900
850
800
750
0.0
September 2010
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Vcontrol/Volts
82
41

RF Oscillator

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RF Oscillator

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9 - RF Oscillator

2006 by Fabian Kung Wai Lee

[1]* D.M. Pozar, Microwave engineering, 2nd Edition, 1998 John-Wiley

2006 by Fabian Kung Wai Lee

Positive feedback oscillator concepts.

2006 by Fabian Kung Wai Lee

1.0 Oscillation Concepts

2006 by Fabian Kung Wai Lee

Oscillators are a class of circuits with 1 terminal or port, which

Classical Positive Feedback Perspective on

Consider the classical feedback system with non-inverting amplifier,

Writing (1.1a) as: S o (s ) = 1 AA(s()sF) (s ) S i (s )

2006 by Fabian Kung Wai Lee

Classical Positive Feedback Perspective on

For oscillation to startup

Note that this is a very simplistic view of oscillators. In reality oscillators

2006 by Fabian Kung Wai Lee

Classical Positive Feedback Perspective on

Positive feedback system can also be achieved with inverting amplifier:

To prevent multiple simultaneous oscillation, the Barkhausen criterion

2006 by Fabian Kung Wai Lee

Classical Positive Feedback Perspective on

In general the feedback network F(s) can be implemented as a Pi or T

If X3 represents inductor, then

2006 by Fabian Kung Wai Lee

Classical Feedback Oscillators

The following are examples of oscillators, based on the original circuit

Example of Tuned Feedback Oscillator

2006 by Fabian Kung Wai Lee

Example of Tuned Feedback Oscillator

2006 by Fabian Kung Wai Lee

Example of Tuned Feedback Oscillator

A 16 MHz Transistor Common-Emitter

2006 by Fabian Kung Wai Lee

Introduction RF Oscillator (1)

In RF oscillator (foscillator > 300 MHz) , feedback method to induce

2006 by Fabian Kung Wai Lee

Introduction RF Oscillator (2)

For instance by choosing the load impedance L at the unstable region,

2006 by Fabian Kung Wai Lee

Introduction RF Oscillator (3)

A typical RF oscillator block diagram with the one-port criteria for

2006 by Fabian Kung Wai Lee

Wave Propagation Stability Perspective (1)

From our discussion of stability from wave propagation in Chapter 7

2006 by Fabian Kung Wai Lee

Wave Propagation Stability Perspective (2)

Thus oscillation will occur when | s1 | > 1.

2006 by Fabian Kung Wai Lee

Oscillation Start-Up Requirements (1)

We will derive the oscillation start-up requirement in terms of impedance

2006 by Fabian Kung Wai Lee

Oscillation Start-Up Requirements (2)

Let o be the desired oscillation frequency

(R1 Zo ) + jX1 (Rs Zo ) + jX s

2006 by Fabian Kung Wai Lee

Oscillation Start-Up Requirements (3)

From (1.4), it is easily seen that if

Then | s1 | = 1 at o independent of the value of Zo.

2006 by Fabian Kung Wai Lee

Oscillation Start-Up Requirements (4)

2006 by Fabian Kung Wai Lee

Pole pair on the

What Happens During Oscillation