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1.

Login to Collab and download the library for the class


ECE 4209-12F Resources / CAD Tools / Microwave Office
Microwave Office Setup
UVA_Library_Version_1.0.zip
To install the file:
1 - uncompress the library into a directory under the AWR folder or somewhere you know the path
2 - open AWR and under File select Project Process Library -> Add/Remove Library
3 - locate the folder containing the library and select the UVA_Advanced_Circuits.ini file

Replace the 'default LPF' if it pops up. otherwise will cause problems in the future.

The circuit elements will show up under the Elements tab in Libraries. There are only 3 elements but
many more layout parts that you can find under the Layout tab.

2. Schematic

Click and drag the elements you want to use into the schematic window

Change from default value to the value you need, (do the same for other elements too)

The elements can be rotated, just right click before placing item. For first network of lab 2, also add
inductor, capacitor, via (from UVA_Advance_Circuit Library) and port

Wire everything together.

3. Simulation
Go to Project Options (highlighted in the following figure)

In Frequencies, set the parameter as following and click 'Apply'. The frequencies should show up in
'Current Range'.

Go to Project -> Graph -> New Graph

Project->Add Measurement (highlighted)

For Lab2, choose Port Parameters -> S -> To/From Port 1 -> Mag. and check dB.

Click the

icon will start the simulation.

Click on the curve and hold will show the data at different point.

You can tile the windows to have a more clear view.

If necessary, you can tune the parameters. Click the 'Tune Tool' (highlighted) and click the elements you
want to tune. The value (Resistance, Inductance, etc.) of selected element will turn blue after you click
on it.

Click 'Tune' and a window will show up. Drag to change the value and you will see the simulated result
changing accordingly.

Click the graph and add a marker

. So that you can see the performance at desired frequency.

After tune, you can see the S11 @ 137MHz is much lower.

4. Layout and Verification

Click the layout icon

to view layout.

Tile the windows. Right click Resistor, choose properties.

Go to Layout, choose UVA_Parts

For R, choose R0603.

Right click each component to get all the layouts R:R0603, C:TZY2, L:IND, Port:SMA_VERT.

Now let's place the outline. Go to Layout->Cell Libraries->UVA_Parts->2x2 Outline

Hit tab to place at 0,0 mil (uncheck ref)

Arrange the components.

Right click the thin line between components and Draw Route.

Click one end and double click at the other end.

If your line is narrow, go to layout show routing properties

Make sure it is 35 mil and correct line type (here is Copper1)

How it looks like when finished.

Now let's do the Design Rule Check. Go to Verify->Design Rule Check

Load Design Rules and select 'drc_rules' in folder 'Version_1.0' (the unzipped folder)

If there is an error, the following screen will show.

And when you go back to the layout window, the error will be highlighted. Correct the error.

The screen when all the errors are cleared!

Choose 'Layout options'

Make sure the font is the same as shown below.

Go to Draw-> Text.

Put your initial

Right click -> Shape Properties

Draw Layers -. SilkScreen

How it looks like when done.

There is also a 3D view. Click

5. Export
Layout->Export

The$files$to$export$are$as$follows$$(Remove$the$.ger$extension)$
$
TopCopper.top$
$
BottomCopper.bot$
$
TopSilkScreen.sst$
$
TopSolderMask.smt$
$
BottomSolderMask.smb$
$
ThruDrill.tap$

!
Save$all$six$files$a$LabX_xxxxx.zip$(xxxxx$is$your$UVA$Computing$ID)$and$upload$the$zip$file$for$FreeDFM$
Check.$(Instructions$are$posted$on$CollabO>ECE4209O13O>ResourcesO>Microwave$Office)$

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