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VIP
Portfolio
Susan Peterson
Director, Verification IP Marketing
Why
y Cadence Verification IP?
Industrys Broadest, Most Capable IVIP Portfolio
incisive
VIP
Portfolio
Tec
chnolog
gical De
epth
Multi-language,
Open Verification Methodology
Standards Support
Whats
New?
Incisive Verification
Broadest
Verification
IP PortfolioIP Portfolio
35+ Industry Protocols
AHB
AHB AB-VIP
AXI
AXI
PCIAB-VIP
APB
PCI-X
PCIE
AMBA AHB
AMBA AXI
AMBA APB
OCP
ATAPI
SDXC
Growing to
OCP AB-VIP
Storage
MIPI CSI
MIPI DSISAS
Released
PMBus
1 consistent product
Fib Channel
Fibre
Ch
l
OCP SATA
MIPI SLIMbus
PCI
MIPI CSI
CAN
MIPI DSILIN
I2C
MIPI SLIMbus
JTAG
ATAPI
MIPI UniPro
SRIO
MIPIFibre
Di
DigRF
RF
Channel
SMBus
DDR3
Incisive
Verification
Bus / Interconnect
/
Memory
IP Portfolio
Enet
SATA
SAS
VIP
Portfolio
DDR2
USB
incisive
Ethernet
1 flexible license
CAN
JTAG
and technologies
HDMI
Display Port
Peripheral
SPI-4
USB 2.0
PCI Express
USB 3.0
Serial RapidIO
I 2C
Early Access
Coming Soon
UVC + ABVIP
HyperTransport
LPC
incisive
VIP
Portfolio
Standardization Process
Ratified Spec
IInitiator
iti t
(Proprietary
Design)
Standards Body
Formed
Specs Defined
IP Development
IP Integration
SoC Deployment
Joins at initiation
Drives standardization:
Creates design
g IP/VIP partnerships:
p
p
;
;
;
;
;
;
incisive
VIP
Portfolio
C
Conventional
ti
l Commercial
C
i l VIP
Basic coverage
4 12
Weeks
Extra
Effort
Di t d tests
Directed
t t & structures
t
t
Basic assertions
Bus Functional Model
Te
echnolo
ogical D
Depth
Automated Compliance
Management
niversal
System
U
OVM Multi-language Testbench
Verification
Interface
Complete Protocol Functional
CCoverage
omponent
Constrained
withRandom
Test Generation
C
Management
Bus
SFunctional
ystem Model
ompliance
Complete
Protocol Checking
incisive
A t
Automatically
ti ll Achieves
A hi
High
Hi h Functional
F
ti
l Coverage
C
VIP
Portfolio
Automates
A
t
t compliance
li
verification
ifi ti and
d reporting
ti
Included with UVCs at no additional cost to user
Developed with leading protocol experts (e.g.,
(e g ARM,
ARM AMD)
Applicable to both Design IP and SOC developers
Executable representation of
verification objectives
Compliance
Test Suite
Compliance
Coverage
Model
Compliance
Directly correlated to
Checks and
protocol specification
Metrics
U
User
IInterface
f
incisive
VIP
Portfolio
M h iimproved
Much
d team communications
i i
For details visit:
http://www.cadence.com/rl/Resources/success_stories/clearspeed.pdf
Mike Bartley
Test and Verification Manager
incisive
VIP
Portfolio
incisive
VIP
Portfolio
Susan Peterson
S
P t
susanp@cadence.com
(303) 594-3844
594 3844
incisive
VIP
Portfolio
Thank you
incisive
VIP
Portfolio
Explore
p
more about Cadence and related VIP at ChipEstimate.com
p
Use VIP specific to Cadence to verify your next chip!
Please stay and talk with Susan Peterson
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