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Drain
Drain
Metal
Silicon Oxide
Semiconductor
n+
Substrate
Gate
n channel
p substrate
Circuit Symbols
Drain
Gate
Substrate
Source
Source
N Channel
P Channel
The metallic gate is insulated from the semiconductor channel by the silicon dioxide
(SiO2) layer and thus has a extremely high resistance. The gate impedance is mainly
capacitive. The source and drain regions are very heavily doped, and the n-channel
allows electrons (and hence current) to flow from the source to the drain (when the
drain is made positive wrt the source), even when the gate-source voltage is zero.
1.1 Variation of Channel Width with Gate Voltage (VGS)
The width of the channel, and hence the conductivity, can be controlled by applying a
voltage to the gate.
(a) Depletion Mode of Operation
In this mode a negative voltage is applied to the gate relative to the substrate (ie.
Source) and the channel width is reduced.
Source
ID
Gate
Drain
VDS = Constant
VDS
G
S
VGS
gm=ID/VGS
n+
ID
IDSS
n+
Narrower channel
p substrate
VGS
0
- VP
Transfer Characteristic
The negative gate voltage drives electrons away from the channel, that gets narrower
and narrower as the negative gate voltage is increased. Hence the drain current
reduces with increasing negative potential on the gate as indicated in the transfer
characteristic.
(b) Enhancement Mode of Operation
In this mode a positive voltage is applied to the gate relative to the source. The +ve
gate charge attracts electrons from the p-type substrate and the n+ regions, into the
channel area and thus the width of the channel is increased (enhanced). Hence the
drain current reduces with increasing negative potential on the gate as indicated in the
transfer characteristic shown below.
Source
ID
Gate
Drain
ID
VDS
n+
VDS = Constant
n+
Wider channel
VGS
p substrate
VGS
Transfer Characteristic
ID
ID
Enhancement Mode
Depletion Mode
+2V
gm=ID/VGS
- VP
+1V
VGS = 0V
-1V
-2V
-3V
IDSS
0
VGS
Enhancement
Mode
Depletion
Mode
VGS <= - VP
Transfer Characteristic
VDS
Drain
Drain
Metal
Silicon Oxide
Semiconductor
n+
Substrate
Gate
no channel
p substrate
Circuit Symbols
Drain
Gate
Substrate
Source
Source
N Channel
P Channel
ID
Gate
Drain
ID
VDS = Constant
VDS
G
S
VGS
n+
gm=ID/VGS
n+
Induced n channel
p substrate
VT
Transfer Characteristic
The gate to source voltage at which the channel starts to conduct is called the
transition voltage VT.
2.2 Enhancement Type MOSFET Amplifier
VGS
3
VDD
ID
RD
R1
ID+id
ID
VDS+vds
R2
Bias Point
Vin
gm=ID/VGS
Vout
VGS
VGS+vgs
0
0V
VT
VGS
VGS
Transfer Characteristic
Circuit
G
Vin= vgs
ID
R1
id
id D
R2 gmvgs
S
rds
0V
RD
vds = Vo
Bias Conditions
Vgs = VDD R2/(R1+R2)
ID is obtained from graph of ID against Vgs
gm is obtained from the slope of the transfer characteristic at the bias point.