Вы находитесь на странице: 1из 127

Internal Use Only

North/Latin America
Europe/Africa
Asia/Oceania

http://aic.lgservice.com
http://eic.lgservice.com
http://biz.lgservice.com

LED TV
SERVICE MANUAL
CHASSIS : LD34D

MODEL: 60LA860V/W/9

60LA860V/W/9-ZA

CAUTION

BEFORE SERVICING THE CHASSIS,


READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL67733204 (1303-REV00)

Printed in Korea

CONTENTS

CONTENTS . ............................................................................................. 2
SAFETY PRECAUTIONS ......................................................................... 3
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
ADJUSTMENT INSTRUCTION............................................................... 13
EXPLODED VIEW .................................................................................. 23
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.

An isolation Transformer should always be used during the


servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.
Keep wires away from high voltage or high temperature parts.

Do not use a line Isolation Transformer during this check.


Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit

Before returning the receiver to the customer,


always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an


electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-3-

LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions
on page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an explosion hazard.
2. Test high voltage only by measuring it with an appropriate
high voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors
and semiconductor chip components. The following techniques
should be used to help reduce the incidence of component damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent potential shock reasons prior to applying power to the unit under test.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

2. After removing an electrical assembly equipped with ES


devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as anti-static can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, aluminum foil or
comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the
brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 F to 600 F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 F to 600 F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 F to 600 F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.

-4-

LGE Internal Use Only

IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.

3. Solder the connections.


CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Circuit Board Foil Repair
Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.

Removal
1. Desolder and straighten each IC lead in one operation by
gently prying up on the lead with the soldering iron tip as the
solder melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing
the IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).

At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC connections).

"Small-Signal" Discrete Transistor


Removal/Replacement
1. Remove the defective transistor by clipping its leads as close
as possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.

1. Carefully remove the damaged copper pattern with a sharp


knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the
good copper pattern. Solder the overlapped area and clip off
any excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Fuse and Conventional Resistor


Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-5-

LGE Internal Use Only

SPECIFICATION

NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range

This specification is applied to the LED TV used LD34D


chassis.

3. Test method

1) Performance: LGE TV test method followed


2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
- Wireless : Wireless HD Specification (Option)

2. Requirement for Test

Each part is tested as below without special appointment.


1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C
2) Relative Humidity: 65 % 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.

4. Model General Specification


No.

Item

Specification

Remarks
DTV & Analog (Total 37 countries)
DTV (MPEG2/4, DVB-T) : 30 countries
Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece,
Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania,
Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Beralus
DTV (MPEG2/4, DVB-T2) : 8 countries
UK(Ireland), Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan, Russia

Market

DTV (MPEG2/4, DVB-C) : 37 countries


Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece,
Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania,
Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, BeEU(PAL Market-36Countries)/CIS ralus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan
+ Morocoo(Africa)
DTV (MPEG2/4, DVB-S/S2) : 30 countries
Germany, Netherland, Switzerland, Hungary, Austria, Slovenia, Bulgaria, France, Spain, Italy, Belgium, Russia, Luxemburg, Greece,
Czech, Croatia, Turkey, Moroco, Ireland, Latvia, Estonia, Lithuania,
Poland, Portugal, Romania, Albania, Bosnia, Serbia, Slovakia, Beralus, UK, Sweden, Denmark, Finland, Norway, Ukraine, Kazakhstan
Supported satellite : 29 satellites
ABS1 75.0E/ AMOS 4.0W/ ASIASATS 105.5E/ ASTRA1LHMKR
19.2E/ ASTRA2ABD 28.2E/ ASTRA3AB 23.5E/ ASTRA4A 4.8E/
ATLANTICBIRD2 8.0W/ ATLANTICBIRD3 5.0W/ BADR 26.0E/ EUROBIRD3 33.0E/ EUROBIRD9A 9.0E/ EUTELSATW2A 10.E/ EUTELSATW3A 7.0E/ EUTELSATW4W7 36.0E/ EUTELSESAT 16.0E/
EXPRESSAM1 40.0E/ EXPRESAM3 140.0E/ EXPRESSAM33
96.5E/ HELLASAT2 39.0E/ HISPASAT1CDE 30.0W/ HOTBIRD
13.0E/ INTELSAT10&7 68.5E/ INTELSAT15 85.2E/ INTELSAT904
60.0E/ NILESAT 7.0W/ THOR 0.8W/ TURKSAT 42.0E/ YAMAL201
90.0E

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-6-

LGE Internal Use Only

No.
2

Item
Broadcasting system

Program coverage

Specification

Remarks

1) PAL-BG/DK/I/I
2) SECAM L/L, DK, BG, I
3) DVB-T/T2, C, S/S2
1 ) Digital TV
- VHF, UHF
- C-Band, Ku-Band
2) Analogue TV
-VHF : E2 to E12
-UHF : E21 to E69
-CATV : S1 to S20
-HYPER : S21 to S47
DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8

Receiving system

DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6

Analog : Upper Heterodyne


Digital : COFDM, QAM

DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2 Msymbols/s
- Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM
DVB-S/S2
- symbolrate :
DVB-S2 (8PSK / QPSK) : 2 ~ 45 Msymbol/s
DVB-S (QPSK) : 2 ~ 45 Msymbol/s
- viterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
5

Input Voltage

AC 100 ~ 240 V, 50/60 Hz

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-7-

LGE Internal Use Only

5. External input format


5.1. 2D Mode

(1) Component input(Y, CB/PB, CR/PR)

No.

Resolution

H-freq(kHz)

V-freq(Hz)

1.

720480

15.73

60.00

SDTV, DVD 480i

2.

720480

15.63

59.94

SDTV, DVD 480i

3.

720480

31.47

59.94

480p

4.

720480

31.50

60.00

480p

5.

720576

15.625

50.00

SDTV 576i

6.

720576

31.25

50.00

SDTV 576p

7.

1280720

45.00

50.00

HDTV 720p

8.

1280720

44.96

59.94

HDTV 720p

9.

1280720

45.00

60.00

HDTV 720p

10.

19201080

31.25

50.00

HDTV 1080i

11.

19201080

33.75

60.00

HDTV 1080i

12.

19201080

33.72

59.94

HDTV 1080i

13.

19201080

56.250

50

HDTV 1080p

14.

19201080

67.5

60

HDTV 1080p

(2) HDMI Input (PC/DTV)


No.

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

VIC

Proposed

640*350

31.468

70.09

25.17

EGA

720*400

31.469

70.08

28.32

DOS

640*480

31.469

59.94

25.17

VESA(VGA)

800*600

37.879

60.31

40.00

VESA(SVGA)

1024*768

48.363

60.00

65.00

VESA(XGA)

1152*864

54.348

60.053

80

VESA

1280*1024

63.981

60.020

108

VESA(SXGA)

1360*768

47.712

60.015

85.5

VESA(WXGA)

1920*1080

67.5

60.00

148.5

WUXGA(CEA861D)

HDMI-PC

DDC

HDMI-DTV
1

640*480

31.469 / 31.5

59.94/ 60

25.125

SDTV 480P

720*480

31.469 / 31.5

59.94 / 60

27.00/27.03

2,3

SDTV 480P

720*576

31.25

50

27

17,18

SDTV 576P

720*576

15.625

50

27

21

SDTV 576I

1280*720

37.500

50

74.25

19

HDTV 720P

1280*720

44.96 / 45

59.94 / 60

74.17/74.25

HDTV 720P

1920*1080

33.72 / 33.75

59.94 / 60

74.17/74.25

HDTV 1080I

1920*1080

28.125

50.00

74.25

20

HDTV 1080I

1920*1080

26.97 / 27

23.97 / 24

74.17/74.25

32

HDTV 1080P

10

1920*1080

11

1920*1080

33.716 / 33.75

29.976 / 30.00

12

1920*1080

56.250

13

1920*1080

67.43 / 67.5

25

33

HDTV 1080P

74.25

34

HDTV 1080P

50

148.5

31

HDTV 1080P

59.94 / 60

148.35/148.50

16

HDTV 1080P

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-8-

LGE Internal Use Only

5.2. 3D Mode

(1) RF Input(3D supported mode manually)

No.

Resolution

Proposed

HD - DTV

1080I
720P

SD - DTV

576P
576I

2
3

3D input proposed mode

2D to 3D
Side by Side(Half)
Top & Bottom

SD - ATV(CVBS/SCART)

(2) RF Input(3D supported mode automatically)


No.

Signal

Frame Compatible

3D input proposed mode


Side by Side(Half),
Top & Bottom

(3) HDMI 1.3 (3D supported mode manually)


No

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

720*480

31.5

60

27.03

SDTV 480P

720*576

31.25

50

27

SDTV 576P

1280*720

45.00

60.00

74.25

HDTV 720P

1280*720

37.500

50

74.25

HDTV 720P

1920*1080

33.75

60.00

74.25

HDTV 1080I

1920*1080

28.125

50.00

74.25

HDTV 1080I

1920*1080

27.00

24.00

74.25

HDTV 1080P

1920*1080

28.12

25

74.25

HDTV 1080P

1920*1080

33.75

30.00

74.25

HDTV 1080P

10

1920*1080

67.50

60.00

148.5

HDTV 1080P

11

1920*1080

56.250

50

148.5

HDTV 1080P

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-9-

3D input proposed mode


2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Frame Sequential, Row
Interleaving, Column Interleaving
2D to 3D, Side by Side(Half), Top & Bottom
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Row Interleaving, Column
Interleaving
2D to 3D, Side by Side(Half), Top & Bottom,
Checker Board, Single Frame Sequential,
Row Interleaving, Column Interleaving

LGE Internal Use Only

(4) HDMI 1.4b (3D supported mode automatically)


No.

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

VIC

3D input proposed mode


Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Field alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Field alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Field alternative
Side-by-side(Full)

Proposed
Secondary(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
(SDTV 480P)
(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
Secondary(SDTV 480P)
(SDTV 480P)
(SDTV 480P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
Secondary(SDTV 576P)
(SDTV 576P)
(SDTV 576P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
Primary(HDTV 720P)
(HDTV 720P)
(HDTV 720P)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
Primary(HDTV 1080I)
(HDTV 1080I)
(HDTV 1080I)
Secondary(HDTV 1080I)
Primary(HDTV 1080I)
Primary(HDTV 1080I)
(HDTV 1080I)
(HDTV 1080I)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
Primary(HDTV 1080P)
(HDTV 1080P)
(HDTV 1080P)

31.469 / 31.5

59.94/ 60

25.125/25.2

62.938/63

59.94/ 60

50.35/50.4

31.469 / 31.5

59.94/ 60

50.35/50.4

31.469 / 31.5

59.94 / 60

27.00/27.03

2,3

62.938/63

59.94 / 60

54/54.06

2,3

31.469 / 31.5

59.94 / 60

54/54.06

2,3

31.25

50

27

17,18

62.5

50

54

17,18

31.25

50

54

17,18

10

37.500

50

74.25

19

11

75

50

148.5

19

37.500

50

148.5

19

44.96 / 45

59.94 / 60

74.18/74.25

14

89.91/90

59.94 / 60

148.35/148.5

15

44.96 / 45

59.94 / 60

148.35/148.5

16

33.72 / 33.75

59.94 / 60

74.18/74.25

17

67.432/67.50

59.94 / 60

148.35/148.5

18

33.72 / 33.75

59.94 / 60

148.35/148.5

19

28.125

50.00

74.25

20

20

56.25

50.00

148.5

20

21

28.125

50.00

148.5

20

22

26.97 / 27

23.97 / 24

74.18/74.25

32

23

43.94/54

23.97 / 24

148.35/148.5

32

26.97 / 27

23.97 / 24

148.35/148.5

32

25

28.12

25

74.25

33

Top-and-Bottom
Side-by-side(half)

Primary(HDTV 1080P)
Primary(HDTV 1080P)

26

56.24

25

148.5

33

Frame packing
Line alternative

Primary(HDTV 1080P)
(HDTV 1080P)

27

28.12

25

148.5

33

28

33.716 / 33.75

29.976 / 30.00

74.18/74.25

34

29

67.432 / 67.5

29.976 / 30.00

148.35/148.5

34

30

33.716 / 33.75

29.976 / 30.00

148.35/148.5

34

31

56.250

50

148.5

31

32

67.43 / 67.5

59.94 / 60

148.35/148.50

16

Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Frame packing
Line alternative
Side-by-side(Full)
Top-and-Bottom
Side-by-side(half)
Top-and-Bottom
Side-by-side(half)

(HDTV 1080P)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
Secondary(HDTV 1080P)
(HDTV 1080P)
(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)
Primary(HDTV 1080P)
Secondary(HDTV 1080P)

12
13

24

640*480

720*480

720*576

1280*720

1920*1080

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 10 -

LGE Internal Use Only

(5) HDMI-PC Input (3D) (3D supported mode manually)


No.

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

3D input proposed mode

Proposed

1024*768

48.36

60

65

2D to 3D, Side by Side(half)


Top & Bottom

HDTV 768P

1360*768

47.71

60

85.5

2D to 3D, Side by Side(half)


Top & Bottom

HDTV 768P

148.50

2D to 3D, Side by Side(half)


Top & Bottom, Checker Board,
Single Frame Sequential,
Row Interleaving,
Column Interleaving

HDTV 1080P

2D to 3D

640*350
720*400
640*480
800*600
1152*864

1920*1080

Others

67.500

60

(6) Component Input ( 3D) (3D supported mode manually)


No.

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock

3D input proposed mode

Proposed

1280*720

37.5

50

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 720P

1280*720

45.00

60.00

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 720P

1280*720

44.96

59.94

74.176

2D to 3D, Side by Side, Top & Bottom

HDTV 720P

1920*1080

33.75

60.00

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 1080I

1920*1080

33.72

59.94

74.176

2D to 3D, Side by Side, Top & Bottom

HDTV 1080I

1920*1080

28.12

50

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 1080I

1920*1080

67.500

60

148.50

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

1920*1080

67.432

59.94

148.352

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

1920*1080

27.000

24.000

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

10

1920*1080

28.12

25

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

11

1920*1080

56.25

50

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

12

1920*1080

26.97

23.976

74.176

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

13

1920*1080

33.75

30.000

74.25

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

14

1920*1080

33.71

29.97

74.176

2D to 3D, Side by Side, Top & Bottom

HDTV 1080P

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 11 -

LGE Internal Use Only

(7) USB, DLNA Movie (3D) (3D supported mode manually)


No.

Resolution

Under 704x480

2D to 3D

Over 704x480
interlaced

2D to 3D, Side by Side(Half), Top & Bottom

3
4

H-freq(kHz)

Over 704x480
progressive

V-freq.(Hz)

Pixel clock(MHz)

3D input proposed mode

50 / 60

2D to 3D, Side by Side(Half), Top & Bottom, Checker Board,


Row Interleaving, Column Interleaving, Frame Sequential

others

2D to 3D, Side by Side(Half), Top & Bottom, Checker Board,


Row Interleaving, Column Interleaving

(8) USB, DLNA -Photo (3D) (3D supported mode manually)


No.

Resolution

Under 320x240

H-freq(kHz)
-

V-freq.(Hz)
-

Pixel clock(MHz)
2D to 3D

3D input proposed mode

Over 320x240

2D to 3D, Side by Side(Half), Top & Bottom

(9) USB, DLNA (3D) (3D supported mode automatically)


No.
1

Resolution
1080p

H-freq(kHz)
33.75

V-freq.(Hz)
30

Pixel clock(MHz)

3D input proposed mode


Side by Side(Half), Top & Bottom, Checker
Board, MPO(Photo), JPS(Photo)

74.25

Remark: 3D Input mode


No.

Side by Side

Top & Bottom

Checker board

Single Frame
Sequential

Frame
Packing

Line
Interleaving

Column
Interleaving

2D to 3D

1
ii.

iii.

iv.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

v.

- 12 -

vi.

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range

3.1.3. Adjustment

(1) Adjustment method


- U sing RS-232, adjust items in the other shown in
"3.1.3.3)"

This specification sheet is applied to all of the LED TV with


LD34D chassis.

(2) Adj. protocol

2. Designation

Protocol

(1) Because this is not a hot chassis, it is not necessary to


use an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25 C 5 C of temperature and 65 % 10 % of relative
humidity if there is no specific designation.
(4) The input voltage of the receiver must keep AC 100-240
V~, 50/60 Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over
15.

a 00 OK00x

Source change

xb 00 04
xb 00 06

b 00 OK04x (Adjust 480i, 1080p Comp1 )


b 00 OK06x (Adjust 1920*1080 SCART RGB)

Begin adj.

ad 00 10
OKx (Case of Success)
NGx (Case of Fail)
(main)
ad 00 20

(main)
000000000000000000000000007c007b006dx

(sub )
ad 00 21

(Sub)
000000070000000000000000007c00830077x

Confirm adj.

ad 00 99

NG 03 00x (Fail)
NG 03 01x (Fail)
NG 03 02x (Fail)
OK 03 03x (Success)

End adj.

aa 00 90

a 00 OK90x

Read adj. data

Ref.) ADC Adj. RS232C Protocol_Ver1.0


(3) Adj. order
- aa 00 00 [Enter ADC adj. mode]
- xb 00 04 [Change input source to Component1 (480i&
1080p)]
- ad 00 10 [Adjust 480i&1080p Comp1]
- xb 00 06 [Change input source to RGB(1024*768)]
- ad 00 10 [Adjust 1920*1080 SCART RGB]
- ad 00 90 End adj.

In case of keeping module is in the circumstance of below


-20 C, it should be placed in the circumstance of above 15
C for 3 hours.

3. Automatic Adjustment

Set ACK

aa 00 00

Return adj. result

In case of keeping module is in the circumstance of 0 C, it


should be placed in the circumstance of above 15 C for 2
hours.

[Caution]
When still image is displayed for a period of 20 minutes or
longer (Especially where W/B scale is strong. Digital pattern
13ch and/or Cross hatch pattern 09ch), there can some
afterimage in the black level area.

Command

Enter adj. mode

3.2. M
 AC address D/L, CI+ key D/L, Widevine
key D/L, ESN key D/L, HDCP key D/L,
DTCP key D/L
Connect: PCBA Jig RS-232C Port== PC RS-232C Port
Communication Prot connection

3.1. ADC Adjustment


3.1.1. Overview

ADC adjustment is needed to find the optimum black level


and gain in Analog-to-Digital device and to compensate RGB
deviation.

3.1.2. Equipment & Condition

(1) USB to RS-232C Jig


(2) M SPG-925 Series Pattern Generator(MSPG-925FA,
pattern - 65)
- Resolution : 480i Comp1

1080P Comp1

1920*1080P SCART RGB
- Pattern : Horizontal 100% Color Bar Pattern
- Pattern level : 0.7 0.1 Vp-p
- Image

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 13 -

Com 1,2,3,4 and 115200(Baudrate)


Mode check: Online Only
Check the test process: DETECT MAC CI Widevine
ESN HDCP DTCP
Play: START
Result: Ready, Test, OK or NG
Printer Out (MAC Address Label)

LGE Internal Use Only

3.3. LAN Inspection

3.4. LAN PORT INSPECTION(PING TEST)


Connect SET LAN port == PC LAN Port

3.3.1. Equipment & Condition

SET

Each other connection to LAN Port of IP Hub and Jig

PC

3.4.1. Equipment setting

(1) Play the LAN Port Test PROGRAM.


(2) Input IP set up for an inspection to Test Program.
*IP Number : 12.12.2.2

3.4.2. LAN PORT inspection(PING TEST)

(1) Play the LAN Port Test Program.


(2) Connect each other LAN Port Jack.
(3) Play Test (F9) button and confirm OK Message.
(4) Remove LAN cable.

3.3.2. LAN inspection solution

LAN Port connection with PCB


Network setting at MENU Mode of TV
Setting automatic IP
Setting state confirmation
If automatic setting is finished, you confirm IP and MAC
Address.

3.3.3. WIDEVINE key Inspection

- Confirm key input data at the "IN START" MENU Mode.

3.5. Camera Port Inspection

(1) Objective : To check PCBAs CAMERA Port.


(2) How-it-works
1) Connect the PCBA like below Picture.
2) Send specific RS-232C command for displaying Camera
Preview.
* CAMERA need to be status of Slide up.

3) RS-232C Command
RS-232C COMMAND
CMD
DATA
ID
ai
00
23
ai
00
24

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 14 -

Explanation
Camera Function Start.
Camera Function End.

LGE Internal Use Only

3.6. Model name & Serial number Download

2) Check the key download for transmitted command


(RS232: ci 00 10)

3.6.1. Model name & Serial number D/L

Press "Power on" key of service remote control.


(Baud rate : 115200 bps)
Connect RS-232C Signal to USB Cable to USB.
Write Serial number by use USB port.
Must check the serial number at Instart menu.

CMD 1

CMD 2

Data 0
1

3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx

3.6.2. Method & notice

(1) Serial number D/L is using of scan equipment.


(2) Setting of scan equipment operated by Manufacturing
Technology Group.
(3) Serial number D/L must be conformed when it is produced
in production line, because serial number D/L is mandatory
by D-book 4.0.

3.7.2. Check the method of CI+ key value(RS232)


1) Into the main assy mode(RS232: aa 00 00)
CMD 1

CMD 2

Data 0
0

2) Check the mothed of CI+ key by command


(RS232: ci 00 20)

* Manual Download (Model Name and Serial Number)


If the TV set is downloaded by OTA or service man, sometimes
model name or serial number is initialized.(Not always)
It is impossible to download by bar code scan, so It need
Manual download.
1) Press the "Instart" key of Adjustment remote control.
2) Go to the menu "7.Model Number D/L" like below photo.
3) Input the Factory model name(ex 47LM960V-ZB) or Serial
number like photo.

CMD 1

CMD 2

Data 0
2

3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ Key Value

3.8. WIFI MAC ADDRESS CHECK


(1) Using RS232 Command

Transmission

H-freq(kHz)

V-freq.(Hz)

[A][I][][Set ID][][20][Cr]

[O][K][X] or [NG]

(2) Check the menu on in-start


4) Check the model name Instart menu. Factory name
displayed. (ex 47LM960V-ZB)
5) C heck the Diagnostics.(DTV country only) Buyer
model displayed. (ex 47LM960V-ZB)

3.7. CI+ Key checking method

* Check the Section 3.2


Check whether the key was downloaded or not at In Start
menu. (Refer to below).

=> Check the Download to CI+ Key value in LGset.

3.7.1. Check the method of CI+ Key value

(1) Check the method on Instart menu


(2) Check the method of RS232C Command
1) Into the main assy mode(RS232: aa 00 00)
CMD 1

CMD 2

Data 0
0

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 15 -

LGE Internal Use Only

4. Manual Adjustment

* ADC adjustment is not needed because of OTP(Auto ADC


adjustment)

Model Name(Hex): LGTV


Cf) TV sets model name in EDID data is below.

MODEL NAME

MODEL NAME(HEX)

LG TV

00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20 (LG TV)

4.1. EDID(The Extended Display Identification


Data)/DDC(Display Data Channel) download

Checksum(LG TV): Changeable by total EDID data.

4.1.1. Overview

FHD

EDID C/S data

It is a VESA regulation. A PC or a MNT will display an optimal


resolution through information sharing without any necessity
of user input. It is a realization of "Plug and Play".

HDMI

Block 0
check sum (Hex)

4.1.2. Equipment

42
23 (HDMI1)

Block 1

13 (HDMI2)

Vendor Specific(HDMI)

- Since embedded EDID data is used, EDID download JIG,


HDMI cable and D-sub cable are not need.
- Adjustment remote control

INPUT

MODEL NAME(HEX)

HDMI1

78030C001000801E

HDMI2

78030C002000801E

4.1.3. Download method

(1) Press "ADJ" key on the Adjustment remote control then


select "10.EDID D/L", By pressing "Enter" key, enter EDID
D/L menu.
(2) S elect "Start" button by pressing "Enter" key, HDMI1/
HDMI2/ HDMI3/ HDMI4/ RGB are writing and display OK
or NG.
For HDMI EDID
DVI-D to HDMI or HDMI to HDMI

(1) EDID
# HDMI 1(C/S : E8 81)
EDID Block 0, Bytes 0-127 [00H-7FH]
00

00

FF

FF

FF

FF

FF

FF

00

1E

6D

01

00

01

01

01

01

10

01

17

01

03

80

A0

5A

78

0A

EE

91

A3

54

4C

99

26

20

0F

50

54

A1

08

00

31

40

45

40

61

40

71

40

81

80
2C

30

01

01

01

01

01

01

02

3A

80

18

71

38

2D

40

58

40

45

00

40

84

63

00

00

1E

66

21

50

B0

51

00

1B

30

50

40

70

36

00

40

84

63

00

00

1E

00

00

00

FD

00

3A

60

3E

1E

53

10

00

0A

20

20

20

20

20

20

00

00

00

FC

70

00

4C

47

20

54

56

0A

20

20

20

20

20

20

20

01

E8

EDID Block 1, Bytes 128-255 [80H-FFH]

4.1.4. EDID DATA


HDMI

0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00

00

0x01

FF

FF

FF

FF

FF

FF

00

1E

6D

01

03

80

A0

5A

78

0A

EE

91

A3

54

4C

99

0x02 0F

50

54

A1

08

00

31

40

45

40

61

40

71

40

81

80

0x03

01

01

01

01

01

01

02

3A

80

18

71

38

2D

40

58

2C

0x04

45

00

40

84

63

00

00

1E

66

21

50

B0

51

00

1B

30

0x05

40

70

36

00

40

84

63

00

00

1E

00

00

00

FD

00

3A

0x06 3E

1E

53

10

00

0A

20

20

20

20

20

20

01

20

21

0x07

26

02

03

3A

F1

4E

10

9F

04

13

05

14

03

02

0x01

22

15

01

29

3D

06

C0

15

07

50

09

57

07

E3

05

03

12

01

02

3A

80

18

71

38

40

45

00

40

84

63

00

00

1E

01

1D

80

18

2C

02

03

3A

F1

4E

10

9F

04

13

05

14

03

02

12

20

21

90

22

15

01

29

3D

06

C0

15

07

50

09

57

07

78

03

0C

A0

00

10

00

B8

2D

20

C0

0E

01

4F

3F

FC

08

10

18

10

B0

06

10

16

10

28

10

E3

05

03

01

02

3A

80

18

71

38

C0

2D

40

58

2C

45

00

40

84

63

00

00

1E

01

1D

80

18

D0

71

1C

16

20

58

2C

25

00

40

84

63

00

00

9E

01

1D

E0

00

72

51

D0

1E

20

6E

28

55

00

40

84

63

00

00

1E

F0

00

00

00

00

00

00

00

00

00

00

00

00

00

00

00

81

# HDMI 2(C/S : E8 71)


EDID Block 0, Bytes 0-127 [00H-7FH]

0x04 2D

40

58

0x05

71

1C

16

20

58

2C

25

00

40

84

63

00

00

9E

01

1D

0x06

00

72

51

D0

1E

20

6E

28

55

00

40

84

63

00

00

1E

0x07

00

00

00

00

00

00

00

00

00

00

00

00

00

00

00

Reference
- HDMI1 ~ HDMI4
- In the data of EDID, bellows may be different by S/W or
Input mode.
Product ID
MODEL NAME

HEX

EDID Table

DDC Function

HD/FHD Model

0001

01 00

Analog/Digital

Serial No: Controlled on production line.


Month, Year: Controlled on production line:
ex) Monthly : 01 01, Year : 2013 17
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

00

FF

FF

FF

FF

FF

FF

00

1E

6D

01

00

01

01

01

01

10

01

17

01

03

80

A0

5A

78

0A

EE

91

A3

54

4C

99

26

20

0F

50

54

A1

08

00

31

40

45

40

61

40

71

40

81

80

30

01

01

01

01

01

01

02

3A

80

18

71

38

2D

40

58

2C

40

45

00

40

84

63

00

00

1E

66

21

50

B0

51

00

1B

30

50

40

70

36

00

40

84

63

00

00

1E

00

00

00

FD

00

3A

60

3E

1E

53

10

00

0A

20

20

20

20

20

20

00

00

00

FC

70

00

4C

47

20

54

56

0A

20

20

20

20

20

20

20

01

E8

00

02

03

37

F1

4E

10

9F

04

13

05

14

03

02

12

20

21

00

0x03

80

0x00
0x02

- 16 -

EDID Block 1, Bytes 128-255 [80H-FFH]


10

22

15

01

26

15

07

50

09

57

07

78

03

0C

00

20

00

20

B8

2D

20

C0

0E

01

4F

3F

FC

08

10

18

10

06

10

16

30

10

28

10

E3

05

03

01

02

3A

80

18

71

38

2D

40

58

40

2C

45

00

A0

5A

00

00

00

1E

01

1D

80

18

71

1C

16

50

20

58

2C

25

00

A0

5A

00

00

00

9E

01

1D

00

72

51

60

D0

1E

20

6E

28

55

00

A0

5A

00

00

00

1E

00

00

00

70

00

00

00

00

00

00

00

00

00

00

00

00

00

00

00

01

LGE Internal Use Only

4.2.2. Equipment

# HDMI 3(C/S : E8 61)


EDID Block 0, Bytes 0-127 [00H-7FH]
0

FF

FF

FF

00

80

A0

5A

78

A1

08

00

31

01

01

01

01

00

40

84

63

70

36

00

40

3E

1E

53

10

00

00

4C

47

20

54

00

00

FF

FF

FF

10

01

17

01

03

1E

6D

0A

EE

01

00

91

A3

01

01

01

01

54

4C

99

20

0F

50

54

40

45

40

61

26

40

71

40

81

30

01

01

02

3A

80

18

80

71

38

2D

40

58

2C

40

45

50

40

00

00

1E

84

63

00

66
00

21

50

B0

51

00

1B

30

1E

00

00

00

FD

00

3A

60
70

0A

20

56

0A

20

20

20

20

20

20

20

00

00

00

FC

20

20

20

20

20

01

E8

00

02

03

3A

F1

4E

10

9F

04

13

05

14

03

02

12

20

21

10

22

15

01

29

3D

06

C0

15

07

50

20

00

30

00

B8

2D

20

C0

0E

01

4F

09

57

07

78

03

0C

3F

FC

08

10

18

10

30

06

10

16

10

28

10

E3

05

03

01

40

2D

40

58

2C

45

00

40

84

63

00

02

3A

80

18

71

38

00

1E

01

1D

80

18

50

71

1C

16

20

58

2C

25

00

40

60

00

72

51

D0

1E

20

6E

28

55

84

63

00

00

9E

01

1D

00

40

84

63

00

00

70

00

00

00

00

00

00

00

00

00

1E

00

00

00

00

00

00

61

(1) Color Analyzer: CA-210 (LED Module : CH 14)


(2) Adjustment Computer(During auto adj., RS-232C protocol
is needed)
(3) Adjustment Remote control
(4) Video Signal Generator MSPG-925F 720p/216-Gray
(Model: 217, Pattern: 78)
Only when internal pattern is not available
Color Analyzer Matrix should be calibrated using CS-100.

4.2.3. Equipment connection MAP

EDID Block 1, Bytes 128-255 [80H-FFH]

Co lo r Analyzer
RS -232C

Probe

Co m p ut er
RS -232C

Signal Source
* If TV internal pattern is used, not needed

4.2.4. Adj. Command (Protocol)


<Command Format>

# HDMI 4(C/S : E8 51)


EDID Block 0, Bytes 0-127 [00H-7FH]

START 6E

00

00

FF

FF

FF

FF

FF

FF

00

1E

6D

01

00

01

01

01

01

10

01

17

01

03

80

A0

5A

78

0A

EE

91

A3

54

4C

99

26

20

0F

50

54

A1

08

00

31

40

45

40

61

40

71

40

81

80

30

01

01

01

01

01

01

02

3A

80

18

71

38

2D

40

58

2C

40

45

00

40

84

63

00

00

1E

66

21

50

B0

51

00

1B

30

50

40

70

36

00

40

84

63

00

00

1E

00

00

00

FD

00

3A

60

3E

1E

53

10

00

0A

20

20

20

20

20

20

00

00

00

FC

70

00

4C

47

20

54

56

0A

20

20

20

20

20

20

20

01

E8

02

03

3A

F1

4E

10

9F

04

13

05

14

03

02

12

20

21

10

22

15

01

29

3D

06

C0

15

07

50

09

57

07

78

03

0C

20

00

40

00

B8

2D

20

C0

0E

01

4F

3F

FC

08

10

18

10

30

06

10

16

10

28

10

E3

05

03

01

02

3A

80

18

71

38

40

2D

40

58

2C

45

00

40

84

63

00

00

1E

01

1D

80

18

50

71

1C

16

20

58

2C

25

00

40

84

63

00

00

9E

01

1D

60

00

72

51

D0

1E

20

6E

28

55

00

40

84

63

00

00

1E

70

00

00

00

00

00

00

00

00

00

00

00

00

00

00

00

51

50

A LEN A 03

CMD

00

VAL

CS STOP

RS-232C Command used during auto-adjustment.


RS-232C COMMAND
[CMD
ID DATA]
wb
00
00
wb
00
10
wb
00
1f
wb
00
20
wb
00
2f
wb

4.2. White Balance Adjustment


4.2.1. Overview

W/B adj. Objective & How-it-works


(1) Objective: To reduce each Panel's W/B deviation
(2) How-it-works : When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range. In order to
prevent saturation of Full Dynamic range and data, one
of R/G/B is fixed at 192, and the other two is lowered to
find the desired value.
(3) Adjustment condition : normal temperature
1) Surrounding Temperature : 25 C 5 C
2) Warm-up time: About 5 Min
3) Surrounding Humidity : 20 % ~ 80 %

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- LEN: Number of Data Byte to be sent


- CMD: Command
- VAL: FOS Data value
- CS: Checksum of sent data
- A: Acknowledge
Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]

EDID Block 1, Bytes 128-255 [80H-FFH]


00

RS -232C

Pat t ern Generat o r

- 17 -

00

ff

Explantion
Begin White Balance adjustment
Gain adjustment(internal white pattern)
Gain adjustment completed
Offset adjustment(internal white pattern)
Offset adjustment completed
End White Balance adjustment
(internal pattern disappears )

Ex)





wb 00 00 -> Begin white balance auto-adj.


wb 00 10 -> Gain adj.
ja 00 ff -> Adj. data
jb 00 c0
...
...
wb 00 1f Gain adj. completed
*(wb 00 20(Start), wb 00 2f(end)) Off-set adj.
wb 00 ff End white balance auto-adj.

LGE Internal Use Only

Adj. Map
Adj. item

Cool

Command
(lower caseASCII)

Data Range
(Hex.)

CMD1

MIN

MAX

R Gain

CMD2

00

C0

G Gain

00

C0

B Gain

00

C0

R Gain

00

C0

G Gain

00

C0

B Gain

00

C0

* CASE Cool
First adjust the coordinate far away from the target
value(x, y).
1. x, y > target
i) Decrease the R, G.
2. x, y < target
i) First decrease the B gain,
3. x > target, y < target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
4. x < target, y > target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G

Default
(Decimal)

R Cut
G Cut
B Cut

Medium

R Cut

How to adjust
1. If G gain is adjusted over 172 and R gain and B gain
less than 192 , Adjust is O.K.
2. If G gain is less than 172 , increase G gain by up to
172, and then increase R gain and B gain same
amount of increasing G gain.
3. If R gain or B gain is over 255 , Readjust G gain less
than 172, Conform to R gain is 255 or B gain is 255

G Cut
B Cut

Warm

R Gain

00

C0

G Gain

00

C0

B Gain

00

C0

R Cut
G Cut

* CASE Medium / Warm


First adjust the coordinate far away from the target
value(x, y).
1. x, y > target
i) Decrease the R, G.
2. x, y < target
i) First decrease the B gain,
ii) Decrease the one of the others.
3. x > target, y < target
i) F
 irst decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
4. x < target, y > target
i) F
 irst decrease B, so make x a little more than the target.
ii) Adjust y value by decreasing the G

4.2.5. Adj. method

(1) Auto adj. method


1) Set TV in adj. mode using POWER ON key.
2) Zero calibrate probe then place it on the center of the
Display.
3) Connect Cable.(RS-232C to USB)
4) Select mode in adj. Program and begin adj.
5) When adj. is complete (OK Sign), check adj. status pre
mode. (Warm, Medium, Cool)
6) Remove probe and RS-232C cable to complete adj.
W/B Adj. must begin as start command wb 00 00 , and
finish as end command wb 00 ff, and Adj. offset if need.
(2) Manual adjustment. method
1) Set TV in Adj. mode using POWER ON.
2) Zero Calibrate the probe of Color Analyzer, then place it
on the center of LCD module within 10 cm of the
surface.
3) Press ADJ key EZ adjust using adj. R/C 9. WhiteBalance then press the cursor to the right(key ). When
right key() is pressed 216 Gray internal pattern will be
displayed
4) Adjust Cool modes
a. Fix the one of R/G/B gain to 192 (default data) and
decrease the others. ( If G gain is adjusted over 172
and R and B gain less than 192 , Adjust is O.K.)
b. If G gain is less than 172, Increase G gain by up to
172, and then increase R gain and G gain same
amount of increasing G gain.
c. If R gain or B gain is over 255, Readjust G gain less
than 172, Conform to R gain is 255 or B gain is 255
5) Adjust two modes(Medium/Warm) Fix the one of R/G/B
gain to 192(default data) and decrease the others.
6) Adj. is completed, Exit adjust mode using EXIT key on
Remote controller.
If internal pattern is not available, use RF input. In EZ Adj.
menu 6.White Balance, you can select one of 2 Testpattern: ON, OFF. Default is inner(ON). By selecting OFF,
you can adjust using RF signal in 206 Gray pattern.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

Adjustment condition and cautionary items


1) Lighting condition in surrounding area
Surrounding lighting should be lower 10 lux. Try to
isolate adj. area into dark surrounding.
2) Probe location
: Color Analyzer(CA-210) probe should be within 10 cm
and perpendicular of the module surface (80 ~ 100)
3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked
using no signal or Full-white pattern.

4.2.6. Reference (White balance Adj. coordinate and


color temperature)

- 18 -

Luminance : 206 Gray


Standard color coordinate and temperature using CS-1000
(over 26 inch)
Mode

Coordinate
x

Temp

uv

Cool

0.271

0.270

13000 K

0.0000

Medium

0.285

0.293

9300 K

0.0000

Warm

0.310

0.325

6500 K

0.0000

LGE Internal Use Only

Standard color coordinate and temperature using CA-210(CH 18)


Coordinate
Mode
Temp
uv
x
y
Cool

0.2710.002

0.2700.002

13000K

0.0000

Medium

0.2850.002

0.2930.002

9300K

0.0000

Warm

0.3100.002

0.3250.002

6500K

0.0000

4.3. Local Dimming Function Check

Step 1) Turn on TV.


Step 2) At the Local Dimming mode, module Edge Backlight
moving right to left Back light of IOP module moving.
Step 3) Confirm the Local Dimming mode.
Step 4) Press "exit" key.

4.2.7. EDGE LED White balance table

(1) EDGE LED module change color coordinate because of


aging time.
(2) Apply under the color coordinate table, for compensated
aging time.
(3) Normal line(Edge)
- Gumi (Mar ~ Dec) & Global

GP4

Aging
time
(Min)

1
2
3
4
5
6
7
8
9

0-2
3-5
6-9
10-19
20-35
36-49
50-79
80-119
Over 120

Cool
X
y
271
270
281
287
280
285
278
284
276
281
275
277
274
274
273
272
272
271
271
270

Medium
x
y
285
293
295
310
294
308
292
307
290
304
289
300
288
297
287
295
286
294
285
293

Warm
x
y
313
329
320
342
319
340
317
339
315
336
314
332
313
329
312
327
311
326
310
325

Medium
x
y
285
293
294
308
290
303
286
298
283
295
281
291
280
288
279
286
278
284
278
283

Warm
x
y
313
329
319
340
315
335
311
330
308
327
306
323
305
320
304
318
303
316
303
315

4.4. Magic Motion Remote control test

(1) Equipment : RF Remote control for test, IR-KEY-Code


Remote control for test
(2) You must confirm the battery power of RF-Remote control
before test(recommend that change the battery per every lot)
(3) Sequence (test)
1) if you select the "Start(Mute)" key on the Adjustment
remote control, you can pairing with the TV SET.
2) You can check the cursor on the TV Screen, when select
the "OK" key on the Adjustment remote control.
3) You must remove the pairing with the TV Set by select
"OK" key + "Mute" key on the Adjustment remote control
for 5 seconds.

(4) Aging Chamber(Edge)


GP4

Aging
time
(Min)

1
2
3
4
5
6
7
8
9

0-5
6-10
11-20
21-30
31-40
41-50
51-80
81-119
Over 120

Cool
X
y
271
270
280
285
276
280
272
275
269
272
267
268
266
265
265
263
264
261
264
260

4.5. 3D function test

(Pattern Generator MSHG-600, MSPG-6100[Support HDMI1.4])


* HDMI mode NO. 872 , pattern No.83
(1) Please input 3D test pattern like below.

(2) When 3D OSD appear automatically, then select OK key.

(3) Don't wear a 3D Glasses, check the picture like below.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 19 -

LGE Internal Use Only

4.6. Wi-Fi Test

4.8. Inspection of light scattering

Step 1) Turn on TV
Step 2) Select Network Connection option in Network Menu.

Test Method

Step 3) Select Start Connection button in Network Connection.

(1) Push Power only key.


(2) Push HDMI hot key.
(3) Inspect whether light scattering is occurred in internal
black pattern or not.
(4) Push Power only key.

4.9. Option selection per country


Step 4) If the system finds any AP like blow PIC, it is working
well.

4.9.1. Overview

- Option selection is only done for models in Non-EU.

4.9.2. Method

(1) Press ADJ key on the Adjustment Remote Control, then


select Country Group Meun
(2) Depending on destination, select Country Group Code 04
or Country Group EU then on the lower Country option,
select US, CA, MX. Selection is done using +, - or
key.

4.10. MHL Test


4.7. LNB voltage and 22KHz tone check

(only for DVB-S/S2 model)


Test method
(1) Set TV in Adj. mode using POWER ON.
(2) Connect cable between satellite ANT and test JIG.
(3) Press Yellow key(ETC+SWAP) in Adj Remote control to
make LNB on.
(4) Check LED light ON at 18 V menu.
(5) Check LED light ON at 22 KHz tone menu.
(6) Press Blue key(ETC+PIP INPUT) in Adjustment Remote
control to make LNB off.
(7) Check LED light OFF at 18 V menu.
(8) Check LED light OFF at 22 KHz tone menu.
Test result
(1) After press LNB On key, 18 V LED and 22 KHz tone
LED should be ON.
(2) After press LNB OFF key, 18 V LED and 22 KHz tone
LED should be OFF.

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 20 -

(1) Turn on TV
(2) Select HDMI4 mode using input Menu.
(3) Set MHL Zig(M1S0D3617) using MHL input, output and
power cord.
(4) Connect HDMI cable between MHL Zig and HDMI4 port.
(5) Check LED light of Zig and Module of Set.

Result) I f, the LED light is green and the Module shows


normal stream OK, Else NG

LGE Internal Use Only

4.11. HDMI ARC Function Inspection

4.13. Ship-out mode check(In-stop)

(1) Test equipment


- Optic Receiver Speaker
- MSHG-600 (SW: 1220 )
- HDMI Cable (for 1.4 version)

After final inspection, press "IN-STOP" key of the Adjustment


remote control and check that the unit goes to Stand-by
mode.

(2) Test method


1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)

4.14. Tool Option selection

- Method: Press ADJ key on the Adj. R/C, then select Tool option.

4.15. GND and Internal Pressure check


4.15.1. Method

(1) GND & Internal Pressure auto-check preparation


- Check that Power cord is fully inserted to the SET.
(If loose, re-insert)
(2) Perform GND & Internal Pressure auto-check
- Unit fully inserted Power cord, Antenna cable and A/V
arrive to the auto-check process.
- Connect D-terminal to AV JACK TESTER
- Auto CONTROLLER(GWS103-4) ON
- Perform GND TEST
- If NG, Buzzer will sound to inform the operator.
- If OK, changeover to I/P check automatically.
(Remove CORD, A/V form AV JACK BOX.)
- Perform I/P test
- If NG, Buzzer will sound to inform the operator.
- If OK, Good lamp will lit up and the stopper will allow the
pallet to move on to next process.

2) Check the sound from the TV Set

3) Check the Sound from the Speaker or using AV & Optic


TEST program (Its connected to MSHG-600)

4.15.2. Checkpoint

TEST voltage
- GND: 1.5 KV / min at 100 mA
- SIGNAL: 3 KV / min at 100 mA
TEST time: 1 second
TEST POINT
- GND TEST = POWER CORD GND & SIGNAL CABLE
METAL GND
- Internal Pressure TEST = POWER CORD GND & LIVE &
NEUTRAL
LEAKAGE CURRENT: At 0.5 mArms

* Remark: I nspect in Power Only Mode and check SW


version in a master equipment

5. Audio
4.12. Camera Function Inspection

(1) Objective : To check how it connects between Camera and


PCBA normally, and their Function
(2) Test Method : This Inspection is available only Power-Only
Status.
1) Slide Camera Up.
2) Cameras Preview picture apeears on TV Set.
3) Slide Camera Down.

<Slide Up Status>

No.

Item

Min

Typ

Max

Unit

Remark

9.0

10.0

12.0

Measurement condition

1.

Audio practical
max Output, L/R
(Distortion=10%
max Output)

8.5

8.9

9.8

Vrms

2.

Speaker (8
Impedance)

10.0

15.0

Auto Volume :Off


Audio EQ : Off
Clear Voice : Off
Virtual Surround:Off

Measurement condition:
(1) RF input: Mono, 1 KHz sine wave signal, 100 % Modulation
(2) CVBS, Component: 1 KHz sine wave signal 0.5 Vrms
(3) RGB PC: 1 KHz sine wave signal 0.7 Vrms

<Slide Down Status>

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 21 -

LGE Internal Use Only

6. USB S/W Download(Service only)

(1) Put the USB Stick to the USB socket.


(2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didn't work. But your downloaded version is High, USB
data is automatically detecting.(Download Version High &
Power only mode, Set is automatically Download)
(3) Show the message "Copying files from memory".

(4) Updating is starting.

(5) Updating Completed, The TV will restart automatically.


(6) If your TV is turned on, check your updated version and
Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. if all channel data is cleared, you didnt have a DTV/
ATV test on production line.

* After downloading, have to adjust Tool Option again.


(1) Push "IN-START" key in service remote control.
(2) Select "Tool Option 1" and push "OK" key.
(3) Punch in the number. (Each model has their number)

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 22 -

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE

Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 23 -

Dual Play
* Set + Stand

AG1
510

300

200

900

121

820

LV1

530

LV2

540

310

CAM1

A22

A10

420

560

AG2

120

AT1

570

410

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

LGE Internal Use Only

System Configuration
Clock for LG1154D

NVRAM

EEPROM_ST
IC102-*1
M24256-BRMN6TP

+3.3V_NORMAL

E0

MAIN Clock(24Mhz)

E1

X-TAL_1

C101

E2

VCC

WC

SCL

SDA

- Low : Normal Operation


- High : Write Protection

VCC

1M

A0

Write Protection
VSS

R108

GND_1

10pF

C103
0.1uF

IC102
R1EX24256BSAS0A

XIN_MAIN

WP

A1

GND_2

X-TAL_2

C100

EEPROM_RENESAS

24MHz
X100

10pF

A2

XO_MAIN
VSS

A0h

SCL

SDA

R139

33

I2C_SCL5

R140

33

I2C_SDA5

System Clock for Analog block(24Mhz)

OPT
R100

33

R101

33

EPHY_RXD1

EPHY_TXD0

EPHY_RXD0

EPHY_TXD1

EPHY_MDIO

EPHY_EN

EPHY_MDC

EPHY_REFCLK

EMMC_DATA[1]

EMMC_DATA[0]

EMMC_DATA[2]

EMMC_DATA[5]

EMMC_DATA[3]

EMMC_DATA[4]

EMMC_DATA[6]

EMMC_DATA[7]

EMMC_CLK

EMMC_RST

EB_DATA[2]

EB_DATA[0]

EB_DATA[3]

EB_DATA[1]

EB_DATA[4]

EB_DATA[5]

EB_DATA[6]

EB_ADDR[0]

EB_DATA[7]

EB_ADDR[1]

EB_ADDR[2]

EB_ADDR[3]

EB_ADDR[4]

EB_ADDR[5]

EB_ADDR[8]

EB_ADDR[6]

EB_ADDR[7]

EB_ADDR[9]

EB_ADDR[10]

EB_ADDR[11]

EB_ADDR[12]

EB_BE_N0

EB_ADDR[14]
EB_ADDR[13]

EB_BE_N1

EB_OE_N

Mhz)
Mhz)
Mhz)
Mhz)

USB_CTL3
EB_WE_N

/USB_OCD2
USB_CTL2
/USB_OCD3

PLL SET[1:0] : internal pull up


"00" : CPU(1200Mhz),M0 / M1 DDR(792,792
"01" : CPU(1056Mhz),M0 / M1 DDR(672,672
"10" : CPU(1056Mhz),M0 / M1 DDR(792,792
"11" : CPU( 960Mhz),M0 / M1 DDR(792,792

EMMC_CMD

EMMC_DATA[0-7]

EB_DATA[0-7]

EPHY_CRS_DV

EB_ADDR[0-14]

AL34

GPIO29
GPIO28

B27
AT37

XTAL_BYPASS

GPIO27

H13DA_XTAL

GPIO26

+3.3V_NORMAL

+3.3V_NORMAL

GPIO25

PORES_N

OPM1
3.3K

AU26

AN9
AP11

TCK0

AN11

TDI0

AN10

TDO0

AM10
AM9

Jtag I/F For Main

AM11
AM12
AL11
AL9

PLLSET1

AL10

PLLSET0

AE34

BOOT_MODE

33

W33

R174

33

W34

AU13
AT13

M_REMOTE_TX

AP12

M_REMOTE_RTS
M_REMOTE_CTS

AR12

TP109

IRB_SPI_SS
IRB_SPI_MOSI
IRB_SPI_MISO
IRB_SPI_CK

IRB_SPI_SS

AE36

IRB_SPI_MOSI

AF36

IRB_SPI_MISO

AF35

IRB_SPI_CK

AG34
AG33

AR9

SW100
JTP-1127WEM

UART2_TX

AM5

UART2_RX

AM6

AMP_RESET_N

AM7
AL6

INSTANT_BOOT

AK7

DEBUG

AK6

SC_DET

AK5

local dimming

AV1_CVBS_DET

AJ5
AJ6

I2C port

COMP1_DET

AJ7

M_RFModule_RESET

AH6

HP_DET

AG7

FRC_RESET

AG6

/TU_RESET1
/S2_RESET

AG5
AF5

VCOM_DYN

AH30

PMIC_RESET

AG30

/RST_HUB

AN33

FE_LNA_Ctrl2

AK33

/TU_RESET2

AE30

HDMI_S/W_RESET

AD30
AN32

FE_LNA_Ctrl1

AK32

HDMI_INT

AC32

R169

3.3K

AC33

R170

3.3K

AB33

AC36
AC37
AB36
AB37
AA36
AA37
AD36
AD37

SPDIF_OUT_ARC
HDMI_RX0HDMI_RX0+
HDMI_RX1HDMI_RX1+
HDMI_RX2HDMI_RX2+
HDMI_CLKHDMI_CLK+

R32

SPI_CS1

HUB_PORT_OVER0

SPI_DO1

/USB_OCD1
R33

SPI_DI1

HUB_VBUS_CTRL0

USB_CTL1

SDA4
SCL5
SDA5

non AJ_JA
Not Support

HW_OPT_4

GPIO139

I2C_SDA6

SCL4

GPIO138

AH33

GPIO137

I2C_SCL6
Not Support

SDA3

GPIO136

AH34

NC_4

AJ33

I2C_SDA5

SCL3

NC_3

Not Support

SDA2/GPIO77

NC_2

AH32

NC_1

I2C_SDA4

Disable

SCL2/GPIO78

USB3_REFPADCLKP

AR6

USB3_REFPADCLKM

I2C_SCL4

SDA1/GPIO79

USB3_RESREF

AP6

SCL1/GPIO64

USB3_TX0M

AR17

SDA0/GPIO65

USB3_TX0P

AP17

SCL0/GPIO66

USB3_RX0M

Support

PHY0_RXCP_0

SPI_SCLK0/GPIO37

USB3_RX0P

EPI

PHY0_RXCN_0

SPI_DI0/GPIO39

USB3_DM0

MODEL_OPT_10

SPI_DO0/GPIO38

USB3_DP0

AJ_JA

PHY0_RX2P_0

USB2_0_TXRTUNE

OLED option

Area2

SPI_CS0/GPIO36

USB2_0_DM

HW_OPT_3

MODEL_OPT_9

PHY0_RX2N_0

CAM_CE1_N

Pannel Resol

AP16

I2C_SCL2_SOC

FRC option
HW_OPT_2

PHY0_RX1P_0

USB2_0_DP

Support

S Tuner

UART1_CTS

USB2_1_TXRTUNE

MODEL_OPT_8

PHY0_RX1N_0

USB2_1_DM0

AR16

I2C_SDA_MICOM_SOC

AREA option1
HW_OPT_1

UART1_RTS

USB2_1_DP0

Support

For ISP

AL32

AE37

PHY0_RX0P_0

USB2_2_TXRTUNE

T2 Tuner

RF_SWITCH_CTL

AL33

HPD0

PHY0_RX0N_0

USB2_2_DM0

AP15

I2C_SCL5
MODEL_OPT_7

HW_OPT_0

Enable

+3.3V_NORMAL

/RST_PHY

AK34

+3.3V_NORMAL

DDCD0_DA

PHY0_ARC_OUT_0

USB2_2_DP0

I2C_SCL1
I2C_SDA1

Default

CP BOX

MODEL_OPT_6

AN34

GPIO0
DDCD0_CK

UART1_TXD

SD_DATA0/GPIO134

Reserved

GPIO1

AF30

AR15

I2C_SDA2_SOC
MODEL_OPT_5

GPIO2

UART1_RXD

SD_DATA1/GPIO135

V12

GPIO3

UART0_TXD

SD_DATA2/GPIO120

V13

GPIO4

UART0_RXD

SD_DATA3/GPIO121

Module

EXT_INTR1/GPIO68

SD_WP_N/GPIO122

MODEL_OPT_4

EXT_INTR2/GPIO69

SD_CD_N/GPIO123

NON OLED

EXT_INTR3/GPIO70

SD_CMD/GPIO124

OLED

IC100
LG1154D_H13D

PLLSET0

SD_CLK/GPIO125

EPI
10K
R131

AJ_JA
R129
10K

DVB_S_TUNER
R128
10K

CP_BOX
R124
10K

DVB_T2_TUNER
R126
10K

OPT
10K
R122

V13_MODULE
R120
10K

OLED
R116
10K

FHD
10K
R114

INTERNAL_FRC
R112
10K

TAIWAN
R110
10K

OLED

GPIO5

PLLSET1

AM32

SPI_SCLK1

I2C_SCL_MICOM_SOC
MODEL_OPT_3

TDO1

SC_DATA/GPIO132

UD

GPIO6

SC_RST/GPIO131

No FRC(60Hz)

FHD

GPIO7

TDI1

SC_VCC_SEL/GPIO128

FRC(120Hz)

Panel

GPIO8

TCK1

SC_VCCEN/GPIO129

FRC

MODEL_OPT_2

TMS1

SC_DETECT/GPIO133

MODEL_OPT_1

GPIO9

SC_CLK/GPIO130

Model Option+3.3V_NORMAL

TRST_N1

CAM_IOIS16_N/GPIO83

LOW
non Taiwan

GPIO10

CAM_REG_N/GPIO72

HIGH
Taiwan

AG32
Area1

TDO0

AE35

AF33

MODEL_OPT_0

GPIO11

CAM_WAIT_N/GPIO84

TP111

GPIO12

TDI0

CAM_VCCEN_N/GPIO87

TP110

GPIO13

TCK0

CAM_INPACK/GPIO74

TP107

TMS0

CAM_RESET

TP100

GPIO14

EXT_INTR0/GPIO67

AT12

M_REMOTE_RX

TP108

TRST_N0

AU12

SOC_RX

C106
33pF
50V

+3.3V_NORMAL

33

R151

SOC_TX

SOC_RESET

TP106

GPIO15

CAM_IREQ_N/GPIO73

TCK0

GPIO16

CAM_VS2_N/GPIO85

TMS0

TP105

GPIO17

H13DA_SDA

CAM_VS1_N/GPIO86

TP104

GPIO18
H13DA_SCL

Y33

R149

W32

TDO0

TP103

GPIO19

BOOT_MODE

EPHY_INT
1/16W
5%

TDI0

R164
33

TRST_N0

TP102

GPIO20

OPM0

AP9

TMS0

TP101

OPM1

AT26

H13A_SCL
H13A_SDA

BOOT_MODE0

GPIO21

CAM_CD2_N/GPIO75

R118

AD33

TRST_N0

INSTANT_MODE0

GPIO22/UART2_RX

AD34

OPM0

BOOT_MODE

INSTANT_BOOT

GPIO23/UART2_TX

AU16

SOC_RESET

CAM_CD1_N/GPIO76

3.3K

BOOT MODE
"0 : EMMC
"1 : TEST MODE

CAM_CE2_N

(internal pull down)

R117

OPT

3.3K

OPT

R150

GPIO24
INSTANT boot MODE
"1 : Instant boot
"0 : normal

CAM_SLIDE_DET

AM33

3.3K

GPIO30

R103

GPIO31

DEBUG

RMII_RXD0

AR11

AU10

AT10

AT11

RMII_RXD1

RMII_TXD0

RMII_TXD1

RMII_TXEN

AR10
RMII_MDC

AT8

AR8
RMII_MDIO

RMII_REF_CLK

RMII_CRS_DV

AU11

U36

U37
EMMC_DATA0

EMMC_DATA1

EMMC_DATA2

U35
EMMC_DATA3

V36

V35

W36

V37

EMMC_DATA4

EMMC_DATA5

EMMC_DATA6

EMMC_DATA7

T36

Y36

Y37

W35

EMMC_RESETN

EMMC_CMD

EMMC_CLK

A36
EB_DATA0/GPIO114

EB_DATA1/GPIO115

C34
EB_DATA2/GPIO116

B34

A34

EB_DATA3/GPIO117

EB_DATA4/GPIO118

A33

B33

C33
EB_DATA5/GPIO119

EB_DATA6/GPIO104

EB_DATA7/GPIO105

C32
EB_ADDR0/GPIO106

B35
EB_ADDR1/GPIO107

B37

B36
EB_ADDR2/GPIO108

EB_ADDR3/GPIO109

C35

C36

D35
EB_ADDR6/GPIO96

EB_ADDR4/GPIO110

EB_ADDR5/GPIO111

D37

D36
EB_ADDR7/GPIO97

EB_ADDR8/GPIO98

E35
EB_ADDR9/GPIO99

E37

F35

F36

G35

G36

G37

H37

J36

J35

H36

H35

L35

K37

K36

E36

EB_ADDR10/GPIO100

EB_ADDR11/GPIO101

XOUT

EB_ADDR14/GPIO88

XIN

EB_ADDR12/GPIO102

B26

EB_ADDR13/GPIO103

560

EB_BE_N0/GPIO80

R152

EB_ADDR15/GPIO89

XO_MAIN

EB_OE_N/GPIO82

A26

XIN_MAIN

EB_WAIT/GPIO94

OPM1
OPM0

EB_CS0/GPIO90

33

OPT

EB_WE_N/GPIO95

33

R134

EB_BE_N1/GPIO81

OPT
R133

EB_CS1/GPIO91

K35

EB_CS3/GPIO93

+3.3V_NORMAL

EB_CS2/GPIO92

OP MODE[1:0]
"00" : Normal Mode
"01/10/11" : Internal Test mode

AU8

PLLSET1
PLLSET0
OPT

J34

K32

J33

J32

M31

L33

AJ31

L32

P32

P33

N34

R37

R36

N37

N36

P36

P37

AP7

AT7

AU7

K33

M36

M37

K34

L36

L37

C24

D24

E24

D25

E25

B25

C25

A25

V34

V33

V32

T32

U33

T33

H33

D34

H32

D33

G34

F32

G33

G32

E32

E33

TP112

200 1%

Debug

R162

R165
3.3K

12507WS-04L

IR_B_RESET
USB3_TX0M

USB3_TX0P

USB3_RX0M

USB3_RX0P

USB3_DM

USB3_DP

P101

+3.3V_NORMAL

IR_B_RESET

0.1uF
C105

0.1uF
C104

WIFI_DM
R161
200 1%

WIFI_DP

USB_DM2
R159 200 1%

USB_DP2

USB2_HUB_IC_IN_DM
R157 200 1%

USB2_HUB_IC_IN_DP

Only SMART CARD


interface

SMARTCARD_DATA/SD_EMMC_CLK

SMARTCARD_RST/SD_EMMC_DATA[2]

SMARTCARD_VCC/SD_EMMC_CMD

SMARTCARD_DET/SD_EMMC_DATA[3]

CAM_REG_N

CAM_WAIT_N

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]

I2C for tuner

CI

I2C for tuner

I2C_SDA5

SMARTCARD_CLK/SD_EMMC_DATA[0]

I2C_SDA4
I2C_SCL4

+3.3V_NORMAL

R155
10K

I2C_SDA2_SOC
I2C_SCL2_SOC

PCM_RESET

I2C_SCL1
I2C_SDA_MICOM_SOC
I2C_SCL_MICOM_SOC

I2C_SCL5

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

I2C_SCL2_SOC

I2C_SDA1

I2C_SDA6
I2C_SCL6

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

I2C_SDA2_SOC

PCM_5V_CTL

R104

CAM_INPACK_N

I2C_SCL2

I2C_SCL_MICOM_SOC

CAM_IREQ_N

I2C_SDA2

I2C_SDA_MICOM_SOC

R148
3.3K

R147
3.3K

R145
3.3K

R144
3.3K

R143
3.3K

R141
3.3K

R142
3.3K

R137
3.3K

R138
3.3K

R102

R106

R154
10K
CI

NON_EPI
R132
10K

NON_AJ_JA
R130
10K

NON_DVB_S_TUNER
R127
10K

NON_CP_BOX
R123
10K

NON_DVB_T2_TUNER
R125
10K

10K
R121

V12_MODULE
R119
10K

NON_OLED
R115
10K

10K
UD
R113

R111NO_FRC
10K

NON_TAIWAN
R109
10K

EPI selection

KR_PIP
R136-*1 1.5K

KR_PIP_NOT
R135
3.3K
KR_PIP_NOT
R136
3.3K

AREA option2

KR_PIP
R135-*1 1.5K

HW_OPT_9

R146
3.3K

I2C PULL UP

HW_OPT_10

33
33

CAM_CD2_N

+3.3V_NORMAL

HW_OPT_8
satellite support

R105

/PCM_CE1

+3.3V_NORMAL

T2 support

33
33

I2C_SCL_MICOM

/PCM_CE2

HW_OPT_7

+3.3V_TU

CAM_CD1_N

I2C_SDA_MICOM

+3.3V_TU

CI
R153
10K

reserved
CP BOX

D32

HW_OPT_5
HW_OPT_6

F34

F33

EPI PANEL version

1
DEBUG

UART2_RX

3
AC-coupling CAP
Place near by LG1154D
UART2_TX

4
5

BSD-NC4_H001-HD
2012-11-14
H13 D CHIP

LGE Internal Use Only

LG1154A

LG1154D

LG1154A
IC100
LG1154D_H13D

H13A_NON_BRAZIL

+3.3V_Bypass Cap

IC101
LG1154AN_H13A

VREF_M0_0
VREF_M0_1

VDDC10_13

T17

AVDD10_CVBS

T18

AVDD10_VSB

M8

AVDD10_LLPLL

G10

DVDD10_APLL_1

G11

DVDD10_APLL_2

G12

LTX_VDD

GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86

V5
VSS25_REF

VSS25_REF

C3

GND_1

D3

GND_2

D4
D17
E4

GND_4

GND_91

GND_7

F8

GND_8

F9

GND_9

F10

GND_10

F12

GND_11

F13

GND_12

F17

GND_13

F18

GND_14

G4

GND_15

G6

GND_16

G13

GND_17

G14

GND_18

G15

GND_19

G16

GND_20

G17

GND_21

G18

GND_22

H4

GND_23

H5

GND_24

H6

GND_25

H8

GND_26

H9

GND_27

H10

GND_28

H11

GND_89
GND_90

GND_6

F7

GND_88

GND_3
GND_5

F4

GND_87

GND_29

GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115

0.1uF

C2974.7uF

C300

C3514.7uF

C2794.7uF

C2554.7uF

VDDC11_10

VDD33_3

VDDC11_11

VDD33_4

VDDC11_12

VDD33_5

VDDC11_13

VDD33_6

VDDC11_14

VDD33_7

VDDC11_15
VDDC11_16
VDDC11_17

0.1uF

AVDD33_USB_1

VDDC11_18

AVDD33_USB_2

VDDC11_19

AVDD33_BT_USB_1

VDDC11_20

AVDD33_BT_USB_2

VDDC11_21

AVDD33_HDMI_1

VDDC11_22

AVDD33_HDMI_2

VDDC11_23
VDDC11_25

C301

VDDC11_26
VDDC11_27

VDD25_LVRX_1

VDDC11_28

VDD25_LVRX_2

VDDC11_29

VTXPHY_VDD25_1

VDDC11_30

VTXPHY_VDD25_2

VDDC11_31

VDD25_DR3PLL

VDDC11_32

M10
M11
M14
M15
M16
N4

VDDC11_33
VDDC11_34

OPT

H15
H16
H17
H18
H19
H20
H21
H22
H23
H24

N5

H25

VDD15_M0_1

C5

+1.1V

C26
C27
D5

N23

D26
E5

P15

E6
E7

P16

E8
E22

P17

E23
E26

P18

F7
F8

R15
T15

F22
F23

+1.1V_VDD

F24
F25

T22

F26
F27

T23

F31

T24

G8

G7
G9

U15

G10
G11

U22

G12

U23

G14

G13
G15

U24

G16
G17

V15

G18

V22

G20

G19
G21

V23

G22

V24

G24

G23
G25

W22

G26
G27

W23

G28

W24

G30

G29
G31

AB15

H9
H26

AB24

H27

AC15

H29

H28
H30

AC24

H31
J7

AD15

J30
J31

AD16

K7
K30

AD17

K31

AD18

L31

L30
M7

AD21

M12
M13

AD22

M14

AD23

M16

M15
M17

AD24

M18
M19

VDDC11_35

M20
M24

VDD15_M0_2

M25
M26

VDD15_M0_3
VDD15_M0_4

M32
M33
M34

VDD15_M0_5
VDD15_M0_6

M30

VDD11_VTXPHY
AB14
VTXPHY_VDD11_1

VDD15_M0_7

VTXPHY_VDD11_2

VDD15_M0_8

VTXPHY_VDD11_3

N12
N13

AC14

N14

AD14

N16

N15

VDDC11_XTAL

N17
N18
N19

VDD15_M0_9
VDD15_M0_10

AVDD11_DR3PLL

VDD15_M0_11

AVDD11_DCO

VDD15_M0_12

GPLL_VDD11

P25

N20

AA15

N30

N24

AC26

+1.1V_VDD

N31
N32
N33
P7

VDD15_M0_13

P12

VDD15_M0_14

P14

P13
P19
P20

VDD15_M0_15

P21
P22

VDD15_M0_16

N14

N22

P23
P24

N15

H7

N17

H8

P4

J8

P5

K8

P6

L7

P7

L8

P8

VDDC15_M1

P9

M8
N7

P10

N8

P11

P8

+1.5V_Bypass Cap

P14
P15

R7
R8

P16

T8

R4

U8

R7

+1.5V_DDR

+1.0V_Bypass Cap

R8

VDDC15_M0

VDDC15_M0

V8

VDDC15_M0

W8

R9
+1.0V_VDD

R10

VDD10_XTAL

R11
R12

L230

L211
BLM18PG121SN1D

R13

R16
R17
T4

P31

VDD15_M1_1

R12

VDD15_M1_2

R13

VDD15_M1_3

R16

VDD15_M1_4

R18

VDD15_M1_5

R20

R14
R17
R19
R21
R22

VDD15_M1_6

R23

VDD15_M1_7

R24

VDD15_M1_8

R26

R25
R30

VDD15_M1_9

R34

VDD15_M1_10

T12

VDD15_M1_11

T14

T7
T13
T16
T17

VDD15_M1_12

T18
T19

VDD15_M1_13

T20
T21

VDD15_M1_14

T25

VDD15_M1_15

T26

VDD15_M1_16

T31

T30
T34

VREF_M0_1

U7
U12
U13
U14
U16
U17
U18

R14
R15

VREF_M0_0

P30

T7

BLM18PG121SN1D

OPT

OPT

U19

0.1uF

M12

GND_77

VDD33_2

U20
U21
U25
U26
U30
U31
V7
V12
V13
V14
V16
V17
V18

T8

V19
V20

T9

V21
V25

T10

V26
V30

T11

V31

+1.0V_VDD

W5

T12

W6

VDDC10

T15

+1.5V_DDR

VDDC15_M1

W7

VDDC15_M1

VDDC15_M1

W12
W13

L206
BLM18PG121SN1D

T16
U4

W14
W15

VREF_M1_0

U6
U18
V4
V16

GND_116

L228

W16

VREF_M1_1
H13A_BRAZIL
IC101-*1
LG1154AN_H13A_ISDB-T (LG1154AN-IT)

W17
W18
W19
W20
W21
W25

BLM18PG121SN1D

OPT

OPT

P17

0.1uF

VDDC10_12

M9

L200
BLM18PG121SN1D

VDDC15_M0

R202

M7

GND_76

VDDC11_9

1K 1%

VDDC10_11

GND_75

L207
BLM18PG121SN1D

VDD25_AUD

1%

VDDC10_10

L12

M4
M5

+2.5V_Normal

VDD25_LTX

R203

L7

GND_74

+2.5V_Normal

1K

VDDC10_9

GND_73

VDD33_1

C344

GND_72

M3

H14

R302

VDDC10_7
VDDC10_8

K12

VDD10_XTAL

GND_71

M2

1K 1%

K7

VDDC10_6

H12
H13

1%

J12

GND_70

M1

R303

VDDC10_5

J7

+1.5V
L201
BLM18PG121SN1D

P18
J17

XIN_SUB
XO_SUB

AAD_ADC_SIF

AUDA_VBG_EXT

N18
D18
M17

H18

W26

H17

W30

AAD_ADC_SIFM

VSB_AUX_XIN

M18

1K

H12

GND_69

L18

C310

VDDC10_4

H11

VDD11_VTXPHY

0.1uF

H7

GND_68

L17

0.1uF

VDDC10_3

GND_67

VDDC11_8

H10

+1.1V_VDD

1K 1%

VDDC10_2

G9

L16

C296

G8

GND_66

1005 size bead


Bottom side of chip

1K 1%

VDDC10_1

GND_65

VDDC11_7

GPLL_AVDD25

L15

C304

VDD10_XTAL

G7

AD26

OPT

GND_64

R18

VDDC10

GND_63

VSS25_REF

0.1uF

SDRAM_VDDQ_5

VDD10_XTAL

GND_62

L14

C208

SDRAM_VDDQ_4

K16

AF14
N25

R200

K15

GND_61

L13

1%

SDRAM_VDDQ_3

VDD25_XTAL

R201

J16

GND_60

AE14

1K

SDRAM_VDDQ_2

GND_59

L11

L226
BLM15BD121SN1

R300

SDRAM_VDDQ_1

J15

L10

1%

H15

GND_58

XTAL_VDDP

SP_VQPS

AF23

R301

LTX_LVDD_2

GND_57

L9

1K

LTX_LVDD_1

F16

GND_56

VDDC11_6

AE23

0.1uF

VDD25_AAD

F15

L8

0.1uF

M13

GND_55

XTAL_VDD

VDDC11_24

VDD25_LVDS

C206

VDD25_AUD_2

VDDC11_5

R31

C207

VDD25_LTX

GND_54

VDDC11_4

+2.5V

0.1uF

VDD25_AUD_1

N6

L6

0.1uF

M6

GND_53

C308

VDD25_APLL

L5

C298 4.7uF

F14

GND_52

L225
BLM15BD121SN1

L220
BLM18PG121SN1D

L4

AF26

OPT

VDD25_COMP_3

L3

L227
BLM18PG121SN1D

VDD25_REF

AVDD25

C205 4.7uF

VDD25_AUD

GND_51

+2.5V_Normal

L2

C209 4.7uF

VDD25_COMP_2

N9

AF25

0.1uF

VDD25_LTX

L1

C306

N8

GND_50

AK12

VDDC11_XTAL

0.1uF

VDD25_COMP_1

AFE 3CH Power

C303 22uF

N7

GND_49

+1.1V_VDD

K14

C302

VDD25_REF

GND_48

AK11

C299 22uF

VDD25_VSB_2

U5

K13

M23

C307

N13

GND_47

+2.5V_Bypass Cap

K11

0.1uF

VDD25_VSB_1

GND_46

VDDC11_3

M1_DDR_VREF2

M22

4.7uF

VDD25_CVBS_2

N12

K10

C204

N11

GND_45

VDDC11_2

M1_DDR_VREF1

VDD33_8

C202

VDD25_CVBS_1

AF8

K9

0.1uF

GND_44

N10

VDD25_REF

GND_43

AE8

AK25

C288

AVDD33_CVBS_2

AA30

K8

C200 4.7uF

T14

GND_42

Y30

AK24

0.1uF

AVDD33_CVBS_1

M0_DDR_VREF2

M21

K6

C2704.7uF

T13

GND_41

VDDC11_1

P26

AK13

C274

VDD33_XTAL

GND_40

A2

N21
M0_DDR_VREF1

+3.3V

K5

0.1uF

VDD33_11

N16

K4

C246

R6

GND_39

A4

N26

0.1uF

VDD33_10

GND_38

J14

B5

A24

Y1

VDD33

Y5

A27

VDDC11_XTAL
VDD25_XTAL

C251

VDD33_9

R5

GND_37

C2424.7uF

VDD33_8

P13

J11

0.1uF

P12

GND_36

J10

C223

VDD33_7

GND_35

J9

C2394.7uF

VDD33_6

J13

J8

C2144.7uF

H13

GND_34

C2114.7uF

VDD33_5

C2164.7uF

G5

GND_33

VREF_M1_1
+1.1V_VDD

L222
BLM18PG121SN1D

J5
J6

VREF_M1_0

AVDD33_CVBS(2)

L216
BLM18PG121SN1D
0.1uF

VDD33_4

GND_32

L209
BLM18PG121SN1D

J4

C218

GND_31

C2754.7uF

GND_30

VDD33_2
VDD33_3

F11

AVDD25

VDD33_1

C2414.7uF

F6

AVDD33_XTAL
AVDD33_CVBS

AVDD33_XTAL(1)

H14

F5

0.1uF

E11

+1.1V_Bypass Cap

+3.3V_NORMAL

+3.3V_NORMAL

(2)

0.1uF

AVDD33

C283

+3.3V_NORMAL

C259

AVDD33

IC100
LG1154D_H13D

+0.75V

XTAL_BYPASS

AUDA_OUTL

CLK_24M

AUDA_OUTR

XTAL_SEL0

AUD_SCART_OUTL

XTAL_SEL1

AUD_SCART_OUTR

W31
P2

Y3

N1

Y4

N2

GND_1

GND_185

GND_2

GND_186

GND_3

GND_187

GND_4

GND_188

GND_5

GND_189

GND_6

GND_190

GND_7

GND_191

GND_8

GND_192

GND_9

GND_193

GND_10

GND_194

GND_11

GND_195

GND_12

GND_196

GND_13

GND_197

GND_14

GND_198

GND_15

GND_199

GND_16

GND_200

GND_17

GND_201

GND_18

GND_202

GND_19

GND_203

GND_20

GND_204

GND_21

GND_205

GND_22

GND_206

GND_23

GND_207

GND_24

GND_208

GND_25

GND_209

GND_26

GND_210

GND_27

GND_211

GND_28

GND_212

GND_29

GND_213

GND_30

GND_214

GND_31

GND_215

GND_32

GND_216

GND_33

GND_217

GND_34

GND_218

GND_35

GND_219

GND_36

GND_220

GND_37

GND_221

GND_38

GND_222

GND_39

GND_223

GND_40

GND_224

GND_41

GND_225

GND_42

GND_226

GND_43

GND_227

GND_44

GND_228

GND_45

GND_229

GND_46

GND_230

GND_47

GND_231

GND_48

GND_232

GND_49

GND_233

GND_50

GND_234

GND_51

GND_235

GND_52

GND_236

GND_53

GND_237

GND_54

GND_238

GND_55

GND_239

GND_56

GND_240

GND_57

GND_241

GND_58

GND_242

GND_59

GND_243

GND_60

GND_244

GND_61

GND_245

GND_62

GND_246

GND_63

GND_247

GND_64

GND_248

GND_65

GND_249

GND_66

GND_250

GND_67

GND_251

GND_68

GND_252

GND_69

GND_253

GND_70

GND_254

GND_71

GND_255

GND_72

GND_256

GND_73

GND_257

GND_74

GND_258

GND_75

GND_259

GND_76

GND_260

GND_77

GND_261

GND_78

GND_262

GND_79

GND_263

GND_80

GND_264

GND_81

GND_265

GND_82

GND_266

GND_83

GND_267

GND_84

GND_268

GND_85

GND_269

GND_86

GND_270

GND_87

GND_271

GND_88

GND_272

GND_89

GND_273

GND_90

GND_274

GND_91

GND_275

GND_92

GND_276

GND_93

GND_277

GND_94

GND_278

GND_95

GND_279

GND_96

GND_280

GND_97

GND_281

GND_98

GND_282

GND_99

GND_283

GND_100

GND_284

GND_101

GND_285

GND_102

GND_286

GND_103

GND_287

GND_104

GND_288

GND_105

GND_289

GND_106

GND_290

GND_107

GND_291

GND_108

GND_292

GND_109

GND_293

GND_110

GND_294

GND_111

GND_295

GND_112

GND_296

GND_113

GND_297

GND_114

GND_298

GND_115

GND_299

GND_116

GND_300

GND_117

GND_301

GND_118

GND_302

GND_119

GND_303

GND_120

GND_304

GND_121

GND_305

GND_122

GND_306

GND_123

GND_307

GND_124

GND_308

GND_125

GND_309

GND_126

GND_310

GND_127

GND_311

GND_128

GND_312

GND_129

GND_313

GND_130

GND_314

GND_131

GND_315

GND_132

GND_316

GND_133

GND_317

GND_134

GND_318

GND_135

GND_319

GND_136

GND_320

GND_137

GND_321

GND_138

GND_322

GND_139

GND_323

GND_140

GND_324

GND_141

GND_325

GND_142

GND_326

GND_143

GND_327

GND_144

GND_328

GND_145

GND_329

GND_146

GND_330

GND_147

GND_331

GND_148

GND_332

GND_149

GND_333

GND_150

GND_334

GND_151

GND_335

GND_152

GND_336

GND_153

GND_337

GND_154

GND_338

GND_155

GND_339

GND_156

GND_340

GND_157

GND_341

GND_158

GND_342

GND_159

GND_343

GND_160

GND_344

GND_161

GND_345

GND_162

GND_346

GND_163

GND_347

GND_164

GND_348

GND_165

GND_349

GND_166

GND_350

GND_167

GND_351

GND_168

GND_352

GND_169

GND_353

GND_170

GND_354

GND_171

GND_355

GND_172

GND_356

GND_173

GND_357

GND_174

GND_358

GND_175

GND_359

GND_176

GND_360

GND_177

GND_361

GND_178

GND_362

GND_179

GND_363

GND_180

GND_364

GND_181

GND_365

GND_182

GND_366

GND_183

GND_367

GND_184

GND_368

Y8
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
Y31
Y35
AA8
AA12
AA13
AA14
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA24
AA25
AA26
AA31
AB6
AB8
AB12
AB13
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB25
AB26
AB30
AB31
AC8
AC12
AC13
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC25
AC30
AC31
AD8
AD12
AD13
AD19
AD20
AD25
AD31
AE12
AE13
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE24
AE25
AE26
AE31
AF12
AF13
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF24
AF31
AG8
AG31
AH8
AH31
AJ8
AJ30
AK8
AK9
AK10
AK14
AK15
AK16
AK17
AK18
AK19
AK20
AK21
AK22
AK23
AK26
AK27
AK28
AK29
AK30
AK31
AL8
AL12
AL13
AL14
AL15
AL16
AL17
AL18
AL19
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL28
AL29
AL30
AL31
AM8
AM13
AM14
AM15
AM16
AM17
AM18
AM19
AM20
AM21
AM22
AM23
AM24
AM25
AM26
AM27
AM28
AM29
AM30
AM31
AN6
AN12
AN13
AN15
AN16
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27
AN28
AN29
AN30
AN31

N3
P1
P3

AUAD_L_CH4_IN
AUAD_R_CH4_IN

E3
PORES_N

K2

OPM0

AUAD_L_CH2_IN

OPM1

AUAD_R_CH2_IN
AUAD_L_CH1_IN

A8
B8

AUAD_L_CH3_IN
AUAD_R_CH3_IN

K3

H13A_SCL

AUAD_R_CH1_IN

H13A_SDA

AUAD_R_REF
AUAD_M_REF
AUAD_L_REF

V15
V13

CVBS_IN3
CVBS_IN2

T1
U2
U3
V2
V3
U1
T3
T2
R3
K17

ANTCON

CVBS_IN1

RFAGC

CVBS_VCM

IFAGC

BUF_OUT1

ADC_I_INCOM

BUF_OUT2

ADC_I_INP

K18
J18
U16

U15
U14

R2

AUAD_REF_PO

U13
V14

R1

U17
V17

ADC_I_INN
F3
GPIO0

U7
V6
V7
U10
V12
T5

GND JIG POINT

SMD TOP for EMI

+3.3V_Bypass Cap

+2.5V_Bypass Cap

+3.3V_NORMAL

V8
V9

+2.5V_Normal

+2.5V_Normal
VDD33

T6
U8

VDD25_XTAL

(1)

U9

VDD25_LVDS(4)

V10
U11

L234
BLM18PG121SN1D

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

REFB

GPIO2

ADC1_COM

GPIO3

ADC2_COM

GPIO4

ADC3_COM

GPIO5

SC1_SID

GPIO6

SC1_FB

GPIO7

PB1_IN

GPIO8

Y1_IN

GPIO9

SOY1_IN

GPIO10

PR1_IN

GPIO11

PB2_IN

GPIO12

Y2_IN

GPIO13

SOY2_IN

GPIO14

PR2_IN

GPIO15

F2
F1
G3
G2
G1
H3
H2
H1
J3
E18
E17
H16
J2
J1
K1

0.1uF

C3784.7uF

GPIO1

C381

C368

0.1uF

L238
BLM18PG121SN1D
C3644.7uF

MDS62110209

C203

NON_LA8600
GASKET_8.0X6.0X8.5H
M200

0.1uF

L203
BLM18PG121SN1D
C2014.7uF

JP205

JP204

JP203

JP202

V11
U12

REFT

BSD-NC4_H002-HD
2012-12-24
MAIN POWER

11/05/31

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

IC101
LG1154AN_H13A

+3.3V_NORMAL

OP MODE Setting
& Select XTAL Input

Clock for H13A

CLK_54M_VTT

INTR_GBB
INTR_AFE3CH

+3.3V_NORMAL

IC100
LG1154D_H13D

H13A_NON_BRAZIL

E1

AT16

E2

AU17

D1

AT17

1M

R460
R461
R462

10K

10K

AUD_FS20CLK
AUD_FS21CLK

R484 OPT

R441

10K

10K
R459

XTAL SEL[1:0] : SW[4:3]


00 => Xtal Input
01 => CLK 24M from H13D
10 => XTAL Bypass from H13D

XOUT_SUB

R482 OPT
OPT
R483

R481 OPT

X-TAL_1

GND_1
1

2
C427

OP MODE[0:1] : SW[2:1]
00 => Normal Operaiton Mode
/T32 Debug Mode
01 => Internal Test Purpose
10 => Internal Test Purpose
11 => Internal Test Purpose

3
10pF

1/16W
1%

R466
82

X-TAL_2

DAC_START_PULLDOWN

XIN_SUB

GND_2

10pF
C426

24MHz
X400

1/16W
1%

MAIN Clock(24Mhz)
C404
0.01uF
50V

1/16W
1%

R465
390

R464
1K

INTR_AGPIO

AUD_FS23CLK
AUD_FS24CLK
AUD_FS25CLK

100
OPM[1]

100

XTAL_SEL[0]

100

AUD_DAC1_SCK

XTAL_SEL[1]

AUD_DAC1_LRCH

AUD_ADC_LRCK

100 C424

AV1_CVBS_IN

IC101 H13A_NON_BRAZIL
LG1154AN_H13A

AUD_ADC_SCK

0.047uF

L409 1uH

R433

100 C425

XIN_SUB

330P18
J17

R453

0.047uF

AAD_ADC_SIF

XO_SUB
VSB_AUX_XIN

C462
150pF
EU

R411
75
1%

D18

SC_CVBS_IN_SOY

M18

XTAL_SEL[0]
R432

100

C423

M17

XTAL_SEL[1]

0.047uF

10K EU

SCART_FB_DIRECT

EU
R436
2.7K

R422
75

R427

33 C419

0.047uF
0.047uF
1000pF

V15

33 C420
33 C421

N2
N3

AUDA_OUTL

BB_TP_DATA7

AUDA_OUTR

BB_TP_DATA6

EU 100
EU 100

P1

R479

SCART_Lout_SOC

BB_TP_DATA5

R480

SCART_Rout_SOC

BB_TP_DATA4

R449

COMP2_PB_IN_SOC
COMP2_Y_IN_SOC

0.047uF
1000pF

33 C422
R431

R417 1% 75

R415 1% 75

R413 1% 75

50V 10pF

CVBS_IN2

ANTCON

CVBS_IN1

RFAGC

CVBS_VCM

IFAGC

U15

0.047uF

0.047uF

V7

0.047uF

U10

0.047uF

BUF_OUT1

ADC_I_INCOM

BUF_OUT2

ADC_I_INP

T5
T6
U8

COMP1_PB_IN_SOC

V8

COMP1_Y_IN_SOC

V9

COMP1_Y_IN_SOC_SOY

U9

COMP1_PR_IN_SOC

V10

COMP2_PB_IN_SOC

U11

COMP2_Y_IN_SOC

V11

COMP2_Y_IN_SOC_SOY

Near Place Scart AMP

GPIO0

V12

SC_FB_SOC

COMP2_PR_IN_SOC

EU R442
22K

AUAD_R_CH3_IN

U2

AUAD_L_CH2_IN

U3

U12

COMP2_PR_IN_SOC

BB_TP_DATA2
BB_TP_DATA1

CVBS_GC2
CVBS_GC1

V3

CVBS_GC0

U1

AUAD_R_REF

T3

CVBS_UP

AUAD_M_REF

T2

Close to IC4300

AUAD_REF_PO

FS00CLK
AUDCLK_OUT

NON_TU_W_BR/TW/CO
R487

K18
J18

REFT

GPIO1

REFB

GPIO2

ADC1_COM

GPIO3

ADC2_COM

GPIO4

ADC3_COM

GPIO5

SC1_SID

GPIO6

SC1_FB

GPIO7

PB1_IN

GPIO8

Y1_IN

GPIO9

SOY1_IN

GPIO10

PR1_IN

GPIO11

PB2_IN

GPIO12

Y2_IN

GPIO13

SOY2_IN

GPIO14

PR2_IN

GPIO15

DAC_START

IF_AGC
C454

ADC_I_INP

V17

DAC_DATA4

C459
0.1uF
TU_W_BR/TW/CO

0.1uF

U17

DAC_DATA3
DAC_DATA2
DAC_DATA1

ADC_I_INN

DAC_DATA0

HW_OPT_0

F2

AAD_GC4

HW_OPT_1

F1

HW_OPT_2

G3

HW_OPT_3

G2

TU_W_BR/TW/CO
R487-*1

AAD_GC3

10K

AAD_GC1

AAD_GC2

HW_OPT_4

G1

H1
J3
E18
E17
H16

AAD_DATA9

HW_OPT_7

AAD_DATA8

HW_OPT_8

AAD_DATA7

HW_OPT_9

AAD_DATA6

HW_OPT_10

AAD_DATA5

MHL_ON_OFF

AAD_DATA4
AAD_DATA3

J2

AAD_DATA2

J1

AAD_DATA1

K1

EU

SC_FB_BUF

AAD_DATA0

10K

AU20

B1

AT19

C2

AU19

C1

AT18

D2

AU18

B4

AU22

A3

AT21

B3

AU21

STPI1_CLK/GPIO42

AUD_FS23CLK

STPI1_SOP/GPIO41

AUD_FS24CLK

STPI1_VAL/GPIO40

AUD_FS25CLK

STPI1_ERR/GPIO55

HSR_AP0
HSR_AM0

Placed as close as possible to IC4300

HSR_BP0
+3.3V_NORMAL

HSR_BM0
L407

HSR_CM0
OPT
C447
1uF
25V

1%
IC400
MM1756DURE

10K 1%

C412
0.1uF

4.7uF

1%

R421

GND

AU25

B7
E8

AP23

D8

AR23

C8

AP22

E7

AR22

D7

AP21

C7

AR21

E6

AP20

D6

AR20

C6

AP19

E5

AR19

D5

AP18

C5

AR18

CLK_54M_VTT
R467 82

4.7uF

AUAD_L_CH2_IN

10K 1%

C435

27K

4.7uF

R440

1/16W 1%

TP_DVB_SOP
AUD_DAC1_LRCK

TP_DVB_VAL

AUD_DAC1_SCK

TP_DVB_ERR

AUD_DAC1_LRCH

TP_DVB_DATA0

AUD_DAC0_LRCK

TP_DVB_DATA1

AUD_DAC0_SCK

TP_DVB_DATA2

AUD_DAC0_LRCH

TP_DVB_DATA3

AUD_ADC_LRCK

TP_DVB_DATA4

AUD_ADC_SCK

TP_DVB_DATA5

AUD_ADC_LRCH

TP_DVB_DATA6

C455
10uF

HSR_DP0
1%
R457
51K

B9

AU27

A9

AT27

D9

AP24

E9

AR25

Close to LG1154A
B11 R492
330
A11 R407
330

AU29
AT29
DAC_START_PULLDOWN

D11

AP27

C11

AR27

E10

AP26

D10

AR26

C10

AP25

A10 R451

AT28

330

D13

AR30

C13

AP29

E12

AR29

D12

AP28

C12

AR28

HSR_DM0
HSR_EP0

TPI_CLK

BB_TPI_CLK

TPI_SOP

BB_TPI_ERR

TPI_VAL

BB_TPI_SOP

TPI_ERR

BB_TPI_VAL

TPI_DATA0

BB_TPI_DATA7

TPI_DATA1

BB_TPI_DATA6

TPI_DATA2

BB_TPI_DATA5

TPI_DATA3

BB_TPI_DATA4

TPI_DATA4

BB_TPI_DATA3

TPI_DATA5

BB_TPI_DATA2

TPI_DATA6

BB_TPI_DATA1

TPI_DATA7
TPIO_CLK/GPIO53

CLK_54M

TPIO_SOP/GPIO52

CVBS_GC2

TPIO_VAL/GPIO51

CVBS_GC1

TPIO_ERR/GPIO50

CVBS_GC0

TPIO_DATA0/GPIO58

CVBS_UP

TPIO_DATA1/GPIO59

CVBS_DN

TPIO_DATA2/GPIO60
TPIO_DATA3/GPIO61

FS00CLK

TPIO_DATA4/GPIO62

H13A_AUDCLK_OUT

TPIO_DATA5/GPIO63
TPIO_DATA6/GPIO48

DAC_START

E16

AR35

D16

AP34

C16

AR34
AP33

E15
D15

AR33

C15

AP32

E14

AR32

D14

AP31

C14

AR31

E13

AP30

B18

AT36

A12

AT30

DAC_DATA3

AUDCLK_OUT

DAC_DATA2

DACLRCH

DAC_DATA1

DACSLRCH/GPIO127

DAC_DATA0

PCMI3SCK/GPIO112
DACSCK

AAD_GC4

DACLRCK

AAD_GC3

PCMI3LRCK/GPIO113

AAD_GC2

PCMI3LRCH

AAD_GC1

DACCLFCH/GPIO126

AAD_GC0

IEC958OUT
DACSUBMCLK

AAD_DATA9

DACSUBLRCH

AAD_DATA8

DACSUBSCK

AAD_DATA7

DACSUBLRCK

AAD_DATA6

TEST1

AAD_DATA5

TEST2

AAD_DATA4
TX0N

AAD_DATA2

TX0P

AAD_DATA1

TX1N

AAD_DATA0

TX1P

AAD_DATAEN

TX2N
TX2P

L/DIM0_VS
L/DIM0_SCLK

10K 1%

L/DIM0_MOSI

100K
R408
EU

SCART_FB_BUFFER
R446
4.7K

100K
R409
EU

C406

SCART_Rout_SOC

2.2uF
10V

SCART_FB_BUFFER
R401
SC_FB
470
B
AUDA_OUTL

R430
22K

C400
0.01uF

R445
22K

C401
0.01uF

1/16W
5%

R6451
100
AUDA_OUTR

HP_ROUT_MAIN

SCART_FB_BUFFER
1K R406

R6450
100
HP_LOUT_MAIN

Tuner IF Filter

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

A15

AT33

B15

AU33

A16

AT34

B16

AU34

A17

AT35

B17

AU35

AU15

R402

33

AN5

R405

33

AR14

R400

33

AP14
AN14
AP13

DPM

PWM1

AF7

PWM2

AD7

BPL_IN

GST_SOC
DPM

0.01uF

AFE 3CH REF Setting

L406
OPT

MCLK_SOC
GCLK_SOC

TX4P

HSR_BP

TX5N

HSR_BM

TX5P

HSR_CP

TX6N

HSR_CM

TX6P

HSR_CLKP

TX7N

HSR_CLKM

TX7P

HSR_DP

TX8N

HSR_DM

TX8P

HSR_EP

TX9N

HSR_EM

TX9P
TX10N

AUD_HPDRV_LRCH

TX10P

AUD_HPDRV_LRCK

TX11N

AUD_HPDRV_SCK

TX11P
TX12N

FRC_LR_O_SYNC_FLAG

TX13N

DIM0_MOSI

TX13P

DIM1_SCLK

TX14N

DIM1_MOSI

TX14P
TX15N

AE6

PWM0

TX15P

PWM1

TX16N

PWM2

TX16P

PWM_IN

TX17N
TX17P

AN8
AP8
AR7
AN7

EPI_EO

TX18N

EPI_VST

TX18P

EPI_DPM

TX19N

EPI_MCLK

TX19P

EPI_GCLK

TX20N
TX20P
TX21N
TX21P
TX22N

C444
REFT

TX22P

0.1uF
HP_OUT
L400
BLM18PG121SN1D
HP_LOUT_AMP

TX23N
C446
0.1uF

HP_OUT
L401
BLM18PG121SN1D
HP_OUT
C407
0.22uF
10V

HP_LOUT
HP_ROUT_AMP

FE_DEMOD3_TS_VAL

AG35

FE_DEMOD3_TS_ERROR

AG36

FE_DEMOD3_TS_DATA
FE_DEMOD1_TS_CLK

AL36

FE_DEMOD1_TS_SYNC

AL35
AL37

FE_DEMOD1_TS_VAL

AM35

FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_DATA[0]

AN36

FE_DEMOD1_TS_DATA[1]

AN37

FE_DEMOD1_TS_DATA[2]

AN35

FE_DEMOD1_TS_DATA[3]

AP37

FE_DEMOD1_TS_DATA[4]

AP36

FE_DEMOD1_TS_DATA[5]

AR37

FE_DEMOD1_TS_DATA[6]

AR36

FE_DEMOD1_TS_DATA[7]

B29
B28
C28
B32

FE_DEMOD1_TS_DATA[0-7]

TPI_CLK
TPI_SOP

TPI_ERR

TP402

TPI_VAL
TPI_ERR

TPI_DATA[0-7]

TPI_DATA[0]

C31

TPI_DATA[1]

B31

TPI_DATA[2]

A31

TPI_DATA[3]

C30

TPI_DATA[4]

A30

TPI_DATA[5]

B30

TPI_DATA[6]

C29

TPI_DATA[7]

D30

TPO_CLK

D31

TPO_SOP

F30

TPO_VAL

TPO_ERR
TP400

TPO_ERR

E31
E30

TPO_DATA[0]

F29

TPO_DATA[1]

E29

TPO_DATA[2]

TPO_DATA[0-7]

TPO_DATA[3]

F28
E28

TPO_DATA[4]

D28

TPO_DATA[5]

E27

TPO_DATA[6]
TPO_DATA[7]

D27
AD5

R495

100

AD6

R496

100

Y7
AC6

R497

100

AC5

R498

100

FRC_FLASH_WP
AUD_SCK
AUD_LRCK

AA6

C411
10pF
50V
OPT

AB7
AB5
AU14

SPDIF_OUT

AA32
AA34
AA33
AB34
AE32

33

R493

AE33

33

R494

AU6
AT5

+3.3V_NORMAL

TXB4N/TX0N
TXB4P/TX0P
TXB3N/TX1N

AU5
AT4
AU4
AU3
AU2
AT2
AT1
AR4
AR3
AP1

TXB3P/TX1P
TXBCLKN/TX2N
TXBCLKP/TX2P
TXB2N/TX3N
TXB2P/TX3P
TXB1N/TX4N
TXB1P/TX4P
TXB0N/TX5N
TXB0P/TX5P
TXA4N/TX6N

AP2
AP4
AP3
AN4
AN3

TXA4P/TX6P
TXA3N/TX7N
TXA3P/TX7P
TXACLKN/TX8N
TXACLKP/TX8P

AM4
AM3
AL4
AL3
AK1
AK2
AK4
AK3

AJ3
AH4
AH3
AG4
AG3
AF1
AF2
AF4
AF3
AE4
AE3
AD4
AD3
AC4
AC3
AB1
AB2
AB4
AB3
AA4
AA3
AR5

TX_LOCKN

REFB

AUD_MASTER_CLK
AUD_LRCH

Y6

TX23P

Must be used

C445
HP_OUT
C409
0.22uF
10V

FE_DEMOD3_TS_SYNC

AH36

AJ4

DIM0_SCLK

Placed as close as possible to IC4300

Placed as close as possible to IC100

FE_DEMOD3_TS_CLK

AH37

TX12P

L_VSOUT_LD

C438
0.01uF

SC_FB_BUF

MMBT3904(NXP)
Q400
E SCART_FB_BUFFER

AU32

HSR_AM

IF_P
51

AT32

B14

EO_SOC

ADC_I_INP

1/16W
1%

2.2uF
10V

AU31

A14

TX4N

AF6

IF_N
51
NON_TU_W_BR/TW
C436
22pF
NON_TU_W_BR/TW
R444

+3.3V_NORMAL

SCART_Lout_SOC
EU

B13

C456
4.7uF
10V

C437

To ADC
EU

AT31

TX3P

AP5

ADC_I_INN

C403

AU30

A13

TX3N

HSR_AP

AC7

TU_W_BR/TW TU_W_BR/TW TU_W_BR/TW


R443-*1
R444-*1
C436-*1
100pF
220
220

SCART_Lout

B12

AT15

1%
R458
47K

FE_DEMOD2_TS_DATA

AH35

AT6

AAD_DATA3

ADCO_OUT_CLK

NC

AUAD_M_REF

FE_DEMOD2_TS_ERROR

AJ36

TPIO_DATA7/GPIO49

DAC_DATA4

AT14

EU

FE_DEMOD2_TS_VAL

AJ35

A28

BB_SDA

AP35

HSR_EM0

C448 OPT
4.7uF
10V

NON_TU_W_BR/TW
R443

HSR_CLKM0

FE_DEMOD2_TS_SYNC

AK37

TP_DVB_DATA7
BB_SCL

AU28
AR24

AUAD_R_REF

AUAD_R_CH2_IN

+12V

HSR_CLKP0

TP_DVB_CLK

BB_TPI_DATA0

C9

BIAS

C413

C434
R439

1%

COMP1/AV1/DVI_R_IN

EU

DTV/MNT_V_OUT
27K

AUAD_L_REF

DTV/MNT_V_OUT_SOC

OUT

R420

10K 1%
PS

COMP1/AV1/DVI_L_IN

IN

4.7uF

R438

VCC

AUAD_R_CH3_IN

OPT
R454
2

C433

27K

EU

1%
R419

SC_R_IN

1%
R455
51K

47K R456 1%

R437

AUAD_L_CH3_IN

EU

1/10W
5%

4.7uF

C414
0.1uF

SC_L_IN

C432

27K

4.7uF C449

AUAD_REF_PO
R418

HSR_CP0

FE_DEMOD2_TS_CLK

AK36

AM36

AT25

ADCO_OUT_CLK

+2.5V_Normal

AUDIO IN

100K
R403
EU

AUD_FS21CLK

R6006
EU
SCART_AMP_L_FB

100K
R404
EU

B2

AAD_DATAEN

EU

1uF 25V 10K


R6005
C6001

SCART_Rout

STPI0_DATA/GPIO43

AT20

C17

HW_OPT_6

H2

AUD_FS20CLK

AUD_HDMI_MCLK

AAD_GC0

HW_OPT_5

H3

STPI0_ERR/GPIO44

AU36

CVBS_DN

AUAD_L_REF

R3

STPI0_VAL/GPIO45

STPI1_DATA/GPIO54

B10
CLK_F54M

SCART_AMP_R_FB
25V 1uF
C6006

C4

BB_TP_DATA0

AUAD_R_CH2_IN

V2

F3

68 C441

SC_ID_SOC

COMP2_Y_IN_SOC_SOY

AUAD_L_CH3_IN

T1

ADC_I_INN

68 C440
68 C442

R2

U16

U14

V6

REFB

R1

BB_TP_DATA3

K17

U7

R448

0.047uF

C429
C431

AUAD_R_REF

BB_TP_SOP

C439
100pF
50V

OPT

COMP1_PR_IN_SOC

R447

COMP1_Y

50V 10pF
C470

H13A_SDA

CVBS_IN3

0.047uF V13

REFT

R429

C430

AUAD_R_CH1_IN

Placed as close as possible to SOC

COMP1_Pb

50V 10pF

2.2uF

BB_TP_VAL

N1

AUAD_REF_PO

V14

DTV/MNT_V_OUT_SOC

COMP1_Y_IN_SOC_SOY

EU

EU
1% 75
R412

R414 1% 75
EU
R416 1% 75

OPT 50V 10pF

C473

OPT 50V 10pF


C474

C472

OPT 50V 10pF

AUAD_R_CH2_IN

H13A_SCL

U13

C443
R450 68

COMP1_PB_IN_SOC
COMP1_Y_IN_SOC

0.047uF

AT22

A4

STPI0_SOP/GPIO46

INTR_AGPIO

I2S_I/F

R425

33 C417
33 C418

R428

D406

OPM1

AUAD_L_REF

TU_CVBS_SOC

D403

AUAD_L_CH2_IN
AUAD_L_CH1_IN

B8

SC_CVBS_IN_SOC

5.5V

AUAD_R_CH3_IN
OPM0

AUAD_M_REF

C428

D401

AUAD_L_CH3_IN

A8

H13A_SDA

SC_G
SC_CVBS_IN_SOY

5.5V

AUAD_R_CH4_IN

K2

H13A_SCL

NON_EU
R436-*1
0

R424

5.5V

AUD_SCART_OUTR

K3

AV1_CVBS_IN_SOC

EU

AUD_SCART_OUTL

XTAL_SEL1

PORES_N

OPM[1]

SC_ID_SOC

SC_B

COMP1_Pr

XTAL_SEL0

E3

OPM[0]

SC_FB_SOC

SC_R

AUDA_OUTR

BB_TP_CLK
BB_TP_ERR

C458
EU
C460

SCART_FB_DIRECT
R423
100

AUDA_OUTL

CLK_24M

AUAD_L_CH4_IN

SC_FB

NON_EU
R422-*1

XTAL_BYPASS

C453

TUNER_SIF
C457
1000pF
OPT

P3

SOC_RESET

R435

0.1uF
10uF

TU_CVBS_SOC

C402
150pF
50V
OPT

SC_ID

0.1uF

C451
C452

EU R426
22K

TU_CVBS

AUDA_VBG_EXT

N18

EU

EU

C450

H17
P2

SC_CVBS_IN_SOC
C408
150pF
50V
EU

H18
AAD_ADC_SIFM

0.01uF

P17

XIN_SUB
XOUT_SUB

BB_SDA

EU

R410
75
1%

SC_CVBS_IN

AU23

A7
BB_SCL

0.01uF

C410
150pF

AT23

B5

AUD_ADC_LRCH

AV1_CVBS_IN_SOC
C405
150pF
50V

5.5V
D404

A5

A2
AUD_DAC1_LRCK

AUD_DAC0_LRCH

R434

AU24

C18

AUD_DAC0_SCK

L408 1uH

B6

AUD_HDMI_MCLK

OPM[0]

100

AUD_DAC0_LRCK

Place SOC Side

AT24

STPI0_CLK/GPIO47

INTR_AFE3CH

AUDCLK_OUT_SUB

FOR EMI

Place JACK Side

A6

AK35
INTR_GBB

TXA2N/TX9N
TXA2P/TX9P
TXA1N/TX10N
TXA1P/TX10P
TXA0N/TX11N

H13 Ball Name

TXA0P/TX11P

EPI Output

TXB2N

TXD4N/TX12N

TXB2P

TXD4P/TX12P

TXB1N

TXD3N/TX13N

TXB1P
TXB0N

TXD3P/TX13P

TXB0P

TXDCLKP/TX14P

TXA4N
TXA4P
TXACLKN

TXD2N/TX15N

TXACLKP

TXD1P/TX16P

TXA1N

TXD0N/TX17N

TXA1P

TXD0P/TX17P

TXDCLKN/TX14N

TXD2P/TX15P
TXD1N/TX16N

TXC4N
TXC4P
TXC3N
TXC3P
TXCCLKN
TXCCLKP
TXC2N
TXC2P
TXC1N
TXC1P
TXC0N
TXC0P
EPI_LOCK6

0.1uF

HP_ROUT

DIMMING
Place at JACK SIDE
PWM_DIM2

R490

100

PWM_DIM

R489

100

LG1154A

LG1154D

PWM1
PWM2

BSD-NC4_H004-HD
2012-11-13
MAIN AUDIO/VIDEO

LGE Internal Use Only

IC100
LG1154D_H13D

F15
M0_DDR_A[0]
M0_DDR_A[1]
M0_DDR_A[2]
M0_DDR_A[3]
M0_DDR_A[4]
M0_DDR_A[5]
M0_DDR_A[6]
M0_DDR_A[7]
M0_DDR_A[8]
M0_DDR_A[9]
M0_DDR_A[10]
M0_DDR_A[11]
M0_DDR_A[12]
M0_DDR_A[13]
M0_DDR_A[14]

M0_DDR_A0

F13

M0_DDR_A1

F17

M0_DDR_A2

F19

M0_DDR_A3

E10

M0_DDR_A4

E18

M0_DDR_A5

E11

M0_DDR_A6

F18

DDR_SAMSUNG
IC500
K4B4G1646B-HCK0

M0_DDR_A7

F11

M0_DDR_A8

F16

M0_DDR_A9

E9

VDDC15_M0

M0_DDR_CKE

M0_DDR_A10

E12

N2
P8

M0_DDR_A12

E16
F14

R541

R520

M0_DDR_A13
M0_DDR_A14

F12

10K

10K

M0_DDR_A0
M0_DDR_A1
M0_DDR_A2

M0_DDR_RESET_N

M0_DDR_A15

M0_DDR_A3
E19
M0_DDR_BA[1]

F10
E15

M0_DDR_BA0

M0_DDR_A4

M0_DDR_BA1

M0_DDR_A5
M0_U_CLK

M0_D_CLK

M0_DDR_BA2

M0_DDR_BA[2]

M0_DDR_A6

M0_DDR_U_CLKN
M0_DDR_D_CLK
M0_DDR_D_CLKN

M0_U_CLK

A10

M0_U_CLKN

A19

100
R535

B10

100
R519

M0_DDR_A7
M0_DDR_U_CLK

M0_D_CLK
M0_D_CLKN

B19
E14

M0_DDR_A8
M0_DDR_A9
M0_DDR_A10

M0_U_CLKN

M0_D_CLKN

M0_DDR_A11
M0_DDR_A12

M0_DDR_CKE

M0_DDR_CKE

M0_DDR_A13
F21
M0_DDR_ODT
M0_DDR_RASN
M0_DDR_CASN

E21
E20

M0_DDR_ODT

M0_DDR_A14

M0_DDR_RASN

M0_DDR_A15

M0_DDR_CASN

F20

M0_DDR_BA0

M0_DDR_WEN

M0_DDR_WEN

M0_DDR_BA1
E17
F9
M0_DDR_ZQCAL

VDDC15_M0

M0_DDR_RESET_N

M0_DDR_RESET_N

R500

240

M0_DDR_BA2

VDDC15_M0
M0_1_DDR_VREFCA

M0_DDR_VREFCA

1%

M0_DDR_DQ[10]
M0_DDR_DQ[11]
M0_DDR_DQ[12]
M0_DDR_DQ[13]
M0_DDR_DQ[14]
M0_DDR_DQ[15]
M0_DDR_DQ[16]
M0_DDR_DQ[17]
M0_DDR_DQ[18]
M0_DDR_DQ[19]
M0_DDR_DQ[20]
M0_DDR_DQ[21]
M0_DDR_DQ[22]
M0_DDR_DQ[23]
M0_DDR_DQ[24]
M0_DDR_DQ[25]
M0_DDR_DQ[26]
M0_DDR_DQ[27]
M0_DDR_DQ[28]
M0_DDR_DQ[29]
M0_DDR_DQ[30]

R536

1K 1%

0.1uF

1%
R537

1K

C512

M0_DDR_DQS1

M0_DDR_DQ0

C15

M0_DDR_DQS_N1

M0_DDR_DQ1

C23

VDDC15_M0

M0_DDR_DQ2

D16

VDDC15_M0
M0_DDR_DM0

M0_DDR_DQ3

B24

M0_DDR_DQ4

B15

M0_DDR_DQ5

D23

M0_DDR_DQ6

A15

M0_DDR_DQ7

C16
D21
D17

M0_DDR_DQ3

M0_DDR_DQ13

C17

M0_DDR_DQ1

M0_DDR_DQ9

M0_DDR_DQ12

C21

M0_DDR_DQ0
M0_DDR_DQ2

M0_DDR_DQ11

C18

M0_DDR_DM1

M0_DDR_DQ8
M0_DDR_DQ10

C22

M0_1_DDR_VREFDQ

M0_DDR_VREFDQ

0.1uF

M0_DDR_DQ[8]
M0_DDR_DQ[9]

N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A1

M3

M0_DDR_DQ4
M0_DDR_DQ5
M0_DDR_DQ6
M0_DDR_DQ7

M0_DDR_DQ14

D20
C13
D7
D13
C6
D14
D6
C14
A5

VREFCA

K1
J3
K3
L3

H1
VREFDQ

A2

H1

A3

VREFDQ

P7

A4

J3

VDDC15_M0

A5

L8

A6

K3
L3

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

A14

VDD_6

A15

VDD_7

BA0

VDD_9

VDD_8

R542

VDDQ_2
VDDQ_3

CKE

VDDQ_4

CS

VDDQ_6

VDDQ_5
VDDQ_7

ODT
RAS

VDDQ_8

CAS

VDDQ_9
NC_1
NC_2

RESET

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

A14

VDD_6

A15

VDD_7
VDD_8

BA0

M0_DDR_A2

D2

M0_DDR_A3

E9
F1
H2
H9

M0_DDR_A4

J9

M0_DDR_A5

L1
L9

M0_DDR_A6
A9

C7
B7

B2
VDD_1

A8
C1
C9

DQSL

VSS_1

DQSU

VSS_2
VSS_3

E7

A9

M0_DDR_A1

DQSL

DQSU

A8

R9

NC_4

F3
G3

M0_DDR_A0

J1

T2

240
1%

K8
N1
N9
R1

A1
VDDQ_1

CK
CK

NC_3

A7

D9
G7
K2

BA1

WE

ZQ

D3

VSS_4

DML
DMU

VSS_5

DQL0

VSS_7

VSS_6

E3

D9

F7
F2
F8
H3

G7

H8
G2
H7

K2

VSS_8

DQL1
DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

K8
N1

A2

C2
A7
B8
A3

M0_DDR_A7

J2

M0_DDR_A8

J8
M1
M9

M0_DDR_A9

P1
P9
T1
T9

M0_DDR_A10

B1
VSSQ_1

D7
C3

B3
E1
G8

DQL6
DQL7

C8

DQU0

VSSQ_2

DQU1

VSSQ_3
VSSQ_4

DQU2
DQU3

VSSQ_5

DQU4

VSSQ_6
VSSQ_7

DQU5
DQU6

VSSQ_8

DQU7

VSSQ_9

M0_DDR_A11

B9
D1
D8

M0_DDR_A12

E2
E8
F9
G1

M0_DDR_A13

G9

N9

M0_DDR_A14

R1

M0_DDR_A15
M0_DDR_BA0

BA1

M0_DDR_BA1
A1
VDDQ_1
VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

M0_DDR_BA2

C1

M0_U_CLK

C9

M0_U_CLKN

D2

M0_DDR_CKE

NC_2

H2

C534

0.1uF

M0_DDR_ODT

H9

C535

0.1uF

M0_DDR_RASN
M0_DDR_WEN

L1

M0_DDR_RESET_N

M0_DDR_DQ15

M0_DDR_DQ8

M0_DDR_DQ16
M0_DDR_DQ17

M0_DDR_DQ10

M0_DDR_DQ18

M0_DDR_DQ11

M0_DDR_DQ19

M0_DDR_DQ12

M0_DDR_DQ20

M0_DDR_DQ13

M0_DDR_DQ21

M0_DDR_DQ14

M0_DDR_DQ22

M0_DDR_DQ15

M0_DDR_DQ9

DQSU

VSS_1

DQSU

VSS_2
VSS_3

DML

VSS_4

DMU

VSS_5
VSS_6

E3
F2
F8
H3
H8
G2
H7

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C2
A7
A2
B8
A3

M0_DDR_DQS3

E1

M0_DDR_DQS_N3

J2

M0_DDR_DM2

J8

M0_DDR_DM3

M8

N2

H1

A3

P8

A0

A3

M3

A6

A10/AP

R8
R2

L8

R3

A13
A14

VDD_1
VDD_2

A11

N7

VDD_3

A12/BC

T3

VDD_4

A13

T7

VDD_5
VDD_6

A14

M7

A15

VDD_7
VDD_8

M2
BA0

N8

VDD_5
VDD_6
VDD_7
VDD_8

BA0

D9
G7
K2
K8
N1
N9
R1
R9

VDD_9

BA1
A1
VDDQ_1
CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE
T2
RESET

A8
C1
C9
D2
E9
F1
H2
H9
J1

NC_1
NC_2
NC_3

J9
L1
L9

NC_4

F3
DQSL
DQSL

A10/AP

R7

K3
L3

G3

A9

L7

K1
J3

240
1%

A8

VDD_2
VDD_3
VDD_4

L2

R544

ZQ

A7

T8

K9

VDDC15_M0

A6

B2
VDD_1

A11
A12/BC

J7
K7

A5

L8
ZQ

A7
A8
A9

BA2

A4

P2

H1
VREFDQ

A4
A5

M2
N8

VREFDQ

VREFCA

A1
A2

A15

B2

C7

D9

E7

B7

D3

A9
DQSU

VSS_2
VSS_4

VSS_3
DMU

VSS_5

DQL0

VSS_7

VSS_6

E3

G7

F7
F2
F8

K2

H3

K8

H7

H8
G2

VSS_1

DQSU
DML

DQL1
DQL2

VSS_8
VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C8
C2
A7

N9

A2
B8
A3

J2
J8
M1
M9
P1
P9
T1
T9

B1
VSSQ_1

D7
C3

N1

B3
E1
G8

DQL6
DQL7
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2
E8
F9
G1
G9

R1
R9

VDD_9

BA1

M3

BA2

A1
VDDQ_1

J7
K7
K9

CK

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

K1
J3
K3
L3

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE

A8
C1
C9
D2
E9
F1
H2

C566

0.1uF

H9

C567

0.1uF

J1
NC_1

T2
RESET

NC_2

J9
L1
L9

NC_4

F3
DQSL

G3

DQSL

M9

M0_DDR_DQ16

P1

M0_DDR_DQ17

P9

M0_DDR_DQ18

T1

M0_DDR_DQ19

T9

M0_DDR_DQ20
M0_DDR_DQ22

B1
VSSQ_1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

C7

A9

B7

DQSU

VSS_1

DQSU

VSS_2
VSS_3

E7
D3

DML

VSS_4

DMU

VSS_5

M1

M0_DDR_DQ23

VSS_6

E3
F7
F2
F8
H3
H8
G2

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

D1

M0_DDR_DQ24

D8

M0_DDR_DQ25

E2

M0_DDR_DQ26

E8

M0_DDR_DQ27

F9

M0_DDR_DQ28

G1

M0_DDR_DQ29

G9

M0_DDR_DQ30
M0_DDR_DQ31

B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL6

H7

DQL7

B1

B9

M0_DDR_DQ23

C7

M7

G8

M0_DDR_DQ21

D7
C8

B3

DQL6
DQL7

C3

L7
R7
N7

A9

E7

F7

R2
T8
R3

T3

NC_3
M0_DDR_DQS2

C7

P8
P2

T7

L9

DQSL

P3
N2

R8

M8
VREFCA

A2

J9

DQSL

D3

P3

NC_4

F3

B7

A1

L2

F1

J1

RESET

P7

E9

M0_DDR_CASN
NC_1

A0

A8

VDDQ_9

T2

N3

DDR3
4Gbit
(x16)

R9

VDD_9

CK

M0_1_DDR_VREFDQ

B2

L2
K1

H5TQ4G63AFR-PBC
N3

ZQ

J7
K7
K9

DDR_HYNIX
IC502-*1

M0_1_DDR_VREFCA

L8

A6
A7
A8

BA2

WE

G3

VREFCA

A2
A3
A4
A5

M2
N8

J7
K9

T3
T7
M7

BA2

K7

L7
R7
N7

M3

M2
N8

M0_DDR_VREFDQ

M8

DDR_SAMSUNG
IC502
K4B4G1646B-HCK0

M8
A0
A1

M0_DDR_DQS_N2

R538

M0_DDR_DQ[7]

M0_DDR_DQS_N0

M0_DDR_DM3

1K 1%

M0_DDR_DQ[6]

P3

A0

R8
R2
T8
R3

NC_3

1%

M0_DDR_DQ[5]

M0_DDR_CASN

M0_DDR_DQS0

R539

M0_DDR_DQ[4]

M0_DDR_RASN

M0_DDR_RESET_N

M0_DDR_DM2

C11

1K

M0_DDR_DQ[3]

M0_DDR_ODT

M0_DDR_WEN

C513

M0_DDR_DQ[2]

P7

L2

M0_DDR_DM1

D9

D22
M0_DDR_DQ[1]

N3

DDR3
4Gbit
(x16)

M0_DDR_DM0

C20

M0_DDR_DM[3]
M0_DDR_DQ[0]

1K 1%

M0_DDR_DQS_N3

0.1uF

M0_DDR_DM[2]

R514

M0_DDR_DQS3

D10
D18

M0_DDR_DM[1]

R515

M0_DDR_DQS_N2

C10

1K

M0_DDR_DQS2

C504

A11
B11

1%

M0_DDR_DQS_N1

M0_DDR_DQS_N[3]
M0_DDR_DM[0]

0.1uF

D19

R516

M0_DDR_DQS[3]

M0_DDR_CKE

M0_DDR_DQS1

1K 1%

M0_DDR_DQS_N[2]

C19

1%

M0_DDR_DQS[2]

M0_DDR_DQS_N0

R517

M0_DDR_DQS_N[1]

A20

1K

M0_DDR_DQS[1]

M0_DDR_DQS0

C505

M0_DDR_DQS_N[0]

M0_D_CLK
M0_D_CLKN

B20
M0_DDR_DQS[0]

N3
P7
P3

P2

M0_DDR_A11

E13

M0_DDR_A[15]
M0_DDR_BA[0]

DDR_HYNIX
IC500-*1
H5TQ4G63AFR-PBC

M0_DDR_VREFCA

VSSQ_1

D7
C3
C8
C2
A7
A2
B8
A3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2
E8
F9
G1
G9

M0_DDR_DQ24

D12

M0_DDR_DQ25

D8

M0_DDR_DQ26

B13

M0_DDR_DQ27

C9

M0_DDR_DQ28

C12

M0_DDR_DQ29

C8

M0_DDR_DQ30

D11

M0_DDR_DQ31

M0_DDR_DQ[31]

Real USE : 1Gbit


H5TQ1G63DFR-PBC(x16)

IC100
LG1154D_H13D

1Gbit : T7(NC_6)
N6

U6
M6

M1_DDR_A15
M1_DDR_BA0

V6

M1_D_CLKN

N5

M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
VDDC15_M1

1%

F4
P1
P2
R3
R4

M1_DDR_DQS_N[3]
G4
M1_DDR_DM[0]
M1_DDR_DM[1]
M1_DDR_DM[2]

E3
T4
P3

M1_DDR_DM[3]
C4
M1_DDR_DQ[0]
M1_DDR_DQ[1]
M1_DDR_DQ[2]
M1_DDR_DQ[3]
M1_DDR_DQ[4]
M1_DDR_DQ[5]
M1_DDR_DQ[6]
M1_DDR_DQ[7]
M1_DDR_DQ[8]
M1_DDR_DQ[9]
M1_DDR_DQ[10]
M1_DDR_DQ[11]
M1_DDR_DQ[12]
M1_DDR_DQ[13]
M1_DDR_DQ[14]
M1_DDR_DQ[15]
M1_DDR_DQ[16]
M1_DDR_DQ[17]
M1_DDR_DQ[18]
M1_DDR_DQ[19]
M1_DDR_DQ[20]
M1_DDR_DQ[21]
M1_DDR_DQ[22]
M1_DDR_DQ[23]
M1_DDR_DQ[24]
M1_DDR_DQ[25]
M1_DDR_DQ[26]
M1_DDR_DQ[27]
M1_DDR_DQ[28]
M1_DDR_DQ[29]
M1_DDR_DQ[30]
M1_DDR_DQ[31]

K3
B3
J4
A3
K2
B4
K1
J3
D4
H4
C3
G3
D3
H3
E4
M3
V4
M4
W3
L4
W4
L3
Y2
V3
N4
U4
M2
T3
N3
U3
P4

0.1uF

1%

R531
R532

M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N

P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A2
A3

M3

K1
J3
K3
L3

M1_DDR_DQS0

M1_DDR_DQS_N1

M1_DDR_DQS_N0

M1_DDR_DQS2
M1_DDR_DQS_N2

M1_DDR_DQS1

M1_DDR_DQS3

M1_DDR_DQS_N1

M1_DDR_DQS_N3
VDDC15_M1

VDDC15_M1

M1_DDR_DM0

M1_DDR_DM0
M1_DDR_DM1

M1_1_DDR_VREFDQ

M1_DDR_VREFDQ

M1_DDR_DM2
M1_DDR_DM3
M1_DDR_DQ0
M1_DDR_DQ2
M1_DDR_DQ4
M1_DDR_DQ5

M1_DDR_DM1
M1_DDR_DQ0
M1_DDR_DQ1
M1_DDR_DQ2
M1_DDR_DQ3

M1_DDR_DQ1
M1_DDR_DQ3

R7
N7
T3
T7

H1

H5TQ4G63AFR-PBC

L8
ZQ

M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14

M1_DDR_DQ4
M1_DDR_DQ5
M1_DDR_DQ6
M1_DDR_DQ7
M1_DDR_DQ8
M1_DDR_DQ9
M1_DDR_DQ10
M1_DDR_DQ11
M1_DDR_DQ12
M1_DDR_DQ13
M1_DDR_DQ14
M1_DDR_DQ15

H8
G2
H7

C3
C2
A7
A2
B8
A3

K3
L3

BA0

VDD_2

A11

VDD_3

A12/BC

VDD_4

A13

VDD_5

A14

VDD_6

A15

VDD_7
VDD_8

BA0

G3

B7

D9

VDDQ_2

CK

VDDQ_3

CKE

VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

G7

VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS
CAS

VDDQ_8

K2
K8
N1
N9
R1
R9

A8
C1
C9
D2
E9
F1
H2

C529

0.1uF

H9

C530

0.1uF

VDDQ_9
J1
NC_1
NC_2

J9
L1
L9

NC_4

A8
C1

E9

H9

NC_2

F2
F8
H3
H8
G2
H7

VSS_1

DQSU

VSS_2

DML

VSS_4

VSS_3
VSS_5
VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

VSSQ_1

D7
C3
C2
A7
A2
B8
A3

M1_DDR_A6

J9
L1

M1_DDR_A7
M1_DDR_A8

B3

M1_DDR_A9

E1
G8
J2
J8

M1_DDR_A10

M1
M9
P1

M1_DDR_A11

P9
T1
T9

M1_DDR_A12

B1

M1_DDR_A13

DQL6
DQL7

C8

M1_DDR_A5

L9

A9

DMU

M1_DDR_A4

F1
H2

DQSL

E3
F7

M1_DDR_A3

C9
D2

NC_4

DQSU

M1_DDR_A2

J1
NC_1

E7
D3

A1
VDDQ_1

CKE

N1
N9

A1
VDDQ_1

CK

M1_DDR_A1

R1
R9

DQSL

BA1

CK

G7
K2
K8

VDD_9

C7

VDD_9

CK

D9

BA1

WE

B2

A10/AP

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2

M1_DDR_A14

E8
F9
G1

M1_DDR_A15
M1_DDR_BA0
M1_DDR_BA1
M1_DDR_BA2
M1_U_CLK
M1_U_CLKN
M1_DDR_CKE

M1_DDR_ODT
M1_DDR_RASN
M1_DDR_CASN
M1_DDR_WEN
M1_DDR_RESET_N

A9
VSS_1
VSS_2

DML

VSS_4

DMU

VSS_5

VSS_3

VSS_6
DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

B3

M1_DDR_DQS3

E1

M1_DDR_DQS_N3

G8
J2

M1_DDR_DM2

J8

M1_DDR_DM3

M1
M9

M1_DDR_DQ16

P1

M1_DDR_DQ17

P9

M1_DDR_DQ18

T1

M1_DDR_DQ19

T9

M1_DDR_DQ20
M1_DDR_DQ21

DQL6

M1_DDR_DQ22

DQL7

M1_DDR_DQ23

B1
VSSQ_1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3

M3

K1
J3
K3
L3

R7
N7
T3
T7
M7

H1

B9
D1

M1_DDR_DQ24

D8

M1_DDR_DQ25

E2

M1_DDR_DQ26

E8

M1_DDR_DQ27

F9

M1_DDR_DQ28

G1

M1_DDR_DQ29

G9

M1_DDR_DQ30
M1_DDR_DQ31

A0

A3

N8

H1
VREFDQ

A4
A5
A6

L8
ZQ

A7
A8
A9
A10/AP
A11

B2
VDD_1
VDD_2
VDD_3

A12/BC

VDD_4
VDD_5

A14
A15

M3

VREFCA

A1
A2

A13

VDD_6
VDD_7
VDD_8

M2

VREFDQ

BA0

A5
A6

R545

ZQ

K1

240

J3
K3
L3

VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

WE

A7

G3

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12/BC

VDD_4
VDD_5

A14

VDD_6

A15

VDD_7
VDD_8

BA0

B7

D9

VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

VDDQ_9

RESET

NC_2

K2
K8
N1
N9
R1
R9

A8
C1
C9
D2
E9
F1
H2

C561

0.1uF

H9

C562

0.1uF

J9
L1
L9

NC_4

F3

DQSU

VSS_2
VSS_4

VSS_3

F2
F8
H3
H8
G2
H7

VSS_5
VSS_6

E3
F7

VSS_1

DML
DMU

G7

J1
NC_1

T2

H9

J9
L1
L9

A9
DQSU

E7
D3

A1
VDDQ_1

CKE

E9
F1
H2

DQSL
DQSL

BA1

CK

A8
C1
C9
D2

NC_4

C7

VDD_9

CK

NC_2
NC_3

B2

A9

A13

RESET

F3

A8

N1
N9
R1
R9

J1
NC_1

T2

VDDC15_M1

G7
K2
K8

A1
VDDQ_1

CK
CK
CKE

L2

L8

D9

VDD_9

BA1

J7
K7
K9

WE

G3

R2
T8
R3
L7

A4

J7
K9

P2
R8

VREFCA

BA2

K7

M1_1_DDR_VREFDQ

BA2

M2
N8

DDR3
4Gbit
(x16)

M8

NC_3
M1_DDR_DQS2
M1_DDR_DQS_N2

DQSU

P7

L2

DQSL
DQSU

N3

G9

DQSL

D7
C8

VDD_6
VDD_7
VDD_8

RESET

VDD_1

E3

H3

A14

T2

A9

E7

F8

VDD_2
VDD_3
VDD_4
VDD_5

F3

C7

F2

A10/AP
A11

NC_3

F3

F7

K1
J3

P8

M1_DDR_A0
B2
VDD_1

A12/BC

L2

240

VDDC15_M1

A7

RESET

D3

R543

N2

L8
ZQ

A13
A15

N8

P7
P3
H1

VREFDQ

A7

M8

N3

VREFCA

A8
A9

J7

A8

T2

B7

A3
A4
A5
A6

M2

K9

A5
A6

A0
A1
A2

BA2

WE

G3

M7

VREFDQ

NC_3

M1_DDR_DQS1

R2
T8
R3
L7

K7

J7
K9

P8
P2
R8

VREFCA

BA2

K7

N2

M1_DDR_VREFDQ

A4

M2
N8

M8

M3

M1_DDR_DQS_N0

0.1uF

M1_DDR_DQS[3]

F3

R533

M1_DDR_DQS_N[2]

E1

R512

M1_DDR_DQS[2]

R513

M1_DDR_DQS[1]
M1_DDR_DQS_N[1]

M1_DDR_DQS0

1K

R501

N2

A1

L2
M1_DDR_ODT

M1_DDR_RESET_N
240

1K 1%

M1_DDR_WEN

K5

M1_D_CLK
M1_D_CLKN
M1_DDR_CKE

1K 1%

H6

M1_DDR_RESET_N

M1_DDR_DQS_N[0]

M1_1_DDR_VREFCA

C508

M1_DDR_CASN

P3

A0

VDDC15_M1
M1_DDR_VREFCA

M1_DDR_ODT
M1_DDR_RASN

G5

E2

M1_DDR_BA2

M1_DDR_CKE

F5

M1_DDR_WEN

M1_DDR_DQS[0]

M1_DDR_A14

M1_D_CLK

F2

F6

M1_U_CLKN

M1_U_CLKN

F1

M1_DDR_ZQCAL

M1_DDR_A12

1%

M1_DDR_CASN

M1_DDR_A11

M1_U_CLK

R1

G6
M1_DDR_ODT

M1_D_CLKN

M1_DDR_BA2

M1_DDR_CKE

M1_DDR_RASN

M1_DDR_A10

M1_DDR_A13

M1_DDR_BA1

M5

M1_DDR_A9

M1_U_CLK

M1_D_CLK

R534

M1_DDR_D_CLKN

M1_DDR_A8

1K

M1_DDR_D_CLK

M1_DDR_A7

M1_DDR_A14

P6

R2
M1_DDR_U_CLKN

M1_DDR_A6

M1_DDR_A13

T6

M1_DDR_BA[2]
M1_DDR_U_CLK

M1_DDR_A4

M1_DDR_A12

L5

H5
M1_DDR_BA[1]

M1_DDR_A3

M1_DDR_RESET_N

M1_DDR_A11

P5

10K

M1_DDR_A5

M1_DDR_A10

R5

M1_DDR_A2

10K

M1_DDR_A9

V5

M1_DDR_A[15]
M1_DDR_BA[0]

R521

M1_DDR_A8

R540

P7

DDR3
4Gbit
(x16)

DDR3 1.5V bypass Cap - Place these caps near Memory

M1_DDR_A7

N3

DDR3 1.5V bypass Cap - Place these caps near Memory

K6

C509

M1_DDR_A[14]

M1_DDR_A1

100
R530

M1_DDR_A[13]

M1_DDR_A0

M1_DDR_A6

100
R518

M1_DDR_A[12]

T5

0.1uF

M1_DDR_A[11]

M1_DDR_CKE

M1_DDR_A5

0.1uF

M1_DDR_A[10]

J5

VDDC15_M1

R510

M1_DDR_A[9]

P3

M1_DDR_A4

1K 1%

M1_DDR_A[8]

DDR_HYNIX
IC503-*1

M1_1_DDR_VREFCA

M8

N3
P7

M1_DDR_A3

U5

1%

M1_DDR_A[7]

J6

R511

M1_DDR_A[6]

H5TQ4G63AFR-PBC

1K

M1_DDR_A[5]

DDR_SAMSUNG
IC503
K4B4G1646B-HCK0

4Gbit : T7(A14)
DDR_HYNIX
IC501-*1

M1_DDR_VREFCA

M1_DDR_A2

C500

M1_DDR_A[4]

L6

1K 1%

M1_DDR_A[3]

M1_DDR_A1

1%

M1_DDR_A[2]

DDR_SAMSUNG
IC501
K4B4G1646B-HCK0

M1_DDR_A0

R6

1K

M1_DDR_A[1]

C501

M1_DDR_A[0]

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C2
A7
A2
B8
A3

J8
M1
M9
P1
P9
T1
T9

B1
VSSQ_1

D7
C3
C8

B3
E1
G8
J2

DQL6
DQL7
DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2
E8
F9
G1
G9

DQSL
DQSL

C7
B7

A9
DQSU

VSS_1

DQSU

VSS_2
VSS_3

E7
D3

DML

VSS_4

DMU

VSS_5
VSS_6

E3
F7
F2
F8
H3
H8
G2
H7

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSS_12

C2
A7
A2
B8
A3

G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
VSSQ_1

D7
C8

E1

DQL6
DQL7

C3

B3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

VSSQ_9

B9
D1
D8
E2
E8
F9
G1
G9

M1_DDR_DQ15
M1_DDR_DQ16
M1_DDR_DQ17
M1_DDR_DQ18
M1_DDR_DQ19
M1_DDR_DQ20
M1_DDR_DQ21
M1_DDR_DQ22
M1_DDR_DQ23
M1_DDR_DQ24
M1_DDR_DQ25
M1_DDR_DQ26
M1_DDR_DQ27
M1_DDR_DQ28
M1_DDR_DQ29
M1_DDR_DQ30
M1_DDR_DQ31

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

BSD-NC4_H005-HD
2012-09-14
MAIN DDR

LGE Internal Use Only

+5V_CI_ON

R711
10K
OPT

R712
10K
OPT

CI_DATA[0-7]
CI
JK700
10120698-015LF

R716

/CI_CD1
CI_TS_DATA[3]

R708
10K
OPT

R706
10K
OPT

100
CI

/PCM_WAIT

R700

33 OPT

CI_DATA[6]

CI_TS_DATA[6]
CI_TS_DATA[7]

CI_DATA[7]
CI R721

41

R707
10K
OPT

CI_ADDR[10]

43

44

10

CI_ADDR[11]

45

11

CI_ADDR[9]

46

12

CI_IN_TS_DATA[0]

47

13

CI_IN_TS_DATA[1]

48

14

CI_IN_TS_DATA[2]

49

15

CI_IN_TS_DATA[3]

50

16

51

17

52

18

0
OPT

0
OPT

R722
C706
0

R718

0.1uF
CI

CI_IN_TS_DATA[6]

55

21

CI_IN_TS_DATA[7]

56

22

57

23

58

24

59

25

60

26

61

27

62

28

63

29

64

30

CI_DATA[0]

65

31

CI_DATA[1]

66

32

67

33

68

34

CI_TS_SYNC
CI_TS_DATA[1]
CI_TS_DATA[2]
/CI_CD2

R717 CI 100

/PCM_CE2
R713

G2

69

C707
0.1uF
16V

CI
AR712

CI_DATA[1]

EB_DATA[0]
EB_DATA[1]

CI_DATA[2]

EB_DATA[2]

33

EB_DATA[3]

CI_DATA[3]

CI_ADDR[8]

R723
10K
CI

CI_ADDR[13]
CI_ADDR[14]

R725
10K
OPT

CI_DATA[4]

/PCM_WE

33
OPT

/PCM_IRQA

33

CI
AR713

EB_DATA[4]

CI_DATA[5]

EB_DATA[5]

CI_DATA[6]

EB_DATA[6]

CI_DATA[7]

EB_DATA[7]

EB_DATA[0-7]

OPT

20

CI_TS_VAL

CI

+5V_CI_ON

CI_DATA[0]

CI_ADDR[9]

CI_ADDR[13]

19

CI_TS_DATA[0]

CI_ADDR[11]

CI_ADDR[14]

54

0 CI

CI_ADDR[10]

CI_ADDR[8]

53

R714

R724
10K
OPT
/PCM_OE

CI_IN_TS_DATA[5]

/PCM_REG

PCM_INPACK

+5V_CI_ON

33

42
R710

R715

R709
10K
CI

CI_VS1

CI_DATA[5]

CI_TS_CLK

PCM_INPACK

CI_DATA[4]

40

CI_IN_TS_DATA[4]

33 CI
33 CI

CI_DATA[3]

39

+5V_CI_ON

R702

37
38

/PCM_CE2
CI_VS1

R701

36

CI_TS_DATA[4]

CI_IN_TS_DATA[0-7]

PCM_RESET

/PCM_CE1

35

CI_TS_DATA[5]

/PCM_IORD
/PCM_IOWR

R704
10K
OPT

R720
10K
OPT

EB_DATA[0-7]

+5V_CI_ON

C703
4.7uF
10V
CI

CI_DATA[0-7]

C702
0.1uF
CI

CI_DATA[0-7]
CI_ADDR[12]
CI_ADDR[7]
CI_ADDR[6]
CI_ADDR[5]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[0]

CI_ADDR[7]
CI_ADDR[5]

CI_ADDR[4]

CI_ADDR[1]

CI_ADDR[12]
CI_ADDR[6]
CI_ADDR[4]
CI_ADDR[3]
CI_ADDR[2]
CI_ADDR[1]
CI_ADDR[0]

+5V_CI_ON

CI_DATA[2]
R719

10K
OPT

G1

OPT

CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
C705
12pF
50V
OPT

TPO_DATA[0-7]

CI
AR701
TPO_DATA[0]

33
CI_IN_TS_DATA[0]

TPO_DATA[1]

CI_IN_TS_DATA[1]

TPO_DATA[2]

CI_IN_TS_DATA[2]

TPO_DATA[3]

CI_IN_TS_DATA[3]

TPO_DATA[4]

CI_IN_TS_DATA[4]

TPO_DATA[5]

CI_IN_TS_DATA[5]

TPO_DATA[6]

CI_IN_TS_DATA[6]

TPO_DATA[7]

CI_IN_TS_DATA[7]
AR706 CI
33

33

TPO_CLK

CI
AR705
CI_IN_TS_CLK

TPO_SOP

CI_IN_TS_SYNC
CI_IN_TS_VAL

TPO_VAL

33

CI
AR707

33

CI
AR711
EB_ADDR[12]

EB_ADDR[0]

CI_ADDR[12]

CI_ADDR[1]

EB_ADDR[1]

CI_ADDR[13]

EB_ADDR[13]

CI_ADDR[2]

EB_ADDR[2]

EB_ADDR[14]

CI_ADDR[3]

EB_ADDR[3]

CI_ADDR[14]
/PCM_REG

CI_ADDR[0]

CI_ADDR[4]

33

CAM_REG_N

CI
AR708
EB_ADDR[4]

CI_ADDR[5]

EB_ADDR[5]

/PCM_OE

CI_ADDR[6]

EB_ADDR[6]

/PCM_WE

CI_ADDR[7]

EB_ADDR[7]

/PCM_IORD
/PCM_IOWR

33

CI
AR710
EB_OE_N
EB_WE_N
EB_BE_N1
EB_BE_N0

+5V_NORMAL

CI_ADDR[8]

AR702

10K

10K

R705

R703

CI_ADDR[9]

/PCM_WAIT

EB_ADDR[8]
EB_ADDR[9]

CI_ADDR[10]

EB_ADDR[10]

CI_ADDR[11]

EB_ADDR[11]

CAM_WAIT_N
CAM_IREQ_N

/PCM_IRQA
/CI_CD2
/CI_CD1

33

CI
AR709

100

CAM_CD2_N
CAM_CD1_N

CI
C700
0.1uF
16V

CI
C701
0.1uF
16V

AR703 CI
PCM_INPACK

CAM_INPACK_N
TPI_CLK

CI_TS_CLK
CI_TS_VAL

100

TPI_VAL
TPI_SOP

CI_TS_SYNC

C704
12pF
50V
OPT

AR704 CI
CI_TS_DATA[7]
CI_TS_DATA[6]

TPI_DATA[7]
TPI_DATA[6]

CI_TS_DATA[5]

TPI_DATA[5]

CI_TS_DATA[4]

100

TPI_DATA[4]

AR700 CI
CI_TS_DATA[3]

TPI_DATA[3]
TPI_DATA[2]

CI_TS_DATA[2]
CI_TS_DATA[1]
CI_TS_DATA[0]

100

TPI_DATA[1]
TPI_DATA[0]

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

BSD-NC4_H007-HD
2012-10-20
PCMCIA

LGE Internal Use Only

+12V
UBW2012-121F
L2303

C2306
0.1uF
50V

PDIM#1

PDIM#2

GND

GND

24V

10

24V

GND

11

12

GND

12V

13

14

12V

12V

15

16

24V

GND

17

18

GND

19

20

21

19

23

L/DIM0_MOSI

R2309
100

INV_CTL

C2333
10uF
16V

PWM_DIM
PWM_DIM2

L2306
UBW2012-121F

+24V

C2316
0.1uF
50V

R2346
5.6K

INV ON

R2314
10K

22

L/DIM0_VS

24

L/DIM0_SCLK

POWER_DET

RESET

C2355
0.1uF
16V

GND
C2365
0.1uF
16V

C2347
0.1uF
50V
PD_20_24V
R2336
100K

+24V

not to RESET at 8kV ESD


Q2301
MMBT3904(NXP)

PANEL_CTL

R2338
10K
OPT

IC2307

PD_+12V
R2326
1.2K
1%

LVDS_DISCHARGE

3.5V

C2307
0.1uF
16V

LVDS_DISCHARGE
R2347
5.6K

PWR ON 1
3.5V
3

+3.5V_ST

NCP803SN293
VCC

R2317
33K

L2304
UBW2012-121F

R2337
100K

PD_+3.5V
R2330
0
5%

Q2302
AO3407A

R2310
1K

P2300
SMAW200-H18S1
POWER_WAFER_18PIN

+3.5V_ST

PD_+12V
R2325
2.7K
1%

PANEL_VCC
C2331
0.1uF
50V

+3.3V_NORMAL

R2318
5.6K

MMBT3906(NXP)

+12V
L2313
UBW2012-121F

3
+3.5V_ST

Power_DET

PANEL_POWER
+12V

Q2300

R2300
10K

RL_ON

10K
R2301

+3.5V_ST

PD_20V
R2327-*1
5.6K
1%

PD_24V
R2327
8.2K
1%

PD_20V
R2328-*1
1.3K
1%

PD_24V
R2328
1.5K
1%

PD_20_24V
IC2308
NCP803SN293
VCC

25
P2301
SMAW200-H24S2
POWER_WAFER_24PIN

C2356
GND
0.1uF
16V
PD_20_24V

RESET

24V-->3.48V
20V-->3.51V
12V-->3.58V
ST_3.5V-->3.5V

+2.5V
+2.5V_Normal

IC2302
AP7173-SPG-13 HF(DIODES)

DDR MAIN 1.5V

[EP]

LG1154D

0.1uF
16V

BOOT

PWRGD

IC2303
TPS54821RHL

VSENSE

8A

R2316
8

COMP

C2313
4.7uF
16V

C2315

4700pF

+3.3V_NORMAL

1K

+12V

NC_2

+24V

POWER_ON/OFF2_2
FB
L2314

OLED

L2311

C2309
10uF
35V

BOOT

PGOOD

ZD2303
5V

OPT

10

DCDC_RT

9
6

SW_2

SW_1

SS/TR

8
RT/SYNC

AGND

5A

VIN

C2330
22uF
10V

C2334
22uF
10V

C2336
10uF
10V

C2338
0.1uF
50V

GND

EN

POWER_ON/OFF1

C2311
0.1uF
50V

R2345
10K
1%

BLM18PG121SN1D

Vout=0.6*(1+R1/R2)

BLM18PG121SN1D
NON_OLED

Vout(1.24V)=0.6*(1+16k/15k)

L2305

SS/TR

50V

1/16W
1%

R2

SW_3

L2310
4.7uH

40V

L2312
4.7uH

SW
D2300
B540C

10

NC_1
VIN

11

[EP]GND

EN

C2324
0.01uF
50V
BOOT

IC2304
RT8289GSP

THERMAL

R1

PVIN_2

12

R2

51K
R2344

C2335
0.1uF
16V

R1

1%

C2302
180pF
50V

R2305
15K

+3.3V_NORMAL

C2323
22uF
10V

R2343
16K

GND

Vout=0.765*(1+R1/R2)

+12V

C2341
22uF
10V

ZD2302
5V

C2303
10uF
16V

R2

Switching freq: 700K

C2322
22uF
10V

PH_1

OPT

11

50V

BOOT

SW

13

14

IC2305-*1
RT8079AGQW

+5V_NORMAL

L2308
1uH

0.1uF
16V

PH_2

C2321

12

22000pF

1/16W
5%

SS

PVIN_1

15

THERMAL
17

C2318

BOOT

[EP]GND

VIN

GND_2

+5.0V normal & USB

+1.1V_VDD
13

R2315 0

FB

PVCC

C2312
3300pF
50V

C2310
1uF
10V

1%

C2319
22uF
10V

GND_1

3A $ 0.145
Vout=0.827*(1+R1/R2)=1.521V

PWRGD

50V

33K

C2317
22uF
10V

14

C2320

R2306

GND

GND_1

47pF

3A

1/16W
1%

1.3K

EN

SS

16
VIN_1

[EP]GND

R2313

IC2300-*1
RT7266ZSP

RT/CLK

GND_2

+1.1V_VDD

DCDC_RT

R2307
120K

15

ZD2300
5V

NR5040T2R2N
L2307
2.2uH

1/16W
1%

L2301

R2303
16K

SW

16V
0.1uF
C2314

C2308
100pF
50V

VBST

+12V

THERMAL

VREG5

R2302
11K

DCDC_TI

THERMAL

R1

VIN

OPT

TPS54327DDAR [EP]GND

THERMAL

DCDC_TI IC2300

VFB

R2
R2340
56K
1/16W
1%

+1.1V_CORE

+1.0V_VDD

BLM18PG121SN1D

1%

50V

VIN_2

L2300

EN

5%

LG1154A

+1.0V_VDD

DCDC_TI
C2364
100pF
50V

C2360
4700pF

R2334
15K

POWER_ON/OFF2_3

R1

EN

0.01uF
50V

1/16W

R2304
10K

C2362
22uF
10V

R2335
1/16W 330K 5%

+12V

C2301
10uF
16V

C2361
22uF
10V

[EP]GND

AGND

3A

C2359

SS/TR

VIN_3

PH_1

COMP

3 IC2305 DCDC_TI10
TPS54319TRE
4
9

L2320
3.3uH
NR5040T3R3N

FB

11

PH_2

GND_1
GND_2

Vout=0.8*(1+R1/R2)

PH_3

THERMAL
17

R2339

C2350
10uF
10V

12

VIN_2

47K 1%

C2300
22uF
10V

13

VIN_1
C2305
0.1uF
16V

16V

14

L2318

R2321
2K
1% R2

C2337
2200pF
50V

GND

+1.5V_DDR

C2358
0.1uF

C2348
0.1uF
16V

COMP

C2346
10uF
10V

RT/CLK

1.5A

OPT
C2343
22uF
10V

EN

R2322
R1
4.3K
1%

SS

VIN_3

EN

15

R2312
10K

POWER_ON/OFF2_1

L2302
BLM18PG121SN1D

C2327
10uF
10V

C2354

+3.5V_ST

VCC

POWER_ON/OFF2_2

FB

VSENSE

+5V_NORMAL
3.3V_EMMC

EP[GND]

OUT

16

+3.3V_NORMAL

PG

eMMC POWER

1
THERMAL

IN

10K
R2331

+3.3V_NORMAL

POWER_ON/OFF1
1%

R1

VFB

VREG5

C2325
100pF
50V

VIN

VBST

SW

16V
0.1uF
C2332
L2309
3.6uH
SM-8040

SS
R2319
15K
1%

Switching freq: 700K

R2308
51K

OPT

EN

THERMAL

R2311
10K

OPT

IC2301
TPS54327DDAR [EP]GND

C2326
1uF
10V

3A

GND

C2339
22uF
10V

C2340
22uF
10V

ZD2301
5V

C2329
150pF
50V

C2304
10uF
16V

Vout=1.222*(1+R1/R2)
POWER UP SEQUENCE
5V/3.3V->2.5V->1.5V/1.1V->1.0V
LG1154D
: 3.3V->2.5V->1.5V->1.1V
LG1154AN : 3.3V->2.5V->1.0V

C2328
3300pF
50V

R2

Vout=0.765*(1+R1/R2)

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

BSD-NC4_H023-HD
LG1154

2012-12-07

POWER
LGE Internal Use Only

Renesas MICOM
For Debug

32.768KHz
2

HDMI_WAUP:HDMI_INIT

MICOM_DEBUG

MICOM_DEBUG

X3000

R3028

LOGO_LIGHT
LOGO_LIGHT

8pF
C3003

MICOM_RESET

8pF

Dont remove R3014,


not making float P40

C3002

R3016 1K

P3000
12507WS-04L

R3014 10K

MICOM_DEBUG

MICOM_DEBUG

+3.5V_ST

+3.5V_ST

MHL_DET

MICOM_RESET

4.7M
OPT

R3030

P120/ANI19

MICOM_RESET_SW
SW3000
JTP-1127WEM
270K
OPT

P124/XT2/EXCLKS
41

37

P123/XT1
42

P41/TI07/TO07

P137/INTP0
43

P40/TOOL0

P122/X2/EXCLK
44

C3001
+3.5V_ST

38

P121/X1
45

C3000
0.1uF

C3004
0.1uF
16V

39

REGC
46

Commercial

RESET

VSS
47

0.47uF

VDD
48

Ready For
+3.5V_ST

R3031

MICOM_RESET_22OHM
R3029
22

GND

40

10K

R3032

10K

MHL_DET

ST_BY_DET_CAM

ST_BY_DET_CAM

MICOM_RESET_33OHM
R3029-*1 33

R3021
10K

GP4 High/MID Power SEQUENCE


P60/SCLA0

36

P140/PCLBUZ0/INTP6

P61/SDAA0

35

P00/TI00/TXD1

P62

34

P01/TO00/RXD1

33

P130

IC3000

32

P20/ANI0/AVREFP

R5F100GEAFB

31

P21/ANI1/AVREFM

30

P22/ANI2

I2C_SCL_MICOM

POWER_ON/OFF!
I2C_SDA_MICOM
EDID_WP

POWER_ON/OFF2_1

EDID_WP

P63

P31/TI03/TO03/INTP4

P75/KR5/INTP9/SCK01/SCL01

P74/KR4/INTP8/SI01/SDA01

PANEL_CTL
WOL/WIFI_POWER_ON
IR

POWER_ON/OFF2_2

HDMI_CEC

KEY1
MODEL1_OPT_1

29

P23/ANI3

28

P24/ANI4

10

27

P25/ANI5

P70/KR0/SCK21/SCL21

11

26

P26/ANI6

P30/INTP3/RTC1HZ/SCK11/SCL11

12

25

P27/ANI7

P71/KR1/SI21/SDA21
EYE_SCL
CAM_PWR_ON_CMD

KEY2

P72/KR2/SO21
EYE_SDA

CAM_PWR_ON_CMD

SCART_MUTE
POWER_ON/OFF2_4

POWER_ON/OFF2_1

POWER_ON/OFF2_3

POWER_ON/OFF2_4

MICOM_LEAD_Au

SCART_MUTE
POWER_ON/OFF2_4

P73/KR3/SO01
POWER_ON/OFF2_2

POWER_ON/OFF2_3

RL_ON

MODEL1_OPT_4
MODEL1_OPT_0
SIDE_HP_MUTE
MODEL1_OPT_3
MODEL1_OPT_2

P21/ANI1/AVREFM

P74/KR4/INTP8/SI01/SDA01

30

P22/ANI2

29

P23/ANI3

MICOM_LEAD_Cu

26

P26/ANI6

P30/INTP3/RTC1HZ/SCK11/SCL11

12

25

P27/ANI7

P147/ANI18

P146

P10/SCK00/SCL00

P11/SI00/RXD0/TOOLRXD/SDA00

P12/SO00/TXD0/TOOLTXD

P13/TXD2/SO20

P14/RXD2/SI20/SDA20

P15/PCLBUZ1/SCK20/SCL20

P16/TI01/TO01/INTP5

P17/TI02/TO02

13
P50/INTP1/SI11/SDA11

MICOM_NON_LOGO_LIGHT
R3012
10K

MICOM_TACT_KEY
R3008
10K

MICOM_LCD/OLED
R3005
10K

MICOM_GP3_12/15PIN
R3004
10K

MICOM_M13
R3001
10K

MICOM_NON_GED
R3000
10K

P51/INTP2/SO11

MODEL1_OPT_5

24

11
23

P25/ANI5

P70/KR0/SCK21/SCL21

22

27

21

10

20

P71/KR1/SI21/SDA21

19

P24/ANI4

MODEL1_OPT_4

18

28

17

16

P72/KR2/SO21

15

MODEL1_OPT_3

14

P73/KR3/SO01

24

23

22

P146

20

19

18

17

16

15

14

21

P10/SCK00/SCL00

P147/ANI18
CAM_CTL

31

CAM_CTL

R5F100GEAFB#30

MODEL1_OPT_5

AMP_MUTE

P20/ANI0/AVREFP

P75/KR5/INTP9/SCK01/SCL01

SOC_RX

32

P11/SI00/RXD0/TOOLRXD/SDA00

P130

IC3000-*1

33

P13/TXD2/SO20

P120/ANI19
37

P31/TI03/TO03/INTP4

P12/SO00/TXD0/TOOLTXD

P41/TI07/TO07
38

P01/TO00/RXD1

P63

SOC_TX

P40/TOOL0
39

P00/TI00/TXD1

34

INV_CTL

RESET
40

P140/PCLBUZ0/INTP6

35

P14/RXD2/SI20/SDA20

P124/XT2/EXCLKS

36

P62

P15/PCLBUZ1/SCK20/SCL20

P123/XT1

P61/SDAA0

P16/TI01/TO01/INTP5

P137/INTP0

41

P60/SCLA0

SOC_RESET

GED

Ready for sample set

WOL_CTL

MODEL1_OPT_2

NON_GED

Need to Assign ADC port

LED_R

MODEL1_OPT_1

MODEL_OPT_5

Ready for sample set

For CEC
LED_R

MODEL1_OPT_0

P122/X2/EXCLK

H13

42

M13

43

MODEL_OPT_4

44

IR_wafer(10pin)

45

PDP

IR_wafer(12/15)

P121/X1

LCD / OLED

MODEL_OPT_3

REGC

MODEL_OPT_2

VSS

TOUCH_KEY

VDD

TACT_KEY

For LOGO LIGHT

46

MODEL_OPT_1

LOGO

47

NON LOGO

48

MICOM_OLED_FRC
R3007-*2
22K

MICOM_OLED_MAIN
R3007-*1
56K

MICOM_LOGO_LIGHT
R3013
10K

MICOM_TOUCH_KEY
R3010
10K

MICOM_PDP
R3007
10K

MICOM_H13
R3003
10K

MICOM_NC4_8PIN
R3006
10K

MICOM_GED
R3002
10K

MODEL_OPT_0

P17/TI02/TO02

POWER_DET

+3.5V_ST

POWER_ON/OFF1

MICOM MODEL OPTION

P51/INTP2/SO11

13

MICOM MODEL OPTION

WOL/ETH_POWER_ON

P50/INTP1/SI11/SDA11

EYE_Q_10P

R3035
3.3K

+3.5V_ST

EYE_Q_10P
R3036
3.3K

SOC_RESET

+3.5V_ST

R3034
120K
G

R3033
27K
D3000

Q3001
RUE003N02
HDMI_CEC_FET_ROHM

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

HDMI_CEC

BAT54_SUZHO

CEC_REMOTE

Q3001-*1
SI1012CR-T1-GE3
HDMI_CEC_FET_VISHAY

2012.02.22
MICOM

30

LGE Internal Use Only

CK_GND

D3215
RCLAMP0524PA
1
10

CK+

CK-

12

D1-_HDMI1

D2_GND

D2+

TMDS_CH1-

TMDS_CH1+

D1+_HDMI1
GND_1

TMDS_CH2-

TMDS_CH2+

10

D2_GND

ARC

TX2P

TX2N

TX1P

TX1N

TX0P

TX0N

TXCP

TXCN

TCVDD12

TPVDD12

R0XCN

R0XCP

R0X0N

R0X0P

R0X1N

R0X1P

R0X2N

R0X2P

VDD33_2

[EP]GND

VDD12_3
67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

88

TPWR

59

GPIO1

58

GPIO0

57

CD-SENSE4

11

56

CD_SENSE3

R3XCP

12

55

GPIO2

R3X0N

13

54

CD_SENSE1

R3X0P

14

53

CD_SENSE0

R3X1N

15

52

WKUP

R3X1P

16

51

LPSBV

44
CBUS_HPD4

42

41

43
DSCL4

DSDA4

R3PWR5V

40
CBUS_HPD3

23

38
DSDA3

DSCL3

R1PWR5V

DSCL1

CBUS_HPD1

DSDA1

R0PWR5V

DSCL0

CBUS_HPD0

DSDA0

R4X2P

VDD12_2

R4X2N

R4X1N

R4X1P

39

R4PWR5V

37

45
35

22
36

DSDA5[VGA]

R4XCP

34

DSCL5[VGA]

46
32

47

21
33

20

R4XCN

31

R5PWR5V[VGA]

VDD33_1

29

48

30

19

28

SBVCC5

AVDD12_2

26

PWRMUX_OUT

49

27

50

25

17
18

24

R3X2N
R3X2P

NC_4

NC_3

GND_2

NC_2

NC_1

GND_1

TMDS_CH2-

TMDS_CH2+

10

NC_4

NC_3

GND_2

NC_2

NC_1

D1+_HDMI4

D2+

1/16W
5%

D2+_HDMI4

MHL_DET

Q3200

D3207

JK3203

C3223
0.047uF
25V

HDMI_ESD_SEMTEK

51U019S-312HFN-E-R-B-LG

HDMI1

HDMI S/W OUTPUT

D2+_HDMI1

E MMBT3906(NXP)
Q3201

R3247
10K

R3243
1K

D2-_HDMI4

NC_1

51U019S-312HFN-E-R-B-LG

RESET_N

60

R3XCN

R4X0N
TMDS_CH1+

D1-_HDMI4

GND_2

HDMI_ESD_SEMTEK

CSDA

61

+3.5V_ST
TMDS_CH1-

D2-_HDMI1

JK3202

NC_4

NC_2

CSCL

62

D3214-*1
IP4283CZ10-TBA

D3214
RCLAMP0524PA
1
10

D2-

3
NC_3

10

INT

63

HDMI_ESD_NXP

D1+

HDMI_ESD_NXP
D3211-*1
IP4283CZ10-TBA

IC3201-*1
SII9587CNUC-3

SPDIF_IN

64

D0+_HDMI4

HDMI_ESD_SEMTEK
D1_GND

D3211
RCLAMP0524PA
1
10

D2-

D1-

6
5

D1+

8
9

RSVDL

65

HDMI4 With MHL

MMBT3904(NXP) E

HDMI_RX2+

D0+_HDMI1

HDMI_ESD_SEMTEK

TMDS_CH2+

HDMI_RX1+

D1_GND

66

D0+

NC_1

D0-_HDMI4

D0_GND

10

HDMI_RX2-

GND_1

TMDS_CH2-

HDMI_RX1-

HDMI_RX0+

D1-

TMDS_CH2+

NC_2

HDMI_RX0-

TMDS_CH2-

D0-_HDMI1

D0+

GND_2

TMDS_CH1+

D0-

R1X2N

THERMAL
89

HDMI_ESD_NXP

TMDS_CH1-

CK+_HDMI4

HDMI_CLK-

NC_3

GND_1

D0_GND

NC_4

10

TMDS_CH1+

D3215-*1
IP4283CZ10-TBA

CK-_HDMI4

HDMI_CLK+

TMDS_CH1-

4
5

R1X1P

AVDD12_1

A2

CK+_HDMI1

CK+_HDMI1

11
10

MHL_DET

CK-_HDMI1

D3210-*1
IP4283CZ10-TBA

D0-_HDMI1

HDMI_ESD_NXP

CK-_HDMI1

R1X0P
R1X1N

R1X2P

A1

10K
R3245

1
2

R1X0N

VA3211
ESD_HDMI

VA3210
ESD_HDMI
CEC_REMOTE

CE_REMOTE

13

D0-

22
DDC_SCL_4

14

D3210
RCLAMP0524PA
1
10

CK+

R3223

NC

EAG62611204

11
10

DDC_SDA_4

15

CEC_REMOTE

CK_GND

22

R3222

DDC_CLK

CK-

12
EAG62611204

16

OPT
C3226
0.1uF
16V

CE_REMOTE

13

DDC_DATA

5%
1/16W

EN

D0+_HDMI1

VA3213
ESD_HDMI

ARC
14

OPT
R3249
3.9K

15

10V

OC

D1-_HDMI1

DDC_CLK

SPDIF_OUT_ARC

VA3216
ESD_HDMI

UD
R1XCN
R1XCP

VDD12_1

D1+_HDMI1

16

17

C3202
1uF

DDC_DATA

GND

VA3212
ESD_HDMI

GND

C3208
0.1uF

D2-_HDMI1

17

18

C3205
10uF
10V

1/16W
5%

D2+_HDMI1

GND

5V

HDMI_HPD_4

MHL_ON_OFF

D3204

VA3206
ESD_HDMI

ARC

30V

5.6V

VA3207
ESD_HDMI

OPT
R3248
1K

5V

19

R3254
100

5%
1/16W

DDC_SCL_1

HDMI_FREEPORT HP_DET

R3253
33

OPT

IN

220K
R3206

20
HDMI_FREEPORT HP_DET

OUT

R3246
10K

22

IC3202
TPS2051BDBVR

D3206
MBR230LSFT1G

DDC_SDA_1

20

18

5V_HDMI_4

GND

22

R3208

19

5V_HDMI_4

BODY_SHIELD

R3215
100K

R3207

BODY_SHIELD

+5V_NORMAL

VA3215
ESD_HDMI

VA3208
ESD_HDMI

87

HDMI_HPD_1

R4X0P

33

AVDD12_3

5V_HDMI_1
R3250

HDMI1 With ARC

+5V_NORMAL
5V_HDMI_1

3
2
1

TMDS_CH1+

TMDS_CH2-

D0-_HDMI3

TMDS_CH2+

10

NC_2

HDMI_ESD_SEMTEK

D2+

HDMI_ESD_NXP
D3208-*1
IP4283CZ10-TBA

10

NC_4

TMDS_CLK_SHIELD
NC_3

TMDS_CLKGND_1

TMDS_DATA0TMDS_CLK+

TMDS_CH1+

GND_2

CEC
TMDS_CH2-

D2-_HDMI3

NC_2

RESERVED
TMDS_CH2+

NC_1

SCL

D2+_HDMI3

HDMI_ESD_SEMTEK

SDA
DDC/CEC_GND
VDD[+5V]
HOT_PLUG_DETECT

JK3201

VDD12_3

10K
R3202

67

68

ARC

TX2P
69

70

TX2N

71

TX1P

72

TX1N

TX0P
73

74

TX0N

TXCP

22

45

R4PWR5V
C3209
0.1uF
16V

DSCL4

DSDA4

R3PWR5V

DSCL3

DSDA3

R1PWR5V

CBUS_HPD4

IN

16

10K
R3244

C3215
0.1uF
16V
C3212
1uF
10V

C3222
10uF
10V
C3218
10uF
10V

OUT

17

18

GND/ADJ

19

BODY_SHIELD

TMDS_DATA2+

TMDS_DATA2_SHIELD

TMDS_DATA2-

TMDS_DATA1+

TMDS_DATA1_SHIELD

TMDS_DATA1-

TMDS_DATA0+

TMDS_DATA0_SHIELD

TMDS_DATA0-

TMDS_CLK+

10

TMDS_CLK_SHIELD

11

TMDS_CLK-

12

CEC

13

RESERVED

14

SCL

15

SDA

16

DDC/CEC_GND

17

VDD[+5V]

18

HOT_PLUG_DETECT

19

C3204
0.1uF
16V

C3206
0.1uF
16V

C3207
0.1uF
16V

C3201
10uF
10V

C3203
10uF
10V

C3217
0.1uF
16V

1
2
3
4
5
6
7
8

Vout=0.8*(1+R1/R2)

HDMI4

10
11
12
13
14
15

5V_HDMI_1

5V_HDMI_2

5V_HDMI_4

5V_HDMI_3

16
17

R3231
10

18
19

R3240
10

R3232
10

20
BODY_SHIELD

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

75

DSDA5[VGA]

R4XCP

CBUS_HPD3

15

HDMI_FOOSUNG

20

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

TXCN

TCVDD12

DSCL5[VGA]

46

51U019S-312HFN-E-R-B-LG

HDMI3

76

77

78

TPVDD12

R0XCN
79

R0X0N

R0XCP
80

81

R0X0P
82

R0X1N
83

R0X1P
84

R0X2P

AVDD12_3

R0X2N
85

86

88

47

21
44

48

20

R4XCN

14

DAADR019A

TMDS_DATA0_SHIELD

19

VDD33_1

13

JK3203-*1

TMDS_DATA0+

TMDS_CH1-

R3216
10

R5PWR5V[VGA]

12

DAADR019A

TMDS_DATA1-

D1+_HDMI3

SBVCC5

AVDD12_2

11

JK3202-*1

TMDS_DATA1+

3
D2_GND

10

20

HDMI_FOOSUNG

NC_1

TMDS_DATA2-

D2-

49

IC3200
AZ1117BH-1.2TRE1

GND_2

TMDS_DATA2_SHIELD

D1-_HDMI3

18

NC_3

TMDS_DATA1_SHIELD

D1+

D0+_HDMI3

D3208
RCLAMP0524PA
1
10

PWRMUX_OUT

R3X2P

NC_4

D1D1_GND

LPSBV

50

HDMI_HPD_4

51

17

BODY_SHIELD

TMDS_CH1-

52

16

R3X2N

D3209-*1
IP4283CZ10-TBA

TMDS_DATA2+

D0+

C3211
0.1uF
16V

15

R3X1P

DDC_SCL_4

D0_GND

HOT_PLUG_DETECT

19

C3210
0.1uF
16V

1/16W
R3213
5.1K
5%

WKUP

DDC_SDA_4

CD_SENSE0

Device Address : 0XB0

MHL_DET
+3.5V_ST
+5V_NORMAL

R3X1N

HDMI_HPD_3

CD_SENSE1

53

DDC_SCL_3

VDD[+5V]

18

C3200
10uF
10V

HDMI_ESD_NXP

CK-_HDMI3

GND_1

D0-

DDC/CEC_GND

17

HOT_PLUG_DETECT

D3209
RCLAMP0524PA
1
10

54

14

DDC_SDA_3

EAG62611204

SDA

16

VDD[+5V]

CK+_HDMI3
CK+

SCL

AO3438
Q3202

20

CEC_REMOTE

11
10

RESERVED

14

CE_REMOTE

CK_GND

CEC

13

15

DDC/CEC_GND

12

TMDS_CLK-

12

SDA

ESD_HDMI

TMDS_CLK+
TMDS_CLK_SHIELD

11

CEC

NC

TMDS_DATA0-

10

SCL

VA3201

TMDS_DATA0_SHIELD

RESERVED

DDC_CLK

TMDS_DATA0+

TMDS_CLK-

DDC_SCL_3

TMDS_DATA1-

TMDS_CLK+

R3205 22

TMDS_DATA1+

TMDS_CLK_SHIELD

DDC_DATA

TMDS_DATA2-

TMDS_DATA1_SHIELD

TMDS_DATA0-

DDC_SDA_3

TMDS_DATA2+
TMDS_DATA2_SHIELD

TMDS_DATA0_SHIELD

R3203 22

ESD_HDMI

DAADR019A

TMDS_DATA1+

TMDS_DATA0+

CK-

13

R3X0P

23

TMDS_DATA2-

20

13

JK3201-*1

DAADR019A

TMDS_DATA1-

14

HDMI_FOOSUNG

JK3200-*1

TMDS_DATA1_SHIELD

VA3200

R3X0N

FHD

43

D2-_HDMI3

1/16W
5%

VA3202
ESD_HDMI

BODY_SHIELD

15

12

42

D1+_HDMI3

R3212
1

TMDS_DATA2+
TMDS_DATA2_SHIELD

16

R3XCP

41

D1-_HDMI3

G
HDMI_FOOSUNG

HDMI_HPD_3

VA3214
ESD_HDMI

GPIO2

11

40

+5V_NORMAL
R3204
10K

HDMI2

D2+_HDMI3

GND

CD_SENSE3

55

R3XCN

39

JK3200

17

CD-SENSE4

56

10

38

CK+_HDMI3

+3.3V_NORMAL

HDMI_FREEPORT HP_DET
19
5V

GPIO0

57

HDMI_S/W_RESET

VDD12_1

37

NC_1

D0+_HDMI3

5V_HDMI_3

GPIO1

58

IC3201
SII9587CNUC

36

CK-_HDMI3

D0-_HDMI3

R3252
33

L3203

L3202

NC_2

87

[EP]GND
HDMI3

GND_2

D2+_HDMI2

51U019S-312HFN-E-R-B-LG

59

NC_3

D2-_HDMI2

D2+

CBUS_HPD1

R1X2P
AVDD12_1

HDMI_HPD_2

TPWR

35

60

34

33

DDC_SCL_3

R1X2N

DSCL1

RESET_N

DSDA1

TMDS_CH2+

10

I2C_SDA5

61

DDC_SCL_2

TMDS_CH2-

I2C_SCL5

DDC_SDA_2

GND_1

D2+_HDMI2

DDC_SCL_4

HDMI_INT

R1X1P

R0PWR5V

TMDS_CH1+

D1+_HDMI2

33

CBUS_HPD0

3
D2_GND

47K
DDC_SDA_4

R3214

HDMI_HPD_1

NC_4

CSDA

33

DSCL0

D1-_HDMI2

2
D2-

DDC_SDA_3

HDMI_ESD_NXP

D2-_HDMI2

D3213-*1
IP4283CZ10-TBA

TMDS_CH1-

62

R3237

DSDA0

D1+

R3229

33

DDC_SCL_1

D3213
RCLAMP0524PA
1
10

D1_GND

R3226
47K

47K

R3236

VDD12_2

D1-

D1+_HDMI2

R3220

R3218
47K

CSCL

R1X1N

D1-_HDMI2

HDMI_ESD_SEMTEK

D0+

33

63

32

D0+_HDMI2

D0_GND

D0+_HDMI2

D3205

R3211

31

D3203

INT

R1X0P

30

NC_1

D0-_HDMI2

29

D3201

DDC_SDA_1

NC_2

64

THERMAL
89

28

GND_2

R4X2P

SPDIF_IN

R1X0N

D2+_HDMI4

NC_3

27

CK+_HDMI2

NC_4

R4X2N

TMDS_CH2+

D2-_HDMI4

D0-_HDMI2

D0-

10

RSVDL

65

26

GND_1

TMDS_CH2-

66

R4X1P

TMDS_CH1+

D1+_HDMI4

TMDS_CH1-

CK+_HDMI2

+3.3V_NORMAL

R1XCP

25

CK+

16V
0.1uF
C3225

C3224
0.1uF
16V

R1XCN

24

CK-_HDMI2

+3.5V_ST

A2

HDMI2
+5V_NORMAL
5V_HDMI_4

A1

CK_GND

+5V_NORMAL
5V_HDMI_3

HDMI_ESD_NXP
D3212-*1
IP4283CZ10-TBA

CK-_HDMI2

HDMI_ESD_SEMTEK

18

VDD33_2

D3212
RCLAMP0524PA
1
10

CEC_REMOTE

R4X1N

CE_REMOTE
CK-

R4X0P

DDC_SCL_2

D1-_HDMI4

DDC_SDA_2

NC

D0+_HDMI4

47K

R4X0N

6
5

R3228

47K

D0-_HDMI4

R3225

DDC_SCL_1

CK+_HDMI4

DDC_SDA_1

VA3204
ESD_HDMI

CK-_HDMI4

DDC_CLK

11
10

47K

A2

EAG62611204

12

22
DDC_SCL_2

VA3203
ESD_HDMI

A1

13

R3210

DDC_DATA

R3219

R3217
47K

14

D3202

DDC_SDA_2

A2

15

VA3209
ESD_HDMI

22

A1

16

R3209

17

GND

A2

D3200

HDMI_FREEPORT HP_DET
19
5V
18

A1

VA3205
ESD_HDMI

20

+5V_NORMAL
5V_HDMI_2

HDMI_HPD_2

5V_HDMI_2

A1

BODY_SHIELD

A2

R3251
33

BODY_SHIELD

C3213
1uF

1/16W
R3233
5.1K
5%

C3214
1uF

1/16W
R3234
5.1K
5%

C3220
1uF

1/16W
R3241
5.1K
5%

R3238
10

C3219
1uF

1/16W
R3239
5.1K
5%

GP4
HDMI

32

LGE Internal Use Only

JK3401
JSTIB15

R3400
33

VIN

VCC

GND

SPDIF_OUT
C3400
0.1uF
16V

VA3400
5.5V

1/10W
5%

OPT

JACK_PARK
JK3403
PEJ038-3B6

+3.3V_NORMAL
GND

JACK_KSD
JK3403-*1
KJA-PH-0-0177
GND

R3406
HP_OUT
R3409
100

10K
HP_OUT

HP_DET
1/16W
5%

SHIELD

C3402
47pF
50V

R3404
150
HP_LOUT

Fiber Optic

+3.3V_NORMAL

SPDIF OUT

DETECT

DETECT

R3405
150
HP_ROUT

ADUC 5S 02 0R5L

EAG61030009
1/10W
5%

COMPONENT 1 PHONE JACK

EAG61030001

VA3405
5.6V

CVBS 1 PHONE JACK

+3.3V_NORMAL

OPT

+3.3V_NORMAL

C3401
18pF
R3402
10K
R3407
100

R3403
330K
R3408
100

COMP1_DET

AV1_CVBS_DET

1/16W
5%
VA3401
5.6V

VA3402
5.6V
JACK_PARK

JACK_PARK
JK3400
PEJ038-4G6

JK3402
PEJ038-4Y6
5

M5_GND

M4

M3_DETECT

COMP1_Y

C3403
0.1uF
16V

1/16W
5%

for audio Hum noise (L)


5

M5_GND

M4

M3_DETECT

COMP1/AV1/DVI_L_IN
VA3403
5.6V

M1

M1

M6

M6

EAG61030012

EAG61030011
COMP1_Pb
COMP1/AV1/DVI_R_IN

JACK_KSD

JACK_KSD

JK3400-*1
KJA-PH-1-0177-2

JK3402-*1
KJA-PH-1-0177-1

M5_GND

M4

M3_DETECT

VA3404
5.6V

M5_GND

M4

M3_DETECT

M1

M6

COMP1_Pr
1

M1

M6

AV1_CVBS_IN

EAG61030007
EAG61030006

SOC_RX

SOC_TX

P3400

+3.5V_ST

12507WS-04L

R3401
10K

4
5

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

BSD-NC4_H034-HD
JACK HIGH/MID

2012.10.09

LGE Internal Use Only

Place Near Micom


+3.5V_ST
LOGO_LIGHT
R4003
33
10K
R4000
OPT

LOGO_LIGHT
R4004
33

LOGO_LIGHT
B

LOGO_LIGHT_WAFER

LOGO_LIGHT

LOGO_LIGHT
R4001
10K

LOGO_LIGHT
C4000
0.1uF
16V

1K Q4000
R4002
MMBT3904(NXP) E
LOGO_LIGHT

+3.5V_ST

R4008
10K
5%

R4009
10K
5%

R4006
100
KEY1
R4007
100

NON_EYE_Q_8P

VA4001
5.6V
AMOTECH CO., LTD.

KEY2
C4001
0.1uF

P4002
12507WR-08L

C4002
0.1uF

VA4000
5.6V
AMOTECH CO., LTD.

+3.5V_ST
L4001
BLM18PG121SN1D

+3.5V_ST
C4005
1000pF
50V

R4005
10K
5%

LOGO_LIGHT_WAFER
NON_OLED

NON_OLED

IR
C4006
100pF
50V

EYE_SCL

VA4002
5.6V
8

AMOTECH CO., LTD.

R4011
100

EYE_Q_10P

VA4004
ADMC 5M 02 200L

10

EYE_Q_10P
P4004

OPT
R4010
100

12507WR-10L

11

EYE_SDA
EYE_Q_10P

VA4003
ADMC 5M 02 200L
OPT

+3.3V_NORMAL

NON_OLED
P4000
SMAW200-H12S2

+3.5V_WOL
L4000

MAX 0.4A

120-ohm

BLM18PG121SN1D
C4004

L4002
120-ohm

C4007

22uF
10V

0.1uF

SMAW200-H16S2
P4003
OLED_DEV

+3.5V_WOL

3.3V

USB_DM

RTS

USB_DP

RX

GND

TX

WOL

10

WIFI_DP
C4016
5pF
50V

C4015
5pF
50V

WOL/WIFI_POWER_ON

M_REMOTE_RTS

AR4000+3.3V_NORMAL
100
1/16W

For EMI

R4014
10K

WIFI_DM

R4012
100
C4012
1000pF
50V

M_REMOTE_RX

M_REMOTE_TX

RESET

M_RFModule_RESET

GND

11

12

CTS
M_REMOTE_CTS
+3.5V_ST
L4003
BLM18PG121SN1D

13

14

OLED
R4013
22

15

IR

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

VA4005
5.6V
OPT

16

OLED

OPT
C4008 C4009 C4013
47pF 47pF 47pF
50V
50V
50V

OPT
C4014
47pF
50V

For EMI

AMOTECH CO., LTD.

17

C4010
100pF
50V
OPT

C4011
1000pF
50V
OLED

BSD-NC4_H040-HD
IR / KEY

2012.10.10

LGE Internal Use Only

+3.3V_NORMAL

CAMERA
C4202
4.7uF

17

RESET

16

DP4

15

DM4

14

13
DP3

AVDD_2

CAMERA
R4214
1% 680
RREF
C4205

1/16W
5%

DM2
DP2

100K CAMERA
R4216
TEST/SCL

0.1uF

CAMERA
R4217
10K

PGANG

PSELF R4215100K CAMERA


22

23

10K R4218

OPT10K R4219
OVCUR2
24

SDA

25

V5

18

AVDD_1

CAMERA
C4208

/RST_HUB
C4209
0.1uF
CAMERA

AVDD_3

USB_CAMERA_DP

IC4200
GL852G-31

0 R4210 CAMERA DP1

12

0.1uF
CAMERA

OVCUR4

DM3

USB_CAMERA_DM

19

11

C4201

CAMERA

0 R4206 CAMERA DM1

10

C4200
CAMERA
1uF
25V

OVCUR3

BLM18PG121SN1D

USB_DP3

20

X2

CAMERA
L4200
120-ohm

DVDD

THERMAL
29

USB_DM3

+3.3V_NORMAL

21

DP0

X1

USB2_HUB_IC_IN_DP

26

DM0

0 R4205 CAMERA

27

CAMERA

USB2_HUB_IC_IN_DM

+3.3V_NORMAL

28

0 R4204

V33

[EP]GND

0.1uF

OVCUR1

CAMERA
C4203

From HUB
USB_Camera

C4206

0.1uF
CAMERA

CAMERA
P4200
12507WR-12L

0.1uF
CAMERA
CAM_SLIDE_DET

2
C4213
4.7uF
10V
CAMERA

R4211
33 CAMERA

R4212
33 CAMERA CAMERA
AUD_LRCK

CAMERA POWER ENABLE CONTROL

+5V_NORMAL +3.5V_CAM

0 R4203
USB_DP3

NON_CAMERA

NON_CAMERA
CAM_CTL

R4207
3.3K

C4210
4.7uF
10V
CAMERA_NON_OLED

R4209
2.2K
CAMERA_NON_OLED
C

33pF
50V C4211
6

CAM_PWR_ON_CMD

ST_BY_DET_CAM

R4220
10K
CAMERA
USB_CAMERA_DP

10

11

USB_CAMERA_DM

Q4200
MMBT3904(NXP)
CAMERA_NON_OLED
E

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

CAMERA

CAMERA

R4208
22K

CAMERA_NON_OLED

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

33pF
R4213
50V C4212
33
CAMERA

RCLAMP0502BA
OPT D4200

USB_DM3
0 R4201

S
USB2_HUB_IC_IN_DM

CAMERA_NON_OLED

NON_CAMERA
0 R4202

USB2_HUB_IC_IN_DP

AUD_SCK

33pF
50V C4214

L4201
CAMERA_NON_OLED
Q4201 UBW2012-121F
OLED
PMV48XP

+3.5V_ST

NON_CAMERA
0 R4200

CAMERA

AUD_LRCH

CAMERAVA4201

C4204
22pF

X-TAL_2

VA4200

3
CAMERA

ZD4200
5V

OPT

1
GND_1

33pF
50V C4215

+3.5V_CAM

GND_2
C4207
22pF
CAMERA

X-TAL_1
CAMERA

OPT

X4200
12MHZ

12
13

BSD-NC4_H042-HD
USB3_HUB

2012.10.08

LGE Internal Use Only

+5V_USB_1

USB1 (3.0)
MAX 1.2A
C4400
10uF
10V

JK4400
SJ113262

+3.3V_NORMAL
VBUS

OCP USB1
R4500
10K
OPT

DUSB3_DM

R4501
10K

D+
USB3_DP

IC4500
BD82020FVJ

GND

+5V_USB_1

+5V_NORMAL

USB3_RX0M
STDA_SSRX+

OUT_2
USB3_RX0P
OUT_1

C4501

GND_DRAIN

10uF
10V
STDA_SSTX-

OC
USB3_TX0M

STDA_SSTX+
USB_CTL1

OCP USB2/3

+5V_USB_2

10uF
10V
FLT2

D4402

RCLAMP0502BA

D4401

RCLAMP0502BA

3AU04S-305-ZC-(LG)
JK4300
1

2
C4322

USB3 (2.0)
MAX 1.0A

10K

USB_DP2
+5V_USB_2

OUT2

C4337
10uF
10V

USB_DM3

USB_DP3

C4310
10uF
10V

/USB_OCD2
C4301
10uF
10V

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

USB DOWN STREAM

OUT1

+5V_USB_3

RCLAMP0502BA
D4300

EN2
USB_CTL2

/USB_OCD3

USB_CTL3

FLT1
USB_DM2

SHIELD

3AU04S-305-ZC-(LG)
JK4302

+5V_USB_3

10

USB2 (2.0)
MAX 1.0A

RCLAMP0502BA
D4302

EN1

IN

1
THERMAL

GND
C4302
0.1uF
16V

10K

+5V_NORMAL

R4302

IC4306
TPS2066CDGNR [EP]GND

R4301

+3.3V_NORMAL

D4400

RCLAMP0502BA

USB3_TX0P

EN
/USB_OCD1

STDA_SSRX-

OUT_3

USB DOWN STREAM

IN_2

IN_1
C4500
0.1uF
16V

GND

BSD-NC4_H044-HD
2012-11-09
USB JACK
LGE Internal Use Only

+3.3V_NORMAL

Full Scart(18 Pin Gender)

EU
R4801
10K

CLOSE TO JUNCTION
EU
R4802
100

EU
C4804
0.1uF

VA4801
5.6V
EU

SC_DET

1/16W
5%

SC_CVBS_IN
VA4807
5.5V
EU

SHIELD
19
AV_DET
18
17
16
15
14
13
12
11

75

COM_GND

R4800
EU

VA4808
5.5V
OPT

SYNC_IN

DTV/MNT_V_OUT

SYNC_OUT
SYNC_GND
RGB_IO
SC_FB
R_OUT

VA4802
5.6V
EU

R_GND
G_OUT

10
G_GND
9

SC_R
ID

VA4803
5.5V
EU

B_OUT
7
AUDIO_L_IN
6
B_GND
5

SC_G

AUDIO_GND
4

VA4804
5.5V
EU

AUDIO_L_OUT
3
AUDIO_R_IN
2
AUDIO_R_OUT
1

SC_B
VA4805
5.5V
EU

DA1R018H91E
JK4800
EU

SC_ID

SC_L_IN
VA4809
5.6V
EU

VA4800
20V
EU

SC_R_IN
VA4806
5.6V
EU

BLM18PG121SN1D
L4800
EU
EU
C4800
1000pF
50V

DTV/MNT_L_OUT
EU
C4802
4700pF

BLM18PG121SN1D
L4801
EU
EU
C4801
1000pF
50V

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

EU
C4803
4700pF

DTV/MNT_R_OUT

BSD-NC4_H048-HD
2012.10.31
SCART GENDER

LGE Internal Use Only

Ethernet Block

LAN_JACK_POWER

C5100
0.1uF
16V

C5101
0.01uF
50V

C5102
0.1uF
16V

C5103
0.01uF
50V

JK5100
XRJH-01A-4-DA7-180-LG(B)
LAN_XML
1

P1[CT]

P2[TD+]
EPHY_TDP
P3[TD-]
EPHY_TDN
P4[RD+]
EPHY_RDP
P5[RD-]
EPHY_RDN
P6[CT]

VA5100
5.5V

10

11

D1

D2

D3

D4

VA5101
5.5V

VA5102
5.5V

VA5103
5.5V

P7

P8

P9

P10[GND]

P11

YL_C

YL_A

GN_C

GN_A

12
SHIELD

JK5100-*1
TLA-6T764
LAN_TDK
1

10

11

D1

D2

D3

D4

R1

R2

R3

R4

R5

R6

R7

R8

R9

R10[GND]

R11

YL_C

YL_A

GN_C

GN_A

12
SHIELD

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LAN_VERTICAL

2011.12.09
50

LGE Internal Use Only

Ethernet Block

R5215

3.3K

+3.3V_WOL

EPHY_ACTIVITY

R5217 3.3K

ET_RXER

LAN_JACK_POWER

+3.3V_WOL

Place this cap. near IC

+3.5V_WOL

EPHY_CRS_DV

C5203
0.1uF
16V

ET_RXER

33
21

PHYRSTB

RXDV

17

TXD[1]

1/16W
5%

R5219
10K

1/16W
1%

3.3K

EPHY_MDC
33 R5220

/RST_PHY (from SOC)

EPHY_EN
C5212
0.1uF
OPT

OPT
33 R5221

EDID_WP (PHY reset from MICOM)

EPHY_TXD1

TXD[0]

+3.3V_WOL

5pF

C5202

R5209

C5211
0.1uF
16V

EPHY_INT
R5208
3.3K

TXC

DVDD33

RXC

RXD[3]/CLK_CTL
OPT

C5209

RXD[1]
33
EPHY_RXD0

EPHY_MDIO

Place near IC

EPHY_RXD1

33pF

R5201

R5207

33 RXD[2]/INTB

9
RXD[0]
33
R5206

3.3K

R5200

WOL/ETH_POWER_ON

16

TXD[2]

15

18

14

13

AVDD33_1

12

TXD[3]

11

TXEN

19

10

20

R5212
1.5K

R5205
MDC

+3.3V_WOL

22

3.3K

MDIO

MDI-[1]

R5203

+3.5V_WOL

LED0/PHYAD[0]/PMEB

23

MDI+[1]
+3.3V_WOL
EPHY_RDN

Q4301
PMV48XP

LED1/PHYAD[1]

IC5200
RTL8201F-VB-CG

24

EPHY_RDP

+3.5V_ST

CRS/CRS_DV

COL

RXER/FXEN

DVDD10OUT

AVDD33_2

CKXTAL1

THERMAL
33

MDI-[0]
EPHY_TDN

WOL POWER ENABLE CONTROL

+3.3V_WOL

25

26

MDI+[0]

Route Single 50 Ohm, Differential 100 Ohm


EPHY_TDP

27

28

29

RSET
AVDD10OUT

30

R5204
2.49K 1%

32

[EP]

50V
Place this Res. near IC

31

CKXTAL2

C5207
20pF

Place this cap. near IC

C5205
0.1uF
16V

R5210

R5218
0

1M R5202

GND_1

X-TAL_1

OPT

25MHz
X5200

1
X-TAL_2

+3.3V_WOL

GND_2

C5206
20pF
50V

ET_COL/SNI

Place 0.1uF close to each power pins

51

C5201
0.1uF
16V

EPHY_TXD0

C5200
4.7uF
10V

EPHY_REFCLK

BLM18PG121SN1D

EPHY_ACTIVITY

C5208
0.1uF
16V

ET_COL/SNI
L5200 120-ohm

R4317
22K

C4325
4.7uF
10V

R4318
2.2K

WOL_CTL

R4316
3.3K

C
Q4300
MMBT3904(NXP)

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

BSD-NC4_H052-HD
2012-09-12
ETHERNET

LGE Internal Use Only

R5602
0

Separate DGND AND AVSS

C5613 2200pF
50V

OUT_A
NC_6

44

NC_5

43

BST_B

42

BST_C

41

NC_4

40

NC_3

19

LRCLK

20

SCLK

21

SDIN

22

39

OUT_C

SDA

23

38

PGND_CD_2

SCL

24

37

PGND_CD_1

L5606
10.0uH
NRS6045T100MMGK
NRS6045T100MMGK

50V
0.033uF
C5625

L5604
10.0uH
SPK_R+

SPEAKER_R
C5631
0.47uF
50V

WOOFER_MUTE

+3.3V_NORMAL

C5606
L5602
0.1uF BLM18PG121SN1D
16V

C5617
C5610
0.1uF
16V

OUT_D

PVDD_CD_2

BST_D

PVDD_CD_1

GVDD_OUT

VREG

GND

AGND

DVSS

C5614
0.1uF

R5604

C5619
0.1uF
50V

0.033uF
50V

C5621
10uF
35V

C5623
10uF
35V

C5638
2200pF
50V

C5634
0.1uF
50V

C5639
2200pF
50V

C5635
0.1uF
50V

C5629
330pF
50V
1/16W

33

C5628
330pF
50V

+24V_AMP

R5614
18

AMP_RESET_N

R5605
R5606

C56151uF 25V

WOOFER_MUTE

I2C_SCL1

33
33

DVDD

I2C_SDA1

STEST

RESET

AUD_SCK
AUD_LRCH

SPEAKER_L

SPK_L50V
0.033uF
C5624

36

49

18

PDN

C5637
2200pF
50V

C5633
0.1uF
50V

R5612
18

R5613
18

OUT_B

45

VR_DIG

AUD_LRCK

C5630
0.47uF
50V

1/16W

C5616
0.033uF
50V
PVDD_AB_2

BST_A

PVDD_AB_1
2

NC_1

PBTL

AVSS

PLL_FLTM

NC_2
7

12

46

17

25

PGND_AB_1

DVSSO

35

10K

PGND_AB_2

47

16

34

C5605
4.7uF C5607
0.1uF
10V

48

15

33

AMP_MUTE

100 C5602
1000pF
Q5600
50V
MMBT3904(NXP)

[EP]

C5636
2200pF
50V

C5632
0.1uF
50V

C5627
330pF
50V

MCLK

TAS5733
IC5600

C
R5600

C5618
0.1uF
50V

C5626
330pF
50V

C5620 C5622
10uF
10uF
35V
35V

OSC_RES

32

AUD_MASTER_CLK
R5603

14

30

R5607 1%

R5601
10K

13

29

18K

AVDD
A_SEL_FAULT

28

R5608 15K

27

C5604
0.1uF
16V

26

C5603
10uF
10V

SPK_L+
R5611
18

+24V_AMP

THERMAL

+3.3V_NORMAL

10

L5601
BLM18PG121SN1D

11

VR_ANA

+3.3V_NORMAL

PLL_FLTP

470

SSTIMER

R5609

31

C5608

C5609 4700pF

0.047uF

Close to Speaker

NRS6045T100MMGK
L5605
10.0uH

C5601
0.1uF
50V

0.047uF

C5611 4700pF

L5600
UBW2012-121F

R5610
470

This parts are Located


on AVSS area.

+24V_AMP

C5612

+24V

SPK_RL5603
10.0uH
NRS6045T100MMGK

WAFER-ANGLE

SPK_L+

SPK_L-

SPK_R+

SPK_R-

1
P5600

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

GP4_MT5369
AUDIO[ST]

2011.11.21
58

LGE Internal Use Only

WOOFER
R5700
0

P5701

GND-4

FW25001-02(SPK 2P)

WOOFER

Separate DGND AND AVSS

20

SCLK

21

PVDD_AB_1

OUT_A
1

BST_A

PVDD_AB_2
3

NC_1
5

WOOFER
C5713 2200pF
50V
NC_2

PBTL

AVSS

PLL_FLTM

SSTIMER
6

PLL_FLTP

WOOFER
C5716
0.033uF
50V

PGND_AB_1

46

OUT_B

45

NC_6

44

NC_5

43

BST_B

42

BST_C

41

NC_4

40

NC_3

WOOFER

39

23

38

PGND_CD_2

37

PGND_CD_1

36

35

34

33

32

25

31

24

OPT
R5710

22

SDA

WOOFER

C5710
0.1uF
16V
WOOFER

OUT_D

PVDD_CD_2

PVDD_CD_1

BST_D

GVDD_OUT

C5717

WOOFER_STEREO
C5719
0.1uF
50V
WOOFER

C5721
10uF
35V

C5723
10uF
35V

WOOFER_STEREO
0.033uF
50V
WOOFER

NRS6045T100MMGK
L5703
10.0uH
SPK_WOOFER_R+
WOOFER_STEREO

WOOFER_STEREO
C5734
0.1uF
50V

WOOFER_STEREO
C5726
330pF
50V

WOOFER_STEREO
C5731
0.47uF
50V

WOOFER_STEREO
C5727
330pF
50V

WOOFER_STEREO
C5735
0.1uF
50V

WOOFER_STEREO
C5738
2200pF
50V

WOOFER_R

WOOFER_STEREO
C5739
2200pF
50V

SPK_WOOFER_RL5705
10.0uH
NRS6045T100MMGK

10K

WOOFER
WOOFER
C5706
L5702
0.1uF BLM18PG121SN1D
16V

+24V_AMP_WOOFER

OPT
R5709

+3.3V_NORMAL

VREG

GND

C5714
0.1uF
WOOFER

WOOFER
R5702

C57151uF 25V
WOOFER

AMP_RESET_N

33

AGND

I2C_SDA1
I2C_SCL1

DVSS

R5703 WOOFER
33 R5704 WOOFER

DVDD

33

STEST

RESET

AUD_SCK
AUD_LRCH

SPK_WOOFER_LL5706
10.0uH
NRS6045T100MMGK

WOOFER
50V
0.033uF
C5725

OUT_C

AUD_LRCK

WOOFER
C5733
0.1uF
50V

WOOFER
C5737
2200pF
50V

R5714
18
WOOFER
WOOFER
50V
0.033uF
C5724

SDIN
SCL

WOOFER_L

1/16W

19

PGND_AB_2

47

WOOFER
C5736
2200pF
50V

1/16W

18

PDN
LRCLK

[EP]

48

WOOFER
C5732
0.1uF
50V

WOOFER
C5730
0.47uF
50V

WOOFER
C5729
330pF
50V

WOOFER_STEREO
R5711
18

VR_DIG

WOOFER
C5728
330pF
50V

WOOFER
C5720 C5722
10uF
10uF
35V
35V
WOOFER

WOOFER_STEREO
R5712
18

17

WOOFER
C5718
0.1uF
50V

10K

DVSSO

49

16

SPK_WOOFER_L+

TAS5733
IC5700

15

WOOFER

MCLK
OSC_RES

30

C5707
0.1uF

14

29

C5705
WOOFER
4.7uF
10V

A_SEL_FAULT

28

WOOFER
18K
R5705 1%
WOOFER

AUD_MASTER_CLK

100 WOOFER
C5702
1000pF
50V

R5706 15K

13

10

VR_ANA

C5704
0.1uF
16V
WOOFER

AVDD

Close to Speaker

WOOFER
R5713
18

+24V_AMP_WOOFER

THERMAL

WOOFER

C5703
10uF
10V

WOOFER

BLM18PG121SN1D

WOOFER
R5701

WOOFER

470

11

0.047uF

L5701

R5708
470

WOOFER
R5707

27

WOOFER
C5708

+3.3V_NORMAL

WOOFER_MUTE

SPK_WOOFER_L+

NRS6045T100MMGK
L5704
10.0uH

WOOFER
C5709 4700pF

C5712

GND-4
WOOFER
C5701
0.1uF
50V

WOOFER
0.047uF WOOFER

WOOFER_OLED
L5707
UBW2012-121F

26

WOOFER_NON_OLED
L5700
UBW2012-121F

This parts are Located


on AVSS area.

+12V

WOOFER 4700pF
C5711

+24V_AMP_WOOFER

12

+24V

SPK_WOOFER_L-

WOOFER_STEREO

P5700
FW25003_03

SPK_WOOFER_R-

SPK_WOOFER_R+

DEV_WOOFER_STEREO

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

GP4_MT5369
AUDIO[ST]

2011.11.21
58

LGE Internal Use Only

+12V
EU

AUD_OUT >> EU/CHINA_HOTEL_OPT

IC6000
AZ4580MTR-E1

L6000
EU

EU
OUT1

R6000

C6000
1uF
25V
EU

OPT
C6002
6800pF

OPT
R6002

33K

EU

R6004

IN1-

470K
C6003
33pF
EU

IN1+

VEE
SCART_AMP_L_FB

C6004
EU

0.1uF
OUT2

R6011
2.2K

50V
SIGN600002

[SCART AUDIO MUTE]

EU
C6008
DTV/MNT_R_OUT

EU
3

VCC

IN2-

R6008

EU

33K

OPT
R6010
470K

OPT

1uF

C6007

25V

DTV/MNT_L_OUT

6800pF

EU

IN2+

C
C6005 EU
33pF

Q6000
MMBT3904(NXP)

SCART_AMP_R_FB

EU_SCART_MUTE_ISAHAYA
Q6002
RT1P141C-T112

EU

SCART_Lout

SCART_MUTE

R6013
1K

2.2K
DTV/MNT_L_OUT

SCART_Rout
DTV/MNT_R_OUT

Q6001
MMBT3904(NXP)
E

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

R6014
1K
B

PDTA114ET
Q6002-*1
C

EU
C

EU

EU_SCART_MUTE_NXP

SCART AUDIO AMP

2011.11.21
60

LGE Internal Use Only

HP_OUT_H13

HP_OUT_H13

C6109-*1
18pF

C6104-*1
18pF

EARPHONE AMP

IC6100
TPA6138A2

HP_OUT
C6100
R6100
1uF
10V
HP_OUT 10K

+INR

HP_OUT_MTK

C6104
180pF

HP_OUT
R6106
43K

HP_OUT

-INR

HP_ROUT_MAIN
1%

R6103
33K
HP_OUT_MTK
HP_OUT_H13
R6103-*1
43K

C6108
10pF
50V

OUTR

14

13

12

+INL

HP_OUT_MTK

HP_OUT
R6104
-INL HP_OUT
43K

C6109
180pF

HP_OUT
R6101
10K

C6101
1uF
10V
HP_OUT
HP_LOUT_MAIN

OUTL

C6106
10pF
50V

1%

R6102
33K
HP_OUT_MTK
HP_LOUT_AMP

HP_ROUT_AMP

GND_1

+3.3V_NORMAL

11

UVP

+3.3V_NORMAL

HP_OUT_H13
R6102-*1
43K
1%

MUTE

SIDE_HP_MUTE

HP_OUT

4.7K
R6105

VSS

10

GND_2

VDD

HP_OUT
C6102
1uF
10V

HP_OUT

1%

HP_OUT
CN

CP

L6100
120-ohm
BLM18PG121SN1D

C6105
1uF
10V

HP_OUT
C6107
0.1uF
16V

C6103
1uF
10V
HP_OUT

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

HEADPHONE AMP

2011.09.29
61

LGE Internal Use Only

CI POWER ENABLE CONTROL


IC6200
AP2151WG-7

+5V_NORMAL

IN

+5V_CI_ON

OUT

CI
2

CI
R6217
100

PCM_5V_CTL

EN

GND

FLG

C6210
1uF
25V
CI

R6219
10K
CI

R6218
10K
CI

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

CI SLOT

2011.10.31
62

LGE Internal Use Only

B-CAS (SMART CARD) INTERFACE

+3.3V_NORMAL

INT
CMDVCC :
STATUS
--------------------------------HIGH
HIGH
CARD PRESENT
LOW
HIGH
CARD not PRESENT

+3.3V_NORMAL

IC6300
TDA8024TT

OPT

OPT
R6304

2.7K
JAPAN
R6306

5V/3V

R6300 22
R6302

SMARTCARD_PWR_SEL/SD_EMMC_DATA[1]

PGND

+5V_NORMAL

S2

JAPAN

28

27

26

25

24

23

AUX2UC

AUX1UC

JAPAN
R6316
1.2K

JAPAN

OPT
R6319
1.2K

CLKDIV2

JAPAN
R6315
1.2K

CLKDIV1

OPT
R6318
1.2K

CLKDIV1 CLKDIV2 : F_CRD_CLK


----------------------------1
0
CLKIN

JAPAN
R6317
1.2K

2.7K
JAPAN

OPT

R6305

R6301

2.7K
JAPAN
R6303

SIGN630028

I/OUC

JAPAN
R6307
22

SMARTCARD_DATA/SD_EMMC_CLK

XTAL2

JAPAN
R6308
22

SMARTCARD_CLK/SD_EMMC_DATA[0]

XTAL1

JAPAN
R6309
22

SMARTCARD_DET/SD_EMMC_DATA[3]

OFF

JAPAN
R6310
22

SMARTCARD_RST/SD_EMMC_DATA[2]

L6300
VDDP
JAPAN
C6300
0.1uF
16V

JAPAN

C6301
10uF
10V

JAPAN
C6303
0.1uF
16V

S1

22

JAPAN
R6311
22

GND

VUP
JAPAN
C6302
0.1uF
16V

PRES

PRES

I/O

AUX2

AUX1

CGND

21

20

10

19

11

18

12

17

13

16

14

15

SMARTCARD_VCC/SD_EMMC_CMD
L6301 JAPAN
BLM18PG121SN1D

JAPAN
VDD

RSTIN

JAPAN
C6305
0.1uF
16V

JAPAN
C6306
0.1uF
16V

CMDVCC

+3.3V_NORMAL

BLM18PG121SN1D

B-CAS SLOT
P6300
10057542-1311FLF(B CAS Slot)

PORADJ

VCC

VCC

JAPAN
C6307
0.33uF
16V

RST

RST

Place CLK C3 far from C2,C7,C4 and C8

CLK

CLK

JAPAN
C6304
0.1uF
16V

RESERVED_1

GND

VPP
JAPAN
R6313
75

I/O

C1

C2

C3

C4

C5
JAPAN
C6

C7

75 ohm in I/O is for short circuit Protection


RESERVED

JAPAN
+3.3V_NORMAL
R6314
1K

JAPAN

ZD6300
5V

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

SW2

JAPAN

10K
R6312

JAPAN

SW1

C8

S1

S2

ZD6301
5V

CI SLOT

2011.04.17
62

LGE Internal Use Only

/TU_RESET2

RF_SWITCH_CTL_50

FE_DEMOD1_TS_ERROR

TU_W_BR/TW/CO
L6508-*1
0

+3.3V_TU
TU_Q/W_KR/JP/AU
L6508
BLM18PG121SN1D

TU_S/N/Q/W
/TU_RESET1
C6520
0.1uF
16V

TU_N/M/W_CN/TW/BR/CO
R6508-*1

RF_SWITCH_CTL_TU

/TU_RESET1_TU

I2C_SCL6_TU

TU_N_TW/BR

TU_N/Q_KR/TW/BR/CO/AU

I2C_SDA6_TU

+3.3V_TU

TUNER_SIF_TU

TU_+1.8V_TU

TU_CVBS_TU

10

RF_SWITCH_CTL_50
C6502
TU_S/N/Q/W
0.1uF
R6508

5%

C6506
47pF
50V

C6508
47pF
50V

150

R6534

0.1uF

IF_P

IF_N

12

+3.3V_TU

13

Power_D_Demod_TU

CN_RESET_TU

10

/S2_RESET

1K

100

C6503-*1
0.1uF
16V

TU_N/M_CN/BR
L6502
BLM18PG121SN1D

C6529
22uF
10V
85C

C6526
0.1uF
16V

C6530
0.1uF
16V

T2 : Max 1.7A
else : Max 0.7A

TU_A_GLOBAL_6/7
Q6501
MMBT3906(NXP)

TU_W_BR/TW

+3.3V_TU

TU_Q/W_KR/BR/TW/CO/JP/AU
L6507

TU_Q/N/M/W

1. should be guarded by ground


2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils

+3.3V_TU

IC6501
AP2132MP-2.5TRG1
1

+1.8V_TU

16

FE_DEMOD1_TS_ERROR

17

FE_DEMOD1_TS_SYNC

18

FE_DEMOD1_TS_VAL

FE_DEMOD1_TS_VAL

19

FE_DEMOD1_TS_CLK

FE_DEMOD1_TS_CLK

FE_DEMOD1_TS_ERROR

TU_Q/N/M/W
R6527
R2
20K
1%
TU_Q/N/M/W
R6528
11K
1%
R6529 R1
10K
1%

PG
TU_Q/N/M/W
R6523
10K

C6516-*1
0.1uF
16V
TU_W_BR/TW/CO/JP

+1.23V_D_Demod
[EP]

TU_Q/N/M/W
C6540
0.1uF

+1.23V_D_Demod

C6516
BLM18PG121SN1D
0.1uF
16V
TU_N/M/Q/W_KR/CN/BR/JP/AU

5%

TU_A_GLOBAL_6/7
R6521
200

IF_AGC

R6506-*1
TU_W_BR/TW

TU_N_BR
R6502-*1

L6503
BLM18PG121SN1D

OPT
Q6500
C
MMBT3906(NXP)

+1.8V_TU

R6506
100
TU_S/N/Q_T/US/KR/TW/AU

+3.3V_TU

1608 perallel
because of derating

TU_CVBS
B

16V
OPT
R6515
4.7K

IF_P
should be guarded by ground
IF_N

TU_N/M
R6502

TU_A_GLOBAL_6/7
R6520
200

TUNER_SIF

OPT
C6522

close to Tuner
TU_S/N/Q_T/US/KR/TW/AU
close to Tuner

+3.3V_TU
OPT
R6518
82

close to TUNER

C6514
0.1uF
16V

C6503
0.1uF
16V

+3.3V_NORMAL

OPT
R6516
470

+3.3V_TU

C6550
0.1uF
16V

mA(MAX)

220

+3.3V_TU

TU_W_BR/TW/CO/JP/_Q_AU

IF_AGC_TU

300

TU_A_GLOBAL_6/7

NON_TU_W_BR/TW/CO
R6509
I2C_SCL6
33
NON_TU_W_BR/TW/CO
R6510
I2C_SDA6
33

C6554
100pF
50V

TU_W_BR/TW/CO TU_W_BR/TW/CO TU_W_BR/TW/CO TU_W_BR/TW/CO TU_W_BR/TW/CO


C6508-*1
C6506-*1
R6509-*1
R6534-*1
R6510-*1
18pF
18pF

R6501 1K
TU_M/W_BR/TW/CO/CN

L6500
TU_W_BR/TW/CO/JP/_Q_AU BLM18PG121SN1D

11

14

1K

RF_SWITCH_CTL

R6505
10K

100 TU_M/W_BR/TW/CO/CN

TU_N/Q_KR/TW/BR/CO/AU

R6500 1K
TU_N/M_TW/BR

TU_N/M_TW/BR

C6501
0.1uF

EN

GND
9

TU_W_BR/TW/CO
C6501-*1
1000pF

THERMAL

close to TUNER

7
ADJ

TU_Q/N/M/W

VOUT

VIN
C6533
10uF
16V

2A

+5V_NORMAL

5
NC

VCTRL
EAN61387601

Global F/E Option Name


1. TU
2. Tuner Name = TDSS,TDSQ...
3. Country Name = T,T2,S2,KR,US,BR ...

TU_Q/N/M/W
C6535
1uF

Vout=0.6*(1+R1/R2)

20 FE_DEMOD1_TS_DATA[0]
FE_DEMOD1_TS_DATA[0-7]

21 FE_DEMOD1_TS_DATA[1]
FE_DEMOD1_TS_DATA[0]

Example of Option name


TU_Q_T2 = apply TDSQ type tuner and T2 country
TU_M/W = apply TDSM&TDSW Type Tuner

22 FE_DEMOD1_TS_DATA[2]

13 Tuner Type
TDSS-G501D :
TDSQ-G501D :
TDSQ-G601D :
TDSQ-G651D :
TDSM-C601D :
TDSW-J551F :
TDSW-B651F :
TDSW-A651F :
TDSW-K651F :

24 FE_DEMOD1_TS_DATA[4]

FE_DEMOD1_TS_DATA[1]

CHB : Max mA
else : Max mA

FE_DEMOD1_TS_DATA[2]
FE_DEMOD1_TS_DATA[3]

23 FE_DEMOD1_TS_DATA[3]
+3.3V_TU

FE_DEMOD1_TS_DATA[4]

for Global
T/C Half NIM Horizontal Type
T/C/S2 Combo Horizontal type
T2/C/S2 Combo Horizontal Type
T2/C/S2 Combo Vertical Type
China NIM with Isolater Type
Japan Dual NIM
Brazil 2Tuner
Taiwan 2Tuner
Colombia DVB-T2 2Tuner

C6549
10uF
16V

FE_DEMOD1_TS_SYNC

+1.8V_TU

FE_DEMOD1_TS_DATA[5]
IC6503

FE_DEMOD1_TS_DATA[6]

25 FE_DEMOD1_TS_DATA[5]

AZ1117BH-1.8TRE1

FE_DEMOD1_TS_DATA[7]

IN

26 FE_DEMOD1_TS_DATA[6]

OUT

1
ADJ/GND

27 FE_DEMOD1_TS_DATA[7]

TU_Q/W
+1.23V_D_Demod
L6501
BLM18PG121SN1D

30
31

+1.23V_D_Demod_TU
C6515
0.1uF
TU_Q/W

/S2_RESET_TU

32

+3.3V_TU

33

LNB_TX

34

I2C_SCL4_TU

35

I2C_SDA4_TU

R6531
1

C6546
10uF
10V

C6548
10uF
10V

TU_W
R6513-*1
1K

5%

TU_Q
R6513
10

/S2_RESET
+3.3V_TU

+3.3V_TU
LNB_TX
TU_Q/W_KR/BR/CO/TW/JP/AU R6503

36

22

C6521
0.1uF
OPT

I2C_SCL4

TU_Q/W

LNB_OUT

C6531
0.1uF

C6504
18pF
50V
TU_Q/W_KR/BR/CO/TW/JP/AU

R6504

22

C6538
10uF
10V

C6542
0.1uF

I2C_SDA4

TU_Q/W
LNB_OUT

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

C6500
18pF
50V

Close to the tuner

TUNER

2012.07.10
65

LGE Internal Use Only

4
5
6
7
8
9
10
11
A1

10

10

11

11

12

12

13

13

14

14

15

15

16

16

SCL

SCL
SDA

SDA

I2C_SCL6_TU

+B1[3.3V]

I2C_SDA6_TU

SIF

+3.3V_TU

+B2[1.8V]
CVBS

+B1[3.3V]

TU6701
TDSM-C651D(B)

SIF
+B2[1.8V]

TUNER_SIF_TU

TU_M_CN

TU_+1.8V_TU

IF_AGC

DIF[P]

10

DIF[N]

11

A1

12
13

12

14
SHIELD

15
16
17
18
RF_S/W_CTL
RF_SWITCH_CTL_50

RESET
TU_PIN2

SCL
I2C_SCL6_TU

SDA
I2C_SDA6_TU

+B1[3.3V]
+3.3V_TU

SIF
TUNER_SIF_TU

+B2[1.8V]
TU_+1.8V_TU

50

19

51

20

52

21

53

22

54

23

55

24

56

25
26
27

CVBS

CVBS

NC_2

NC_1

NC_3

NC_2

NC_4

NC_3

+B3[3.3V]

+B3[3.3V]

+B4[1.23V]

+B4[1.23V]

NC_5

DEMOD_RESET
GND

GND

NC_4

ERROR

SYNC

SYNC

VALID

VALID

MCLK

MCLK
D0

D0

D1

D1

D2

D2

D3

D3

D4

D4

D5

D5

D6

D6

D7

D7
B1

B1

A1
59

B1

A1

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27
28

A1

A1

29

28

A2

30

A2

SHIELD

31

TU_GND_B

32
TU_GND_A

TU_GND_B

B2

B2

SHIELD

B1

17

33
34
35
B1

B1

A1

RESET

TU_SCL

TU_SDA

+B2[3.3V_M]

S_SIF

+B3[1.8V_M]

S_CVBS

M_IF_AGC

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

NC_1

14

GND

15

SD_ERROR

16

SD_SYNC

17

SD_VALID

18

SD_MCLK

19

SD_SERIAL_D0

20

NC_2

21

NC_3

22

NC_4

23

NC_5

24

NC_6

25

NC_7

26

NC_8

27

GND_1

28

GND_2

29

+B6[1.23V_SD]

30

SD_RESET

31

+B7[3.3V_SD]

32

NC_9

33

SD_SCL

34

SD_SDA

35
36

A1

0 R6703

NON_CHINA

TU_GND_B

SCL

SDA

+B1[3.3V]

SIF

+B2[1.8V]

CVBS

NC_2

NC_3

10

NC_4

11

NC_5

12

NC_6

13

B1

38

A1

TU6702-*1
TDSQ-A651D(B)

TU6704-*4
TDSN-T751F

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
LNA_CTRL1
LNA_CTRL2

R6704
100

TU_PIN2

B1

57

26

58

27

B1

A1

RF_S/W_CTL

RESET

SCL

SDA

+B1[3.3V]

SIF

+B2[1.8V]

CVBS

IF_AGC

DIF[P]

10

DIF[N]

11

NC_1

12

NC_2

13

NC_3

14

GND

15

NC_4

16

NC_5

17

NC_6

18

NC_7

19

NC_8

20

NC_9

21

NC_10

22

NC_11

23

NC_12

24

NC_13

25

NC_14

26

NC_15

27

A1

28

59

29
30

SHIELD

TU_M/W
C6700
0.1uF

TU6704-*1
TDSW-B652F(B)

TU_AJJA
1
2

31

TU_M/W

32
33
34
35
B1

B1

A1

TU_BR

+B1[+3.3V_S/P]

RESET

TU_SCL

TU_SDA

+B2[3.3V_M]

S_SIF

+B3[1.8V_M]

S_CVBS

M_IF_AGC

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

TU6704-*2
TDSW-A652F(B)
TU_TW

+B1(3.3V)_S/P

T_RESET

TU_SCL

TU_SDA

+B2[3.3V_M]

S_SIF

+B3[1.8V_M]

S_CVBS

M_IF_AGC

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

1
2

TU_SCL

TU_SDA

+B2[3.3V_M]

S_SIF

+B3[1.8V_M]

S_CVBS

M_IF_AGC

M_DIF[P]

10

M_DIF[N]

11

+B4[3.3V_S]

12

+B5[1.8V_S]

13

+B1(3.3V)_S/P

+3.3V_TU

55

TUNER_SIF_TU

56

TU_+1.8V_TU

S_SIF
+B3[1.8V_M]

GND_2

28

GND_3

29

+B3[1.23V]

30

DEMOD_RESET

31

F22_OUTPUT

32

DEMOD_SCL

33

DEMOD_SDA

34

LNB

35

GND_4

TU_Q_T2/S2

M_DIF[N]
+B4[3.3V_S]

TU_W_JP
10K
FE_LNA_Ctrl1

R6705
TU_W_JP
10K

58

NC_8

33

SD_SCL

34

SD_SDA

35

28
29

+B6[1.23V_D]

30

D_RESET

31

+B7[3.3V_D]

32

NC_1

33

D_SCL

34

D_SDA

35

GND_1

28

GND_2

29

+B6[1.23V_D]

30

D_RESET

31

+B7[3.3V_D]

32

NC_1

33

SD_SCL

34

SD_SDA

35

GND_1
GND_2

A1

38

40
NC_7

38
39
40

NC_2

50

41

51

42
43
44
45
46
47
48
49

B1

B1

A1
59

GND_3

38

GND_4

39

MD_ERROR

40

MD_SYNC RF_S/W_CTRL
MD_VALID

NC_7

50

41

51

42

MD_MCLK

43

MD_DATA

44

SD_ERROR

45

SD_SYNC

46

SD_VALID

47

SD_MCLK

48

SD_DATA
A1

49
B1

B1

A1
59

SHIELD

GND_3

38

GND_4

39

NC_2

40

RF_S/W_CTRL
NC_3
NC_4

NC_2

50

41

51

42

NC_5

43

NC_6

44

SD_ERROR

45

SD_SYNC

46

SD_VALID

47

SD_MCLK

48

SD_DATA
A1

49
B1

B1

A1

FE_LNA_Ctrl2

R6706

TU_W_JP
C6701
0.1uF
16V

LNA_CTR1
LNA_CTR2

FE_DEMOD1_TS_ERROR

16

FE_DEMOD1_TS_SYNC

17

FE_DEMOD1_TS_VAL

18

FE_DEMOD1_TS_CLK

19

FE_DEMOD1_TS_DATA[0]

20

FE_DEMOD1_TS_DATA[1]

21

FE_DEMOD1_TS_DATA[2]

22

FE_DEMOD1_TS_DATA[3]

23

FE_DEMOD1_TS_DATA[4]

24

FE_DEMOD1_TS_DATA[5]

25

FE_DEMOD1_TS_DATA[6]

26

FE_DEMOD1_TS_DATA[7]

27

+1.23V_D_Demod_TU

30

/S2_RESET_TU

31

+3.3V_D_Demod2

32

LNB_TX

33

I2C_SCL4_TU

34

I2C_SDA4_TU

35

LNB_OUT

36

FE_DEMOD2_TS_ERROR

40

FE_DEMOD2_TS_SYNC

41

FE_DEMOD2_TS_VAL

42

FE_DEMOD2_TS_CLK

43

FE_DEMOD2_TS_DATA

44

FE_DEMOD3_TS_ERROR

45

FE_DEMOD3_TS_SYNC

46

FE_DEMOD3_TS_VAL

47

FE_DEMOD3_TS_CLK

48

FE_DEMOD3_TS_DATA
TU_QW
L6701
BLM18PG121SN1D

49

+B5[1.23V]
D_RESET
+B6[3.3V]
NC_6
D_SCL
D_SDA
LNB

50

41

51

42

52

43

53

44

54

45

55

46

56

47

57

48

58

49

GND_4
GND_5
GND_6
TS1_ERROR
TS1_SYNC
TS1_VALID
TS1_MCLK
TS1_DATA
TS2_ERROR
TS2_SYNC
TS2_VALID
TS2_MCLK
TS2_DATA

B1

C6702
0.1uF
16V

B1

A1

A1
+3.3V_D_Demod2

59

+B6[1.23V_D]

+3.3V_TU
TU_QW
C6708
0.1uF

+B7[3.3V_D]
NC_1
D_SCL
D_SDA

GND_3
GND_4
MD_ERROR
MD_SYNC
MD_VALID
MD_MCLK
MD_DATA
SD_ERROR
SD_SYNC
SD_VALID
SD_MCLK

SHIELD

TU_QW
C6709
10uF
10V

TU_MNQW
L6700
BLM18PG121SN1D
+3.3V_D_Demod

+3.3V_TU
TU_MNQW
C6703
0.1uF

SD_DATA
A1

59
SHIELD

14

GND_3

TU_W_JP

D_RESET

A1

RF_S/W_CTRL

36
37

NC_9

+B5[1.8V_S]

NC_7

GND_2

13

CN_RESET_TU

GND_2

SHIELD

M_IF_AGC

NC_5

GND_1

12

Power_D_Demod_TU

+1.8V_T2

D7

M_DIF[P]

NC_6

32

11

+3.3V_D_Demod

+3.3V_T2

D6

S_CVBS

NC_3

30

10

IF_N

NC_5

D5

NC_8

NC_4

31

IF_P

NC_4

D4

SCL_S

NC_2

29

IF_AGC_TU

NC_3

D3

RESET_T2

SD_MCLK

28

TU_CVBS_TU

NC_2

D2

+B4[3.3V]

SD_SERIAL_D0

+B7[3.3V_SD]

TU_+1.8V_TU

+1.8V_T1

D1

+B2[3.3V_M]

SD_SYNC

NC_9

D0

39

SD_VALID

+B6[1.23V_SD]

+3.3V_TU

TUNER_SIF_TU

NC_1

MCLK

TU_SCL

57

SD_RESET

+3.3V_T1

VALID

TU_SDA

SD_ERROR

GND_2

I2C_SDA6_TU

SDA_T

SYNC

+3.3V_S_TUNER

NC_1

GND_1

I2C_SCL6_TU

SCL_T

T_RESET

GND

SHIELD

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

54

/TU_RESET1_TU

ERROR

TU6704-*3
TDSW-K651F(B)
TU_CO

+B1(3.3V)_S/P
T_RESET

36

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

I2C_SDA6_TU

RESET_T1

GND

SDA_S
53

C6705
10uF
10V

+5V_OR_+3.3V_SPLITTER

NC_7

50 RF_SWITCH_CTL_50
51
TU_PIN2
I2C_SCL6_TU
52

TU_M_CN
C6706
1000pF
630V

TU_TW_SINGLE

/TU_RESET2

B1

SHIELD
TU_GND_B

NON_CHINA
0 R6702

NON_CHINA

TU_GND_A

TU_GND_B
0 R6701

C6707
630V

NON_CHINA
0 R6700

TU_M_CN
1000pF

RESET

R6707

37

36

GND seperation for CHINA tuner

N.C_1

TU_GND_B

TU_GND_B

B1

RESET

TU_W_JP

TU_Q_T2/S2
+B1[+3.3V_S/P]

R6708 0

RESET

TU_Korea_PIP

TU_W_JP

NC_1

TU6704
TDSW-J551F(B)

TU_GND_A

NC

TU6703
TDSQ-G651D(B)

RF_SWITCH_CTL_TU

TU_T2/C

TU_S_US

B1

TU6702
TDSQ-H651F(B)

TU6705
TDSN-G351D

TU6700
TDSS-H651F(B)

SHIELD

TU_MNQW
C6704
10uF
10V

BSD-NC4_H067-HD
TU_SYMBOL

2012.09.14

LGE Internal Use Only

DVB-S2 LNB Part Allegro


(Option:LNB)

Input trace widths should be sized to conduct at least 3A

3A

Ouput trace widths should be sized to conduct at least 2A

+12V

2A
D6904-*1

Max 1.3A
40V
LNB_SX34

VIN

14

GND

13

VREG

12

ISET

11

TCAP

LNB
5

A_GND

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

LNB
A_GND
LNB
R6903
39K
C6912

1/16W
1%

LNB
0.1uF

LNB

LNB_TX

I2C_SDA4

I2C_SCL4

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

R6904
0

0.22uF

GNDLX

LX
16

NC_2

17

NC_3
19

18

BOOST
20

15

C6911

A_GND

TDO
D6903-*1
LNB_SX34
40V

IC6900
4
A8303SESTR-T

Caution!! need isolated GND

C6910
0.1uF
50V

10

C6902
0.22uF
25V

TDI

LNB

C6904
0.1uF
50V

TONECTRL

Close to Tuner
Surge protectioin

LNB

ADD

D6900
LNB

R6900
2.2K
1W
LNB

NC_1

C6901
33pF
LNB

D6903
LNB_SMAB34
40V

30V
LNB

THERMAL
21

SDA

LNB_OUT

R6902 33

LNB

VCP

D6901
MBR230LSFT1G

close to VIN pin(#15)

SCL

A_GND

C6909
10uF
25V
LNB

A_GND

A_GND

LNB
R6901 33

close to Boost pin(#1)

[EP]GND

C6907
10uF
25V
LNB

IRQ

C6906
10uF
25V
LNB

LNB

C6905
10uF
25V
LNB

C6908 0.1uF

C6903
0.01uF
50V
LNB

SP-7850_15
15uH
L6900
LNB

40V
LNB_SMAB34

30V

C6900
18pF
LNB

3.5A

D6904

LNB

D6902
LNB

LNB

2012.03.08
69

LGE Internal Use Only

LVDS

[51Pin LVDS OUTPUT Connector]

[41Pin LVDS OUTPUT Connector]


P7202
FI-RE41S-HF-J-R1500

LVDS
P7201
FI-RE51S-HF-J-R1500
LVDS

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51

NC

OLED R7209

I2C_SCL1

OLED R7208

I2C_SDA1

UD_CPBOX R7200 0

I2C_SDA1

UD_CPBOX R7201 0

I2C_SCL1

NC
NC
NC
NC

LVDS_SEL

R7204
0
OLED

1
2

FRC_RESET

OLED : FRC_RESET = LVDS_VAL


INV_CTL = ELVDD_ON

3
4
5
6

UD
INV_CTL

R7217
0

8
FRC_FLASH_WP

NC
NC

R7213
0
ALEF

BPL_IN

10K
R7215

10

TXC0N

L/DIM_ENABLE

11

TXC0P

GND

12

TXC1N

RA0N

13

TXC1P

14

TXC2N

15

TXC2P

TXA0N/TX11N
RA0P
TXA0P/TX11P
RA1N
TXA1N/TX10N
16

RA1P
TXA1P/TX10P
RA2N

17

TXCCLKN

18

TXCCLKP

TXA2N/TX9N
RA2P
TXA2P/TX9P
19

GND
RACLKN

20

TXC3N

21

TXC3P

22

TXC4N

23

TXC4P

TXACLKN/TX8N
RACLKP
TXACLKP/TX8P
GND
RA3N
TXA3N/TX7N
24

RA3P
TXA3P/TX7P

25

RA4N
TXA4N/TX6N
RA4P

26

TXA1N

TXD0N/TX17N

27

TXA1P

TXD0P/TX17P

28

TXACLKN

TXD1N/TX16N

29

TXACLKP

TXD1P/TX16P

30

TXA4N

TXD2N/TX15N

31

TXA4P

TXD2P/TX15P

33

TXB0N

TXDCLKN/TX14N

34

TXB0P

TXDCLKP/TX14P

36

TXB1N

TXD3N/TX13N

37

TXB1P

TXD3P/TX13P

38

TXB2N

TXD4N/TX12N

39

TXB2P

TXD4P/TX12P

TXA4P/TX6P
GND
BIT_SEL

BIT_SEL
RB0N
TXB0N/TX5N
RB0P
TXB0P/TX5P

R7214
10K
LVDS_BIT_SEL_LOW

RB1N
TXB1N/TX4N

32

RB1P
TXB1P/TX4P
RB2N
TXB2N/TX3N
RB2P
TXB2P/TX3P

H13 BALL NAME

UD_OLED
R7210
33

NC

OLED

35

GND
RBCLKN
TXBCLKN/TX2N
RBCLKP
TXBCLKP/TX2P
GND
RB3N
TXB3N/TX1N

40

RB3P
TXB3P/TX1P

41

RB4N
TXB4N/TX0N
RB4P

42

TXB4P/TX0P
GND

PANEL_VCC

GND
GND
GND

L7201
120-ohm
LVDS
T_CON_SYS_POWER_OFF

GND
C7201
10uF
16V
OPT

NC
VLCD

C7203
0.1uF
16V
LVDS

VLCD
VLCD
VLCD

52
GND

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

T_CON_SYS_POWER_OFF

R7216
0
OLED

LED_R

BSD-NC4_H072-HD
2012-10-15
LVDS INTERFACE

LGE Internal Use Only

LOCAL DIMMING 1
[To LED DRIVER]
P7400
12507WR-08L

+3.3V_NORMAL

L/DIM_OUT

R7400
10K
OPT

R7401
10K
L/DIM_OUT_PULL_DOWN

L/DIM0_SCLK

L/DIM0_MOSI
L/DIM_OUT_I2C
R7411
33

I2C_SCL2
L/DIM_OUT_I2C
R7412
33

8
9

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

R7408 0
OPT

I2C_SDA2
R7407 0
OPT

L/DIM0_VS
R7403
4.7K

BSD-NC4_H074-HD
LOCAL DIMMING

2012.09.14

LGE Internal Use Only

VCC

<POWER BLOCK>

VCOM_P

R7730
OPT
1/16W

VCOM_N

R7759
0
1/16W

R7737
OPT
1/16W

R7760
0

INSTEAD OF AMCC0208

1/16W
Q7700
MMBT3904(NXP)
100K

R7728

VCOM_LOOP
VCOM1_FB

VCC18

D7703
1N4148W

1/16W 5%

VGL_FB

CTRLN

L7700

VGL

R7710

VCOM_DYN

GMA4

GMA5

GMA7

DYN

VCOMFB

POS

NEG

VCOM

GMA6

GMA5

GMA4

GMA3

GMA2

GMA1

44

43

42

41

40

39

38

37

TPS65178RSLR

31

CTRLP

30

TCOMP

29

VL

SWB1_2

SCL

26

COMP

PVINB1_2

12

25

SS

VDD

I2C_SDA2
COMP

R7727

100K

C7755
1uF
50V

D7706
1N4148W
100V

MMBT3906(NXP)

C7731
0.1uF
16V

OPT
C7740
1000pF
50V

C7722
10uF
16V

OPT
R7772
39K

C7703
0.1uF
50V

C7700
0.01uF
50V

C7702
0.01uF
50V

R7718
9.1K

C7729
1000pF

R7713
2.2

C7760

C7739
0.1uF
50V

C7737
0.1uF
50V

VL

1/16W

1/16W
50V
OPT
OPT
D7701
SX34

VDD_EPI

C7732
0.1uF
50V

C7738
0.1uF
50V

VOUT

VS-

VIN+

NCP18WB473F10RB

VS+

VIN-

OPT
OPT
R7771

R7722
100K
1/16W
1%

TH7700
47k-ohm

OPT

1%

OPT

TCOMP
C7734
0.1uF
50V

C7725
10uF
25V

1/16W
IC7702
IML7821BE

VCOM2
R7720
47K
1/16W
5%

40V
C7723
10uF
25V

1uF 25V

OPT

L7704
22uH

R7750
20K
1/10W
5%

VDD

VDD

[Right Source(41PIN LOCATION)]

PANEL_VCC

R7744
20K
1/10W
5%

SS

COMP

C7736
1000pF
50V

VCC18

C7757
1uF
50V

C7754
0.1uF
50V

Q7701

1/16W 5%

SS

R7717
33K
1/16W

VCC18

1/16W
CTRLP

C7742
1uF
25V

I2C_SCL2

L7703
NR6020T6R8NC
6.8uH
C7715
10uF
16V

VGH
R7746

100V

VL

TCOMP

C7724
1uF
25V

R7729
2.7K
1/16W

1uF 25V

24
AGND

SWO

SWI

SW_2

23

SDA

27

11
22

28

10

21

NC
0.1uF
50V PVINB1_1

THIS IS REVERSE PATTERN !!!!

1uF 25V

D7704
1N4148W

H_VDD

C7748

EPI

VGH_FB
C7746

SWB2

C7716
10uF
25V

C7701
0.1uF
50V

C7733
10uF
16V

SWP

PGND2

OPT

[Left Source(51PIN LOCATION)]

C7756
1uF
25V

L7706
BLM18PG121SN1D
OPT

100

VGH

20

C7714
10uF
25V

Q7702
MMBT3904(NXP)

32

SW_1

C7713
10uF
25V

E
C
B

IC7700

19

C7721
OPT

SWP

PGND_2

PANEL_VCC

D7700
SX34
40V

SWN

33

18

22uH

OUT2

34

PGND_1

C7712
1uF
10V

CTRLP

17

C7728
10uF
10V
OPT

VGH_FB

VGL

PGND3

C7711
10uF
10V

RST
OUT1

CTRLN

35

16

C7710
10uF
10V

1/16W

R7739
1.5K
1/16W
5%

INSTEAD OF AMCC0209

SWP
36

THERMAL
49

15

C7707
10uF
10V
OPT

OUT3

MMBT3904(NXP)
Q7703

10K

R7755
EPI_LOCK6_SOURCE

C7704
0.1uF
16V

R7700
2K
1/16W

SWB4

13

R7761
10K
OPT

OUT4

AVIN

EPI_LOCK6
C
R7757

C7727
0.1uF
50V

SWN

SWB1_1

L7702

R7758
10K

R7756
10K

D7705
1N4148W
100V

VGL_FB

45

10K
1/16W

VCC

VCC18

1uF 25V

R7701

LQM2HPN2R2MG0L
2.2uH

SWB3

1K R7773

+3.3V_NORMAL

C7709
10uF
10V

C7706
10uF
10V

1uF 25V

R7745

CTRLN
PGND4

[EP]AGND

VCC

L7701
OPT

C7747

1/16W

FROM SOC

OPT

46

1/16W
R7725
0

47

PMIC_RESET
TO SOC

L7705
BLM18PG121SN1D

C7745
SWN

48

Vcore

GMA12

GMA15

LQM2HPN2R2MG0L
2.2uH

14

C7708
10uF
10V

PVINB3

C7705
10uF
10V

GMA14

100V

VCOM_P

R7770

VCOML_FB

0
1/16W

0
1/16W

51
51

Z_OUT

50
50

GMA1

49

GMA3

48

GMA4

47

GMA5

46

GMA7

45

GMA9

44

GMA10

49

GMA18

38
37

35
34

VCOM2

VGH_R

41

VGH_F

VCOML_FB

0
1/16W
R7766 OPT
0
1/16WOPT

VCOM_IN

R7767

R7702
100
CLK6_I

VGH_ODD

R7707

CLK5_I

39

VGH_EVEN

38

VGL_I

100

CLK4_I

VST

CLK2_I

GIP_RST

CLK1_I

36
35

VCOM_IN

34

VCOM1

VCOM_IN

CLK5

R7711
100

CLK3_I

37

CLK6
CLK4

R7712
100

CLK3

R7714
100

VCOML_FB

CLK1
100

VDD

R7768
0
1/16W

VCOM1_FB

OPT

CLK2

R7715

0
1/16W

R7769
0
1/16W

H_VDD

33

33
32

TXB2P

CH6

31

TXB2N

FROM SOC

32

VCC

31

RE

VGH_EVEN

10

EVEN

11

VST

12

VST

19

20

TXA1P

19

TXA1N

R7704

47
GST

Vcore

18

18

R7719

C7718
15pF
50V

16

VCOM_IN

15

GIP_RST

15

EPI_LOCK3

14

EPI_LOCK6_SOURCE

11

11

VGH_ODD

10

VGH_F

VGH_R

CLK6

CLK5

CLK4

CLK3

CLK2

CLK1

P7703

P7702

EPI

R7705

GMA12

MCLK
1/16W

FROM SOC

GMA10

GMA9

GMA7

GMA5

GMA4

GMA3

GMA1

C7719
15pF
50V

R7706

CLK1

CLK2

CLK3

VDD

R7738
0
1/16W

C7750
1uF
25V
OPT

R7747
0
1/16W
OPT

C7726
1uF
25V

3K

R7743

RE

OPT

0
1/16W

R7751
15K
1/16W

R7753
15K
1/16W
OPT

R7752
15K
1/16W

R7754
15K
1/16W
OPT

VCOM_P
C7741
10uF
16V

C7743
1uF
25V

VCOM_N
R7731
100 1%
1/16W

VCOM_LOOP

VDD

D7702

1/16W
OPT
C7749
1uF
50V

OPT
40V

R7734
GCLK

C7720
15pF
50V

R7742

PANEL_VCC

1/16W
FROM SOC

1/16W
OPT

OPT 1/16W

47

GCLK_SOC

DISCHG

VCC

R7736
3K
1/16W

47

MCLK_SOC
GMA14

FL8S050HA1
FL8S050HA1

GND

R7721
0
1/16W

GMA16
GMA15

Z_OUT

CLK4

VSENSE

22

VGL

VGL_I
R7741

R7735
100
1/16W

EO

23

R7716
0
1/16W
OPT

1/16W

VDD
GST

GMA18

10

EO

REVERSE

VCOM1

12

12

GST

24

14

13

VGL_I
VGH_EVEN

25

VGL
R7740

R7749
1K
1/16W
OPT

MCLK

13

VST

13

R7748
1K
1/16W
REVERSE

GCLK

RESET

DISCHG

VGL

MCLK

DISCHG

FROM SOC

16

GCLK

26

1/16W

17

VCOML_FB

27

1/16W

GIP_RST
FROM SOCGST_SOC

15

20

VGL

21

EPI

BI-SCAN

21

21

VDD

TPS65198
IC7701

22

22

ODD

28

AVDD

H_VDD

VGH_ODD

29

VGH_F

VGH_F
C7717
15pF
50V

20

TXACLKN

POS

FROM SOC

TXACLKP

23

19

TXB0N

24

NEG

23

CH4

18

TXB0P

VGH_R

VGH_R

OUT

24

EO

1/16W

FROM SOC

25

25

47

17

R7703
EO_SOC

26

26

CLK5

27

VGH2

FROM SOC

TXB1N

VGL

[EP]VGL
7

27

TXA4N

16

CH5

VGH1

TXB1P

TXA4P

THERMAL

28

28

RE

29

29

CLK6

30

30

<LEVEL SHIFTER BLOCK>

VCOM1

42

EPI_LOCK3

36

14

43

CLK6

40

Vcore

17

CLK5

CLK1_I

GMA16

39

CLK4

44

CLK2_I

GMA15

40

45

CLK3_I

41

46

CLK3

R7765
VCOM1

CLK4_I

GMA14

CLK2

CLK5_I

GMA12

42

CLK1

47

CLK6_I

43

48

R7723 R7724
0
0
1/16W 1/16W
OPT

VGH

C7744
1uF
50V

R7726
0
1/16W
OPT

R7732
0
1/16W
OPT

R7733
0
1/16W

VGH

EPI

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

2011.12.01

T-Con

77

LGE Internal Use Only

VDD
locate different direction for each

C7923
10uF
25V

C7926
10uF
25V

C7930
10uF
25V

VDD_EPI

C7924
10uF
25V

C7928
10uF
25V

locate different direction for each

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

BSD-NC4_H079-HD
2012.09.14
EPI_CAP

LGE Internal Use Only

eMMC I/F

A5
B2
B3
3.3V_EMMC

B4
B5

47K

B6

NC_23

DAT1

NC_24

DAT2

NC_25

DAT3

NC_26

DAT4

NC_27

DAT5

NC_28

DAT6

NC_29

DAT7

NC_30

R8116
10K

M6
M5

C5

A5

EMMC_DATA[3]
EMMC_DATA[4]

B2

EMMC_DATA[5]

B4

B3

EMMC_DATA[6]

B5

EMMC_SERIAL_22
AR8101
22
1/16W

EMMC_DATA[7]

B6

DAT1

NC_26

DAT2

NC_27

DAT3

NC_28

DAT4

NC_29

DAT5

NC_30

DAT6

NC_31

DAT7

NC_32
NC_33
NC_34

M6
M5

CLK

NC_35

CMD

NC_36
NC_37
NC_38

A6
A7
C5
E5
E8

EMMC_SERIAL_22
22

E10

EMMC_CMD

F10

EMMC_RST

G3
G10
H5

OPT

J5

C8107
10pF
50V

K6
K7
K10

EMMC_SERIAL_100

AR8100-*1 AR8101-*1 AR8102-*1


100
100
100
1/16W
1/16W
1/16W
EMMC_SERIAL_100

EMMC_SERIAL_100

eMMC serial 100 ohm option

P7
P10

NC_39

NC_4

NC_40

NC_23

NC_41

NC_42

NC_46

NC_43

NC_47

NC_44

NC_48

NC_45

NC_49

NC_52

NC_50

NC_58

NC_51

NC_59

NC_53

NC_66

NC_54

NC_73

NC_55

NC_80

NC_56

NC_81

NC_57

NC_82

NC_60

NC_116

NC_61

NC_119

NC_62
NC_63
NC_64

K5
RESET
OPT

C8100
0.1uF
16V

NC_65
NC_67
NC_68

C6
3.3V_EMMC

M4

3.3V_EMMC

N4
P3
EMMC_RESET_BALL

EMMC_CMD_BALL

EMMC_CLK_BALL

DAT6

DAT5

DAT4

DAT3

P5

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

C8105
0.1uF
16V

C8106
2.2uF
10V

E6
F5
J10
K9

VCC_1
VCC_2
VCC_3
VCC_4

EMMC_VDDI
C2
VDDI
C8104
1uF
10V

E7
G5
H10
K8

C8102
0.1uF
16V

C8103
2.2uF
10V

C4
N2
N5
P4
P6

VSS_1
VSS_2
VSS_3
VSS_4

NC_69

HYNIX_EMMC_4GB

AR8102

EMMC_CLK

E9

NC_3

NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92

VSSQ_1

NC_93

VSSQ_2

NC_94

VSSQ_3

NC_95

VSSQ_4

NC_96

VSSQ_5

NC_97
NC_98
NC_99

DAT3
DAT4

A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12

Dont Connect Power At VDDI

B13

EMMC_VDDI

B14
C1

(Just Interal LDO Capacitor)

DAT5

NC_100

A1

C3
C7

NC_1

NC_101

NC_2

NC_102

NC_5

NC_103

NC_6

NC_104

NC_7

NC_105

NC_8

NC_106

NC_9

NC_107

NC_10

NC_108

NC_11

NC_109

NC_12

NC_110

NC_13

NC_111

NC_14

NC_112

NC_15

NC_113

NC_16

NC_114

NC_17

NC_115

NC_18

NC_117

NC_19

NC_118

NC_20

NC_120

NC_21

NC_121

NC_22
NC_24

NC_122

NC_36

C9

E8

C10

E9

C11

E10

C12

F10

C13

G3
G10

C14
D1
D2

DAT5

H5
J5

D3

K6

D4

K7
K10

D12
D13

P7

D14

P10

E1

RFU_1

NC_37

RFU_2

NC_38

NC_21

NC_39

RFU_3

NC_40

RFU_4

NC_41

RFU_5

NC_42

RFU_6

NC_43

RFU_7

NC_44

RFU_8

NC_45

RFU_9

NC_46

RFU_10

NC_47

RFU_11

NC_48

RFU_12

NC_49

RFU_13

NC_50

RFU_14

NC_51

RFU_15

NC_52

RFU_16

NC_53

E2
K5

E3

RST_N

E12
E13
C6

E14
F1
F2

DAT6

M4
N4
P3

F3

P5

F12

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

F13
F14
G1

E6

G2

F5

G12

J10

G13

K9

VCC_1
VCC_2
VCC_3
VCC_4

G14
H1
C2

H2

VDDI

H3
H12
E7

H13

G5

H14
J1

H10

J2

K8

J3

C4

J12

N2
N5

J13
J14

EMMC_RESET_BALL

P4
P6

K1
K2

VSS_1

DU7
DU8

DUMMY_6
DUMMY_7
DUMMY_8

DUMMY_13
DUMMY_14
DUMMY_15
DUMMY_16

NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75

NC_82

VSSQ_5

NC_83
NC_84
NC_85

K12
K13

A1

K14

A2

L1

A8

L2

A9

L3

A10

L12

A11

L13

A12

L14

A13

M1

A14

M2

B1

M3

B7

M7

B8

M8

B9

M9

B10

M10

B11

M11

B12

M12

B13

M13

B14

M14

C1
C3

N1
N3

EMMC_CMD_BALL

N6

C7

NC_86
NC_1

NC_87

NC_2

NC_88

NC_3

NC_89

NC_4

NC_90

NC_5

NC_91

NC_6

NC_92

NC_7

NC_93

NC_8

NC_94

NC_9

NC_95

NC_10

NC_96

NC_11

NC_97

NC_12

NC_98

NC_13

NC_99

NC_14

NC_100

NC_15

NC_101

NC_16

NC_102

NC_17

NC_103

NC_18

NC_104

NC_19

NC_105

NC_20

NC_106

NC_22

NC_107

C10

A5

C11

B2

C12

B3

C13

B4

C14

B5
B6

D1
D2

DAT0

NC_25

DAT1

NC_26

DAT2

NC_27

DAT3

NC_28

DAT4

NC_29

DAT5

NC_30

DAT6

NC_31

DAT7

NC_32
NC_33

D3
D4

M6

D12

M5

D13

NC_34
CLK

NC_35

CMD

NC_36
NC_37

D14

NC_38

A6

E1
E2

A7

E3

C5

E12

E5

E13

E8

E14

E9
E10

F1
F2

F10

F3

G3

F12

G10

F13

H5

F14

J5

G1

K6

G2

K7
K10

G12
G13

P7

G14

P10

H1

NC_3

NC_39

NC_4

NC_40

NC_23

NC_41

NC_42

NC_46

NC_43

NC_47

NC_44

NC_48

NC_45

NC_49

NC_52

NC_50

NC_58

NC_51

NC_59

NC_53

NC_66

NC_54

NC_73

NC_55

NC_80

NC_56

NC_81

NC_57

NC_82

NC_60

NC_116

NC_61

NC_119

NC_62

H2
K5

H3

RESET

H12
H13
C6

H14
J1

M4

J2

N4
P3

J3

P5

J12

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

J13
J14
K1

E6

K2

F5
J10

K3

K9

K12

VCC_1
VCC_2
VCC_3
VCC_4

K13
K14
C2

L1

VDDI

L2
L3
E7

L12
L13

G5

L14

H10
K8

M1
M2

C4

M3

N2
N5

M7
M8

P4

M9

P6

M10

VSS_1
VSS_2
VSS_3
VSS_4

NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92

VSSQ_1

NC_93

VSSQ_2

NC_94

VSSQ_3

NC_95

VSSQ_4

NC_96

VSSQ_5

NC_97
NC_98

M11

NC_99

M12
M13

A1

M14

A2

N1

A8

N3

A9

N6

A10

N7

A11

N8

A12

N9

A13

N10

A14

N11

B1

N12

B7

N13

B8

N14

B9

P1

B10

P2

B11

P8

B12

P9

B13

P11

B14

P12

C1

P13

C3

P14

C7

NC_100
NC_1

NC_101

NC_2

NC_102

NC_5

NC_103

NC_6

NC_104

NC_7

NC_105

NC_8

NC_106

NC_9

NC_107

NC_10

NC_108

NC_11

NC_109

NC_12

NC_110

NC_13

NC_111

NC_14

NC_112

NC_15

NC_113

NC_16

NC_114

NC_17

NC_115

NC_18

NC_117

NC_19

NC_118

NC_20

NC_120

NC_21

NC_121

NC_22

NC_122

NC_24

NC_123

C8

A3

C9

A4

C10

A5

C11

B2

C12

B3

C13

B4

C14

B5
B6

D1
D2

NC_26

DAT2

NC_27

DAT3

NC_28

DAT4

NC_29

DAT5

NC_30

DAT6

NC_31

DAT7

NC_32
NC_33

D3
D4

M6

D12

M5

NC_34

D13

CLK

NC_35

CMD

NC_36
NC_37

D14

NC_38

A6

E1
E2

A7

E3

C5

E12

E5

E13

E8

E14

E9
E10

F1
F2

F10

F3

G3

F12

G10

F13

H5

F14

J5

G1

K6

G2

K7
K10

G12
G13

P7

G14

P10

H1

NC_3

NC_39

NC_4

NC_40

NC_23

NC_41

NC_42

NC_46

NC_43

NC_47

NC_44

NC_48

NC_45

NC_49

NC_52

NC_50

NC_58

NC_51

NC_59

NC_53

NC_66

NC_54

NC_73

NC_55

NC_80

NC_56

NC_81

NC_57

NC_82

NC_60

NC_116

NC_61

NC_119

NC_62
NC_63

H2

NC_64

K5

H3

RSTN

H12
H13
C6

H14
J1

M4

J2

N4

VDD_1
VDD_2
VDD_3

P3

J3

VDD_4

P5

J12

VDD_5

J13
J14
K1

E6

K2

F5

VDDF_1
VDDF_2

J10

K3

VDDF_3

K9

K12

VDDF_4

K13
K14
C2

L1

VDDI

L2
L3
C4

L12
L13

E7

L14

G5

VSS_1
VSS_2
VSS_3

H10

M1
M2

K8

M3

N2
N5

M7
M8

P4

M9

P6

M10

NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91

VSS_4

NC_92

VSS_5

NC_93

VSS_6

NC_94

VSS_7

NC_95

VSS_8

NC_96

VSS_9

NC_97
NC_98

M11

NC_99

M12
M13

A1

M14

A2

N1

A8

N3

A9

N6

A10

N7

A11

N8

A12

N9

A13

N10

A14

N11

B1

N12

B7

N13

B8

N14

B9

P1

B10

P2

B11

P8

B12

P9

B13

P11

B14

P12

C1

P13

C3

P14

C7

NC_100
NC_1

NC_101

NC_2

NC_102

NC_5

NC_103

NC_6

NC_104

NC_7

NC_105

NC_8

NC_106

NC_9

NC_107

NC_10

NC_108

NC_11

NC_109

NC_12

NC_110

NC_13

NC_111

NC_14

NC_112

NC_15

NC_113

NC_16

NC_114

NC_17

NC_115

NC_18

NC_117

NC_19

NC_118

NC_20

NC_120

NC_21

NC_121

NC_22

NC_122

NC_24

NC_123

C9
C10
C11
C12
C13
C14
D1

A3
A4
A5
B2
B3
B4
B5
B6

C8
DAT0

NC_23

DAT1

NC_24

DAT2

NC_25

DAT3

NC_26

DAT4

NC_27

DAT5

NC_28

DAT6

NC_29

DAT7

NC_30

D2
D3
D4
D12

NC_31
NC_32

M6
M5

CLK

NC_33

CMD

NC_34

D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14

NC_35
NC_36

A6
A7
C5
E5
E8
E9
E10
F10
G3
G10
H5
J5
K6
K7
K10
P7
P10

RFU_1

NC_37

RFU_2

NC_38

NC_21

NC_39

RFU_3

NC_40

RFU_4

NC_41

RFU_5

NC_42

RFU_6

NC_43

RFU_7

NC_44

RFU_8

NC_45

RFU_9

NC_46

RFU_10

NC_47

RFU_11

NC_48

RFU_12

NC_49

RFU_13

NC_50

RFU_14

NC_51

RFU_15

NC_52

RFU_16

NC_53

H1

NC_54

H2

NC_55

H3

K5
RSTN

H12
H13
H14
J1
J2
J3
J12

C6
M4
N4
P3
P5

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

J13
J14
K1
K2
K3
K12

E6
F5
J10
K9

VCC_1
VCC_2
VCC_3
VCC_4

K13
K14
L1

C2
VDDI

L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9

E7
G5
H10
K8
C4
N2
N5
P4
P6

VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7

NC_1

NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87

NC_2

NC_88

NC_3

NC_89

NC_4

NC_90

NC_5

NC_91

NC_6

NC_92

NC_7

NC_93

NC_8

NC_94

NC_9

NC_95

NC_10

NC_96

NC_11

NC_97

NC_12

NC_98

NC_13

NC_99

NC_14

NC_100

NC_15

NC_101

NC_16

NC_102

NC_17

NC_103

NC_18

NC_104

NC_19

NC_105

NC_20

NC_106

NC_22

NC_107

C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

N9
N10
N11
N12
N13
N14
P1
P2
P8

IC8100-*8
H26M42002GMR
IC8100-*5
KLM4G1FE3B-B001

EMMC_CLK_BALL

P9

A5
B2
B4
B5
B6

DAT0

NC_25

DAT1

NC_26

DAT2

NC_27

DAT3

NC_28

DAT4
DAT5
DAT6
DAT7

P12

M6
M5

CLK
CMD

P13
A6

P14

A7
C5
E5
E8

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116

K5
RSTN

DU10

C6
M4

DU11

N4
P3
P5

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5

DU12

E6
F5

DU13
DU14
DU15

J10
K9

VDDF_1
VDDF_2
VDDF_3
VDDF_4

C2
VDDI

E7
G5
H10

DU16

IC8100-*7
KLMAG2GE4A-A001
A4

B3

P11

IC8100-*6
THGBM5G6A2JBAIR

A3
A3
A4

K8
C4
N2
N5
P4

VSS_2
VSS_3
VSS_4
VSS_5
VSS_1
VSS_6
VSS_7
VSS_8
VSS_9

A1
A2
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C7

NC_1
NC_2
NC_5
NC_6
NC_7
NC_8

NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_53
NC_54
NC_55
NC_56
NC_57
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92
NC_93
NC_94
NC_95
NC_96
NC_97
NC_98
NC_99
NC_100
NC_101
NC_102
NC_103
NC_104
NC_105
NC_106

NC_9

NC_107

NC_10

NC_108

NC_11

NC_109

NC_12

NC_110

NC_13

NC_111

NC_14

NC_112

NC_15

NC_113

NC_16

NC_114

NC_17

NC_115

NC_18

NC_117

NC_19

NC_118

NC_20

NC_120

NC_21

NC_121

NC_22

NC_122

NC_24

NC_123

C8

A3

C9

A4

C10

A5

C11

B2

C12

B3

C13

B4

C14

B5

D1

B6

DAT0

NC_23

DAT1

NC_24

DAT2

NC_25

DAT3

NC_26

DAT4
DAT5
DAT6
DAT7

D2
D3
D4

M6

D12

M5

CLK
CMD

D13
D14
E1

A6

E2

A7

E3

C5

E12

E5

E13

E8

E14

E9

F1

E10

F2

F10

F3
F12
F13

G3
G10
H5

F14

J5

G1

K6

G2
G12

K7
K10

G13

P7

G14

P10

RFU_1
RFU_2
NC_21
RFU_3
RFU_4
RFU_5
RFU_6
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
RFU_16

H1
H2
H3

K5
RSTN

H12
H13
H14

C6

J1

M4

J2

N4

J3

P3

J12

P5

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

J13
J14
K1

E6

K2

F5

K3

J10

K12

K9

VCC_1
VCC_2
VCC_3
VCC_4

K13
K14
L1

C2
VDDI

L2
L3
L12

E7

L13

G5

L14

H10

M1

K8

M2

C4

M3

N2

M7

N5

M8

P4

M9

P6

VSS_1
VSS_2
VSS_3
VSS_4
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5

M10
M11
M12
M13
M14

A1
A2

N1

A8

N3

A9

N6

A10

N7

A11

N8

A12

N9

A13

N10

A14

N11

B1

N12

B7

N13
N14
P1

B8
B9
B10

P2

B11

P8

B12

P9

B13

P11

B14

P12

C1

P13

C3

P14

C7

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6

NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91
NC_92

NC_7

NC_93

NC_8

NC_94

NC_9

NC_95

NC_10

NC_96

NC_11

NC_97

NC_12

NC_98

NC_13

NC_99

NC_14

NC_100

NC_15

NC_101

NC_16

NC_102

NC_17

NC_103

NC_18

NC_104

NC_19

NC_105

NC_20

NC_106

NC_22

NC_107

C8

A3

C9

A4

C10

A5

C11

B2

C12

B3

C13

B4

C14

B5

D1

B6

C8
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7

D2
D3
D4

M6

D12

M5

CLK
CMD

D13
D14
E1

A6

E2

A7

E3

C5

E12

E5

E13

E8

E14

E9

F1

E10

F2

F10

F3
F12
F13

G3
G10
H5

F14

J5

G1

K6

G2
G12

K7
K10

G13

P7

G14

P10

RFU_1
RFU_2
RFU_3
RFU_4
RFU_5
RFU_6
NC_39
RFU_7
RFU_8
RFU_9
RFU_10
RFU_11
RFU_12
RFU_13
RFU_14
RFU_15
NC_104

H1
H2
H3

K5
RESET

H12
H13
H14

C6

J1

M4

J2

N4

J3

P3

J12

P5

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5

J13
J14
K1

E6

K2

F5

K3

J10

K12

K9

VDDF_1
VDDF_2
VDDF_3
VDDF_4

K13
K14
L1

C2
VDDI

L2
L3
L12

E7

L13

G5

L14

H10

M1

K8

M2

C4

M3

N2

M7

N5

M8

P4

M9

P6

VSS_2
VSS_3
VSS_4
VSS_9
VSS_1
VSS_5
VSS_6
VSS_7
VSS_8

M10
M11
M12
M13
M14

A1
A2

N1

A8

N3

A9

N6

A10

N7

A11

N8

A12

N9

A13

N10

A14

N11

B1

N12

B7

N13
N14
P1

B8
B9
B10

P2

B11

P8

B12

P9

B13

P11

B14

P12

C1

P13

C3

P14

C7

NC_1
NC_2
NC_3
NC_4

NC_22
NC_23
NC_24
NC_25
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_40
NC_41
NC_42
NC_43
NC_44
NC_45
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_52
NC_53
NC_54
NC_55
NC_56
NC_57
NC_58
NC_59
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_66
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_73
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_80
NC_81
NC_82
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90

NC_5

NC_91

NC_6

NC_92

NC_7

NC_93

NC_8

NC_94

NC_9

NC_95

NC_10

NC_96

NC_11

NC_97

NC_12

NC_98

NC_13

NC_99

NC_14

NC_100

NC_15

NC_101

NC_16

NC_102

NC_17

NC_103

NC_18

RFU_16

NC_19

NC_105

NC_20

NC_106

NC_21

NC_107

C9

A5

C10

B2

C11

B3

C12
C13
C14

B4
B5
B6

D1

M6
M5

DU2
DU4
DU5
DU6
DU7
DU8

DUMMY_1

DUMMY_9

DUMMY_2

DUMMY_10
DUMMY_11

DUMMY_4

DUMMY_12

DUMMY_5

DUMMY_13

DUMMY_6

DUMMY_14

DUMMY_7

DUMMY_15

DUMMY_8

DUMMY_16

CLK
CMD

D13
E1
E2
E3

A6
A7

E12

C5

E13

E5

E14
F1

E8
E9

F2
F3
F12

E10
F10

F13

G3

F14

G10

G1
G2

H5
J5

G12
G13
G14
H1

K6
K7
K10

H2

P7

H3

P10

NC_3
NC_4
NC_23
NC_42
NC_43
NC_44
NC_45
NC_52
NC_58
NC_59
NC_66
NC_73
NC_80
NC_81
NC_82
NC_116
NC_119

H12
H13
H14
J1

K5
RESET

J2
J3
J12
J13

C6
M4

J14
K1

N4

K2

P3

K3

P5

VCCQ_1
VCCQ_2
VCCQ_3
VCCQ_4
VCCQ_5

K12
K13
K14

E6

L1
L2
L3
L12

F5
J10
K9

VCC_1
VCC_2
VCC_3
VCC_4

L13
L14
M1

C2

M2

VDDI

M3
M7
M8
M9
M10
M11

E7
G5
H10
K8

M12
M13
M14

C4
N2

N1

N5

N3

P4

N6

P6

N7

VSS_1
VSS_2
VSS_3

NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_46
NC_47
NC_48
NC_49
NC_50
NC_51
NC_53
NC_54
NC_55
NC_56
NC_57
NC_60
NC_61
NC_62
NC_63
NC_64
NC_65
NC_67
NC_68
NC_69
NC_70
NC_71
NC_72
NC_74
NC_75
NC_76
NC_77
NC_78
NC_79
NC_83
NC_84
NC_85
NC_86
NC_87
NC_88
NC_89
NC_90
NC_91

VSS_4

NC_92

VSSQ_1

NC_93

VSSQ_2

NC_94

VSSQ_3

NC_95

VSSQ_4

NC_96

VSSQ_5

NC_97

N8

NC_98

N9

NC_99

N10
N11

A1

N12

A2

N13
N14

A8
A9

P1
P2
P8

A10
A11

P9

A12

P11

A13

P12
P13

A14
B1

P14

B7

DU9

DUMMY_3

DAT5
DAT6

D14

B9

DU3

NC_26
NC_27

DAT3
DAT4

D3
D4
D12

NC_25

DAT1
DAT2

DAT7

B10
DU1

C8
DAT0

D2

B8

Copyright 2013 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

NC_25

DAT1

N8

P6

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

C8
DAT0

N7

DU9

DUMMY_5

NC_68

VSSQ_4

NC_119

DU6

NC_67

NC_81

P7

DU5

NC_66

VSSQ_3

P10

DUMMY_12

NC_65

NC_80

K7

DUMMY_4

NC_64

VSSQ_2

K10

DUMMY_11

NC_63

NC_79

H5

DUMMY_3

NC_62

VSSQ_1

J5

DU4

NC_61

NC_78

K6

DU3

NC_60

VSS_4

G3

DUMMY_10

NC_59

NC_77

G10

DUMMY_2

NC_58

VSS_3

E9

DU2

NC_57

NC_76

E10

DUMMY_9

NC_56

VSS_2

F10

DUMMY_1

NC_55

K3

NC_123

DU1

NC_54

A4

HYNIX_EMMC_8GB

A4

EMMC_DATA[2]

NC_25

NC_34

A3

C9

SAMSUNG_EMMC_16G

EMMC_DATA[1]

E5

C8
DAT0

CMD

A6
A7

EMMC_DATA[0]

NC_33
NC_35

IC8100
H26M31002GPR

A3

CLK

TOSHIBA_EMMC_4GB

R8117
10K

10K
R8107

10K

10K

10K
R8104

R8106

R8105

10K

10K

10K

10K
R8103

R8102

EMMC DATA LINE


10K PULL/UP
FOR M13

NC_32

SAMSUNG_EMMC_4GB

EMMC_DATA[0-7]

R8100

EMMC_SERIAL_22
AR8100
22
1/16W

R8101

R8107-*1

R8104-*1

R8106-*1

R8105-*1

R8103-*1

R8102-*1

R8101-*1

R8100-*1

NC_31

C8

TOSHIBA_EMMC_8GB

47K

47K

47K

47K

47K

47K

47K

EMMC DATA LINE 47K PULL/UP

DAT0

IC8100-*4
THGBM5G7A2JBAIR

IC8100-*3
KLM2G1HE3F-B001

TOSHIBA_EMMC_16GB

A4

HYNIX_EMMC_2GB

A3

IC8100-*2
H26M21001ECR

SAMSUNG_EMMC_2GB

IC8100-*1
THGBM5G5A1JBAIR

DU10

B11
B12

DU11
DU12

B13

DU13

B14

DU14

C1

DU15

C3

DU16

C7

NC_100
NC_1

NC_101

NC_2

NC_102

NC_5

NC_103

NC_6

NC_104

NC_7

NC_105

NC_8

NC_106

NC_9

NC_107

NC_10

NC_108

NC_11

NC_109

NC_12

NC_110

NC_13

NC_111

NC_14

NC_112

NC_15

NC_113

NC_16

NC_114

NC_17

NC_115

NC_18

NC_117

NC_19

NC_118

NC_20

NC_120

NC_21

NC_121

NC_22

NC_122

NC_24

NC_123

C9
C10
C11
C12
C13
C14
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E12
E13
E14
F1
F2
F3
F12
F13
F14
G1
G2
G12
G13
G14
H1
H2
H3
H12
H13
H14
J1
J2
J3
J12
J13
J14
K1
K2
K3
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2
M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P8
P9
P11
P12
P13
P14

eMMC

11.09.29
81

LGE Internal Use Only

2013 LED/LCD TV
Engineering guide

< Applicable Model : High-end Platform >

EPI Interface

EPI(Embedded Point-Point Interface)


TCON

Features

Point-Point topology (support 2 Pair option)


CDR (Clock Data Recovery)
Bandwidth up to 1.85Gbps/pair
at FHD 120Hz 10 bit application
Lock signal cascading and feedback to T-Con
Embedded Control Data

Merits

Better reliability on common noise


No data skew and better EMI margin
Fewer lines than mini-LVDS
Slim PCB design

LOCK
2
VCC

Figure1. Topology

EPI Interface (mini-LVDS vs. EPI)

Comparison

What to change

HF mini-LVDS

LCM (T-con to S-Driver IC)


FHD (10bit)

HF miniLVDS

60Hz

120Hz

240Hz

No. of Signal

36

36

72

Connector

60pin
(2ea)

60pin
(2ea)

80pin
(2ea)

-Difficult to upgrade bandwidth limit


-Multiple number of wires needed for higher bandwidth

HF mini-LVDS TCON
18
VCC

18

(FHD 120Hz)

EPI (Embedded clock P-to-P Interface)


FHD (10bit)
EPI

60Hz

120Hz

240Hz

960ch

960ch

720ch

No. of Signal

12

12

32

Connector

50 pin
(2ea)

70pin
(2ea)

-Better reliability on common noise


-No data skew. Better EMI margin
-Lower cost ( Cable, Connector )
-Slim S-PCB design (14mm 10mm) helps slimmer TV

EPI

TCON

LOCK
2
VCC

(FHD 120Hz)
* Bandwidth Capability
- FHD 120Hz 10Bit : 594Mbps@36Lines 1.65Gbps@12Lines
- FHD 240Hz 10Bit : 594Mbps@72Lines 1.25Gbps@32Lines

EPI Interface (mini-LVDS vs. EPI)


HF mini-LVDS

EPI

TCON

TCON
Lock

Topology
1

Protocol

Features
@10bit, FHD120

Merit

Demerit

Multi Drop
Data rate: 660Mbps
External clock

Point to Point
Data rate : 1.8Gbps
Embedded clock, Control

Simple structure
Standardization

Fewer Lines : 12
Embedded clock
: low EMI, Clock skew free
Easy to PCB design

Too many lines : 36


Clock skew
EMI due to clock lines
Bandwidth limit

Transmission Overhead
: 4bit delimiter

NFC (Near field communication)

User Action Area

Near field communication (NFC) is a set of standards for smartphones and similar devices to establish radio communication
with each other by touching them together or bringing them into close proximity, usually no more than a few centimetres.
Present and anticipated applications include contactless transactions, data exchange, and simplified setup of more complex
communications such as Wi-Fi. Communication is also possible between an NFC device and an unpowered NFC chip, called
a "tag".

From Smart phone


to TV

Samrt phone close to


NFC Tag

Player choose

From TV
to Smart phone

Main PCB for Broadband

Main + TCON all in one

xxLA790V-Zx

Chassis : LD34D
PCB P/No : EAX65040103

To PSU
5

Main processor, DDR Memory


eMMC Memory

Micom for Key/IR/Logo sensing

PMIC

Audio AMP

EPI Wafer

Level shifter

To module
6
2

WIFI/BT
Front Spk
Key+IR+Logo

Main PCB for Broadband


xxLA860V-Zx

Main + TCON all in one

Chassis : LD34D
PCB P/No : EAX65040103

To Camera

To PSU

Main processor, DDR Memory


eMMC Memory

Micom for Key/IR/Logo sensing

PMIC

Audio AMP

EPI Wafer

Level shifter

USB 3.0

5
1

To module
6

WIFI/BT
Front Spk
Key+IR+Logo

Main PCB for Broadband


xxLA960V-Zx

Main + TCON all in one

To LED Driver
To Woofer

Chassis : LD34D
PCB P/No : EAX65040103

To Camera

Main processor, DDR Memory


eMMC Memory

Micom for Key/IR/Logo sensing

USB 3.0

Audio AMP

LVDS Wafer

To PSU
5
1
3

To module

WIFI/BT
Front Spk
Key+IR+Logo

1. H13 Block Diagram (External)


PC_Audio_L/R

PC_AUDIO

AV1_CVBS
AV1_Audio L/R

AV1

H13
LG1154AN

Comp1 Y,Pb,Pr

COMP1

M-Remote_Rx/Tx

DAC_DATA
HSR_P/M
AAD_DATA
CVBS
BB_TP_DATA
AUD

Motion-R

SPDIF

H13
LG1154D

SC_CVBS, RGB, Audio L/R


SCART

DTV/MNT_LR/V_OUT

OPTIC

H/P Audio L/R

I2S

H/P AMP

Audio
AMP

H/P
Line out
SPK

Tuner
Woofer

LNB

SPDIF_OUT_ARC

CI

HDMI1

CI
HDMI
Switch

HDMI2
HDMI3
MHL
1A

HDMI4
PMIC

HDMI_CEC
FRC
TCON

EPI
LEVEL
SHIFTER

Logo Light
WOL / WOW
RMII
LAN

PHY
USB 2.0

USB_W-iFi
USB 3.0
USB1(USB3.0)
USB 2.0
USB2(USB2.0)
USB3(USB2.0)

USB 2.0

OCP
1A

X-TAL
24MHZ

OCP
1A
16

DDR3
4Gb2
(1600)

16

DDR3
4Gb2
(1600)

eMMC
4GB1

2. LG1154 I2C Map


+3.3V_NOR

23 [SDA]

24 [SCL]
23 [SDA]

I2C_SCL1

33

I2C_SDA1

33

AR15
[SCL0/GPIO66]
AP15
[SDA0/GPIO65]

I2C_SCL_MICOM_SOC

[P60/SCLA0]
33

[P61/SDAA0]

33

[SDA] 8

AP6
[SCL3]

I2C_SCL4

22

AR6
[SDA3]

I2C_SDA4

22

I2C_SDA_MICOM_SOC
33

AR16
[SCL1/GPIO64]
AP16
[SDA1/GPIO79]

3.3k
I2C_SCL6

33

AH33
[SDA5]

I2C_SDA6

33

33

I2C_SDA2_SOC

AP17
[SCL2/GPIO78]
AR17
[SDA2/GPIO77]

AH32
[SCL4]

I2C_SCL5

AJ33
[SDA4]

I2C_SDA5

3.3k

3.3k

3.3k

3.3k
[SDA]

I2C_SCL2_SOC
33

[D_SDA]

35

[SCL_T]

[SDA_T]

+3.3V_NOR
33

[SCL]

[D_SCL]

TU6503
TDSQ-G651D
TUNER_T2/C/S2

AH34
[SCL5]

+3.3V_NOR

27
IC7700
TPS65178RSLR
28
EPI

IC6900
A8303SESTR-T
LNB

+3.3V_TU

H13
LG1154D

3.3k

3.3k
1

[SCL] 7

33

+3.3V_NOR

IC3000
R5F100GEAFB
RENESAS
MICOM

3.3k

3.3k

33

33

3.3k

IC5600
TAS5733
AMP MAIN

[SCL]

3.3k

IC5700
TAS5733
AMP WOOFER

24

3.3k

+3.3V_TU

33

33
33

[SCL] 6
[SDA] 5

IC102
R1EX24256BSAS0A
NVRAM

[CSCL]

63

[CSDA]

62

IC3201
SII9587CNUC
HDMI_SW

3. Power Block Diagram


MICOM
IR Assy
Logo Light Assy
Wi-Fi Assy
Ethernet PHY

3.5V

PANEL_VCC
LNB
SCART AMP

12V
H13-D (VDD25)
H13-D (AVDD25)
H13-D (XTAL_VDDP)
H13-D (HDMI_VQPS)
H13-A (VDD25_CVBS)
H13-A (VDD25_AUD)
H13-A (VDD25_COMP)
H13-A (VDD25_VSB)
H13-A (VDD25_APLL)
H13-A(AVDD33)
H13-A (VDD_XTAL)
H13-A (SDRAM_VDDQ)
H13-A (AUAD_REF)
H13-A (VDD25_REF)

1.5V DDR
3A

H13-D (VDDC)
DDR (VDD)
DDR (VDDQ)

1.0V Core
3A

H13-A (VDDC10)
H13-A (AVDD10)
H13-A (XTAL)

1.2V Core
8A

H13-D (VDDC11)
H13-D (AVDD11)
H13-D (XTAL)

3.3V Normal
4A
1.8V_TU
2.5V Normal
1.5A

5V Normal
5A

24V
AUDIO AMP

1.23V_TU
2A

HDMI SW
SPDIF
Video Driver
AUDIO AMP
Headphone AMP
NVRAM
H13-D (VDD33)
H13-D (AVDD33)
H13-A (VDD33)
H13-A(AVDD33)
H13-A (VDD_XTAL)
EMMC(VCC)
EMMC(VCCQ)
TUNER(+3.3V_TU)

USB
HDMI SW
CI Slot

4. Tuner/CI Block Diagram


TDSQG651D
[+3.3V_S2_DEMOD] 32

+3.3V_D_Demod
+3.3V_TU
+1.8_TU
+1.23V_D_Demod
+3.3V_NORMAL

[+3.3V_TUNER] 5
[+.1.8V_TUNER] 7

CI Slot

3.3K

[+1.23V_S2_DEMOD] 30

PCM_5V_CTL

LNB_TX
[S2_F22_OUTPUT] 33
[LNB] 36
[S2_SCL] 34
[S2_SDA] 35

2 [LNB]

22
I2C_SCL4
I2C_SDA4

7 [SCL]

LNB
IC6900
A8303SESTR-TB

[SLC] 3
[SDA] 4

[ERROR] 16
[SYNC] 17
[VALID] 18
[MCLK] 19

100

+5V_CI_ON

LG1154

/TU_RESET1

AG6[GPIO10]

H32
[CAM_VCCEN_N]
D32[CAM_CD1_N]

IC2_SDA6
IC2_SCL6

AH33 [SDA5]

F34[CAM_CE2_N]

FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_CLK

AL37[TP_DVB_ERR]
AL36 [TP_DVB_SOP]
AL35 [TP_DVB_VAL]
AM36 [TP_DVB_CLK]

G34[CAM_RESET]

FE_DEMOD1_TS_DATA [0-7]
[TP_DVB_DATA0-7]

E33[CAM_WAIT]
D33[CAM_INPACK]
D34[CAM_REG]
F32[CAM_IREQ]

[S2_RESET] 31

/S2_RESET

J36[EB_OE]
AM18 [ADIN7_SRV]

H35[EB_WE]

CVBS

V15[CVBS_IN1]

TUNER_SIF

VS1
CARD_EN1
CARD_EN2

/PCM_IOWR

IOWR

/PCM_IORD

IORD

CI_ADDR[0-14]

CI_A_ADDR[0-14]

CI_DATA[0-7]

CI_A_DATA[0-7]
PCM_RST

DATA[0-7]

CI_WAIT
INPACK

/PCM_REG

REG

/PCM_IRQA

/IRQA

/PCM_OE
/PCM_WE

O_EN
WR_EN

CI_TS_CLK
CI_TS_VAL

B28[TPI_VAL]

ADDR[0-14]

CI_RESET

/PCM_WAIT
PCM_INPACK

CI_TS_SYNC

B29[TPI_SOP]
[SIF] 6

CI_DET2

/PCM_CE2

A28[TPI_CLK]
[CVBS] 8

CI_DET1

/PCM_CE1

H36[EB_BE_N1]

[EB_ADDR0-14]

10K

/CI_CD1
CI_VS1

H37[EB_BE_N0]

[EB_DATA0-7]

[D0-7] 20-27

+5V_NORMAL

/CI_CD2

G32[CAM_VS1_N]
F33[CAM_CE1_N]

33

10K

E32[CAM_CD2_N]

AH34 [SCL5]

33

VCC

8 [SDA]

AP6 [SCL3]
AR6 [SDA3]
[RESET] 2

+5V_CI_ON

CI 5V
Power detect

10 [TONECTRL]

LNB_OUT

TS_OUT_CLK
TS_OUT_VAL
TS_OUT_SYNC

H18[AAD_ADC_SIF]
TPI_DATA[0-7]

100

CI_TS_DATA[0-7]

TPO_DATA[0-7]

33

CI_IN_TS_DATA[0-7]

5. Video & Audio IN


Jack Side

SOC Side

AV1
Phone JACK
AV1_CVBS_IN

AV1_CVBS_IN_SOC
[CVBS_IN3]

COMP1/AV1/DVI_L_IN

AUAD_L/R_CH2_IN
[AUAD_L/R_CH2_IN]

FULL
SCART
(18P)
SC_CVBS_IN

SC_CVBS_IN_SOC
[CVBS_IN2]

SC_R
SC_G
SC_B
SC_CVBS_IN_SOY

SC_FB
SC_ID

SC_L/R_IN

COMP1_PR_IN_SOC
COMP1_Y_IN_SOC
COMP1_PB_IN_SOC
COMP1_Y_IN_SOC_SOY

SC_FB_SOC
SC_ID_SOC

[PR1/Y1/PB1/SOY1_IN]

[SC1_SID]
[SC1_FB]

H13
(LG1154AN)

AUAD_L/R_CH3_IN
[AUAD_L/R_CH3_IN]

Component
1
Phone JACK

COMP2_PB_IN_SOC
COMP2_Y_IN_SOC
COMP2_Y_IN_SOC_SOY
COMP2_PR_IN_SOC
COMP1_Y/Pb/Pr

[PB2/Y2/SOY2/PR2_IN]

Tuner
TU_CVBS
TUNER_SIF_TU
DIF[P/N]

TU_CVBS_ISOC
TUNER_SIF
ADC_I_INP/INN

[CVBS_IN1]

[AAD_ADC_SIF]
[ADC_I_INP/INN]

6. AUDIO OUT
SCART_MUTE

MICOM

Mute
CTRL
[TR]

COMP1/AV1/DVI_L_IN
[AUAD_L_CH2_IN]
[AUD_SCART_OUTL/OUTR]

SCART_Lout/Rout

AZ4580MTR
OP AMP

DTV/MNT_L/R_OUT

filter

SCART

AUDIO L/R OUT

SC_L/R_IN
[AUAD_L_CH3_IN]
[DACSCK]
[DACLRCK] AUD_SCK/LRCK/LRCH
[DACLRCH]
[SCL0/SDA0]

H13
LG1154

MAIN

4P wafer
LPF

TAS5733

I2C_SCL1/SDA1

LPF

AMP_RESET_N

LPF

Tuner

AMP_MUTE

MICOM
SIDE_HP_MUTE

TUNER_SIF
[AAD_ADC_SIF]
HP_L/ROUT_MAIN
[AUDA_OUTL]
[PHY0_ARC_OUT_0] [IEC958OUT]

TPA6138A2
Headphone
AMP

HEADPHONE
LPF
Phone Jack

LINE OUT
SPDIF_OUT

SPDIF_OUT_ARC

7. HDMI
HDMI_HPD_1 ~ 4

5V_HDMI_1 ~ 4

HDMI1
SPDIF_OUT_ARC
CEC_REMOTE

TMDS Link 8bits

HDMI_HPD_1

HDMI_S/W_RESET
DDC_I2C 2bits

5V_HDMI_1

HDMI_INT

SPDIF_OUT_ARC

H13D
(IC100 / LG1154D)

HDMI Switch
(IC3201 / SII9587CNUC)

HDMI2
TMDS Link 8bits

CEC_REMOTE

HDMI Out put 8bits

HDMI_HPD_2
DDC_I2C 2bits

5V_HDMI_2

I2C_SCL/SDA 5 2bits

HDMI3
TMDS Link 8bits

CEC_REMOTE
HDMI_HPD_3

CEC_REMOTE
DDC_I2C 2bits

MICOM
(IC3000 / R5F100GEAFB)

HDMI4
TMDS Link 8bits
DDC_I2C 2bits

MHL OCP
(IC3202 / TPS2554)

5V_HDMI_3

MHL_DET

CEC_REMOTE
HDMI_HPD_4
5V_HDMI_4

8. Panel Interface Block Diagram

VCC

TX0P/N (EPI CH1 )

32/31

TX1P/N (EPI CH2 )

28/27

TX2P/N (EPI CH3 )

24/23

SWN
VGL_FB
CTRLN
VCOMLFB/RFB

CTRLP

VDD

VGH_FB
SWP

V core

VDD

VDD
VGL_I

VCOM_LOOP

50

DISCHG
VGL
VST
GIP_RST

VGL
VGH
GCLK

LEVEL SHIFTER
IC7701
TPS65198

38
37
36
35

H_VDD

VCOM

34

VDD

VGH_EVEN/ODD

39/40

VGH_F/R

41/42

CLK1/2/3/4/5/6

48~43

GMA_4/5/7/12/14/15

TX_LOCKN

VCC18
V core

50~39

TX3P/N (EPI CH4 )

32/31

TX4P/N (EPI CH5 )

24/23

TX5P/N (EPI CH6 )

20/19

EPI_LOCK6_SOURCE

14

15

EPI_LOCK3

VCOM_P/N

Z_OUT

PANEL_VCC

EO

V core

H_VDD

I2C_SCL2

GST

VCC18

13

I2C_SDA2

MCLK

1~12

H_VDD

PMIC_RESET

H13
IC100
LG1154D

36

GMA_1/3/4/5/7/9/10/12/14/15/16/18

VCOM_DYN

VCC18

PMIC
IC7700
TPS65178RSLR

3~8
10/9
12/11
17
16
15
14

EPI 50P_LEFT
(LVDS_51PIN Side)

9. PMIC & Level Shift Bloc Diagram


PANEL_VCC

Boost Converter

Buck 1 converter(VCC)

Buck 2 converter(Vcore)
Buck 3 converter(HVdd)
Buck 4 converter(VCC18)

Vdd

VCC

Vcore
HVdd

SWN
Positive Charge Pump Controller
Negative Charge Pump Controller

6-Ch Gamma Buffer(DAC output)

CTRLN

SWP
CTRLP
GAM4/5/7/12/14/15
VCOM_P

Vcom reference & gain


Reset

PMIC
TPS65178

Level Shift

VCC18

VCOM_N
VCOM_LOOP
PMIC_RESET

TPS65198
TR/
Diode
TR/
Diode

VGL

VGH

10. USB / WIFI / M-REMOTE / UART


[USB3_DM0]
[USB3_DP0]

USB1(3.0)

USB3_DM

+5V_USB_1

USB3_DP

[USB3_RX0M]

USB3_RX0M

[USB3_RX0P]

USB3_RX0P

[USB3_TX0M]

USB3+TX0M

[USB3_TX0P]

USB3_TX0P

[HUB_PORT_OVER0]
[HUB_VBUS_CTRL0]

/USB_OCD1
USB_CTL1
USB_DM2

[USB2_1_DM0]
[USB2_1_DP0]
[GPIO93]
[GPIO92]

[USB2_2_DM0]
[USB2_2_DP0]
[GPIO91]
[GPIO90]

[USB2_0_DM]
[USB2_0_DP]

OCP

USB2

+5V_USB_2

USB_DP2
/USB_OCD2
USB_CTL2

USB3

USB_DM3

OCP

+5V_USB_3

USB_DP3
/USB_OCD3
USB_CTL3

USB_WIFI

WIFI_DM
WIFI_DP

M_REMOTE_RX

[UART1_RXD]

M_REMOTE_TX

[UART1_TXD]

M_RFModule_RESET
M_REMOTE_RTS

[GPIO13]
[UART1_RTS]

M_REMOTE_CTS

[UART1_CTS]

SOC_TX
[UART0_RXD]
[UART0_TXD]

SOC_RX

LG1154D_H13D

RENESAS MICOM

4Pin debugging
Wafer

Motion Remote
Receiver

Interconnection - 1
47LA790V-ZA

[PCBs]
1

Main PCB

Power Board

Local key Assy

RF Assy

WIFI Assy

2
1
2
3

[Cables]

5
6

1
4

Main / LPB 24Pin + Local


Dimming Cable

Main / Module EPI Cable


50& 50Pin

LED driver / PSU

IR 8Pin Cable

WiFi 6Pin + RF 8Pin Cable

SPK Cable

Interconnection - 2
47LA790V-ZA

[PCBs]
6

IR Assy

[Cables]
7

IR to Local Key 3Pin Cable

IR to Logo Assy 4Pin Cable

8
6

Interconnection - 1
55LA860V-ZA

[PCBs]
6
1

Main PCB

Power Board

Local key Assy

RF Assy

WIFI Assy

Camera Assy

3
6
1
2

[Cables]

3
5

Main / LPB 24Pin + Local


Dimming Cable

Main / Module EPI Cable


50& 50Pin

LED driver / PSU

WiFi 6Pin + RF 8Pin Cable

SPK Cable

Camera Cable

Interconnection - 2
55LA860V-ZA

[PCBs]
7

IR Assy

[Cables]
8
7

IR to Local Key 3Pin Cable

IR cable

Interconnection - 1
60LA860V-ZA

[PCBs]
6

6
7

Main PCB

Power Board

Local key Assy

RF Assy

WIFI Assy

Camera Assy

3
2

1
2
3

[Cables]

Main / PSU 18Pin

Main / T-con LVDS Cable


41& 51Pin

LED driver 14 Pin cable

WiFi 6Pin + RF 8Pin Cable

SPK Cable

Camera Cable

Local Dimming cable

Interconnection - 2
60LA860V-ZA

[PCBs]
7
6

IR Assy

LED Driver

T-con

[Cables]
8

8
8
6

IR to Local Key 3Pin Cable

IR 8 Pin Cable

Interconnection - 1
47LA960V-ZA

[PCBs]
6

Main PCB

Power Board

Local key Assy

RF Assy

WIFI Assy

Camera Assy

6
7

1
2

[Cables]
5

Main / PSU 18Pin

Main / T-con LVDS Cable


41& 51Pin

LED driver 14 Pin Cable

WiFi 6Pin + RF 8Pin Cable

SPK Cable

Camera Cable

Local Dimming cable

Interconnection - 2
47LA960V-ZA

[PCBs]
9

8
8

IR Assy

LED Driver

T-con

[Cables]
8

IR 5 Pin + Local Key 3 Pin Cable

Woofer Cable

Introductions of 13Y RF assy + Magic Remote control

1. System
2. Remote Buttons

3. MR13 Block Diagram


4. Function List
5. Pairing/Un-pairing Method

1. System
UART
or USB

RF
RF Receiver
Remote

TV

Pairing Information Transmission (Send to TV after Paired)


Static Calibration Data (Bypass only)
Remote FW ver. (Save also in Receiver)
BD_ADDR (Save also in Receiver)
Pairing Information Transmission Sequence
When it is paired, the remote sends packets(pairing success, F/W version, BD_ADDR) to the receiver.
The receiver sends the pairing success packet to TV directly.
F/W version and BD_ADDR packets are just saved on the receiver.
The receiver sends F/W version or BD_ADDR packet to TV when it is required.
Motion Data Transmission
Period : 7.5msec
Motion Data : gyro, accelerometer
Voice Data Transmission
Period : 10msec
Voice sampling : 16khz 16bit

2. Remote Buttons (M4 vs. MR13P)

POWER

BACK

OK

SMART

HOME

VOICE

BACK

POWER

OK

LED

Phsical
Buttons

Screen RMT
Q.MENU

VOL

CH
MUTE

3D

RF Paired

IR continuous

IR_CODE

RF_CODE

repeat

POWER

0x08

NONE

BACK

0x28

0x8028

SMART

0x7C

0x807C

0x07

0x8007

0x06

0x8006

0x40

0x8040

0x41

0x8041

OK

0x75

0x8044

VOICE

0xDE

0x808B

3D

0xDC

0x80DC

0xDE

0x80DE

0x00

0x8000

CH -

0x01

0x8001

VOL +

0x02

0x8002

VOL -

0x03

0x8003

MUTE

0x09

0x8009

AUTO_WAKEUP

0x800C

VOICE_START

0x800A

VOICE_STOP

0x800D

POINT_START

0x803E

POINT_STOP

0x803F

Screen RMT
/ Q.MENU
CH +

3D

VOL MUTE CH

RF Unpaired

BUTTON

MYAPPS

Logical
Buttons

M4 Remote MR13P Remote

ETC.
IR only

= VOICE_START

3. MR13P Block Diagram

MPU-6150
(Gyro+ACC)
(Invensense)

IR Emitter1

I2C ch1

512Kb
(Serial F/M)

IR Emitter2
(Voice Scene IR)

BCM20733M A2
(BROADCOM)
Bluetooth 3.0

Key Button
(4x4)

Antenna

(BROADCOM)
Bluetooth 4.0

Light
Control

512Kbit
(Serial Flash)

Voice
Antenna
Partron

BCM20702M
SPI

I2S

X-tal
24 MHz

WM8950
(Wolfson)

I2C ch2

Codec(ADC )

Wheel
Encoder

MIC.
(Knowles)

X-tal
20 MHz

UART

4-mode Only

Power Management
AA x 2 Battery

DC-DC Boost
TI TPS61097
SOT23-5

2.8V LDO

2.8V LDO

uP0108NEC5-28
SC70

uP0108NEC5-28
SC70

Bluetooth Remote control

Connector

Bluetooth Receiver

4. Function list

Item

IC

Voice Codec

Manufacturer

Function

WM8950

Wolfson

16KHz Sampling of Audio data

SPU0414HR5H

Knowles

Sensing Voice

Voice
MEMS Mic.
Motion
Sensor

Gyro Sensor
+
Accelerometer
RF Antenna

Remocon

RF
+
Micom

X-tal
RF + Micom

DC-DC Converter

Sensing angular velocity of X, Y, Z-axis


MPU-6150

Invensense
Sensing device tilt (Pitch & Roll angle)

SDBTPTR3015

Partron

24MHz

Partron

BCM20733A2
TPS61097

Wireless communication

Broadcom
TI

Battery Boost up Regulator

LDO1

uP0108NEC5-28

uPI

RF, Gyro, Accelerometer Power Supply

LDO2

uP0108NEC5-28

uPI

Audio Codec, Mic. Power Supply

5. RF Pairing / Un-pairing Method


Method

RF Pairing

RF Unpairing

Description

Method1
If unpaired, just press "OK" button.
If paired, press "OK" button after
unpairing.
Method 2 (Repairing)
Press BACK" button for 5 sec.

When do pairing, the remote


should make pairing request IR
signal(0x75) to TV.
When TV receive the IR signal, it
should send "pairing request
packet" to the RF receiver.
After pairing success, the remote
should blink LED for some time and
TV send "pairing success packet"
back to TV.
When remote try to unpairing, it
doesnt care about state of
receiver(stand alone).

Press BACK" button and SMART" button


at the same time for 5 sec.

When remote try to unpairing, it


doesnt care about state of
receiver(stand alone).
After unpairing, all pairing
information should be erased.
After unpairing, LED should be
blinked for 3sec.
The remote just becomes to IR
mode.

Introductions of 13Y WIFI built in assy

1. Wi-Fi built in Assy feature


2. Wi-Fi built in Assy
specification

WIFI Built in assy feature


Block diagram

30

48
3.3V

Wafer

USB
DP, DN

3.3V

DCDC
EUP3010

1.2V

- Pin map

GND
6pin 1.25mm

WOL
3.3V

1.2V

RX/TX
USB
DP, DN

Antenna
2.4G/5G

BCM43236B
RX/TX

Crystal
20MHz

Switch
DM3030

Switch
DM3030

Antenna
2.4G/5G

PIN

USB interface

Vcc

DM

DP

GND

WOW

NC

WIFI Built in assy Specification

Contents of LCD TV Standard Repair Process


No.

Error symptom (High category)

Error symptom (Mid category)

Page

No video/Normal audio

No video/No audio

A. Video error

Video error, video lag/stop, fail tunning

3, 4

Color error

Vertical/Horizontal bar, residual image, light


spot, external device color error

No power

Off when on, off while viewing, power auto


on/off

No audio/Normal video

Wrecked audio/discontinuation/noise

10

10

No response in remote controller, key error,


recording error, memory error

11

External device recognition error

12

B. Power error
7
8

Remarks

C. Audio error

D. Function error
11
12

E. Noise

Circuit noise, mechanical noise

13

13

F. Exterior error

Exterior defect

14

14

G. Network error

Connection defect / Network speed low

15

First of all, Check whether there is SVC Bulletin in GCSC System for these model.

Contents of LCD TV Standard Repair Process Detail Technical Manual


No.

Error symptom

Content

Page

Check LCD back light with naked eye

A1

LED driver B+ 24V measuring method

A2

Check White Balance value

A3

Power Board voltage measuring method

A4

TUNER input signal strength checking method

A6

LCD-TV Version checking method

A7

LCD TV connection diagram

A8

10

Tuner Checking Part

A9

Check Link Cable (LVDS) reconnection


condition

A10
A11

12

Adjustment Test pattern - ADJ Key

A12

13

LCD TV connection diagram

A8

Check Link Cable (LVDS) reconnection


condition

A10
A11

15

Adjustment Test pattern - ADJ Key

A12

16

Exchange T-Con Board (1)

A-1/5

17

Exchange T-Con Board (2)

A-2/5

Exchange LED driver Board (PSU)

A-3/5

19

Exchange Module itself (1)

A-4/5

20

Exchange Module itself (2)

A-5/5

2
3

A. Video error_ No video/Normal audio

4
6
7

11

14

18

A. Video error_ No video/Video lag/stop

A. Video error_Color error

A. Video error_Vertical/Horizontal bar,


residual image, light spot

<Appendix>
Defected Type caused by T-Con/
Inverter/ Module

Remarks

A10 : 32/37/42/47/55
A11 : 32 AUO

A10 : 32/37/42/47/55
A11 : 32 AUO

55 : driver board
Other : PSU

Continue to the next page

Standard Repair Process

Error
symptom

LCD TV

A. Video error

Established
date

No video/ Normal audio

Revised date

2012. 12 .06

First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D Power B/D, LVDS Cable,Speaker Cable,IR B/D Cable,,,)
A1
No video
Normal audio

Normal
audio

Check Back Light


On with naked eye

N
Move to No
video/No audio

A4
Y

On

Check Power Board


12v,3.5v etc.

A2

N
Repair Power Board
or parts

Check Power Board 24v output

Normal
voltage

Normal
voltage

Replace Inverter
or module

End

Repair Power
Board or parts

Precaution

A7 & A3

Always check & record S/W Version and White


Balance value before replacing the Main Board

Replace Main Board

Re-enter White Balance value

Replace T-con Board


or module
And Adjust VCOM

A28

Standard Repair Process

LCD TV

Error
symptom

A. Video error

Established
date

No video/ No audio

Revised date

A4
No Video/
No audio

Check various voltages


of Power Board
( 3.5V,12V,20V or 24V)

Normal
voltage?
N
Replace Power
Board and repair
parts

Check and
replace
MAIN B/D
End

2012. 12 .06

Standard Repair Process

Error
symptom

LCD TV

A6
Check RF Signal level

Normal
Signal?

A. Picture Problem

Established
date

Picture broken/ Freezing

Revised date

2012. 12 .06

. By using Digital signal level meter


. By using Diagnostics menu on OSD
( Menu Set up Support Signal Test )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)

Check whether other equipments have problem or not.


(By connecting RF Cable at other equipment)
DVD Player ,Set-Top-Box, Different maker TV etc`

A7

Check RF Cable
Connection
1. Reconnection
2. Install Booster

Normal
Picture?

Check
S/W Version

N
Normal
Picture?
Y

SVC
Bulletin?

Y
S/W Upgrade

Y
Close
Close

Normal
Picture?
N
Check
Tuner soldering

Contact with signal distributor


or broadcaster (Cable or Air)
Normal
Picture?

Use Signal Test


Check Signal status

N
Replace
Main B/D

Y
Close

Standard Repair Process

Error
symptom

LCD TV
A6
Check RF Signal level

Normal
Signal?

A. Picture Problem (DVB-S/S2)

Established
date

Tuning fail, Picture broken/ Freezing

Revised date

2012. 12 .06

Check RF signal cable (DVB satellite signal or not)


Check whether other equipments have problem or not.
(By connecting RF Cable at other equipment)
Set-Top-Box, Different maker TV etc

Check satellite setting.


- Check LNB frequency.
- Check satellite
- Check Satellite connection
(DiSEqC, motor, etc)

A7
Y

Normal
setting?

Check
S/W Version

SVC
Bulletin?
Y

S/W Upgrade
Contact with
signal distributor
or broadcaster
(Cable or Air)

Change satellite setting


(match with installed ANT)

Normal
Picture?

Y
Normal
Picture?
Close
Y

Close

N
Close

Check
Tuner soldering

Replace
Main B/D

Standard Repair Process

LCD TV

Error
symptom

A8
Check color by input
-External Input
-COMPONENT
-RGB
-HDMI/DVI

A. Video error

Established
date

Color error

Revised date

A10/ A11
Color
error?

Check and
replace Link
Cable
(LVDS) and
contact
condition

Y
Color
error?

Color
error?

Replace Main B/D

Check Test pattern

Replace module

Check error color


input mode

A12

2012. 12 .06

End

External Input/
Component
error

Check
external
device and
cable

External device Y
/Cable
normal

Replace Main B/D

N
Request repair
for external
device/cable
N
RGB/
HDMI/DVI
error

Check external
device and
cable

External device Y
/Cable
normal

Replace Main B/D

Standard Repair Process

LCD TV

Established
date

A. Video error

Error
symptom

Vertical / Horizontal bar, residual image,


light spot, external device color error

2012. 12 .06

Revised date

Vertical/Horizontal bar, residual image, light spot

Replace
Module

A8

A10/ A11

Check color condition by input


-External Input
-Component
-RGB
-HDMI/DVI

Screen Y
normal?

Check external
device
connection
condition

Y
Normal?

Screen
normal?

Check Test pattern

Request repair
for external
device

Replace
module

A12

Check and
replace Link
Cable

A28

End

Replace Main B/D


(adjust VCOM)

Screen
normal?

For LGD panel

Replace Main B/D

End

For other panel

External device screen error-Color error


Check S/W Version

Check
version

Y
S/W Upgrade

Normal
screen?
N

Check screen
condition by input
-External Input
-Component
-RGB
-HDMI/DVI

External
Input
error
Component
error

RGB
error

Y
End

HDMI/
DVI

Connect other external


device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.
Connect other external
device and cable
(Check normal operation of
External Input, Component,
RGB and HDMI/DVI by
connecting Jig, pattern
Generator ,Set-top Box etc.

Screen
normal?

N
Replace
Main B/D

Request repair for


external device
Y
Screen
normal?

Replace
Main B/D

Standard Repair Process

LCD TV

Error
symptom

B. Power error

Established
date

No power

Revised date

A17
Check
Power LED

. Stand-By: Red
. Operating: white

2012. 12 .06

A19
DC Power on
by pressing Power Key
On Remote control

Power LED
On?
N

Normal
operation?

Check Power
On High

OK?

Check Power cord


was inserted properly

Replace Main B/D

A4
Measure voltage of each output of Power B/D

N
Normal?
Y

Close

Check ST-BY 3.5V

Normal
Y
voltage?

A18

Normal
voltage?

N
Replace Power B/D

Replace Power
B/D

Replace Main B/D

Replace
Power
B/D

Standard Repair Process

LCD TV

Off when on, off while viewing, power auto on/off

Check outlet
Check A/C cord
Check for all 3- phase
power out

Established
date

B. Power error

Error
symptom

2012. 12 .06

Revised date

A22
Error?

Check Power Off


Mode

CPU
Abnormal

Replace Main B/D

Normal?

End

N
Y

A19

Fix A/C cord & Outlet


and check each 3
phase out

(If Power Off mode is


not displayed)
Check Power B/D
voltage
Caution
Check and fix exterior
of Power B/D Part

* Please refer to the all cases which


can be displayed on power off mode.

Replace Power B/D

Abnormal
1

Normal
voltage?

Replace Main B/D

N
Replace Power B/D

Status

Power off List


"POWEROFF_REMOTEKEY"
"POWEROFF_OFFTIMER"
"POWEROFF_SLEEPTIMER"
"POWEROFF_INSTOP"
"POWEROFF_AUTOOFF"
Normal "POWEROFF_ONTIMER"
"POWEROFF_RS232C"
"POWEROFF_RESREC"
"POWEROFF_RECEND"
"POWEROFF_SWDOWN"
"POWEROFF_UNKNOWN"
"POWEROFF_ABNORMAL1"
Abnormal
"POWEROFF_CPUABNORMAL"

Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power

off
off
off
off
off
off
off
off
off
off
off
off
off

Explanation
by REMOTE CONTROL
by OFF TIMER
by SLEEP TIMER
by INSTOP KEY
by AUTO OFF
by ON TIMER
by RS232C
by Reservated Record
by End of Recording
by S/W Download
by unknown status except listed case
by abnormal status except CPU trouble
by CPU Abnormal

Standard Repair Process

LCD TV

Error
symptom

C. Audio error

Established
date

No audio/ Normal video

Revised date

A24
No audio
Screen normal

Check user
menu >
Speaker off

2012. 12 .06

A25
N
Off

Check audio B+ 24V


of Power Board

Normal
voltage

Y
Cancel OFF

Check Speaker
disconnection

N
Replace Power Board and repair parts

N
Disconnection
Y
Replace Speaker

Replace MAIN Board

End

Standard Repair Process

LCD TV

C. Audio error

Error
symptom

Wrecked audio/ discontinuation/noise

Established
date

2012. 12 .06

Revised date

abnormal audio/discontinuation/noise is same after Check input signal compared to No audio


A25

Check input
signal
-RF
-External Input
signal

Wrecked audio/
Discontinuation/
Noise for
all audio
Signal
normal?

Check and replace


speaker and
connector

Check audio
B+ Voltage (24V)

Y
Wrecked audio/
Discontinuation/
Noise only
for D-TV

Wrecked audio/
Discontinuation/
Noise only
for Analog
(When RF signal is not
received)
Request repair to external
cable/ANT provider
(In case of External
Input signal error)
Check and fix
external device

Normal
voltage?

Replace Main B/D

Replace Power B/D

Replace Main B/D

Wrecked audio/
Discontinuation/
Noise only
for External Input

Connect and check


other external device

Normal
audio?

Y
Check and fix external device

End

Standard Repair Process

Error
symptom

LCD TV

D. General Function Problem

Established
date

Remote control & Local switch checking

Revised date

2012. 12 .06

1. Remote control(R/C) operating error


A27
Check R/C itself
Operation

A27

Check & Repair


Cable connection
Connector solder

Normal
Y
operating?
N

Normal
operating?
Y

Check R/C Operating


When turn off light
in room

Check & Replace


Baterry of R/C

If R/C operate,
Explain the customer
cause is interference
from light in room.

Normal
operating?
N
Replace R/C

Replace
Main B/D

Close

Close

A27

Check B+ 3.5V
On Main B/D

A4

Normal
Voltage?

Check IR
Output signal

Check 3.5v on Power B/D


Replace Power B/D or
Replace Main B/D
(Power B/D dont have problem)

Normal
Signal?
N
Repair/Replace
IR B/D

Standard Repair Process

LCD TV

Check
input
signal

Signal
input?

Established
date

D. Function error

Error
symptom

External device recognition error

Check and fix


external device/cable

Check technical
information
- Fix information
- S/W Version

Technical
information?

2012. 12 .06

Revised date

External Input and


Component
Recognition error

Replace Main B/D

Fix in
accordance
with technical
information

RGB,HDMI/
DVI, Optical
Recognition error

Replace Main B/D

Standard Repair Process

LCD TV

Identify
noise type

Error
symptom

Circuit
noise

Mechanical
noise

E. Noise

Established
date

Circuit noise, mechanical noise

Revised date

Check location
of noise

2012. 12 .06

Replace PSU(with LED driver)


OR
Replace LED driver

Check location of
noise

Mechanical noise is a natural


phenomenon, and apply the 1st level
description. When the customer does not
agree, apply the process by stage.
Describe the basis of the description in
Part related to nose in the Owners Manual.

When the nose is severe, replace the module


(For models with fix information, upgrade the S/W or
provide the description)
OR

If there is a Tak Tak noise from the cabinet,


refer to the KMS fix information and then proceed
as shown in the solution manual
(For models without any fix information, provide
the description)

Standard Repair Process

LCD TV

F. Exterior defect

Error
symptom

Zoom part with


exterior damage

Exterior defect

Module
damage

Replace module

Established
date
Revised date

Adjust VCOM

A28
Cabinet
damage
Remote
controller
damage

Stand
dent

Replace cabinet

Replace remote controller

Replace stand

2012. 12 .06

Standard Repair Process

Error
symptom

LCD TV

Check Network status

Normal
Signal?

Established
date

G. Network Error
Exterior defect

2012. 12 .06

Revised date

Check Wired ethernet cable connection


Check whether AP has a probelm or not.
Setting Network Networ Status

Check Network connection


Case1 WiFi .
- Check AP status
Case2 Wired
- Check ethernet Port

A7
Y

Normal
setting?

Check
S/W Version

SVC
Bulletin?
Y

S/W Upgrade
Check connection
with AP or internet
(WiFi = AP)
(Wired = ethernet
port)

Try to new network connection


(match with AP and ether setting)

Normal
Picture?
Y

Normal
Picture?
Close
Y

Close

N
Close

Check
Wired, Wifi status
(Cable / sub Assy)

Replace
Main B/D

Standard Repair Process

LCD TV

Error
symptom

Exterior defect

Established
date

2012. 12 .06

Revised date

Check defect CI slot pin


Check its worked CI+ 1.2 or 1.3
Setting Antenna CI information

Check CI CAM status

Read
Y
Information?

G. CI+ Competibility Error

Check status of CI+ Key in the


In-start menu

Is there
CI+ key?

Check
CAM S/W
Version

SVC
Bulletin?
Y

CAM S/W Upgrade


By OTA
Check damage of CI slot pin
Or damage of CI CAM

Replace
Main B/D
Or
Download
CI+ Key

Normal
Picture?
Y

Close

Old version of CI+ 1.2 CAM is not worked at the TV that is supported CI+ 1.3
Check SVC Bulletin

Close

Check
Wired, Wifi status
(Cable / sub Assy)

Replace
Main B/D

Contents of LCD TV Standard Repair Process Detail Technical Manual


Continued from previous page
No.

Error symptom

Content

Page

21

Check front display LED

A17

22

Check power input Voltage & ST-BY 3.5V

A18

Checking method when power is ON

A19

POWER BOARD voltage measuring method

A5

23

B. Power error_No power

24
25
26

B. Power error_Off when on, off while


viewing

POWER OFF MODE checking method

A22

27

B. Power error_Off when on, off while


viewing

POWER BOARD PIN voltage checking method

A19

Checking method in menu when there is no


audio

A24

Voltage and speaker checking method when


there is no audio

A25

28
C. Audio error_No audio/Normal video
29
30

C. Audio error_Wrecked
audio/discontinuation

Voltage and speaker checking method in


case of audio error

A25

31

D. Function error_ No response in


remote controller, key error

Remote controller operation checking method

A27

32

D. VCOM Adjustment

Sequence of the Vcom adjustment

A28

Remarks

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom
Content

A. Video error_No video/Normal audio


Check White Balance value

Established
date
Revised
date

2012. 12 .06

<ALL MODELS>

Entry method
1. Press the ADJ button on the remote controller for adjustment.
2. Enter into White Balance of item 10.
3. After recording the R, G, B (GAIN, Cut) value of Color Temp (Cool/Medium/Warm), reenter the value after replacing the MAIN BOARD.

A4

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

A. Video error_No video/ Audio

Content

Power Board voltage measuring method

Established
date
Revised
date

2012. 12 .06
A5

Check the DC 24V, 12V, 3.5V.


24 Pin (Power Board Main Board)
SMAW200-H24S
1

Power on

Inverter On/off

3.5V

PWM Dim #1

3.5V

PWM Dim #2

GND

GND

24V

10

24V

11

GND

12

GND

13

12V

14

12V

15

12V

16

24V

17

GND

18

GND

19

GND

20

GND

21

GND

22

L/DIMO_VS

23

L/DIM0_MOSI

24

L/DIM0_SCLK

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

A. Video error_Video error, video lag/stop

Content

TUNER input signal strength checking method

Established
date
Revised
date

2012. 12 .06

<ALL MODELS>

MENU support signal test


select channel

When the signal is strong, use the


attenuator (-10dB, -15dB, -20dB etc.)

A6

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom
Content

<ALL MODELS>

A. Video error_Video error, video lag/stop


LCD-TV Version checking method

Established
date
Revised
date

1. Checking method for remote controller for adjustment

Version

Press the IN-START with the remote


controller for adjustment

2012. 12 .06
A7

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom
Content

A. Video error _Vertical/Horizontal bar, residual


image, light spot
LCD TV connection diagram (1)

Established
date
Revised
date

2012. 12 .06

<ALL MODELS>

As the part connecting to the external input, check the screen condition by signal

A8

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

A. Video error_Video error, video lag/stop

Content

TUNER checking part

Established
date
Revised
date

2012. 12 .06

<ALL MODELS>

Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.

A9

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

A. Video error_Color error

Content

Adjustment Test pattern - ADJ Key

Established
date
Revised
date

2012. 12 .06

You can view 6 types of patterns using the ADJ Key

Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)

A12

Appendix : Exchange EPI Cable or Main B/D (1)

Solder defect, CNT Broken

Solder defect, CNT Broken

Solder defect, CNT Broken

Solder defect, CNT Broken

T-Con
T-Con
Defect,
Defect,
CNT
CNT
Broken
Broken
Solder
defect,
CNT
Broken
T-Con
Defect,
CNT
Broken

Abnormal Power Section

Solder defect, Short/Crack

Abnormal Power Section

Solder defect, Short/Crack

Appendix : Exchange EPI Cable or Main B/D (2)

Abnormal Power Section

Solder defect, Short/Crack

GRADATION

Abnormal Power Section

Solder defect, Short/Crack

Fuse Open, Abnormal power section

Abnormal Display

Noise

GRADATION

Appendix : Exchange LPB(LED driver)

No Light

Dim Light

Dim Light

Dim Light

Appendix : Exchange the Module (1)

Panel Mura, Light leakage

Crosstalk

Panel Mura, Light leakage

Press damage

Press damage

Crosstalk

Un-repairable Cases
In this case please exchange the module.

Press damage

Appendix : Exchange the Module (2)

Vertical Block
Source TAB IC Defect

Horizontal Block
Gate TAB IC Defect

Vertical Line
Source TAB IC Defect

Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect

Vertical Block
Source TAB IC Defect

Horizontal line
Gate TAB IC Defect
Gate TAB IC Defect

Un-repairable Cases
In this case please exchange the module.
Horizontal Block
Gate TAB IC Defect
Gate TAB IC Defect

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

B. Power error _No power

Content

Check front display LED

Established
date
Revised
date

2012. 12 .06
A17

You can set the LG Logo Light


to on or off by selecting OPTION
in the main menus.
Front LOGO LED control in the status of
ST-BY Condition:
Menu Option LG Logo Light
Brightness(OFF,LOW,MIDDLE,HIGH)

Front LOGO LED control in the status of


Power On Condition:
Menu Option LG Logo Light
Duration(off, off after10min)

LOGO LED

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

B. Power error _No power

Content

Check power input voltage and ST-BY 3.5V

Established
date
Revised
date

2012. 12 .06
A18

For 10 models, there is no voltage out for st-by purpose.


When st-by, only 3.5V is normally on.
Check the DC 24V, 12V, 3.5V.
24 Pin (Power Board Main Board)
SMAW200-H24S
1

Power on

Inverter On/off

3.5V

PWM Dim #1

3.5V

PWM Dim #2

GND

GND

24V

10

24V

11

GND

12

GND

13

12V

14

12V

15

12V

16

24V

17

GND

18

GND

19

GND

20

GND

21

GND

22

L/DIMO_VS

23

L/DIM0_MOSI

24

L/DIM0_SCLK

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

B. Power error _No power

Content

Checking method when power is ON

Established
date
Revised
date

2012. 12 .06
A19

Check power on pin is high


24 Pin (Power Board Main Board)
SMAW200-H24S

Power on

Inverter On/off

3.5V

PWM Dim #1

3.5V

PWM Dim #2

GND

GND

24V

10

24V

11

GND

12

GND

13

12V

14

12V

15

12V

16

24V

17

GND

18

GND

19

GND

20

GND

21

GND

22

L/DIMO_VS

23

L/DIM0_MOSI

24

L/DIM0_SCLK

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

B. Power error _Off when on, off whiling viewing

Content

POWER OFF MODE checking method

Established
date
Revised
date

<ALL MODELS>

Entry method
1. Press the IN-START button of the remote controller for adjustment
2. Check the entry into adjustment item 3

2012. 12 .06
A22

Standard Repair Process Detail Technical Manual


Error
symptom

LCD TV

Content

C. Audio error_No audio/Normal video


Checking method in menu when there is no audio

<ALL MODELS>

Checking method
1. Press the MENU button on the remote controller
2. Select the SOUND function of the Menu
3. Change TV Sound Out to TV Speaker

Established
date
Revised
date

2012. 12 .06
A24

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

C. Audio error_No audio/Normal video

Content

Voltage and speaker checking method


when there is no audio

Established
date
Revised
date

2012. 12 .06
A25

<ALL MODELS>
24 Pin (Power Board Main Board)

SMAW200-H24S

Power on

Inverter On/off

3.5V

PWM Dim #1

3.5V

PWM Dim #2

GND

GND

24V

10

24V

11

GND

12

GND

13

12V

14

12V

15

12V

16

24V

17

GND

18

GND

19

GND

20

GND

21

GND

22

L/DIMO_VS

23

L/DIM0_MOSI

24

L/DIM0_SCLK

Checking order when there is no audio


Check the contact condition of or 24V connector of Main Board
Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)

Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the GND
and output terminal, the speaker is normal.

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

D. Function error_ No response in remote controller,


key error

Content

Remote controller operation checking method

Established
date
Revised
date

2012. 12 .06
A27

<ALL MODELS>

P4101

Checking order
1, 2. Check IR cable condition between IR & Main board.
3.
Check the st-by 3.5V on the terminal 4.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the Analog
Tester needle moves slowly, and defective when it does not move at all.

1
2
3
4
5
6
7
8

GND
KEY1
KEY2
+3.5V_ST
GND
LOGO/LED_R
IR
GND

Standard Repair Process Detail Technical Manual


LCD TV

Error
symptom

D. VCOM Adjustment

Content

Sequence of the Vcom adjustment

Established
date
Revised
date

2012. 12 .06
A28

1. Case
LCD module change
T-Con board change

2. Equipment
Service Remote controller

3. Adjust sequence
Press the adj key
select V-COM
As pushing the right or the left button on the remote controller, And find the V-COM value Which is no or minimized the Flicker.
(If there is no flicker at default value, Press the exit key and finish the VCOM adjustment.)
Push the OK key to store the value. Then the message Saving OK is pop.
Press the exit key to finish V-COM adjustment.

Вам также может понравиться