TVP10 - RA-3 & RA-4A Chassis PDF

S
Projection
Television
RA-3 & RA-4A Chassis
Models: KP-43T70
KP-53N74 KP-48V80
KP-46C70 KP-52S70
KP-53V80
KP-48S70
KP-61S70
KP-61V80
KP-48S72
KP-53XBR300
KP-61XBR300
Circuit Description and Troubleshooting
Course: TVP-10
Training Manual
Sony Service Company

A Division of Sony Electronics Inc 1999
All Rights Reserved
Printed in U.S.A.
S is a trademark of Sony Electronics
Circuit Description
and Troubleshooting:
Models: KP-43T70
KP-53N74 KP-48V80
KP-46C70 KP-52S70
KP-53V80
KP-48S70
KP-61S70
KP-61V80
KP-48S72
KP-53XBR300
KP-61XBR300
Prepared by: National Training Department

A Division of Sony Electronics Inc.
Course presented by _____________________________________
Date ___________________________________________________
Student Name ___________________________________________
S
SEL Service Company
1 Sony Drive
Park Ridge, New Jersey 07656
TVP100100
Printed in U.S.A.
Table of Contents
Introduction
8-Bit A/D Converter
RA-3 Features
Picture and Picture (V Models)
11
RA-3 and RA-2 Similarities
Main Y Signals
11
Main C Signal
11
RA-3 New Circuitry
Main Decoder and YUV Switch
11
Power Supply Protection
Picture and Picture Controller
11
Latch
Video Processing
13
+135 Volt Over Voltage
YUV Controller
13
+135 Volt Over Current Protection
YCJ
13
Standby Unregulated OVP
On Screen Displays
15
Standby +5 Volt OCP
Micro OSD
15
V Model Video Path Block
V Chip/CC OSD
15
Switching
PJ OSD
15
Main Processing
CRT Drive (CG)
17
P&P Processing
Tube Bias
17
OSD
Ik Return
17
YCJ
S Model Video Path Block
19
KP-53V80 Video Switching
Switching
19
KP-53V80 Video 4 and Video 5 Inputs
Main Processing
19
Composite Video and Y Switching
PIP Processing
19
Color Switching
OSD
19
Comb Filter (V Models)
YCJ
19
Switching and Comb Filter (S Models)
21
Self-Diagnostics
Video Inputs
21
Standby Power Supply
iii
Switching and Comb Filter
21
Converter Operation
iii
Picture in Picture (S Model)
23
Regulation
iii
Sub Y Signal
23
Over Current Protection (OCP)
Sub C Signal
23
Over Voltage Protection (OVP)
Sub Decoder, PIP Processor and YUV Switch
23
Secondary Output
RA-4 vs. RA-4A
25
Checking Q621
RA-4A Features
25
Switching Power Supply
vii
1080I Capable
26
Primary Rectifier
vii
RA-4 and RA-4A Circuit Differences
26
Oscillator
vii
Video Path Block
27
Regulation
vii
Inputs
27
Soft Start
ix
Main Video
27
Limit
ix
Sub-Video
27
Troubleshooting
xi
Video Processor
27
Horizontal Deflection
xv
DTV Video Processing Block
29
Horizontal Scanning
xv
Component Input Selected
29
High Voltage Development
xvii
RGB Inputs Selected
29
Vertical Deflection
xxi
DTV Video Processing
31
Vertical Drive
xxi
Circuit Description
31
Protection
xxi
VD Mute
33
Convergence Block
RGB Mute
33
Convergence
xxiii
Auto Focus (Auto Registration)
xxiii
Appendix 1
xxiii
Sensor Amp
xxv
Auto Focus
xxv
Circuit Description
xxix
BD Input
Digital Convergence
BD Output
xxxi
xxxi
xxxiii
IC1701 Regi Correction
xxxiii
Convergence Out
xxxv
Regi Mute
xxxv
Convergence Amp
xxxv
Appendix 2 - Service Bulletins
Introduction
Flash Focus One button system that aligns the horizontal and vertical
centering of the red, green and blue tubes. This system differs from previous Sony one touch systems in that it does not align the skew of the
colors only the centering.
The purpose of this manual is to discuss the circuitry in the 1999-2000

Sony projection television chassis. These chassis are the RA-3 and RA4A. Both of these chassis share circuitry with the RA-2 and/or RA-4 chassis. There are previous training manuals that cover circuits in these models. The TVP-07 manual covers the RA-2 chassis and the TVP-08 manual
covered the RA-4 chassis. We will include excerpts from these training
manuals in the Appendix at the rear of this manual. Please take note that
some of the component designations may be different between the older
and newer chassis.
Advanced Picture Stabilizer - Maintains constant picture quality by responding more quickly during scene changes, especially sudden dark-tobright transitions, thereby reducing zooming effect, minimizing picture distortion and correcting blooming (poor focus).
Overview
RA-3 Features
Free Layout PIP Allows the PIP picture to be moved anywhere on the
screen instead of to just the designated corners.
Beside screen size, the table below shows the differences between the N,
S, T and V models:
C,N and S
T
V
3 Line
3 Line
3D
No
Yes
Yes
Audio Power
Output
15Wx2
15Wx2
20Wx2
Surround
Sound
Matrix
Matrix
Tru-Surround
Regular
Regular
Twin View
No
No
Yes
Comb Filter
The following models use the RA-3 chassis:

KP-43T70
KP-53N74
KP-48V80
KP-46C70
KP-53S70
KP-53V80
KP-48S70
KP-61S70
KP-61V80
KP-48S72
Important Note: The book will make reference to two distinct types of
RA-3 chassis, S and V. Since the T, C and N models are similar to the S
models, we will be referring to all of these models when the term S models is used unless otherwise noted. This is because the C and N models
have marketing differences and are only sold by certain dealers. The T
model is distinctive because it uses the tabletop design instead of the
standard slim line design.
All RA-3 chassis models contain the following features:
Flash Focus System
Steady Sound Auto Volume
Advanced Picture Stabilizer
Shading Compensation
2 Tuner PIP
Velocity Modulation Scanning
Free Layout PIP
Dynamic Focus Circuitry
High
Contrast
Screen
PIP
Center
Speaker
Input
Component
Video Inputs
3 Line Digital Comb Filter To improve color performance, uses digital

memory to evaluate three adjacent horizontal scanning lines at a time.
3D Digital Comb Filter Uses digital memory to compare each horizontal line with the line above and below it and also with the corresponding
lines in adjacent frames.
Matrix Surround Sound Adds ambience to stereo programs for home

theater like sound.
Tru-Surround Virtual Dolby Surround Generates lifelike sound from
the rear speakers using only the stereo pair built into the cabinet. This
system uses Dolby Pro Logic to provide a very convincing effect.
Twin View Sonys picture and picture feature, which allows two pictures
to be displayed side by side. This Twin View system is functionally the
same as the XBR system, but does not display the two pictures in 480P
resolution.

The following are similarities between the RA-2 and RA-3 chassis. The
Appendix at the rear of the book contains excerpts from TVP-07 that describe the operations of these circuits. Keep in mind that component
designation and location will be different.
RA3 New Circuitry

The following are new circuits that will be covered in this book:
Basic board layout is the same except the Z boards have been removed. The yokes have connectors that connect to the CG board.
Vertical Deflection Circuit is the same, but is now located on the G
board instead of the A board.
The Horizontal, High Voltage and Pin Amplifier
System Control is similar, but there are some additional lines to deal
with new features such as component video inputs and digital registration. Reset, key scan and EEPROM reading and writing remain
the same.

The following are similarities between the RA-2 and RA-4 chassis. The
Appendix at the rear of the book contains excerpts from TVP-08 that describe the operations of these circuits. Keep in mind that component
designation and location will be different.
that allows 81 different points to be adjusted for each color. The system differs slightly from the RA-4 chassis because of the addition of a
control for green vertical skew.
The Flash Focus system has been added to the RA-3 chassis. This
system is similar to the Auto Focus system found in the RA-4 chassis
except the RA-3 system only performs auto centering while the RA-4
system performed auto centering and skew. The difference lies in the
use of the sensors. The RA-4 system used eight sensors and the RA3 system only uses four. This is why the auto skew adjustment is not
possible.
Convergence Amplifier
Self-Diagnostics similar to the RA-4 chassis is used. The difference is
that the failure signal from each circuit is input to the System Control
IC since the RA-3 chassis does not have an OSD Processor.
The digital registration and auto focus circuits located on the BD board
in the RA-4 chassis are used. They are mounted to the A board in the
RA-3 chassis.
The RA-3 chassis uses the same digital registration system used in
the RA-4 chassis. Digital registration allows the servicer to adjust the
set using course and fine modes. The fine mode uses a point system
Power supply Protection

Video Signal Path The different video paths for S and V models will
be discussed. The switching, comb filter and PIP circuits are different
between S and V models. The OSD and video processing (YCJ) are
the same between various models.
CRT drive will be described using the CG board. A discrete amplifier
is used instead of the video amplifier IC used in previous models.
The Standby Supply is similar to the one in the AA2W direct view
chassis. There is an excerpt from CTV-26 describing the circuit operation of this circuit.
Power Supply Protection

Overview
The RA-3 chassis employs over voltage and over current protection for
the +135 volt line. The standby +5 volt line is protected against over
voltage and over current. There is also an 11V LVP/18V OVP protection
circuit
Latch
Shut down occurs whenever a condition in one of the protect circuits causes
the Q655 to turn ON. When Q655 turns ON, Q654 also turns ON. This
drops the drive voltage to Relay Drive Q652/B, turning it OFF. When
Q652 turns OFF, the ground return path for the power relay opens and
the unit shuts OFF.
+135 Volt Over Voltage

The +135 volt line is input to the protection circuit through D672 and then
to a voltage divider consisting of R661 and R660. The voltage developed
across R660 is applied to IC651/5 Non-inverting input. IC651/6 Inverting
input has 2.5 volts applied to it from the voltage divider consisting of R663
and R662. This voltage is divided down by the Standby +5 volt line. If the
voltage at IC651/5 rises above the 2.5-volt reference, then the output at
IC651/7 will go HIGH. This High output is then applied to the latch circuit
and to the Self-Diagnostic section on the A board. When this occurs, the
Timer LED will flash three times.
Standby Unregulated OVP

Current from T602/9 is rectified by D667 to produce a positive supply at
D667/K. This supply voltage is applied to IC655/I and D675/K. D675 is a
10-volt zener diode. When the voltage present at the input of IC655
reaches around 11.2 volts, D675 will begin to conduct. When this occurs,
Q655 will turn ON which activates the latch.
Standby +5 Volt OCP

Current from T602/9 is rectified by D651 to produce a negative voltage at
D651/A. This voltage is connected to the Standby +5 volt line through a
voltage divider that includes R686, D664, R688, Q658/B-E and R689. As
more current is drawn by the circuits on the Standby +5 volt line, the
voltage at D651 becomes more negative. When this voltage is low enough,
Q658 will turn ON and activate the latch. D676 is used to enable the soft
start circuit during power up or when there is a sudden rise in Standby 5
volts.
11V Low Voltage Protection and 18V Over Voltage Protection

Q657, D669 and associated components make up the 11V LVP and 18V
OVP. Normally, D669, a 13V zener, is biased below its zener point and is
OFF. A severe drop or loss of the 11V line will cause the zener to break
over and conduct, causing Q657 to turn ON and activating the protection
latch circuit. In addition, any rise in the 18V line that causes D669 to
conduct will also turn ON Q657 and, in turn, the latch circuit.
R684
+135 Volt Over Current Protection

The over current protection circuit works by monitoring the voltage divider
network that consists of R659, R657 and R654. R654 is connected between the negative side of the +135 volt bridge rectifier and ground. Any
rise in current in the +135 volt supply will cause the voltage across R654
to become more negative. This changes the voltage that is input to IC651/
2 Inverting input. IC651/3 Non-inverting input is connected to ground. If
the voltage at IC651/2 becomes negative, a HIGH will be output at IC651/
1. This HIGH output is applied to the latch circuit and also to IC002 System Control on the A board for the Self Diagnostic feature. If this occurs,
the Timer LED will flash twice.
D669
C678
MTZJ13
+11V
+18V
D688
MTZJ-24A
Q657
R685
RELAY
DRIVE
FROM
Q652/C
R682
R683
G BOARD
11V LVP/18V OVP
TO
Q655/B
LATCH
STANDBY 5V
R663
R659
D672
+135V
8
IC651
OVP/OCP
uPC393C
R665
G BOARD
R664
CN605
OVP
R661
R660
TO CN681
A BOARD
OCP
C662
RELAY
7
4
R657
+135V BRIDGE
NEG.
R662
FROM
D652/A
AND D653/A
R675
Q654
D663
R654
D675
MTZJ10B
D667
D661
C663
PROTECTION
LATCH
R691
9
PART
OF T602
STB
Q655
D674
I IC655
BAO5T O
5V REG.
G
C676
8
D651
C679
D680
R687
R667
RY DRIVE
FROM
Q652/C
D664
R688
MTZJ-2-7A
D676
MTZJ-3-9B
STANDBY
5V
R689
R690
R686
C680
TO
Q652/B
RELAY
DRIVE
Q658
FROM11V
LVP/18V
OVP
TO Q656/B LIMITER
R681
TO RY601 POWER RELAY
POWER SUPPLY PROTECTION

4
11TVP10 1214 1/13/00
V Model Video Path Block

Overview
The video path in the V model RA-3 chassis is different from that of the
RA-2 chassis because of the addition of two component video inputs.
Switching
There are three types of inputs in the back of the set. They are composite, S video and component video. The composite signal is input to the
switching circuit and switched to the comb filter. After Y and C separation
the Comb C signal is sent back to the switching circuit. Since a composite
signal was input, this Comb C signal will be switched out and become
Main C. The Y signal out of the comb filter is input to a switch and, when
selected, becomes Main Y.
If an S video input is used, the Y signal will follow the same path as the
composite video but will go around the comb filter. It would be selected at
the Y switch for output instead of the Y from the comb filter. The C signal
would be switched directly from the S video input to the Main C path.
If a component input is chosen, the Y input would follow the same path as
the S video Y signal. A separate circuit that outputs these signals directly
to the YUV Switch switches the U and V signals.
The switching circuit also delivers any of the inputs to the Sub Video path.
This means that SY, SC and SYUV signals are delivered to the sub video
path.
Main Processing
Two separate sources are used for the main video path. They are Main Y
and C (if composite/S video) and component video. Main Y or C is applied directly to the YCJ. These inputs will be used if a composite/S video
source is selected. If a component video input is chosen then the Main
YUV signals are chosen by the YUV controller and input the YCJ. Keep in
mind that this line will also carry the P&P picture.
P&P Processing
The P&P processing circuit uses inputs from both the main picture path
and the sub picture path because of the Twin View functions.
The main video path can be from two sources. They are Main Y and C (if
composite/S video is used) and component video. If composite/S video
input is selected for main picture input to P&P, the Main Decoder first
decodes it to YUV. These signals will be selected by the YUV Switch and
input to the P&P Controller. If component video input is chosen, the Y
signal is applied to the YUV switch along with the UV signals from the UV
Switch. These signals will then be selected by the YUV Switch and input
to the P&P Controller.
The Sub video path also comes from two sources. The sub video path
contains a decoding and switching network similar to the one found in the
main picture path. This decoding and switching network will switch the
YUV from the selected source to the P&P Controller.
The P&P Controller outputs compressed YUV signals for its functions. It
also outputs a YUV Switch signal (not shown) that will determine the window size and position. These signals are sent to the YUV Controller,
which will select either the P&P signal or the component input signal for
output to the YCJ.
OSD
On-Screen Displays are generated by three different sources in the RA-3
chassis. They are System Control, V Chip/CC and PJ OSD and they
share a common input to the YCJ. These circuits have a mute control
system that keeps them from interfering with each other.
YCJ
The YCJ takes the inputs from the Main Y and C paths, the component or
P&P from YUV Controller and the OSD RGB inputs. It processes these
signals and converts them all to RGB drive signals that are output to the
three tubes.
Y/
CV
CV
INPUTS
SWITCHING
3D
COMB
FILTER
MY
MY
PJED
Y
SW
MAIN
DECODER
MAIN C
VCHIP
MAIN
YUV
YUV
COMPONENT
Y
UV4
UV
YUV
SW
UV5
SYSCON
YUV
UV
SWITCH
SY
U BOARD
SC
OSD
RGB
SUB YUV
SUB
DECODER
P&P
C
Y
R
G
YUV
SY
SUV
YCJ
Y
SW
TO
TUBES
YUV
Y
YUV
CONTROLLER
UV
V MODELS VIDEO BLOCK

6
COMPONENT YUV OR PIP YUV
18TVP10 1/18/00
KP-53V80 Video Switching

Overview
In this section we will look at the input-switching path for the KP-53V80.
This includes switching of composite, S video and component video inputs.
KP-53V80 Video 4 and Video 5 Inputs

The Video 4 and Video 5 inputs accept component video only. The Y
inputs from Video 4 and 5 are routed to IC1702 A/V Switch. The U and V
inputs are sent to IC1703 and IC1704. These ICs switch the U and V to
either the Main or Sub UV paths. You should note here that the Pb input
is called U in the rest of circuitry and that the Pr input is called V.
15 Y4
14 L4
16 R4
VIDEO 4
IN
J1703
IC1702
A/V SWITCH
CXA 1845
PB
21 Y5
PR
20 L5
22 R5
AUDIO
R
VIDEO 5
IN
J1704
Y
TO IC1703 + IC1704
YUV SWITCH
PB
PR
L
AUDIO
R
U BOARD
KP53V80 VIDEO 4 AND 5 INPUTS
Composite Video and Y Switching

Composite video can be input to IC1702 A/V Switch from either THE tuner
or video 1,2 or 3 inputs. The selected composite video input is output at
IC1702/53. This signal then passes through Q1727 Buffer to J1706 Monitor
Out and back into IC1702 at pin 49. When one of the composite video
inputs is chosen, it will be switched to IC1702/56. The composite video
signal is then sent to Q1724 buffer and finally to CN1701/18 which connects to CN401 on the A board. When one of the S video or component
video inputs is selected, the Y signal from the selected input is switched
to IC1702/56. In this case, a Y signal will be output from Q1724 Buffer to
CN1701/18.
Color Switching
Composite video signals are processed by the Comb Filter on the A board.
The Comb Filter separates the Y and C components of the composite
video signal. The C output from the comb filter is coupled through CN1703/
5 to IC1702/51. When a composite input is selected, the Comb C signal
will be switched to IC1702/58. The output from IC1702/58 is passed
through Q1723 Buffer to CN1701 and the A board. When an S video
input is selected, the selected signal is output at IC1702/58. The C signal
passes through Q1723 Buffer to CN1701/16.
If Video 4 or Video 5 is selected the Pb and Pr inputs are routed to IC1703
and IC1704. The Y component input is switched using IC1702 A/V Switch.
The Pb and Pr inputs go to four switches contained in IC1703 and IC1704.
The logic level at CN2001/20 SUV SW and CN1701 MUV SW controls
these switches. These two lines control which signal is sent to the main
or sub UV circuits.
VOUT1
TV V IN
V1
63
V2
V3
SUB TUN V6
25
S VIDEO
COMPONENT
INPUTS
Y1
Y2
Y3
Y4
Y5
IC1704
YUV SWITCH
NJM 2283M
VIDEO 4
60
49
56
Q1724
BUFFER
CN1701
MAIN COMP V/Y
18
27
9
TO CN401
A BOARD
15
21
5
29
11
SDA
SCL
PB
PR
MONITOR
OUT
J1706
BUFFER
C1
C2
C3
S VIDEO
53
Q1723
BUFFER
58
COMB C
51
IC1702
45
A/V
SWITCH 47
31
CXA1845
SUB Y
32
16
5
Q1725,1728
BUFFER
SUB U
Q1726,1729
BUFFER
SUB V
CN1703
CN2001
18
12
16
PB
VIDEO 5
IC1703
YUV SWITCH
NJM 2533M
20
Q1731,1734
BUFFER
6
7
1
3
TO CN004
A BOARD
17
2
8
PR
U BOARD
Q1732,1735
BUFFER
7
2
KP53V80 VIDEO SWITCHING

8
TO CN201
A BOARD
10
SUB C
11
14
MAIN C
SUV SW
MAIN U
TO CN401
A BOARD
MAIN V
1
MUV SW
CN1701
3TVP10 1204 3/23/00
Comb Filter (V Models)

Overview
The digital 3D Comb Filter is used to separate the Y and C signals contained in the composite video signal. IC203 D/A Converter, IC204 3D
Comb Filter and IC202 4MB EDO Memory are used to accomplish this.
IC203 8-Bit A/D Converter

Before the composite signal is input to IC204 3D Comb Filter, IC203 ADC
digitizes it. The composite video signal is input at IC203/4 from the Y
buffer circuit. In addition to the video signal input, IC203 ADC needs a
clock and clamp pulse input. The clock input is a 4fsc (14.28 MHz) sine
wave signal, which is sent from IC204/75 ALTF to IC203/24 CLK. The
clamp pulse is sent from IC204/61 to IC203/6 PCL. This signal is at the H
rate. The digital output from IC203 ADC is output from pins 13 17 and
20 22 to IC204 3D Comb Filter.
IC204 3D Comb Filter

The data from IC203 ADC is input to IC204/67-74 DYC02 DYC09. This
data is synchronized to IC204/76 CSI, the composite sync input, and also
by IC204/50 FSCI. The input at IC204/76 is the composite sync input
from the main Y buffer and controls the timing generator inside of IC204
3D Comb Filter. IC204/50 FSCI receives a 3.58 MHz signal, which originates at IC205/57. IC205 is the YCJ. This signal controls the system
clock internal to IC204 3D Comb Filter.
Once the digitized video data is received by IC204 3D Comb Filter, it is
written into IC204 internal EDO memory controller. The EDO control reads
and writes data into and out of IC202 Frame Memory and also controls
the addressing, write enable and refreshing of the frame memory. Data is
read in and out between IC204/13-28 and IC202/2-5, 7-10, 39-36 and 3431. Addressing is done between IC204/9-2 and 99 and IC202/16-19 and
26-22. The write enable signal is sent from IC204/11 MWE to IC202/13
WE. The memory controller inside IC204 writes data to the locations
addressed while WE is LOW. IC204/12 MOE is the output enable line
and allows IC204 3D Comb filter to read data from it by IC202 3D Frame
Memory. This line is connected to IC202/27 OE.
IC202 Frame Memory is four Meg of EDO memory. Since IC202 Frame
Memory is EDO type memory, it needs to be refreshed constantly. This is
done using the RAS (Row Address Strobe) and CAS (Column Address
Strobe) lines. IC204/10 MCAS outputs a CAS signal to IC202/28 and 29
UCAS and LCAS. IC204/98 MRAS is output to IC202/14 RAS. These
lines are always active and keep the memory constantly refreshed.
The comb filter uses the memory controller for three different purposes.
The first is to feed signals that are delayed by 1H and 2H into the line (2D)
comb filter. The second is to feed signals that are delayed by 1H and 526
H into the frame (3D) comb filter. The third section is the motion detector
block that looks at all of the signals and determines if there is motion.
This circuit is connected to a mixer that outputs either the output from the
line comb filter if there is motion, or the output from the frame comb filter
if no motion is detected.
After the filtering is complete, the separate Y and C components are input
to noise reduction circuits. Noise is subtracted out of the signals and then
they are ready to be output. Analog Y is output from IC204/84 AYO to the
filter network consisting of FL202, Q203 and Q207. The Y signal is then
passed through buffers Q211 and Q214. This signal is then sent to IC1410
Y Switch. IC1410 Y S witch is used to select either the Y signal from the
3D comb filter or the Y signal that is input from an S video or component
video input. IC002/30 Killer controls this switching. IC002 (not shown) is
the System Control IC. The main Y signal is sent to IC1402/34 Main
Decoder Y In for PIP processing, to IC1404 YUV Switch for component
PIP processing and to IC1407 YUV Controller for main picture processing.
The C signal is output from IC204/83 ACO to the filter network FL201,
Q202 and Q208. It is then sent through buffers Q209 and Q213. This
signal is sent to the switching circuit on the U board. It is switched back to
CN401/16 Main C. The Main C signal is then sent to IC1402/32 (not
shown) Main Decoder C In through buffer Q1403 to be used for PIP. The
Main C signal is also sent to IC206/5 (not shown) YCJ C In for the main
picture.
IC202 4MB EDO

MSM514265C
A BOARD
22
DB1
Q210
BUFFER
FL203,
Q215,
216
B.P.F
COMB C CN201
TO CN1703 5
U BOARD
FROM U
BOARD
CN1701
MAIN V/Y 18
MAIN C 16
CN401
FSCOUT
FROM
IC206/57
YCJ
20
VIN
IC203
DB8 17
A/D
CONVERTER
13
uPC659
CLK 24
PCL 6
Q201,204
INVERTER
Q206,212
BUFFER
DYC0
2 MIO 28
0
74 DYC0
9 MIO 13
5 34
61
ALTE
STO
11
CSI
WE
27 OE
28 LCAS
29
60
SDA
SCL
59
SCL
50
Q228
BUFFER
99 MA8
FSC1
83
UCAS
X1
84
MAIN Y
Q1403
BUFFER
IC1410
Y
SWITCH
FL201,Q202,208
B.P.F
1
7
TO IC206/64
YCJ/C IN
COMB FILTER (V MODELS)
FL202,
Q203,207
B.P.F.
Q209,213
BUFFER
10
30
AYO
KILLER
FROM
IC002/30
MRAS
IC204
3D
COMB
FILTER
uPC64O81
ACO
Q226,227
PEEKING
TO IC1402/32
MAIN DECODER/C IN
98
13
10
SDA
MAO
RAS 14
12
76
I01 AO 19
A8 22
7 36 I016
26
10 39
15
75
16
2 31
67
Q211,214
BUFFER
TO
IC1402/34
CVBS/Y IN
MAIN C
4TVP10 1200 1/18/00
11
Picture and Picture (V Models)

Overview
The V model RA-3 chassis has features for PIP and P & P. The P & P
feature is also unknown as Twin View. Since this unit has the P & P
feature, the signals from both the main picture path and the sub picture
path are input to the P & P controller. The output from the P & P controller
can be used for Twin View or normal PIP.
Main Y Signals
The Main Y signal from IC1410/7 is split to four places. They are:
IC1407/19 YUV Controller TV IN for main picture.

Q1406 Sync separator to IC1402 Main Decoder for decoder sync.
IC1402/34 Main Decoder Y In for P & P.
IC1404 YUV Switch for when a component input is selected as the
main picture
Main C Signal
The Main C signal is input to IC1402/32. This signal will be used along
with the Y signal to create component video signals.
Main Decoder and YUV Switch

IC1402 Main Decoder decodes the Y and C signals. The decoded signals YUV are output from IC1402/18, 19 and 20 respectively.
These signals are then input to IC1404/2, 12 and 5. IC1402 has another
set of YUV signals input at pins 1, 13 and 3. These signals are the Main
Y signal. The U and V signals come from CN401/1 and 3. This connector
is connected to the U board and couples the MUV and SUV signals from
the Video 4 and Video 5 component inputs. IC1404/9, 10 and 11 are
connected to IC1409/4 DVD SW. IC1409 is a D/A Converter that outputs
either a High or a Low depending on which composite/S video input or
component input is used for the main picture. The selected YUV signals
are output at IC1404/15, 14 and 4. These signals are input back into
IC1402 Main Decoder at pins 11, 12 and 13. These signals are passed
through an auto pedestal adjusting circuit and output at IC1402/8, 7 and
6. These signals are then sent to IC1405 P & P Controller.
Picture and Picture Controller

The main picture YUV is input to IC1405/10, 6 and 8. The Sub picture
signals goes through a similar decoder and YUV Switch and are input to
IC1405/71, 75 and 73.
IC1405 is a picture-and-picture controller. It contains ADCs, reduction
circuitry, memory control, display control and DACs. It is capable of showing two pictures of equal size side by side or free position PIP.
The built-in memory controller of IC1405 P & P Controller is used to operate IC1401 V RAM. This 2 Meg of V RAM is used to produce the child or
Twin View pictures. IC1405/40 SC is used to clock the data into the RAM.
This signal looks similar to the DFB signal, which changes according to
the window size selected. IC1405/31 DT is the data transfer output to the
V RAM. IC1405/47 is the write enable line. IC1405/48 and 49 are the
CAS and RAS lines used to refresh the memory.
IC1405/86, 90 and 88 are the respective YUV outputs for PIP & P and P.
These signals look like component video, but are reduced in time. This
means that they do not use the full 1/60th of a second that would be used
by a normal signal. The time that the signal appears is relative to the size
of the PIP window. IC1405/93 DFB is the signal that will be used to determine the size and position of the PIP window. One of the waveforms
below shows what the DFB signal looks like when P & P is selected. The
other shows the DFB signal when a 1/9 PIP window is selected.
Q1406
SYNC
SEP
CVBS/YIN
RY
V SYNC
RU
RV
38
VTIM
14
39
C
FROM
Q1403
BUFFER
HSYNC
X1402
3.58MHz
8
W101
CIN
XNTSC 26
37 SDA
IC1402 MAIN
DECODER
CXA2019A
APC 29
36 SCL
32
SDA
SCL
18
Y OUT
19
U OUT
20
V OUT
11
W108 31
RY IN 11
Y
FROM
IC1410/7
Y SW.
S108
CERA 1
30
A0
UIN UOUT 14
5
VIN VOUT 4
YUV SW.
TO IC1407/6
YUV CONTROLLER
AND IC206/5 YCJ
DA17
25
12
Q1422
YUV SW.
DFB 93
39
IC1401
2MVRAM
YOUT 15
22
61
50 AD0
SDA
SDA
60
A8
DYIN
IC1404
Q1402
YUV SW
BUFFER
DVDSW
BU4053
MAIN U FROM CN401/3
13 DUIN
MAIN V FROM CN401/1
3 DVIN
6 INH
MBLK FROM IC002/46
39 DAO7
36
RV IN 13
X1401 503kHz
YIN
S101
32
R-Y
TO IC1407/2
DV 88
DAO0
IC1405
P&P
CONTROLLER
SAB 9076 H
23 DA10
34
RU IN 12
TO IC1407/19 YUV CONTROLLER/TV IN

P-Y
10 MY
DY 86
TO IC1407/1
6 MU
8 MV
B-Y
DU 90
TO IC1407/3
17 MVSYNC
Q1409, 1410, 1412

BUFFER
34
19
58
AD8
SCL
SCL
A BOARD
SY 71
15
SC 2
DT 7
10
11
WE 13
RAS 14
CAS 27
DVDSW FROM IC1409/4
PICTURE AND PICTURE (V MODELS)

12
SU 75
40
SC
31 DT
47 WE
49
RAS
48 CAS
SV 73
64
SVSY
NC
SUB YUV AND SUB SYNC

FROM IC1403
5TVP10 1201 1/18/00
13
Video Processing
Overview
The following section covers the video processing section of the RA-3
chassis. This drawing on the following page is a simplified schematic
from the KP-53V80. It is nearly identical to the schematic for the S models.
This circuit creates main picture RGB signals from either the Y and C
signals from a composite, S video or tuner input, or YUV inputs from the
main component video path. It also combines the PIP with the main picture if PIP is selected.
YUV Controller
IC1407 YUV Controller has three functions. They are:
Switch the appropriate external YUV input to the YCJ.
Switch the Main Y input to the TV out line for processing by the YCJ.
Adjust the sub color and sub hue of the U and V signals.
There are two sets of YUV inputs to IC1407 YUV Controller. They are
from IC1405 PIP Controller and from the component video (DVD) inputs.
The PIP inputs at IC1407/1, 3 and 2 are selected when the signal from
IC1409/1 Full DVD is HIGH, allowing the signal from IC1405/93 DFB to
control the switching at IC1407/6 YUV SW. When the output from IC1409/
1 Full DVD is LOW, it disables the signal from IC1405/93 DFB. This
places a low on IC1407/6 and the inputs at pins 21, 22 and 23 are selected. The selected signal is output from IC1407/8, 9 and 10.
The Main Y input is from either a composite/S video input or a component
input. This signal is input to IC1407/23 DVD Y and IC1407/19 TV In. If
the main Y is from a composite/S video input, then the TV Out signal will
be used for the main picture and for sync at the YCJ. If the main Y signal
input to IC1407 YUV Controller is from the component input, it will be
used by the YCJ for sync only. The Y Out at IC1407/8 would be used for
the picture.
The inputs at IC1407/16 Color and IC1407/17 Hue are DC voltages that
control the level of Sub Color and Sub Hue for the PIP picture. These
voltage levels were preset at the factory and should not need adjustment.
However, if necessary they can be changed by adjusting UVSC (Color)
and UVSH (Hue) in the service mode.
YCJ
Here we will be discussing the following three functions of IC206 YCJ:
Process the Main Y and C input and output them as RGB.

Process the YUV inputs from IC1407 YUV Controller and output RGB
signals for either a full picture from a component video input or a child
picture from a PIP input.
Output an FSC signal to be used as a reference by the comb filter.
The main Y and C signals are input to IC206 YCJ at pins 63 and 64
respectively. The C signal is demodulated to its color difference signals
B-Y (U) and R-Y (V). These YUV signals are referred to as internal.
These internal YUV signals developed from the Y and C inputs then go to
a switch controlled from the input at IC206/5 YUV SW. This line switches
the internal YUV or the external YUV from the YUV Controller onto the
next stage of processing. If the external YUV inputs at IC206/7, 8 and 10
originated from a component video input, IC206/5 would be two volts and
a Full DVD picture will be displayed. If the external input were from the
PIP, there would be a waveform present at IC206/5. This would insert
these inputs into the main picture to be output from IC206/20, 24 and 26
as RGB. Q220, Q219 and Q218 buffer these signals. After buffering,
these signals are output to the CG board via CN204. The R and B outputs will be routed to their C board from the CG board.
IC206 YCJ outputs a 3.58 MHz signal at pin 57. It is created using X202.
This signal is used as a clock by the 3D Comb Filter in V models.
MAIN C
FROM IC1702/58
DY FROM IC1405/86
Q1418
BUFFER
DU FROM IC1405/90
Q1420
BUFFER
P-Y
YOUT 8
EY IN
CN204
DV FROM IC1405/88
Q1419
BUFFER
MAIN U FROM
CN401/3
FULL DVD
FROM IC1409/1
PB-Y RYOUT 9
TO
V CHIP
Q1422
YUVSW
PR-Y BYOUT 10
DVD B-Y
TVOUT 12
DVD R-Y
CLAMP 5
23 DVD Y
22
MAIN Y SW.
FROM IC1409/7
P+P/DFB FROM
IC1405/ 93
21
MAIN V FROM
CN401/1
MAIN Y FROM
Q1402
19
TV IN
13
DL YSW
18
YSW
Q1424
TV BUFFER
Q1403 SYNC
BUFFER
COLOR FROM
IC1409/5
16
COLOR
HUE FROM IC1409/6
17
HUE
GOUT 24
Q219
BUFFER
BOUT 26
Q218
BUFFER
10
EBY IN
64
C IN
63
Y IN
IKIN 27
TO CG
BOARD
CN731
Q1414, 1416
55 BGP
LEVEL SHIFT
SDA
SDA
SCL
SCL
IC1407
YUV CONT.
CXA2039
ERY IN ROUT 20
Q220
BUFFER
6
7
FSC 57
OUT
IC206
YCJ
CXA2147
CN003
CHECK
CONNECTOR
FSC1
TO IC204/50
COMB FILTER
59
X202
YUVSW
5
VIDEO PROCESSING (V MODELS)
14
A BOARD
6TVP10 1205 1/24/00
15
On Screen Displays
Overview
On Screen Displays are generated by three different sources in the RA3 chassis. They are called Micro, V Chip/CC and PJ OSD. The Micro
OSD produces the source (channel) display and Program Palette (customer menu). The V Chip/CC OSD displays V chip rating information
and can blank the picture if the rating for a program violates the settings
in the Parental Control Menu. CC information is displayed when CC On
is selected using the remote control and the received signal contains CC
information. The PJ OSD is used during the flash focus routine and
when PJE adjustments are selected in the Service Mode. These three
OSDs cannot be input to the YCJ at the same time. Therefore there is a
mute system in place to blank each OSD at the appropriate times.
Micro OSD
The Micro OSD is created by IC002 System Control. It contains information such as channel number; video input source and the program
palette menu. IC002 System Control creates RGB for these different
on-screen displays. Q002, Q008 and Q009 buffer the RGB signals.
After buffering, the RGB signals are input to IC206/14, 15 and 16. The
YS and YM lines are used to place the OSD in the RGB outputs and
mute the V Chip/CC OSD.
The YS line is used to select the size and position of the OSD and the
YM line is used to determine the level of shading. Here shading refers to
the amount the video level is reduced beneath the OSD. This is evident
in the Program Palette Menu when the video can be seen in the background while the menu is superimposed over it. The YS signal is input
from IC002/36 to IC206/13. The YM signal is output from IC002/37 to
IC206/12. The main OSD can be muted using Q011, Q012 and Q013.
These mute transistors are controlled by IC002/35 Micro I. Main OSD
will be muted when the PJ OSD is in operation and also while IC1601
Main V Chip/CC is being displayed.
V Chip/CC OSD
IC1601 Main V Chip/CC creates this OSD. It outputs RGB that shows the
rating of the program selected. It will also blank the screen and show a
lock if the selected program is above the rating selected in the Parental
Control Menu. If the CC option is turned ON using the remote control,
then the CC text will be displayed at the bottom of the screen.
The RGB signals are output at IC1601/18, 2 and 3. They pass through
buffers Q010, Q014 and Q015 and are then input to IC206/14, 15 and 16.
Q018 through Q023 are mute transistors that are controlled by the YS
and YM lines from IC002 System Control IC.
PJ OSD
The PJ OSD is used to produce the RGB output during the flash focus
routine. It also is the OSD used during the PJE Service Mode. The
difference between the main OSD and PJ OSD in service mode is that the
main OSD is green and the PJ OSD is white.
The PJ OSD is output from two sources in the PJED circuit (not shown).
RGB, YM and YS are directly input to IC206 YCJ. There are separate
mute lines for each of the RGB sources in the PJED (not shown). See the
appendix for more information on how the PJ OSD is created.
MICRO R FROM IC002/32
Q002
BUFFER
MICRO G FROM IC002/33
Q008
BUFFER
MICRO B FROM IC002/34
Q009
BUFFER
14 RIN
ROUT 20
15 GIN
GOUT 24
MICRO I FROM IC002/35
Q012
DISP YM FROM
IC002/37
Y
FROM
Q1402
MAIN Y
BUFFER
BOUT 26
Q011
Q013
OSD YS FROM IC002/36
16 BIN
Q010
BUFFER
R 18
Q1601
BUFFER
IC1601
MAIN V G 2
CHIP/CC
28622912
SSC B 3
Q022
Q019
IC206
YCJ
CXA2147
Q014
BUFFER
TO
CN731
CB
BOARD
VIA
CN204
Q015
BUFFER
7
VIDEO
Q021
Q023 Q020 Q018
SDA
SCL
BOX
SCL SDA 17
14 15
Q1061
BUFFER
RE-R
PJ OSD
FROM A RE-G
RE-B
BOARD
RE-YM
PJED
BLOCK RE-YS
Q016
BUFFER
12 YM
Q017
BUFFER
13
YS
A BOARD
OSD (ALL MODELS)

16
7TVP10 1201 1/18/00
17
CRT Drive (CG)

Overview
The section discusses the CRT drive using the CG board. The CG board
is similar to the CR and CB boards that drive the red and blue tubes.
These boards use a discrete transistor circuit to drive the tube cathode.
In addition to drive, each C board contains a circuit that monitors cathode
current and converts it to a voltage. This voltage will be used in a loop
between the YCJ and the CRT. We will also discuss the other inputs that
are used to bias the tube.
CRT Drive
The output from the YCJ (not shown) is input to CN731/7 on the CG
board. When this signal is input to Q731/B, the transistor begins to conduct. As current flows through Q731/C-E junction, current also begins to
flow through Q722/B-E. Q722 is a common base amplifier and it passes
the signal through its C-E junction. This signal is then sent to Q733/B.
Q733 is a current amplifier that drives the cathode of the tube. When
Q733 conducts, a voltage divider is formed between R739 and R736, and
R741, Q733 and R743. As Q733 conducts harder, there is less voltage
present at the cathode of the tube. When the voltage level of the signal
from Q733/E goes lower, the tube is driven harder, making the picture
brighter. D732, D733, D734 and C735 are present to prevent damage if
the tube should arc.
Tube Bias
In addition to high voltage, the CRTs need other biasing to properly display a picture. First they need a heater voltage, which is developed by the
FBT (not shown) on the G board. It is input to the G board at CN503/6
and 7. From there it is split to the CR and CB boards. The heater is
needed to heat the cathode so that it can emit electrons. If it is missing,
the cathode will not emit electrons and consequently there would be no
picture.
The G1 input on the tube is a control grid that is used for shading. Each
of the tubes has a signal applied to G1 that makes the picture darker
during certain portions of the picture. If this shading input is missing, you
may see an imbalance in color on either the right or left-hand sides of the
screen.
G2 is also a control grid used to limit the acceleration of electrons as they
travel through the neck of the tube. These changes in the acceleration of
the beam change the picture brightness. Each color has a G2 control that
is preset at the factory.
There is an input for the focus grid on each tube. This input is from the
electrical focus control VR on the focus assembly. It should be set using
a dot pattern for optimum focus.
IK Return
All Sony projection TVs employ an AKB (Auto Cathode Balance) circuit to
automate the white balance (black balance) by forming a loop between
the YCJ and the CRT. This loop compensates for losses in cathode current due to aging.
The YCJ (not shown) outputs three reference pulses, each 1H long, that
are delayed by 1H from each other for each field. The sequence for these
pulses is Red, Green and Blue. These pulses cannot be seen on the
screen since they occur in the over-scan region. When these pulses
drive the tubes, current is monitored and converted to a voltage. This
voltage is input to a window comparator whose output is used to adjust
the drive level for each color.
R743 is used to monitor the tube current on the CG board. As Q733
draws more current, there will be a rise in the voltage drop across R743.
There are similar resistors to R743 on the CR and CB boards. All three
pulses are combined on the CG board. All three boards contain a blocking diode similar to D735. These pulses are input to Q734 Buffer and
then to CN731/1 which is connected to the A board. The IK return signal
is then input to the YCJ (not shown). If a problem should occur anywhere
in the CRT drive or tube biasing circuits that causes one of the colors IK
return pulse to be incorrect, the picture will be blanked. This is indicated
by the Self-Diagnostics as the Standby LED flashing five times.
D732
+200V
R736
R739
C735
R732
D733 D734
L731
G2
1 TO FOCUS
BLOCK
CN737
R742
SG731
R741
C732
Q733
CG BOARD
Q722
11
D731
CN731
G
7
CLK
C734
SG732
IK
CN734
9
TO G BOARD
7
CN503
6
D735
Q734
R753
R747
CN732
1
1
3
CN733
D736
R743
IkR
IkB
FROM
FOCUS
BLOCK
R737
R746
1
10
C733
R733
Q731
R735
FROM
A BD.
CN204
G1
G2
9 G1
F1
8 k
H
7
H G1 G1
6
R736
C737
R744
CN735
9
TO CR
7
BOARD CN702
6
6
7
TO CB BOARD
CN762
CN736
9V
CRT DRIVE (CG)

18
10TVP10 1213
1/24/00
19
S Model Video Path Block

Overview
The video path in the S model RA-3 chassis is different from that of the
RA-2 chassis because of the addition of a component video input.
Switching
There are three types of inputs located at the rear of the set. They are
composite, S video and component video. The composite signal is input
to the switching circuit and switched to the comb filter. After Y and C
separation, the Comb Y and C signals are sent back to the switching
circuit. Since a composite signal was input, this Comb Y and C will be
switched out and become Main Y and C.
If an S video input is used, the Y and C signal will be switched directly to
the Main Y and C outputs. If a component input were chosen, the component Y signal would follow the same path as the S video Y signal, i.e., it
would be switched directly to the Main Y path.
The switching circuit also delivers any of the inputs to the Sub Video path.
This means that SY, SC and SYUV signals are delivered to the sub video
path.
Main Processing
Two separate sources are used for the main video path. They are Main Y
and C or component video. Main Y or C is applied directly to the YCJ.
These inputs will be used if a composite/S video source is selected. If a
component video input is chosen, then the Main YUV signals are chosen
by the YUV controller and input to the YCJ. Keep in mind that these lines
will also carry the PIP picture.
PIP Processing
The PIP processing circuit uses inputs from only the sub picture path.
The main video path can be from two sources. They are Main Y and C or
component video. If composite/S video input is selected for sub picture
input to PIP, it is first decoded to YUV by the Sub Decoder and applied to
the YUV switch. If a component video input is chosen, the Y signal is
applied to the YUV switch along with the UV signals from the component
inputs. These signals will then be selected by the YUV Switch and input
to the PIP Processor.
The PIP Processor outputs compressed YUV signals. It also outputs a
YUV Switch signal that will determine the window size and position. These
signals are sent to the YUV Controller, which will select either the PIP
signal or the component input signal for output to the YCJ. The PIP Processor also outputs M H Sync to the Y Switch. The Y switch selects either
the MY or M H Sync inputs. MY is selected for normal and PIP functions.
M H Sync is selected when the user selects Auto Program or Favorite
Channel function. When this sync signal is switched into the YCJ, it is
placed on a DC level that causes a gray screen to be seen in place of the
main picture.
OSD
On Screen Displays are generated by three different sources in the RA-3
chassis. They are System Control, V Chip/CC and PJ OSD and they
share a common input to the YCJ. These circuits have a mute control
system that keeps them from interfering with each other.
YCJ
The YCJ takes the inputs from the Main Y and C paths, the component or
PIP from YUV Controller and the OSD RGB inputs. It processes these
signals and converts them all to RGB drive signals, which are output to
the three tubes.
MONITOR OUT
PJED
CV
SYSCON
CV
C
INPUTS
RGB
COMB
FILTER
MAIN RGB
VCHIP
OSD
RGB
G
C
MC
SWITCHING
TO
C
BOARDS
Y
UV
MY
COMPONENT
Y
YUV SW
SC
Y
SW
M H SYNC
SY
YCJ
MY
SUB UV
YUV YUV YUV

SW
PIP
YUV
YUV CONTROLLER YUV
YUV
SYNC TO
DEFLECTION
PIP
OR
COMP.
MAIN UV
SUB DECODER
S MODELS VIDEO BLOCK

20
17TVP10 1/18/00
21
Switching and Comb Filter (S Models)

Overview
This section discusses the inputs to the S model RA-3 chassis. The S
models have two inputs for composite/S Video and one shared input that
accepts composite, S video and component video. These signals are
switched and if composite video is input, it is sent to the comb filter. The
comb filter separates the Y and C signals and sends them to the A/V
switch. The A/V switch switches the comb Y or component Y signals to
the main Y path. The component U and V signals are switched by IC1903.
A BOARD
19 C3
34
SDA
17 Y3
35
SCL
J1101
3
1
VIDEO 3 IN
4
2
21 SSW-3
S VIDEO
VIDEO
15 V3
L (MONO)
16 L3
IC1101
A/V SWITCH
CXA 1845
AUDIO
R
18 R3
J1106
Y
24 Y4
SSW-4
28
PB
PR
TO IC1903
YUV SWITCH
KP53S70 VIDEO 3 INPUT
Video Inputs
The Video 1 and 2 inputs accept composite and S video inputs. If an S
video cable is plugged in, then the composite video input is disabled. This
is because when the switch in the S video connector is closed, a line on
IC1101 A/V Switch is grounded. The Video 3 input also contains a component input. If Video 3 is selected and there is a cable plugged into
J1106 Pr, then the Video 3 composite and S video inputs are disabled.
This is because the switch in J1106 activates the Video 4 input. This will
switch the Y from the component input to the main Y path. IC1903 YUV
Switch switches the color components.
Switching and Comb Filter

The composite video inputs are input to IC1101 A/V Switch. Whichever
input is chosen is output at IC1101/41. This signal is sent to Q1103 and
Q1104 Buffer and then the filter network consisting of Q1701, FL1701,
Q1702 and Q1703. After filtering, the signal is input to IC1702 Comb
Filter. There is also a 3.58 MHz signal input to IC1702/11 CK In from
IC206 YCJ. The comb filter separates the Y and C signals in the composite video signal. The C signal is output from IC1702/23 C Out to a filter
network consisting of Q1704, FL1702, Q1707 and Q1708. This signal is
then sent to IC1101/43. The Y signal is output from IC1702/25 Y Out to a
filter network consisting of Q1705, FL1703, Q1706 and Q1709. This signal is then sent to IC1101/45. These signals are switched through IC1101
A/V Switch and become Main Y and Main C.
If the switch from the S video input is closed, the internal switch in IC1101
changes position and switches the Y and C from the S video input to the
outputs at IC1101/37 and 39. If the component video input is selected,
the component Y is switched from the Y4 input to IC1101/39.
IC1101 is also capable of switching any one of the input to the Sub Y and
C Out pins 56 and 58.
FSC OUT FROM IC206/57

TO J1105 MONITOR OUT
11
CKIN
YUV MUTE FROM Q1110

MTV V
FROM MAIN TUNER
63
FROM J1102
FROM CN1702/5
V1
FROM J1101
IC1702
COMB FILTER
TC90A53F
41
Q1103, 1104
BUFFER
MAIN V
OUT
Q1701, FL1701
Q1702, Q1703
V2
15
CV
V3
FROM SUB TUNER
60
STV V6
YOUT2
10
S VIDEO
INPUTS
39
Y1
Y2
24
12
S VIDEO
INPUTS
15
19
SCL
COUT
YOUT
23
25
Q1704, FL1702
Q1707, Q1708
Q1705, FL1703
Q1706, Q1709
YIN2
45
Y3
Y4
C1
MAIN Y TO IC1901/19 & 23 YUV

CONTROLLER/TVIN+DVD Y
CIN2
C2
43
C3
37
MAIN C TO IC206/64 YCJ/CIN

COUT2
SYOUT 56
SDA
ADIN
3
17
COMPONENT Y
Q1102
BUFFER
41
TO IC1903/1YUV SWITCH/DYIN, IC1902/34 SUB DECODER/YIN

AND IC1602SUB V CHIP
34
TO IC1902/30 SUB DECODER/CIN
SCOUT 58
35
IC1101
AV SWITCH
CXA2079Q
SWITCHING AND COMB FILTER (S MODELS)

22
8TVP10 1207 1/14/00
23
Picture in Picture (S Model)

Overview
The PIP circuit is capable of taking any of the three types of inputs and
compressing them. The compressed output is sent to the YCJ to be
placed into the main picture. Only the sub input signals are needed for S
models, unlike the V models which required sub and main picture inputs.
The component video input can also be processed here for display as a
child picture.
Sub Y Signal
The sub Y signal from IC1101 A/V Switch is split to three different places.
They are:
Through Q1914 Y Buffer for component when a component input is

selected for the main or sub picture.
IC1602 Sub V Chip to determine if the child picture should be displayed in the PIP window.
IC1902 Sub Decoder to decode the Y and C signals. Y is also used
for H and V sync.
Sub C Signal
The Sub C signal is input through Q1906 Buffer to IC1902/32 C In. This
signal will be decoded to its component form.
Sub Decoder, PIP Processor and YUV Switch

IC1902 Sub Decoder decodes the SY and SC signals. The decoded Y
and C signals, now YUV, are output from IC1902/18, 19 and 20 respectively.
These signals are then input to IC11903/2, 12 and 5. IC1902 has another
set of YUV signals input at pins 1, 13 and 3. The Y signal is the SY signal.
The Sub U and V signals come from the Video 3 component input at
J1106. IC1903/9, 10 and 11 are connected to IC1904/3 DVD SW. IC1904
is a D/A Converter that outputs a voltage level dependent on the data it
receives. This voltage level selects which input is used for the sub picture. The selected YUV signals are output at IC1903/15, 14 and 4 to
IC1905/28, 30 and 32.
IC1905 is the PIP Processor. It digitizes and compresses the input signals. It then converts the compressed signal back to analog and outputs
YUV at pins 8, 9 and 7. These signals are input back into IC1902 Sub
Decoder at pins 11, 12 and 13. They are passed through an auto pedestal circuit and output at IC1902/8, 7 and 6. IC1905 also outputs two control signals, M H Sync and SEL. The M H Sync signal will be used to
create a gray screen during Auto Program and Favorite Channel functions. The SEL line becomes the YUV Switch input to the YCJ and YUV
Controller.
IC1905 PIP PROCESSOR SDA9288

YOUT 15
Q1916
Y BUFFER
Q1917
Y AMP
Q1918
BUFFER
UOUT 14
VOUT 4
IC1903
YUV SWITCH
BU4053
DVD SW 2
FROM
IC1904/3
13
FROM J1106
COMPONENT
INPUT
PR
SEL 12
30 U IN
32 V IN
8
3 X IN YOUT
9
4 XQ UOUT
21 SDA
7
SDA
22
SCL
SCL
VOUT
Q1915
BUFFER
Q1905
BUFFER
Y
RY IN
TO IC1901/1
11
RY OUT 8
Q1907
BUFFER
12 RU IN
Q1903
BUFFER
V IN 5
U IN 12
Y IN 2
11
10
9
PB
Y IN
28
DV IN
3
X1902
3.58MHz
DY 1
IN
Q1914
Y BUFFER
X1901
503.5kHz
Q1920
V BUFFER
SDA
SCL
SY OUT 1
FROM IC1101/56
U
TO IC1901/3
RU OUT 7
V
13 RV IN
TO IC1901/2
RV OUT 6
20 VOUT
19 UOUT
18 YOUT
DVD
SW
DU IN
TO IC1901/6
YUV SW.
Q1904
SUB Y BUFFER
SC OUT 1
FROM
IC1101/58
Q1908
BUFFER
Q1906
SUB C BUFFER
PICTURE IN PICTURE (S MODELS)

24
26 XNTSC
29 APC
1 CERA
IC1902
SUB
DECODER
CXA2019
37 SDA
36 SCL
38 VSYNC
39 H SYNC
34 CVBS/Y IN
SUB Y
32 CIN
TO
IC602
SUB V CHIP
9TVP10 1206 1/18/00
25
RA-4 vs. RA-4A

Overview
This section discusses the similarities and differences between the RA-4
and the new RA-4A chassis. The new chassis is nearly identical in features and circuitry to the RA-4 and the key differences will be discussed in
this manual. Please obtain a copy of TVP-08 for detailed circuit descriptions of the circuits not covered in this book. The part number for the
TVP-08 training manual is TVP080299. An electronic version can be found
at http://service.sony.sel.com.
RA-4A Features
The KP-53XBR300 and KP-61XBR300 are the models that use the RA4A chassis. Screen size is the only difference between the two models.
They share the following features with the previous RA-4 models:
Advanced Pro-Optic System Sony technology that allows full corner to corner focusing.
New Extended Definition CRT Allows corner to corner focusing to
be increased by 25% over last years model.
MICROFOCUS Lens System
Digital Reality Creation (DRC) DRC uses line doubling and pattern recognition algorithms to take the NTSC signal to a near HDTV
equivalent.
Auto Focus Allows the setting of V and H center and skew by the
customer at the touch of a button. This system differs from the one
used by RA-3 because it does centering and skew.
Full Digital Convergence Allows the servicer to converge the set
in the coarse and fine modes. The fine mode uses a point to point
system for adjusting. It is the same system used in the RA-3 chassis.
High Performance Video Processor
3D Digital Comb Filter
Brightview Dual Component Screen The screen contains a Thin
Film Fresnel that brightens and sharpens the picture, and a Fine Pitch
Lenticular screen that achieves higher resolution by using black stripes
to increase contrast.
Built-in High Contrast Screen

First Surface Mirror
Advanced Velocity Modulation
Advanced High Voltage Regulation Eliminates distortion and focus fluctuations that occur when changes in brightness levels cause
changes in the high voltage.
Noise Reduction
Shading Compensation Eliminates color shift and hot spots that
can occur due to the angle of the picture tubes to the mirror.
Wideband Video Amplifier
Multi Image Driver Digital-editing technology that provides versatility in controlling on-screen images. Used in Picture and Picture and
Channel Index modes.
Twin View Picture-in-Picture Allows for viewing two pictures simultaneously and the ability to expand either image up to double its
normal size.
Free Layout Picture-in-Picture Allows the PIP window to be placed
anywhere on the screen.
XDS (Extended Data Service) Receives data information services
that some stations may broadcast. This data includes time, station
call letters, etc.
Dolby Pro Logic Surround Sound
Center speaker input for use with a separate Dolby Pro Logic A/
V Receiver
The following features are new to the RA-4A chassis and are not found on
the RA-4 chassis:
The following are minor circuit differences that will not be covered in this
manual:
1080I Capable
Enables you to display 1080I, 480P and 480I digital TV formats. The
set does not accept 720P format. 480I signals are upgraded to 960I
by DRC.
The 480P signal can be displayed two different ways by changing the
Aspect Ratio in the Set Up menu: V Compressed, 16:9; or normal,
4:3.
These signals can be input to the Video 5 input only. Component or
RGB with sync inputs are accepted using phono jacks. Not compatible with computers 5 BNC connectors.
The Video 5 input cannot use the MID circuit; therefore, PIP and P&P
functions cannot use Video 5.
Parental Control
Enables or disables the V chip rating system to block programs that might
be inappropriate for younger viewers.
RA-4 and RA-4A Circuit Differences

The following differences will be discussed in this manual:
Video Path The new video path will be discussed using an overall
video block, a DTV Video Processing block and DTV Video Processing section which shows the IC and pin numbers that the DTV video
path uses.
Addition of V chip circuitry. The Main CPU controls the main picture V
Chip. There is a separate Sub video V Chip. This will be covered in
the video block section.
VD Mute circuit Due to the fact that this set displays a true 16:9
picture in a cabinet with a 4:3 aspect ratio, the IK reference pulses
that are output during every field need to be hidden. If correction was
not made, these lines would be visible at the top of a 16:9 picture.
This circuit takes the IK reference pulses and CC data and puts them
in the normal 4:3 overscan area by placing a pulse into the vertical
drive signal.
26
The component values in the H deflection circuit have been changed

because displaying 1080I input requires a different scan rate. The
two different scan rates are 31.5 kHz for DRC, MID, 480I and 480P,
and 33 kHz, which is used for 1080I video.
There are now three separate banks of NVM for three separate registration modes. These modes are 1080I, 960I (Normal DRC picture)
and 480P 16:9 Aspect Ratio. The set automatically selects the register bank of whichever signal is input. This is not covered because the
adjustments remain the same for each mode.
The pincushion correction circuit has been changed for greater efficiency. It is similar to the HV Regulation Control circuit used in the
RA-4 chassis.
New Picture tubes are used but are functionally the same.
The 3D Comb Filter is identical but now resides on the BA board alone.
The BA board plugs into the A board.
The Shading circuit is different due to CRT burn countermeasures
installed because of the use of the 16:9 aspect ratio on a unit with a
4:3 screen. These countermeasures are proprietary at this point and
will not be discussed.
The BR and BD boards are functionally the same, but the circuitry is
slightly different. These boards plug into the A board and are replaceable. The pin out of their connectors remains the same.
27
Video Path Block

Inputs
The two tuner outputs and the four composite/S video signals that enter
the unit are input into IC515 A/V Switch. IC515 A/V Switch switches these
video signals to three different paths. The first is the main video path,
next is the sub video path and last is the select output (not shown). The
select output is used to send a composite version of an input to any composite or S video input to an output jack on the rear panel. Any composite/S video input to is selectable in the setup menu. The default setting is
to output the main video.
The Video 4 component inputs are input to IC1403 Main YUV Switch.
The Video 5 DTV inputs are input to IC511 Video Processor. They are
switched through IC511 Video Processor and input to IC1403 Main YUV
Select. IC511 Video Processor also directly outputs Video 5 480P and
1080I as RGB to the tubes.
Main Video
The main video path is used to carry composite/S Video to IC2402 3D
Comb Filter. If a composite signal is used, it is output to IC2402 3D Comb
Filter. If an S Video input is used, then the Y signal uses the same path as
the composite input. The C signal is output from IC515 A/V Switch to
IC2402 3D Comb Filter.
IC2402 3D Comb Filter is used to separate Y and C signals from a composite signal input. If a Y/C signal is input, then IC2402 3D Comb Filter
will perform noise reduction and video processing functions. The C signal
is output to IC1305 Main Chroma Decoder. The Y signal is output to
IC1307 YUV Switch where it is switched through to IC1305 Main Chroma
Decoder.
IC1305 Main Chroma Decoder takes the Y and C input signals and converts these signals to component video. These become the main YUV
signals are then input to IC1307 YUV Switch.
IC1307 YUV Switch switches between the main YUV signals and the input it receives from IC1403 Main YUV Select. Whichever Y signal is
selected is output to IC1008 Main CPU for V Chip/CC. The V Chip/CC
Data is returned to IC1307 to be output as part of the main YUV signal.
The outputs from IC1307 YUV Switch are then input to the BR board
(DRC) and the BM board (MID). The BR board outputs 960I signals,
which are the main video signals and are then input to IC511 Video Processor. The BM board is used for PIP and Twin View functions and its
output is a 480P format. If the Video 5 DTV Input is 480I, it will follow the
video path out of IC1307 through the BR board and output as 960I to
IC511 Video Processor.
Sub-Video
The sub-video path is used to carry sub-video to the BM board where it is
converted for PIP and Twin-View functions. Note: The Video 5 DTV
Input cannot be used for sub video. A composite signal is input to
IC515 A/V Switch and output to CM501 Glass Comb Filter and then input
back to IC515 A/V Switch as Y and C. If the signal were an S Video input,
it would pass directly to the Y and C outputs of IC515 A/V Switch.
The C signal is input to IC1301 Sub Chroma Decoder while the Y signal is
input to IC1302 Sub YUV Switch and then switched to IC1301 Sub Chroma
Decoder. IC1301 Sub Chroma Decoder takes the Y and C input signals
and converts these signals to component video. These sub Y, U and V
signals are then input to IC1302 Sub YUV Switch.
IC1302 Sub YUV Switch is used to select between the sub YUV inputs
and the YUV input from the Video 4 component input. It also outputs the
Sub Y signal to IC1401 Sub V Chip. Sub-video OSD from the BM board
is input to the sub YUV signal. The output of IC1302 Sub YUV Switch is
output as YUV into the BM board for use with PIP and Twin View functions. The signals from the BM board are input to IC511 Video Processor.
IC511 Video Processor

The IC511 Video Processor is used to switch or insert the appropriate
signals to its RGB output. These signals are the main YUV, sub YUV,
OSD RGB, PJED OSD RGB signals and DTV YUV. These signals are
converted to R, G and B to be output to the video amplifiers on each of the
C boards.
MAIN Y/COMP
TU501
MAIN
TUNER
MAIN
C
TU502
SUB
TUNER
BA BOARD
IC2402
3D COMB
FILTER
IC1305
YUV IC1307 YUV
MAIN
YUV SW
CHROMA
CCD MIX
DECODER
SUB
Y
C
BM
BOARD
CM501
GLASS
COMB
IC1008
MAIN
CPU
SUB C
VIDEO 4
COMPONENT
PJED
OSD
MAIN Y
MAIN Y
IC515
A/V SWITCH
COMPOSITE
AND S VIDEO
1-4
BR
BOARD
PIP
YUV
YUV
RGB
CCD + V CHIP OSD

CV
IC511
FOR
VIDEO
PIP PROCESSOR RGB
OSD
TO
TUBES
RGB
BUFFER
Y FOR V CHIP
YUV
IC1301
SUB
CHROMA
DECODER
MAIN
YUV
IC1302
YUV SW
PIP OSD
MIX
RGB
IC1401
SUB V
CHIP
SUB Y
SUB Y
RGB
IC1403
MAIN YUV
SELECT
DTV YUV
IC1004
OSD
PROCESSOR
VIDEO 5
DTV
INPUT
RA-4A VIDEO PATH BLOCK

28
14TVP10 1/20/00
29
DTV Video Processing Block

Overview
This section will discuss how the DTV signals are processed. This includes video path V Chip/CC processing, sync path and signal format
detection.
The RA-4A chassis accepts two types of DTV inputs, component and RGB
with sync. There are three component inputs, Y, Pb (U) and Pr (V). The
sync is contained in the Y signal. There are five inputs for RGB. They are
R, G, B, HD and VD. The RGB and Y, Pb and Pr share the same jack.
The user must select which type of input they are using in the setup menu.
If the color appears wrong, ask the customer to make sure that menu
setting is the same type as the input.
Component Input Selected

If the DTV signal input is component video and Y, Pb, Pr is selected in the
setup menu, the set will work as follows. The Video inputs are sent directly to IC511 Video Processor. These signals are output from IC511
Video Processor back into itself and to IC1403 Main YUV Switch. The Y
signal is also sent to the internal Intelligent Sync Separator in IC511. It is
called intelligent because it determines which sync signal will be output
from it. If HD and VD from the DTV Sync inputs are detected, then they
are switched out to IC1008 Main CPU by default. If there is no VD or HD
input detected, but the Y input contains sync, then the sync will be separated from the Y and output to IC1008 Main CPU. The Main CPU uses
the sync input to determine the format of the incoming signal.
If IC1008 Main CPU determines that a 480P or 1080I signal has been
input, the following occurs. The YUV signals that were input back into
IC511 are processed and output as RGB to the tubes. The H and V sync
from the Y signal is separated and output to the deflection circuits. The Y
signal input with U and V signals input to IC1403 Main YUV Select is
switched through to IC1303. IC1403 selects this signal because of the O
DTV input received from IC1008 Main CPU. The signal is passed by
IC1303 to IC1008 Main CPU. This signal is used for V Chip/CC. The
Main CPU also outputs the name of the format through its OSD lines so it
is displayed for the first few seconds after the input type is detected.
If a 480I signal is detected, the signal will not be directly output at IC511s
RGB outputs. Instead it will follow the path through IC1403 to IC1307.
Here it joins the main video path and is output to the DRC circuit. However, its sync signals are output to the deflection circuits from IC511.
If the Main CPU detects a 720P signal, the following will occur. The screen
will dim and the words This signal is not available will be displayed.
IC511 Video Processor will not output the RGB to the tubes or the sync to
the deflection circuits. IC1008 Main CPU will output a command on the
I2C bus that will instruct the OSD CPU to output a Low on the O 720P line.
This line signals IC1307 to disable its DTV input and causes IC1303 to
select the input from the Y path shown.
RGB Inputs Selected

If the customer inputs RGB, HD and VD, and RGB is selected in the set
up menu, the video signals will be processed as explained previously.
The sync signals, which are input separately, are output from the Intelligent Sync Separator instead of the sync from the Y so that IC1008 Main
CPU can determine what video format has been input.
H + V SYNC
TO DEFLECTION
CIRCUITS
IC511
VIDEO PROCESSOR
DTV
SYNC
TO TUBES
V5
DTV
INPUT
YUV
12 H SYNC
O720P
FROM
OSD CPU
IC1009/61
TO IC515
FOR AUDIO
SWITCHING
V4
YUV
INPUT
IC1403
MAIN YUV
SELECT
YUV
IC1307
MAIN YUV
SW
IC1303
SW
YUV
ODTV
IVP
480I
TO
BR BOARD
VIN
IC1008
MAIN CPU
DTV VIDEO PROCESSING BLOCK

30
16TVP10 1/20/00
31
DTV Video Processing

Overview
This section discusses the video path for the DTV inputs. It is designed to
aid you in troubleshooting by providing you the IC pin numbers that carry
the video signals.
Circuit Description
J501 in the rear of the set has a green input labeled Y/G, a blue input
labeled Pb/B, and a red input labeled Pr/R. These is a dual input connector which accepts both component and/or RGB input. The user determines which type of input is expected in the set up menu. If the wrong
type is selected, the color of the picture will be wrong.
Regardless of which type of signals are input, they will be sent to IC511/5,
4 and 3. These signals are processed for correct color and output at
IC511/76 SEL Y Out, IC511/77 SEL CB Out and IC511/78 SEL CR Out.
These signals are split to two ICs. First they are input back into IC511/75
SEL Y IN, IC511/74 SEL CB In and IC511/73 SEL CR In respectively. If
the input signals were 1080I or 480P, they would be converted to RGB
and output to the tubes at IC511/35 R Out, IC511/37 G Out and IC511/39
B Out.
The outputs from IC511/76, 77 and 78 are also input to IC1403 at pins 12,
5 and 2. IC1403 is a switching IC that switches between the YUV, which
came from the Video 5 DTV input, and the inputs from Video 4. These
signals are input at IC1403 pins 3, 1 and 13. The inputs selected are
dependent upon the inputs at IC1403 pins 9, 10 and 11. If the input to
these pins is Low, the DTV inputs are selected and if the inputs are High,
then the Video 4 component inputs are selected. In this case the input
would be Low since we want to select the Video 5 DTV inputs. The DTV
YUV signals are then output from IC1403/4, 15 and 14.
These signals are input to IC1307/7, 6 and 5 for two reasons. Firstly, if
the signals input to Video 5 are 480I format, they need to be switched to
the main video path for DRC processing. Remember the normal picture
on this set is a 960I signal from DRC. Secondly, the Y signal needs to be
switched to IC1307/22. If we continue to follow this path, we can see that
the signal is sent to IC1303 SW. It will be selected anytime a DTV signal
is input, except when the signal is 720P format. It is sent to Main CPU V
In for V Chip/CC for the accepted formats. The switching of IC1303 is
controlled by its input at pin 2. This signal comes from IC1009/61 O
720P. When a 720P signal is input, the switch in IC1303 changes position and switches the signal in from the Y/G input. The same control line
also disables the outputs of IC1307 Main YUV Switch.
IC511
VIDEO PROCESSOR
CXA2101AQ
FROM
DTVIN
J501
Y/G
PB/B
PR/R
CN503
75
SELYIN
SELCBIN
73 SELCRIN
SELYOUT 76
IN2V
4 IN2CB SELCBOUT 77
3 IN2CR SELCROUT 78
5
74
ROUT 35
BOUT 37
GOUT 39
BUFFER
Q1308, 1309
J503 YUV4
INPUT
3
1
O DTV
FROM
OC1008/3
4
15
14
10
22
13
TO CN7101
CR BOARD
12
IC1403
MAIN YUV
SELECT
MC14053BF
9
1
3
5
BUFFER
BUFFER
BUFFER
IC1307
MAIN YUV SW
6
CXA2119
IC1303
SW
NJM2533
TO IC1008/22
MAIN CPU/VIN
FOR VCHIP
O 720 P FROM
IC1009/61
5
25
11
Q1420
Q1312
DTV VIDEO PROCESSING

32
15TVP10 1/21/00
33
VD Mute
Overview
Due to the fact that this set displays a true 16:9 picture in a cabinet with a
4:3 aspect ratio, the IK reference pulses and CC data contained in every
field need to be hidden. The VD Mute circuit does this. If correction were
not made, these lines would be visible at the top of a 16:9 picture. This
circuit takes the IK reference pulses and CC data and puts them into the
normal 4:3 overscan area when they are occurring by placing a pulse into
the vertical drive signal. Inputting the HBLK and VBLK into a series of two
programmable counters does this. These counters are set up so that the
pulse output is equivalent to 11 horizontal scanning lines. This pulse is
used to mute the V Drive signal.
VD Mute
Since this circuit only needs to be active when a 16:9 picture is being
displayed, an enable is necessary to allow the counters to count. This
signal is sent from IC1009/59 V Comp. IC1609 and IC1608 both have an
enable input that is tied to Deflection 5V at pin 10 ENP. This voltage must
be present for the circuit to operate.
The HBLK line is input to IC1609/2 CLR. This input appears to be for
Clear, but there is actually an error in the service manual. This line is
actually the CLK input but we will continue to call it CLR to avoid confusion between this book and the service manual. The HBLK signal will be
33.7kHz when a 1080I signal is input and 31.5kHz if a 480P signal is
input. The VTIM signal that is input to IC1609/9 Load is always 60Hz.
These signals are always input to IC1609 so when the V Comp line goes
HIGH, the circuit begins to operate. IC1609/15 RCO is the carry output
and will be LOW for the first 14H of the VTIM signal. Its output is inverted
by IC1623 and input to IC1609/7 ENT, which is used to keep the outputs
from changing state. IC1609/11 QD is LOW for the first 7H of the VTIM
signal and HIGH for the rest.
The signal from IC1609/15 RCO is input to IC1608/9 Load. The signals
from IC1609/11 are input to IC1608/1 /CLR. /CLR disables the IC1608
outputs when it is LOW. Therefore for the first 7H, the output at IC1608/
12 will be LOW. When IC1608/1 goes HIGH, the outputs are enabled and
the signal at IC1608/12 goes HIGH. This is because when the /CLR input
is HIGH and the Load input is LOW, the output at Q2 will be the same
state as the C input, which is at IC1608/5. This pin is tied to 5 volts;
therefore, the output from IC1608/12 is HIGH. This output stays HIGH for
7H for this reason. When the Load input goes HIGH, the output continues
to remain HIGH for another 4H. This is because IC1608/11 Q3 output is
inverted and input to IC1608/7 ENT. When the Load input is HIGH and
the ENT input is LOW, the output does not change state. When the ENT
line returns to a HIGH, then the output at IC1608/12 goes LOW. This
gives us the 11H pulse necessary to hide the IK and CC Data lines.
When the signal from IC1608/12 is LOW, both Q1631 and Q1629 are
OFF. When these transistors are OFF, this circuit has no effect on the V
Drive signal. When signal from IC1608/12 goes HIGH, then Q1631 and
Q1629 both turn ON. Q1631 mutes the V Drive directly by placing C1651
near ground potential. Q1629 turns ON, allowing current to flow through
Q1621 B-E through D1634 to ground. This action causes Q1630 to turn
ON. This will mute the V Drive signal by placing C1647 close to ground
potential.
RGB Mute
The 4H pulse that is output from IC1608/7 is used to mute the RGB signals at the end of the 11H VD Mute. This is necessary because as the
beam begins to travel back to the top of the 16:9 picture, we do not want
to see any retrace lines that might occur if video were to start at this point.
Therefore this 4H pulse mutes the RGB signals to the picture tubes.
V Out
20v 5 ms
IC1608
2v 5 ms
V SAW
AMP OUT
FROM
IC514/1
DEFLECTION
5V
2 CLR
HBLK (HP)
FROM
CN509/9
VDSP/VTM
VBLK
FROM
IC512/36
OSD-CPU
O VCOMP
FROM
IC1009/59
9 LOAD
2 CLR
RCO 15
IC1623
9 LOAD ENT 7
1 /CLR
11
TO
IC1625
AND
GATE
FOR SCP
R1678
IC1608
TC74HC
163AF
BLK
Q2 12
PULSE
CHANGE
R1667
C1648
C1649
R1676
C1651
C1647
Q1631
Q1630
R1677
1 /CLR
Q1621
D1634
3
4
5
6
A
B
C
D
IC1609
TC74HC1
63AF
BLK
PULSE
CHANGE
3 A
R1665
Q1629
R1664
4 B
6 D
5 C
TO
IC518/5
VD
DRIVE
AMP IN
Q3
R1662
R1661
11
ENP
10
C1650
ENP
10
IC1623
TO RGB
MUTE
DEF
5V
VD MUTE
34
13TVP10
1/24/00
APPENDIX 1
Self-Diagnostics
The number of times the LED blinks may correspond to that shown in the
following table:
Diagnosis Item
Overview
The RA-4 chassis employs a Self-Diagnostic system that uses the Timer
LED and an on screen menu to help indicate where the problem with the
set has occurred. You will generally have to use the flashing LEDs since
the set will be shut down. AC power must be disconnected in order to turn
the set off once shutdown has occurred.
When a failure occurs, all of the circuits covered by the Self-Diagnostics,
except AKB, send a signal to the OSD CPU. The OSD CPU sends data
to the Main CPU that indicates how many times the Timer LED will flash.
The AKB circuit located in the Video Processor IC sends data over the
I2C bus directly to the Main CPU. In addition, each circuit, except AKB
and High Voltage, send a signal to the latch circuit to shut the set down
when failure occurs.
< FRONT PANEL >
EXAMPLE
Power not ON
+B OCP detection
+B OVP detection
V detection
AKB detection
H detection
HV abnormality detection
Audio abnormality detection
WDT (Syscon)
Self-diagnosis
screen display,
Diagnosis Item Results
Standby/
sleep lamp,
Number of Blinks
Not lit
LED blinks 2 times
LED blinks 3 times
LED blinks 4 times
LED blinks 5 times
LED blinks 6 times
LED blinks 7 times
LED blinks 8 times
LED blinks 9 times
2 : +B OCP
3 : +B OVP
4 : V STOP
5 : AKB
6 : H STOP
7 : HV
8 : AUDIO
9 : WDT
* : XX the range of values for number of operations is 00-99.
XX
XX
XX
XX
XX
XX
XX
XX
For 99 or higher there is no count up
and the number remains at 99.
If the problem is intermittent and you can get the set to operate, you can
display a menu showing the number of times failures have occurred. This
is done by pressing the following sequence of buttons on the remote.
Display Channel 5 Vol - Power
The display will look as follows.
<Diagnosis Items>
+B overcurrent
+B overvoltage
TIMER/STANDBY indicator
<Number of Blinks>
2 times
3 times
4 times
Lamp ON : 0.3 seconds
Lamp OFF : 0.3 seconds
Lamp OFF :
3.0 seconds
Vertical deflection stop
SELF CHECK
2 : +B OCP
3 : +B OVP
4 : V STOP
5 : AKB
6 : H STOP
7 : HV
8 : AUDIO
9 : WDT
XX
XX
XX
XX
XX
XX
XX
XX
2 : +B OCP
XX
XX the range of values for number of

operations is 00-99.
For 99 or higher there is no count up
Diagnosis
and the numberremainsat 99.
Results
ii
iii
Standby Power Supply
The waveforms below show what will be seen at Q621.
Overview
The standby power supply is a switching power supply used to create
Standby 5V. The Standby 5V line is used to power the Tuning Micon and
EEPROM and any other circuits which need power when the set is OFF.
Converter Operation
Operation of the Standby power supply begins when the set is plugged in.
The AC line voltage is applied across the standby power supply. The AC
low side is ground for this circuit. The AC high side is applied to a half
wave rectifier consisting of D621 and D622. Two diodes are used so that
there will be protection should one of them fail. This voltage is then applied to T621/1 SRT Input through R639. R639 is a fusible resistor used
for current limiting and failure protection. It will open if the standby switching circuit draws excessive current. Please note that the board has T621
SBT silk-screened on it. This differs from the service manual, which calls
T621 SRT.
When the voltage is applied to T621/1 SRT Input, current flows through
the winding and R631 to Q621/G. Q621 Converter is a FET with added
protection. When a positive voltage is applied to the gate, it begins to
conduct drain to source. This reduces the voltage at T621/3 to close to
zero. Normally this would reduce the voltage at Q621/G, but a voltage is
supplied to the gate through R632 and C630 from T621/4. This voltage is
induced into the secondary winding of T621/4 when current flows through
the winding between T621/1 and T621/3. The voltage is not permanent
due to C630. As C630 charges, it reduces the voltage at Q621/G. Once
this voltage falls below a certain threshold, Q621 Converter turns OFF.
Once Q621 Converter turns OFF, all polarities are reversed. This reversal of polarity helps speed up turn OFF of Q621. D623, along with C631
and R640, form a snubber network (voltage clamp). This network clamps
excessive voltage overshoot caused by the collapsing magnetic field of
T621 SRT and returns the excessive voltage to C629. When the field
collapses fully, current begins to flow through T621/1 and 3.
Q621/G - 1 V, 10 us
Q621/D - 50 mv, 10 us
Q621/S - 1 V, 10 us
Regulation
Changing the frequency of the switching regulates the output voltage at
the secondary winding comprised of T621/8 and 9. Taking a sample voltage from T621/4 and applying it to rectifiers D624 and D625 does this. As
this voltage rises and falls, the rectified voltage is applied to Q622/B through
R634. When Q622 begins to conduct, it lowers the voltage at Q621/G
and changes the switching frequency.
The changing frequency will change the amount of voltage coupled to the
secondary winding consisting of T621/8 and 9. If the load on the secondary output increases, the frequency of switching will decrease. This brings
the frequency of the converter closer to the optimum operating frequency
of T621 SRT. Moving closer to this optimum frequency causes more
voltage to be provided at T621/9. The opposite occurs when the load on
the supply decreases. This causes the frequency of operation to be increased and the amount of voltage coupled to T621/9 to be decreased.
The supply typically operates at 45 kHz when the set is OFF and at about
30 kHz when the set is operating. The incoming line voltage also effects
the frequency of switching operation.
FB621
D621
T621
SRT
R639
4.7 OHMS
1
D622
FROM
T601/1
AC Hi
SIDE
C631
R640
11
10
D623
R631
D
C630 R632
4
D624
IC622
5V REG
7.2VDC BAO5T
D628
I
O
9
G
Q621
2SK2845
D698
D699
MTZ-T-77
-15 .
TO RY600
POWER RELAY
CN641
10
C650
D625
R633
C637
C633
5
STANDBY
+5V TO
A BOARD
CN1641
TO Q646/E
BACKUP
R634
R635
D627
C634
C629
FROM
R623
&R664 AC
Lo SIDE
R637
Q622
PROT.
R636
R638
D626
RD6.2ESB2
C699
C636
C635
G BOARD
STANDBY SUPPLY
iv
3 CTV26 1187 12/28/99
Over Current Protection (OCP)
Secondary Output
Monitoring the voltage across R637 is used for over current protection.
This voltage is representative of the amount of current flowing through
Q621 Converter since it is in series with the transistor. If this voltage
should rise to .6 volts, it will cause Q622 to turn ON. If Q622 were to turn
ON, it would shunt Q621/G voltage to ground. This would cause Q621
Converter to stop conducting.
The power coupled through T621 SRT places a voltage on T621/9 that,
when rectified and filtered by D628 and C637, is 7.2 volts. This voltage is
constant due to the regulation circuit on the primary side of T621 SRT.
This 7.2 volts is applied to Q646/E for backup during the start of regulation by the regular power supply.
Over Voltage Protection (OVP)

Over voltage protection is done by rectifying the voltage at T621/6 with
D627. This voltage is filtered by C636 and applied to D626 through R638.
If this voltage should rise above 6.2 volts, D626 begins to conduct. When
its conduction allows Q622 Protect to turn ON, over voltage protection is
employed. Q622 Protect turns ON and grounds Q621/G, which stops the
converter from switching.
D699 is also used for OVP. The signal from T621/4 is rectified by D698.
This creates a negative voltage across C699. If this negative voltage
becomes great enough, D699 conducts and the Q621/G voltage is brought
lower.
It is also applied to IC622 5-Volt Regulator, which regulates its output to 5

volts. This 5 volts is sent to CN641/10 which connects to the A board and
powers the Tuning Micon and other circuits. It is also applied to RY600
Power Relay.
Checking Q621
Testing a MOSFET device is simple. The leads show infinite resistance
to each other except for drain to source in one direction because of the
presence of a protection diode.
To prove the device is functional:
1. Connect the negative lead of the ohmmeter to the SOURCE lead.
2. Touch the ohmmeter positive lead to the gate, to pre-charge it.
3. Connect the ohmmeter positive lead to the DRAIN. If the device is
good you will get a resistance reading of about 400-1k ohms.
Some DVMs do not produce enough DC voltage in the ohms mode. The
diode check mode can be used with these models. When using the diode
mode, a low voltage drop is shown after pre-charging the gate.
FB621
D621
T621
SRT
R639
4.7 OHMS
1
D622
FROM
T601/1
AC Hi
SIDE
C631
R640
11
10
D623
R631
D
C630 R632
4
D624
IC622
5V REG
7.2VDC BAO5T
D628
I
O
9
G
Q621
2SK2845
D698
D699
MTZ-T-77
-15 .
TO RY600
POWER RELAY
CN641
10
C650
D625
R633
C637
C633
5
STANDBY
+5V TO
A BOARD
CN1641
TO Q646/E
BACKUP
R634
R635
D627
C634
C629
FROM
R623
&R664 AC
Lo SIDE
R637
Q622
PROT.
R636
R638
D626
RD6.2ESB2
C699
C636
C635
G BOARD
STANDBY SUPPLY
vi
3 CTV26 1187 12/28/99
vii
Switching Power Supply Primary Rectifier

When the set is turned ON System Control IC001/62 places a high on
the base of Q652 Relay Drive. Q652 turns ON and provides the ground
return path for Power Relay RY601. With the relay closed, AC is applied to a voltage doubler circuit comprised of bridge rectifier, D602 and
two capacitors, C607 and C608. This produces 300V at R608 with
respect to Hot Ground.
IC601
The switching transistors in previous power supply circuits have been
replaced by an IC in this chassis. Basically this IC is two transistors
fabricated on the same piece of silicon. This gives us the advantage of
having the gain and other electrical characteristics matched. In addition
there is a zener diode and a regular diode across the base emitter
junction for protection purposes.
Oscillator
IC601-1, C615, C618 and the winding between T604/4 and 5 form one
section of the oscillator for the switching regulator. IC601-2, C616, C617
and the winding on T604 between pins 2 and 3 form the other leg. T604
is the Power Regulating Transformer (PRT). The arrangement of the
circuit can be considered a Dual Tank Oscillator. The operating frequency is determined by the two LC circuits: C618, and the T604 winding between pins 4 and 5; C617, and theT604 winding between pins 2
and 3. IC601-1 and IC601-2 share in producing the oscillator signal.
IC601-2 is ON during the positive half, and IC601-1 is ON during the
negative half. The oscillator frequency is 97kHz when the TV produces
a white raster, and at 103kHz with a black raster.
Start Up
The current path for initial start-up of the oscillator is through IC601-2,
through the winding of pins 2 and 1 of T604, the winding of pins 6 and 5
of T605 and then through C621. When current flows through this path a
magnetic field is created in the windings of T604. This field continues to
grow until C621 is fully charged. After C621 is fully charged the magnetic fields begin to collapse. This induces a voltage at T604/3 that that
turns OFF IC601-2 through C616 and R613. While this is occurring a
voltage is induced at T604/4 that turns IC601-1 ON. When this occurs it
provides a discharge path for C621. Once C621 is discharged it allows
the whole cycle to repeat itself.
As the circuit oscillates it produces a 300Vp-p waveform at Power Input
Transformer T605/6. This waveform is induced into the secondary
windings of the T605, producing all of the secondary voltages.
Regulation
The power supply is regulated by the control winding of PRT T604/7 and
8, in the following manner:
An increase in voltage across the control winding will reduce the inductance of T604 therefore increasing the oscillator frequency. When the
oscillator frequency increases it moves further away from the resonant
frequency of T605, reducing the voltage at the secondary outputs. The
opposite occurs when the voltage across pins 7 and 8 decreases.
A correction voltage is produced by IC651/4 which varies inversely
proportional to the 135V line. Pin 8 of the transformer control winding is
connected to the correction voltage The other leg of the control winding
(pin 7) is connected to the +18V line by D660. The voltage differential
across the control winding causes a dc current to flow through the
winding.
viii
ix

Regulation (contd)
The frequency of the power supply is dependent on the load that it sees.
When the picture brightness increases the load increases which lowers
the voltage across T604/7 and 8. When this occurs the frequency of the
oscillator decreases which allows T605 to supply more current to the
secondary windings which keeps the 135V line from lowering in voltage.
Since the 135V line is the only one regulated there will be about a +/5% variation in the other supply voltages.
The following chart shows what occurs with different loads on the
supply. Note that the oscillator frequency changes but the 135V line
remains constant.
As soon as a secondary voltage is produced, C666 starts charging. This

causes the voltage at the positive capacitor terminal to rise, causing
Q654 to decrease conduction, less dc current flows through the transformer control winding; the oscillator frequency decreases, and the
secondary voltage increases further.
C666 continues to charge and the secondary voltages continue to rise
until the capacitor charges to the point that its voltage potential is the
same as Q654/E, at this point the transistor stops conducting allowing
IC651 to control the regulation process.
Limit
Limit transistor has two functions:
It acts as a non latching voltage limiter.
It is a soft start reset. It discharges C666 when the unit is turned

OFF, preparing it for the next turn ON.
Location
White Raster
No Input
V across pins 7+8/T604
2.58V
2.73V
Voltage Limiter
Freq. ,at IC601/E2
97Khz
103Khz
V at CN653
135V
135V
Zener D664 is a 24V zener that is connected between Q656/B and the
18V line. During normal operation, the potential across the zener is
lower than the zener voltage. Therefore, the zener is OFF and cannot
supply a base voltage to Q656 therefore Q656 will be OFF. Should a
defect cause the 18V line to rise above 24V the zener diode breaks over
and applies bias to Q656/B, turning it ON. This turns Q654 ON, the
voltage across the transformer control winding increases (T604/8 drops
to 3.7V) and the oscillator frequency increases. The end result is a
decrease in transformer efficiency and a drop in the secondary voltages.
Soft Start
The soft start circuit prevents discharged capacitors on the secondary
lines from drawing excessive current during power start up and shorting the oscillator transistors. The soft start circuit brings the secondary
voltages up slowly.
At power ON, C666, which is discharged, has a 0V potential at its +
terminal. This biases Q654 ON, via R696. With this transistor ON, it
allows standby 12V from Q651/E to be applied across pins 7 and 8 of
T604. This increases the oscillator frequency and reduces efficiency.
Therefore, the start up secondary voltages will be reduced considerably.
The Standby 12V is switched through Q651 when Q652 Relay Drive
turns ON.
Soft Start Reset

Relay RY601 is powered by 12V produced by the Standby power supply
and the relay is turned ON by Q652.
Q652 is OFF when the unit is turned OFF. This removes the ground
path from the relay, opening it up. It also allows the 12V from the relay
to flow through the relay coil, through R693, to Q656/B. This turns the
transistor ON, and discharges C666.
xi
Troubleshooting
In cases of power supply failure it is often necessary to isolate the
power supply from the rest of the circuit. This cannot be done with the
set using full AC power. An additional problem with the RA-2 chassis is
that the power supply section is on the same board with other circuits
and cannot be completely isolated. However the biggest concern in this
process is the +135V line. It can be isolated by removing CN653.
CN653 is a loop through connector for the +135V line located on the G
board.
The following tables can help you in isolating whether you have a power
supply problem or another problem. These voltages were taken by first
shorting pins 3 and 4 on RY601 and slowly bringing up the AC line
voltage using a variable AC power supply. There are three tables that
show the power supply voltages at various stages of unloading. The
first is with the supply fully unloaded which means the connectors
between the A and G boards are disconnected and CN653 has been
removed. The second table was made with the A and G boards disconnected but CN653 is in place. The third table was made with everything
connected. It is very important when bringing the set up slow that the
AC input voltage not be brought above 50Vac. Also anytime you have
found IC601 shorted or R608 open you should follow the above procedure.
R A -2 C hassis P ow er S upply O utput V oltages - C N 653 and A B oard U nplugged

(G nd = D 602 neg end)
S econdary (G nd = G round rail on G B oard)
O scillator
O scillator
135
30
15
-15
11
5
-5
V oltage
F requenc
y
50 V p-p
72 kH z
48.7V
14.5V
5.0V
-3.6V
4.5V
2-1V
-.35V
20V ac
70 V p-p
84 kH z
63.0V
18.5V
5.8V
-3.7V
5.8V
2.5V
-.60V
30V ac
90 V p-p
100 kH z
63.2V
20.0V
6.3V
-3.8V
6.1V
2.8V
-.80V
40V ac
120 V p-p
117 kH z
69.0V
22.2V
6.8V
-3.8V
6.9V
3.0V
-.90V
50V ac
R A -2 C hassis P ow er S upply O utput V oltages - C N 653 plugged in and A B oard U nplugged
P rim ary (G nd = D 602 neg end)
135
30
15
-15
11
5
-5
O
scillator
O
scillator
V ariab le
V oltage
F requenc
A C In p u t
y
50 V p-p
72 kH z
40.0V
12.1V
5.0V
-3.6V
4.1V
1.9V
-.2V
20V ac
70 V p-p
84 kH z
48.0V
15.2V
5.8V
-3.8V
5.1V
2.4V
-.7V
30V ac
90 V p-p
100 kH z
50.6V
16.0V
6.8V
-3.9V
5.2V
2.7V
-.9V
40V ac
120 V p-p
117 kH z
54.8V
17.7V
6.6V
-4.0V
5.8V
2.9V
-1.0V
50V ac
R A -2 C hassis P ow er S upply O utput V oltages -Everything C onnected
P rim ary (G nd = D 602 neg end)
O scillator
O scillator
135
30
15
-15
11
5
-5
V ariab le
V oltage
F requenc
A C In p u t
y
45 V p-p
72 kH z
38.0V
7.3V
4.4V
-3.3V
3.1V
1.6V
-.20V
20V ac
70 V p-p
84 kH z
44.5V
8.3V
4.8V
-3.6V
3.5V
2.1V
-.50V
30V ac
92 V p-p
104 kH z
46.3V
8.8V
5.0V
-3.7V
3.8V
2.3V
-.80V
40V ac
118
V
p-p
124
kH
z
49.2V
9.2V
5.3V
-3.6V
4.1V
2.4V
-1.0V
50V ac
P rim ary
V ariab le
A C In p u t
S tand
by 12V
2.7V
4.6V
7.2V
9.1V
S tand
by 12V
2.5V
4.7V
7.0V
9.3V
S tand
by 12V
2.4V
3.5V
4.5V
5.6V
xii
xiii
Hot Ground
IC651
T604/1
T605/1
L601
IC653
T603/1
CN653/1
IC655
RY601
3
TVP07GBPS
IC655
CN653
CN507
IC652
IC653
R608
IC601
TVP07GPSTOP
xiv
xv
T501 induces a 12 vp-p signal onto its secondary which is connected to
the base of Q502 Horizontal Output. (See Waveform C)
Horizontal Deflection
Overview
Q502 and associated components amplify and waveshape the signal so

that 1000 vp-p spikes are output and applied to the yokes and Flyback
Transformer T504.
The horizontal deflection circuit has two main functions:
Control horizontal scanning of the CRT beams.
Along with the flyback transformer create high voltage for the picture
tubes.
Horizontal Scanning
There are 3 circuits used to control Horizontal beam scan:
Horizontal Drive
Pincushion
Centering
Also a sample of this pulse is sent back to the Y/C JungleIC301/36 HP/
Hoff. This pulse is compared to the reference created by X304 for phase
correction of the horizontal oscillator. The HP pulse is also sent to IC001
System Control for OSD positioning and IC802 Wave Generator. (See
Waveform D)
C
1v
5ms
D
5v
50us
Horizontal Drive
When +9V line is applied to the Y/C Jungle IC301 X304 begins to
oscillate. This is a 32fh signal that is used as a reference for the horizontal oscillator inside the Y/C Jungle. When the Y/C Jungle IC confirms
communication with System Control IC001 it begins to output 8vpphorizontal drive pulses at pin 35. (See Waveform A)
These pulses are input to the base of Q501 and then a 90 vp-p signal is
output at the collector and applied to T501 the Horizontal Drive Transformer. (See Waveform B)
A
2v
5ms
B
1v
50us
Pincushion
The purpose of the pincushion circuit is to correct for deflection distortion. This distortion occurs because of the yokes inability to create a
linear beam scan. The result would be a picture bowed at the sides, top
and bottom. We compensate for this problem by using pincushion
correction circuits. Pincushion correction for horizontal scanning in this
set is described below.
Pincushion correction is achieved by modulating the horizontal scan
current with a vertical parabola. The resulting signal causes the horizontal scan current to be least at the top of the raster, but to gradually
increase to maximum as the beam reaches the vertical center of the
screen. As the beam continues to move towards the bottom of the
screen, the horizontal scan current gradually decreases. The result is a
raster with straight sides.
xvi
xvii
In the RA-2 chassis a vertical parabola signal is output from IC301/31 to
IC501/9. (See Waveform A)
At IC501 H pulses at pin 8 are pulse width modulated by the vertical
parabola signal at pin 9. The result is output to and amplified by Q505.
A
2v
5ms
B
1v
5ms
When the above signal (Waveform B) is applied to T502 PMT and

T503 HLT it controls the return path of the horizontal yokes by inducing
a voltage that causes more or less current to flow in accordance with
the waveform. This keeps the sides of the picture straight.
Centering
It should be noted here that centering of the horizontal yokes is done by
using one of the secondary coils of FBT T504 and attaching its center
tap to the return of the Green yoke. The other windings are connected
through rectifiers to the other yokes. Horizontal centering is necessary
because the red and blue tubes are at opposite angles to the screen in
reference to the green tube which is straight. Therefore by applying DC
voltages of opposite polarities with reference to the center tap we are
centering red and blue to green. If you place the negative lead of your
DVM to pin 8 of T504 FBT and the positive lead on D514 Cathode or
D515 anode you should read +4V and -4V respectively.
High Voltage Development

High voltage is developed by taking the horizontal output pulses and applying them to the Flyback Transformer T504. The Flyback Transformer
T504 steps up the horizontal pulses and rectifies them. This produces
31Kv at its output. This voltage goes to the high voltage block where it is
distributed to the three picture tubes.
This is where the RA-2 chassis differs from the previous Sony projection
television sets. This chassis has no high voltage regulation. However there
have been various steps taken to compensate for this fact.
xvii
xix
CN503
CN502
Q502
CN504
Q501
Q505
CN653
TVP)&GBVT
T501/1
T502/1
Q502
Q505
Q501
L505/1
T504
CN503/1
CN502/1
CN504/1
TVP07GBHV
xx
xxi
VERTICAL DEFLECTION
Vertical Drive
IC301 Y/C Jungle contains a vertical oscillator whose frequency is determined by C323 which is connected to IC301/33. This oscillator is used to
create the drive signal for vertical deflection. It free-runs at approximately
60Hz to maintain a raster under no signal conditions. When a video signal
is present it is locked to the videos vertical sync pulse which is input at
IC301/43.
IC301 Y/C Jungle uses the vertical oscillator to generate two vertical drive
signals which are output at pins 29 and 30. These signals are sawtooth
waves and are 180 degrees out of phase. They are shown in Figures 1
and 2. These signals are then input to IC1501 V Out where they are amplified and output to the vertical yokes. You also notice that IC301 pins 29
and 30 are input to the Vertical Zooming Amp IC1502. There they are
multiplied with a sample of the ABL signal. This is done to compensate for
vertical size changes due to lack of high voltage regulation. The outputs
from IC1502 are then summed with the vertical drive signals at Vertical
Output IC1501/1 and 7. The vertical drive signal output from pin 5 is about
55Vp-p. This is possible because IC1501 contains a voltage boost circuit.
IC1501/3 is used as a flyback supply and boost the positive supply on the
output to 45V. A sample of this pulse is used to create VP. The output
signal swings from -10V to 45V. The vertical drive signal is then sent
through L1501 to the three deflection coils via CN1501.The coils are connected in series. The return path to ground for the signal is through TH1501,
R1501 and R1518. The return signal also applies negative feedback to
the input via C1524, C1502 and R1506.
Protection
Since a loss of vertical deflection will damage the CRTs, protection is provided in the event of deflection loss. Since there is no return of VP to the
Y/C Jungle we need another way to blank the set if we lose vertical deflection. Since the VP pulse does go back to System Control IC001 to control
data timing this line is used. When the VP pulse is not present at IC001
the data and clock signals between System Control and the Y/C Jungle
are incorrect. Any time there is no communication on the data bus between System Control IC001 and the Y/C Jungle IC301, System Control
cycles the power relay line pin 62 OFF and ON. Therefore any failure that
causes loss of Vertical deflection will cause the set to continuously power
OFF and ON.
xxii
xxiii
Convergence Block
Overview
The convergence circuits are used to adjust all three colors so that they
are all laid on top of each other. This is performed by sending signals to
sub deflection coils that are located on each of the three yokes. This is
done in the RA-4 chassis using Sonys new digital convergence circuit.
To accomplish this, this circuit uses what is called the PJED (Projection
Engine Digital). The PJED performs two functions. It allows the factory
or servicer to converge the set, and also allows the customer to Auto
Focus the set. The Auto Focus button optimally adjusts the center and
skew controls.
Convergence
Convergence in this set is much different than in previous chassis. It is a
digital system that uses a coarse mode to rough in the picture, and then
a fine mode to allow 81 different points to be adjusted for each color
without affecting the rest of the picture. You will find this system to be
much simpler and intuitive than the previous system.
This system operates by allowing the servicer to interface with the PJED
using the remote. Remote commands are received by the Main CPU and
sent to the PJED over the main IC bus. Once the CPU of the PJED
receives these commands, it sends data through its own IC bus, referred
to as the P Bus, to an IC which outputs the correct waveforms. These
waveforms are output to the Sub Deflection amplifiers and applied to the
sub yokes.
Auto Focus (Auto Registration)

The Auto Focus button on the front of the set allows the customer to
adjust the skew and centering of the three colors at the touch of a button.
When Auto Focus is selected, the PJED OSD sends out signals, which
are sent through a level compensation circuit to the video processor to be
displayed on the screen. The patterns displayed on the screen are received by a number of sensors located around the outside of the screen.
These sensors output a current proportional to the amount of light received. The level compensation circuit was used earlier because the sensors are not equally sensitive to different colors of light. The output from
the sensors is input to a current to voltage converter. The signal from the
I/V Converter is input to a peak detect circuit whose output is sent to an A/
D converter in the PJED. While this process is going on, the PJED is
changing the waveforms to the sub deflection circuit. This varies the
intensity of the light that strikes the sensors. The CPU will determine
when the output from the sensors equals the stored values of the optimum picture. This means that it does not optimize the picture by itself,
but looks in memory for the stored value. This value is set at the factory
or by a servicer who presses the Auto Focus button in the service mode.
xxiv
xxv
Sensor Amp
When Auto Focus button is pressed Pattern A and B are output in succession over top of the sensors. Pattern A is offset to the left of the
sensor and Pattern B is output to the right of the sensor.
Overview
The sensor amplifier is used when the customer or servicer presses the
Auto Focus button. It amplifies the signal from the sensors and outputs
the signal to the D/A converter on the BD board.
[ OVER VIEW ]
1. MEASUREMENT PRINCIPAL
PHOTO SENSOR
Auto Focus
The Auto Focus system works by adjusting centering and skew convergence data to receive a memorized optimum level. The servicer can set
this level by performing the Auto Focus function in the Service Mode.
This means that the system does not pick a new optimum value when the
customer uses it but rather changes centering and skew adjustment data
to get an optimum sensor reading. The drawing below shows the position
of the sensors around the screen.
0
4
PATTERN A
A = a
A+B L
0 : UPPER SENSOR
1 : LEFT SENSOR
PHOTO SENSOR
2 : RIGHT SENSOR
1
SCREEN
3 : LOWER SENSOR
PATTERN B
4 : UL SENSOR
5 : UR SENSOR
6
7
3
6 : LL SENSOR
7 : LR SENSOR
Varying the input to the convergence amplifiers changes the pattern. The
table below shows that the A and B patterns are output while the convergence data is changed. The changing of this data changes the convergence amplifiers input. The X axis shows the changing of the convergence data and the Y axis shows the value of the data output by the
sensor amplifier. The optimum value of the data is shown where the
curves cross. This data is memorized if the Auto Focus button is pressed
in the Service Mode. When the customer uses the Auto Focus button the
system will change the convergence data to receive the optimum value at
the A/D converter.
main
Flag clear
AD timing, Pattern display
position setting
Initial settings
H.SIZE enlargement
Dark current measurement
G VCENT alignment, SKEW

measurement
R VCENT, VSKEW alignment

250
1000
A
A+B
900
B VCENT, VSKEW alignment
800
200
H.SIZE return & V SIZE

enlargement
A
700
B
150
Dark current measurement
500
G HCENT, HSKEW alignment

400
100
R HCENT, HSKEW alignment
300
200
50
100
B HCENT, HSKEW alignment
0.5mm
VSIZE return
0
0
10
20
30
40
50
0
60
YES
BV CENT
mes ratio
A/D data
600
YES
Did error occur?
mes_data0
mes_data1
mes_rati
NO
Write alignment value in NVM
END
xxvi
Was error
first time?
NO
Write user value in NVM
xxvii
The flowchart on the previous page shows the sequence of operations for
the Auto Focus operation. The first operation is to set the initial settings.
Then the H size is changed. This is done because the sensors are outside of the screen. After the H size is enlarged, a dark current measurement is performed. This means that a reading of the sensors is taken
with output from the tube in order to establish a room brightness offset.
This measurement is subtracted from the readings taken later. After the
V centering and skew adjustments are performed for each color, the H
size is returned to normal and the V size is enlarged. A dark current
measurement is taken again and then H centering and skew adjustments
are done. When these adjustments are complete, V size is returned to
normal. If an error occurred, the process will be repeated. If the error is
returned a second time then an error code is given.
The flowchart below left shows the steps taken during the adjustment
portion of the previous flowchart. As these adjustments are performed,
the convergence data values for centering and skew are changed for
each color. This data is measured until the data center point or optimum
value is measured. When this point is reached the system moves on to
the next step. If an error occurs the cycle repeats. If an error occurs the
second time then it puts an error code on the screen.
The error system works slightly differently in the Service Mode. If an error
occurs while running Auto Focus in the Service Mode, an error will be
displayed immediately instead of repeating the adjustment and displaying
the error when completely finished. An error like the one below shows the
type of error that would occur if the sensor 1 received a low output level
for blue.
START
Measure 2V+2V
4STEP change in CENT,
SKEW
Did CENT & SKEW
measurement exceed
center point?
NO
ROUGH
STEP
ADJUST
E 11 B
E 11 B
R. G. B
SENSOR NUMBER
ERROR CODE 10
YES
ERROR
Measure 4V+4V
* Error code will be displayed on center of screen for 3 seconds.
1STEP change in CENT
NO
Did CENT measurement

exceed center point?
CENT
FINE STEP
ADJUST
YES
Measure 4V+4V
1STEP change in SKEW
NO
Did SKEW measurement

exceed center point?
YES
END
SKEW
FINE STEP
ADJUST
The following table shows the errors that may occur. You should note here that if the green tube is replaced it is very important that the green yoke be
placed so there is no tilt. If it is not placed correctly, a repetitive 80 can occur.
[ERROR CODE LIST]

ERROR
CODE
DISCRIPTION
00
10
20
30
No Error
Sensor Output Level Low
Sensor Output Level High
Adjustment Loop Counter Overflow
40
50
60
Regi Data Overflow

Regi Data Overflow
Offset Overflow
70
Offset Overdrow
80
Green V SKEW too tilt
NOTE
* Check wiring, beam position, sensor.

* Check OP-amp circuit.
0 : CENT V
1 : CENT H
2 : SKEW V
3 : SKEW H
Same as Loop Counter Overflow
* Check beam position. If need, adjust PWM2 for H error,
V CENT (main) for V error.
* PWM2 is usually 34 or 36.
Same as Counter Overflow
* Check beam position. If need, adjust PWM2 for H error,
V CENT (main) for V error.
* Adjust Green beam righ or left sensopr, or Green DY tilt.
* 60, 70 or 80 appears only in Service Mode.

* In case of multiple error, last error is displayed.
(EXAMPLE)
11B : Left sensor Blue level low. (Left sensor circuit may be faulty.)
61R : RED CENT H offset overflow. ( PWM2 may be required adjusting.)
xxviii
xxix
Circuit Description
The sensor amplifier is responsible for taking the amount of light received
by the sensors and outputting a DC value to the PJED CPU to represent
the amount of light received. The optimal value achieved is memorized
during the Auto Focus function in the Service Mode.
As the patterns of flashing light are seen on the screen, the outputs of the
sensors are input to the A board at CN524, CN525 and CN501. These
sensors are applied to IC1601 and IC1604. These ICs are current to
voltage converters. They are required because the sensors output a current proportional to the amount of light they receive.
The outputs from IC1601 and IC1604 are output to peak hold circuits.
These circuits consist of IC1605 and IC1606 and buffer transistors Q1609
through Q1616. To ensure precise measurements, each sensor also has
its own reset line that grounds the peak hold circuit every vertical blanking
pulse. The top, left, right and bottom sensors outputs are applied directly
to the BD board. The four corner sensors are applied to a switch. The
switch is necessary because the PJED CPU only has six A/D inputs. Since
we do not need to use the corner left and right sensors at the same time,
they are switched. Pulses from CN1701/12 from the BD board are responsible for switching the sensors. The two sensors selected then have
their outputs applied to the PJED CPU.
0
4
0 : UPPER SENSOR
1 : LEFT SENSOR
2 : RIGHT SENSOR
SCREEN
3 : LOWER SENSOR
4 : UL SENSOR
5 : UR SENSOR
7
3
6 : LL SENSOR
7 : LR SENSOR
The picture above shows the sensor locations by number. The following
are the formulas used to perform the centering and skew adjustments.
V Center = 1+2
V Skew = 1-2
H Center = 0+3+(1+2)/2
H Skew = 0-3+(4+5-6-7)/4
xxx
xxxi
Centering - Changing the centering control causes all of the horizontal
lines to move away from the center at the same rate. It is the first adjustment that should be made when aligning convergence.
BD Input
Overview
The BD Input circuit is used to control the waveforms that will be output by
the BD Output circuit. It also controls the Auto Focus by generating an
OSD signal and receiving the sensors input while adjusting the convergence data to vary the output waveforms. This circuit determines what
the convergence data was when the optimal signal is received from the
sensors.
Digital Convergence
This set uses Sonys new digital convergence system. This system contains two types of adjustments. They are classified as rough and fine
adjustments. These adjustments are done in the PJED mode of the Service Mode. This mode uses a built in pattern generator so the servicer
does not need to carry one.
Rough Adjustments
The rough adjustments are just like some of the adjustments used in the
previous Sony projection sets. It uses the major adjustments in the old
system. The table below shows which adjustments are available for each
color in the rough mode.
SUB DEFLECTION ADJUSTMENT ITEM
Adjustment
O : Yes
: No
Adjustment type
GH GV RH RV BH BV
Display
Adjustment item
CENT
CENT
SKEW
SIZE
SKEW
SIZE
O
O
O
O
O
O
O
O
O
O
LIN
KEY
LIN
KEY
PIN
PIN
Skew Changing the skew data tilts the picture on its vertical or horizontal axis.
Size - The effect of the horizontal size control is to change the box width
from the center outwards.
Linearity - The linearity control changes the linearity or the width of the
boxes on the left side of center as compared to the right. While changing
the linearity control, if the box width on the right side were getting smaller
the box width on the left side would be getting larger.
Key The key control is used to adjust keystone distortion. It works by
tilting the left side of the line towards the top while tilting the lines on the
right side towards the bottom.
Pin The pincushion control is used to adjust pincushion distortion out of
the picture. Pincushion causes the top and bottom of the picture to bow in
opposite directions.
Fine Adjustments
Once you have gotten the best picture you can by using the rough mode,
you can adjust the rest of the picture using the fine mode. When the fine
mode is selected a cursor appears on the screen. This cursor can be
moved to anyone of 81 different points. These points are reached by
moving the cursor in steps around in the vortex pattern shown below. All
the points are at intersections of the horizontal and vertical lines of the
self-generated crosshatch pattern.
The cursor color can be changed to any of the three colors. When you
adjust a point you select the point and the color of the cursor. Then by
using the joystick on the remote you can move the point inside the cursor
up, down, left or right. You repeat this process for all the points that need
to be adjusted.
xxxii
xxxiii
BD Output
Overview
The BD Output takes the digital outputs from IC1707 Regi Correction and
converts them to analog signals which are then output from the BD board
to the Convergence Amps on the D board. (Not shown)
IC1707 Regi Correction

IC1707 Regi Correction receives sync and data signals that allow it to
output the correct waveforms to control the convergence of the three tubes.
These signals are output in digital format along with BCLK (Bit Clock) and
WCLK (Word Clock). The HBLK is output from IC1707/26 for use as a
compensation signal for blue to reduce corner distortions. There are six
digital data streams output from IC1707 Regi Correction to the D/A Converters.
The Red Vertical Output is input to IC719/14 RSI and IC715/14 RSI. The
analog signals are output from pin 6 of each of these ICs. They are
combined and input to IC1705/2. IC1705 is a filter amplifier which will
output the RV signal to CN523 on the A board.
The Red Horizontal Output is input to IC719/15 LSI and IC713/14 RSI.
The analog signals are output from IC719/11 and IC713/6, combined and
input to IC1702/2. IC1702 is a filter amplifier outputs the RH signal to
CN523 on the A board.
The Green Vertical Output is input to IC714/14 RSI and IC720/14 RSI.
The analog signals are output from pin 6 of each of these ICs. They are
combined and input to IC1708/2. IC1708 is a filter amplifier which outputs
the GV signal to CN523 on the A board.
The Green Horizontal Output is input to IC714/15 LSI and IC720/15 LSI.
The analog signals are output from IC714/11 and IC713/11. They are
combined and input to IC1706/2. IC1706 is a filter amplifier which outputs
the GH signal to CN523 on the A board.
The Blue Vertical Output is input to IC721/14 RSI and IC724/15 LSI. The
analog signals are output from IC1721/6 and IC1724/11. These two signals differ because the LRCK signal of IC1724 is not the WCLK as it is in
IC1721. The different signal is used to compensate for corner distortion
problems. These different outputs are still combined and input to IC1710/
2. IC1710 is a filter amplifier which outputs the BV signal to CN523 on the
A board.
The Blue Horizontal Output is input to IC721/15 LSI and IC713/15 LSI.
The analog signals are output from IC721/11 and IC713/11, combined
and input to IC1709/2. IC1709 is a filter amplifier which outputsx the BH
signal to CN523 on the A board.
xxxiv
xxxv
Convergence Out
Overview
The Convergence Out circuit amplifies the horizontal and vertical convergence signals that are output by the BD Output circuit for each color. The
circuit below shows the IC5005 Convergence Amp. IC5006 is another
Convergence Amp. It is not shown here because its circuitry is identical
to the IC5005 circuit.
Regi Mute
When the set is first turned ON, a Regi Mute signal is required because
the BD board outputs a High signal from the six convergence outputs for
three seconds. If all Highs were output from the BD board simultaneously,
it would probably result in a problem on the +/- 22 volt lines.
When the set is initially turned on, a LOW is output from the BD board to
the A board. The A board transfers this LOW through CN5011/8 to the D
board. This LOW is applied to the base of Q5024, keeping it OFF. If
Q5024 is OFF, then Q5025 and Q5027 are also OFF. This causes IC5005/
12 and 13 Mute to be 0 volts. This will mute IC5005 and it will not output
any signals. After three seconds the Regi Mute output will go HIGH. This
causes Q5024 to turn ON. This will cause Q5025 and Q5027 to turn ON.
This places 19 volts on IC5005/12 and 13 which enables the outputs of
IC5005.
Convergence Amp
IC5005 Convergence Amp contains three amplifiers. Each of these amplifiers contains two inputs, a Non-inverting and Inverting, and one output. If we look at the first amplifier inside IC5005 we see that the vertical
green signal is input to IC5005/4 Non-inverting Input. It is output from
IC5005/22 through PS5006 to the Green Vertical Sub Yoke. The signal
passes through the yoke and is returned to IC5005/5 Inverting Input via
R5017. The other two amplifiers in IC5005 work exactly like the circuit
described above.
xxxvi
APPENDIX 2
SONY
CONFIDENTIAL

National Technical Services
Service Bulletin
TV Products
Model:KP-43T70, KP-46C70, KP-48S70, KP-48S72, KP-48V80, KP-53N74,

KP-53S70, KP-53V80, KP-61S70, KP-61V80
Subject: Dark Screen, Picture Is Barely Visible.

Symptom:
(1321)
Solution:
csv-1
430
No.
Date: December 3, 1999
The screen is extremely dark and the picture is barely visible. This symptom may be
caused by a defective Q801.
If the problem is caused by a defective Q801 replace it with a new type and change
the value of R830, R849, R850, and R851 as shown in the following table.
REF
FORMER
NEW
PART NUMBER
DESCRIPTION
PART NUMBER
Q801
TRANSISTOR,
2SD601A
8-729-422-26
TRANSISTOR,
DTC144EKA
8-729-027-59
R830
RESISTOR,
100 OHM, CHIP
1-216-025-91
RESISTOR,
470 OHM, CHIP
1-216-041-91
R849
RESISTOR,
100 OHM, CHIP
1-216-025-91
RESISTOR,
470 OHM, CHIP
1-216-041-91
R850
RESISTOR,
100 OHM, CHIP
1-216-025-91
RESISTOR,
470 OHM, CHIP
1-216-041-91
R851
RESISTOR,
100 OHM, CHIP
1-216-025-91
RESISTOR,
470 OHM, CHIP
1-216-041-91
DESCRIPTION
See next page for A-board component mounting locations.
Reference: F. Medeiros
PRINTED IN USA
IC805
Q801
R850
R830
R849
ii
R851
KP-43T70 Service Manual Page 83.

KP-48V80 Service Manual Page 88.
A-board Mounting Diagram
Coordinates J-2.
SONY
CONFIDENTIAL

Model:
CSV-1
Service Bulletin
TV Products
KP-43T70, KP-46C70, KP-48S70, KP-48S72

KP-53N74, KP-53S70, KP-48V80, KP-53V80
KP-61S70, KP-61V80, KP-53XBR200
KP-61XBR200, KP-53XBR300
Subject: Up Date of the NVM Jig Instruction Manual

Chassis List
No.
440R1
Date: January 5, 2000
Symptom:
(XXXX) If the need should arise that a circuit board needs to be replaced, It might contain an EEPROM. If
the EEPROM data is not written into the EEPROM of the replacement board all the service or customer
adjustments will be lost.
Example: Convergence adjustments. This will then require additional time to re-converge a projection TV.
DATA information retrieval is especially important for the models covered in the SAYS program, since
the turn around time is of the utmost importance.
Solution:
Please refer to the list below for the EEPROM used in the different chassis. Also
refer to the NVM Instruction Manual for operating instructions.
iii
Rear Projection
Models
Model
Chassis CPU
Type
Board
KWP-65HD1
DR-1
DR-1
DR-1
DR-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
KP41T15
KP41T25
KP46S15
KP46S17
KP46S25
KP46V25
KP46V35
KP53S15
KP53S17
KP53S25
KP53V25
A
A
BD
BM
M
M
M
M
M
M
M
M
M
M
M
CPU Ref. #
IC1008
IC1008
IC1703
IC009
IC002
IC002
IC002
IC002
IC002
IC002
IC002
IC002
IC002
IC002
IC002
DIP
DIP
DIP
CPU Reset pin EEPROM DIP
#
IC Ref. # Switch Switch Switch Switch #4
#2
#1
#3
9
IC5703
ON
OFF
OFF
OFF
9
IC1007
ON
OFF
OFF
OFF
9
IC1704
ON
OFF
OFF
OFF
9
IC005
ON
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
36
IC003 *
OFF
OFF
OFF
OFF
DIP
DIP
DIP
#
#3
#2
#1
IC002
36
IC003 *
OFF
OFF
OFF
OFF
IC7001
36
IC7003
OFF
OFF
OFF
OFF
IC3000
36
IC3002
OFF
OFF
OFF
OFF
Not applicable Not applicable IC5004
OFF
OFF
ON
ON
IC002
36
IC003 *
OFF
OFF
OFF
OFF
IC002
36
IC003 *
OFF
OFF
OFF
OFF
IC7001
36
IC7003
OFF
OFF
OFF
OFF
IC3000
36
IC3002
OFF
OFF
OFF
OFF
Not applicable Not applicable IC5004
OFF
OFF
ON
ON
IC001
15
IC007
OFF
OFF
OFF
OFF
IC001
15
IC007
OFF
OFF
OFF
OFF
IC001
15
IC007
OFF
OFF
OFF
OFF
IC001
15
IC007
OFF
OFF
OFF
OFF
IC001
15
IC007
OFF
OFF
OFF
OFF
IC001
15
IC007
OFF
OFF
OFF
OFF
IC001
15
IC007
OFF
OFF
OFF
OFF
Model
Chassis CPU
Type
Board
KP53V35
KP53XBR45
KP46C36
KP41T35
KP41T65
KP46C65
KP48S35
KP48S65
KP48V45
RA1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-1
RA-2
RA-2
RA-2
RA-2
RA-2
RA-2
RA-2
M
AB
M
X
M
M
AB
M
X
A
A
A
A
A
A
A
KP53S35
RA-2
IC001
15
IC007
OFF
OFF
OFF
OFF
KP53S65
KP53V45
KP61S35
KP61S65
KP61V45
KP48V75
KP53V75
KP61V75
RA-2
RA-2
RA-2
RA-2
RA-2
RA-2A
RA-2A
RA-2A
A
A
A
A
A
A
A
A
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
15
15
15
15
15
15
15
15
IC007
IC007
IC007
IC007
IC007
IC007
IC007
IC007
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
KP43T70
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
RA-3
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
IC002
IC805
IC002
IC805
IC002
IC805
IC002
IC805
IC002
IC805
IC002
IC805
IC002
IC805
IC002
IC805
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
12 (I OSC)
55 (WR PROT)
IC004
IC810
IC004
IC810
IC004
IC810
IC004
IC810
IC004
IC810
IC004
IC810
IC004
IC810
IC004
IC810
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
KP61V25
KP61V35
KP61XBR48
iv
KP46C70
KP48S70
KP48S72
KP53N74
KP53S70
KP48V80
KP53V80
CPU Ref. #
A
A
A
A
IC002
IC805
IC002
IC805
DIP
DIP
DIP
#
#3
#2
#1
12 (I OSC)
IC004
OFF
OFF
OFF
OFF
55 (WR PROT)
IC810
ON
OFF
ON
ON
12 (I OSC)
IC004
OFF
OFF
OFF
OFF
55 (WR PROT)
IC810
ON
OFF
ON
ON
KP53XBR200 RA-4
RA-4
RA-4
KP61XBR200 RA-4
RA-4
RA-4
A
BM
BD
A
BM
BD
IC1008
IC009
IC1703
IC1008
IC009
IC1703
55 (WR PROT)
55 (WR PROT)
55 (WR PROT)
55 (WR PROT)
55 (WR PROT)
55 (WR PROT)
IC1007
IC005
IC1704
IC1007
IC005
IC1704
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
KP53XBR300 RA-4A
RA-4A
RA-4A
A
BM
BD
IC1008
IC009
IC1703
55 (WR PROT) IC1007

55 (WR PROT) IC005
55 (WR PROT) IC1704
OFF
OFF
ON
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
Model
Chassis CPU
Type
Board
KP-61S70
RA-3
RA-3
RA-3
RA-3
KP61V80
CPU Ref. #
*This model uses two EEPROM Ics (IC003 and IC005). Connecting the jig to IC003 will also read or write from
IC005 at the same time. They do not have to be read/written separately because they share common data and
clock lines.
Direct View
Models
vi
Model
Chassis
Type
KV27S10
KV27S15
KV27TS29
KV27TS32
KV27TS36
KV27TW28
KV27TW77
KV27TW78
KV27V10
KV27V15
KV27V55
KV27XBR37
KV32S10
KV32S12
KV32S15
KV32S16
KV32TS36
KV32TS46
KV32TW67
KV32TW68
KV32TW77
KV32TW78
KV32V15
KV32V16
KV32XBR37
KV27XBR45
KV32XBR45
KV32XBR85
KV27S20
KV27S25
KV27S35
KV27V20
KV27V25
KV27V35
KV32S20
KV32S25
KV32S35
KV32TW25
KV32V25
KV32V35
KV3500
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1
AA-1A
AA-1A
AA-1A
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
AA-2
CPU
Board
CPU
Ref. #
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
A
A
A
A
A
A
A
A
A
A
A
A
A
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
DIP
DIP
DIP
CPU Reset EEPROM
DIP
pin #
IC Ref. # Switch Switch Switch Switch
#4
#3
#2
#1
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
Chassis
Type
KV27FV15
KV32FS10
KV32FV15
KV32XBR250
KV36FS10
KV36FV15
KV36XBR250
KV13TR28
KV13TR28
KV13TR29
KV13V50
KV13V50
KV20M10
KV20TR23
KV20TR23
KV20TS29
KV20TS29
KV20TS32
KV20TS50
KV20V50
KV20V50
KV13M10
KV20S10
KV20S11
KV13M20
KV13M30
KV13M31
KV20M20
KV20S20
AA-2W
AA-2W
AA2W
AA-2W
AA-2W
AA-2W
AA-2W
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-2
BA-2
BA-2
BA3
BA3
BA3
BA3
BA3
CPU
Board
CPU
Ref. #
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC001
IC001
IC001
IC001
IC001
CPU Reset EEPROM

DIP
pin #
IC Ref. # Switch
#1
15
IC002
OFF
15
IC002
OFF
15
IC002
OFF
15
IC002
OFF
15
IC002
OFF
15
IC002
OFF
15
IC002
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
36
IC102
OFF
30
IC102
OFF
30
IC102
OFF
30
IC102
OFF
30
IC003
OFF
30
IC003
OFF
30
IC003
OFF
30
IC003
OFF
30
IC003
OFF
DIP
DIP
DIP
Switch Switch Switch
#2
#3
#4
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
vii
Model
viii
Model
Chassis
Type
KV27FV15
KV32FS10
KV32FV15
KV32XBR250
KV36FS10
KV36FV15
KV36XBR250
KV13TR28
KV13TR28
KV13TR29
KV13V50
KV13V50
KV20M10
KV20TR23
KV20TR23
KV20TS29
KV20TS29
KV20TS32
KV20TS50
KV20V50
KV20V50
KV13M10
KV20S10
KV20S11
KV13M20
KV13M30
KV13M31
KV20M20
KV20S20
KV20S21
KV20S30
KV20V60
KV13M40
KV13M50
KV13M51
KV20M40
KV20S40
KV20S41
KV20V80
KV27S40
KV27S45
KV27S65
KV27V40
KV27V45
AA-2W
AA-2W
AA2W
AA-2W
AA-2W
AA-2W
AA-2W
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-1
BA-2
BA-2
BA-2
BA3
BA3
BA3
BA3
BA3
BA3
BA3
BA3
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
BA-4
CPU
Board
CPU
Ref. #
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC101
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
DIP
DIP
DIP
CPU Reset EEPROM
DIP
pin #
#4
#3
#2
#1
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
15
IC002
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
30
IC102
OFF
OFF
OFF
OFF
30
IC102
OFF
OFF
OFF
OFF
30
IC102
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
Chassis
Type
CPU
Board
CPU
Ref. #
KV27V65
KV20FV10
KV24FV10
KV13M42
KV13M52
KV13M53
KV-20M42
KV20S42
KV20S43
KV27S42
KV27S46
KV27S66
KV27V42
KV27V66
KV9PT50
KV9PT60
KV13VM40
KV13VM41
KV20VM40
KV20VS40
KV32XBR100
BA-4
BA-4C
BA-4C
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BA-4D
BN1
BN1
CN-141
CN-141
CN-141
CN-141
DA1
DA1
DA1
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
MA
MA
MA
MA
AB
M
X
KW34HD1
HA-1
HA-1
HA-1
None
None
None
None
None
None
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC001
IC101
IC101
IC1701
IC1701
IC1701
IC1701
IC7001
IC0001
Not
applicabl
e
IC3251
IC3251
IC527
IC501
IC501
IC16
IC16
IC501
IC16
KV13VM20
KV13VM21
KV13VM30
KV13VM31
KV20VM20
KV20VM30
B
M&B
V
MA
MA
MA
MA
MA
MA
DIP
DIP
DIP
CPU Reset EEPROM
DIP
pin #
#4
#3
#2
#1
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
30
IC003
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
36
IC102
OFF
OFF
OFF
OFF
43
IC1705
OFF
OFF
ON
ON
43
IC1705
OFF
OFF
ON
ON
43
IC1705
OFF
OFF
ON
ON
43
IC1705
OFF
OFF
ON
ON
36
IC7003
OFF
OFF
OFF
OFF
36
IC0004
OFF
OFF
OFF
OFF
Not
IC5004
OFF
OFF
ON
ON
applicable
12
12
30
35
35
35
35
35
35
IC3252
IC1304
IC526
IC502
IC502
IC15
IC15
IC502
IC15
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ix
Model
SONY

CONFIDENTIAL
Service Bulletin
TV Products
Model:
KV-27FV15, KV-32FS10, KV-36FS10
KV-32FV15, KV-36FV15, KV-32XBR250
KV-36XBR250
Subject: S-Link, IR Headphone, OSD, and 3D Comb

Filter Mis-Operation
Symptom:
(172X)
csv-1
No.
441
Date: November 22, 1999
The following Symptoms may occur:

1. S-LinK: When the TV detects the S-Link signal in stand-by mode. TV is
supposed to automatically turn on and select appropriate video input. It does turn
on, but it does not select the appropriate input.
2. OSD: When customer tries to enter password for V-chip in Spanish menu,
customer will see additional unnecessary letters Pr preceding correct OSD.
3. IR Headphone: In XBR models only. When customer swaps audio of main
picture and PIP picture, customer can hear the audio of PIP picture even when it
is supposed to be blocked.
x
4. 3D Comb Filter: In XBR model only, when customer changes video input from S
to composite, customer can see a Black & White picture, less than one second,
then color returns.
Solution:
If the customer should complain of the following symptoms please do the following:
27 inch models:
1. In the service Mode record on paper the following register information in both RF & Video mode:
VP SHUE
RF Data ______
Video Data:_______
VP SCOL
RF Data_______
Video Data:________
VP SSHP
RF Data_______
Video Data_________
2. 1) Replace the CPU (IC001)
2) Enter the service Mode using the remote. Then press 8 then Enter.
This will reset the CPU, turning the set off then back on automatically.
3) Re-enter the Service Mode.
4) In the RF mode replace the data in the SHUE, SCOL, & SSHP with the
recorded data from the original CPU.
5) In the Video mode replace the data in the SHUE, SCOL, & SSHP with the
6) Change the Data of ID7 from 0 to 2.
7) Write the new data into the CPU using the remote press the Mute then
Enter key.
32/36 Non XBR Models:
Reference: Uchida, K.
PRINTED IN USA
32/36 Non XBR Models:

VP SSHP
RF Data ______
Video Data:_______
DA 2COL
RF Data ______
Video Data:_______
DA 2SHU
RF Data ______
Video Data:________
4) In the RF mode replace the data in the 2SHU, 2COL, & SSHP with the
5) In the Video mode replace the data in the 2SHU, 2COL, & SSHP with the
7) Write the new data into the CPU using the remote press the Mute then Enter key.
32/36 XBR models:
Model
Ref
Former
New
Part Number
KV-27FV15
IC001
CXP85856A-029S
CXP85856A-035S
8-752-911-19
KV-32FS10
IC001
CXP85856A-024Q
CXP85856A-035S
8-752-911-19
KV-36FS10
IC001
CXP85856A-024Q
CXP85856A-035S
8-752-911-19
KV-32FV15
IC001
CXP85856A-024Q
CXP85856A-035S
8-752-911-19
KV-36FV15
IC001
CXP85856A-024Q
CXP85856A-035S
8-752-911-19
KV32XBR250
IC001
CXP85856A-024Q
CXP85856A-035S
8-752-911-19
KV36XBR250
IC001
CXP85856A-024Q
CXP85856A-035S
8-752-911-19
xi
VP SSHP
RF Data ______
Video Data:_______
DA 2COL
RF Data ______
Video Data:_______
DA 2SHU
RF Data ______
Video Data:_______
4) In the RF mode replace the data in the 2SHU, 2COL, & SSHP with the
5) In the Video mode replace the data in the 2SHU, 2COL, & SSHP with the
7) Write the new data into the CPU using the remote press the Mute then Enter key.
SONY
CONFIDENTIAL

Model:
Service Bulletin
TV Products
Solution:
442
No.
Subject: Picture Blinks Or Jitters Briefly; "VIDEO 5"

And "DTV FORMAT: 480p" OR "DTV FORMAT:
1080i" Appears On The Screen.
Symptom:
(F310)
csv-1
While watching a progressive-scan (480p) DVD movie through the Video 5 input, the
picture blinks or jitters briefly, and the on-screen display shows "VIDEO 5" in the top
left corner and "480p" in the bottom left corner. The problem is most likely to occur
when large changes in brightness occur suddenly. A 1080i signal input to the Video 5
input might also cause this problem to occur, and the bottom left corner would show
"DTV FORMAT: 1080i".
If the customer complains of this problem, change the value of R600 and R698 on the
A-board as shown in the following table.
REF
FORMER
NEW
xii
DESCRIPTION
PART NUMBER
DESCRIPTION
PART NUMBER
R600
RESISTOR,
CHIP,
470 OHM
1-216-041-91
RESISTOR,
CHIP,
1K
1-216-049-91
R698
RESISTOR,
CHIP,
1K
1-216-049-91
RESISTOR,
CHIP,
4.7K
1-216-065-91
Q552
R600
A-board Mounting Diagram
Service manual page 86,
coordinates E-9 (shown
here rotated -180)
IC511
R698
Reference: F. Medeiros-PJA
PRINTED IN USA
SONY

CONFIDENTIAL
Service Bulletin
TV Products
Model:
KP-43T70, KP-46C70, KP-48S70, KP-48S72
KP-48V80, KP-53N74, KP-53S70, KP-53V80
KP-61S70, KP-61V80
Subject: Bright Picture Followed By Shut-down.

Q706, Q733, Or Q764 May Be Damaged.
Symptom:
(1322)
Solution:
csv-1
443
No.
The picture goes bright then the set shuts-down.
If the customer should complain of the symptom above please replace three spark
gaps with the new type below. The CR, CG, and CB board might have one or more
of the following transistors fail: Q706, Q733, or Q764, so check them and replace any
that are found to be defective.
REF
FORMER
NEW
PART
NUMBER
DESCRIPTION
PART NUMBER
SG702
(CR BOARD)
SPARK GAP
1-519-422-11
SPARK GAP
1-517-729-31
SG732
(CG BOARD)
SPARK GAP
1-519-422-11
SPARK GAP
1-517-729-31
SG762
(CB BOARD)
SPARK GAP
1-519-422-11
SPARK GAP
1-517-729-31
Q706
(CR BOARD)
TRANSISTOR,
2SA1091-O
8-729-200-17
SAME AS
FORMER PART
Q733
(CG BOARD)
TRANSISTOR,
2SA1091-O
8-729-200-17
SAME AS
FORMER PART
Q764
(CB BOARD)
TRANSISTOR,
2SA1091-O
8-729-200-17
SAME AS
FORMER PART
Reference: h. Iguchi
PRINTED IN USA
xiii
DESCRIPTION
SONY
CONFIDENTIAL

Service Bulletin
TV Products
Model:
KP-43T70, KP-46C70, KP-48S70
KP-48S72, KP-53N74, KP-53S70, KP-61S70
Subject: Part Number Correction

Reference No. 253, 254, 255
Symptom:
(xxxx)
Solution:
No.
446R1
The CRT part number listed on pages 106 and 130 of the Service Manual for Ref #
253, 254, and 255 is incorrect.
Please note the correct part number as shown below.
MODELS
xiv
Note:
csv-1
REF
DESCRIPTION
PART NUMBER
INCORRECT
CORRECT
43T70
46C70
253
254
255
CRT (R)
CRT (G)
CRT (B)
8-733-571-15
8-733-570-15
8-733-574-15
8-733-571-05
8-733-570-05
8-733-574-05
48S70
48S72
253
254
255
CRT (R)
CRT (G)
CRT (B)
8-733-572-15
8-733-570-15
8-733-575-15
8-733-572-05
8-733-570-05
8-733-575-05
53S70
S/N
90XXX.
253
254
255
CRT (R)
CRT (G)
CRT (B)
A-1501-526-A
A-1501-522-A
A-1501-527-A
53S70
S/N
95XXX
253
254
255
CRT (R)
CRT (G)
CRT (B)
8-733-572-05
8-733-570-05
8-733-575-05
53N74
253
254
255
CRT (R)
CRT (G)
CRT (B)
8-733-572-15
8-733-570-15
8-733-575-15
8-733-572-05
8-733-570-05
8-733-575-05
61S70
253
254
255
CRT (R)
CRT (G)
CRT (B)
8-733-573-15
8-733-570-15
8-733-576-15
8-733-573-05
8-733-570-05
8-733-576-05
Two types of CRTs are used in the KP-53S70. These CRT are not interchangeable.
The CRT used will depend on the serial number. If the serial number begins with 90
then use the P/N beginning with A . If the serial number begins with 95 then use the
CRT P/N beginning with 8 .
Reference: FPR-U1675
PRINTED IN USA
SONY
CONFIDENTIAL

Model:
Service Bulletin
TV Products
KP-43T70, KP-46C70, KP-48S70, KP-48S72

KP-53N74, KP-53S70, KP-48V80, KP-53V80
KP-61S70, KP-61V80, KP-53XBR200
Subject: NVM User Manual Rev.2

Symptom:
(xxxx)
Solution:
CSV-1
No.
449
The NVM Jig User Manual was updated, to Revision 2.
Revision 2 of the NVM Manual is below. This Non Volatile Memory jig allows the
servicer to read and write adjustment information from an EEPROM. This is
especially useful when a board from a projection TV containing the convergence
information is replaced. If the memory chip is not changed or read the entire unit
would have to be re-converged from scratch.
The part number for the NVM Jig is T-935-010-91 (List price is $160.00)
xv
HARDWARE
Green LED:
Read light indicator
Yellow LED:
Write light indicator
Red LED:
Power light indicator
Read Switch:
Toggle push button Switch for Reading from Target NVM
Write Switch:
Toggle push button Switch for Writing to Target NVM
Toggle switch:
Power switch
Connector:
RJ45 connector for both the SOIC and DIP cables

Test clip provided for connection to the RST pin on the Microcontroller.
9VB:
9 Volt Battery
SOIC Connector:
For use with NVM chips that are Surface Mount
DIP Connector:
For use with NVM chips that are Through Hole.
Reference: M. Strum
PRINTED IN USA
SETTING THE DIP SWITCH

Pins 1 and 2 will be dedicated to selecting between RA-4 XBR models and all other models due to NVM differences.
Pins 3 and 4 will be dedicated to allowing pull up resistors for the target NVM chip if the chip is not getting power
on board.
There are diagrams for these selections located on page 5 of this manual.
CONNECTION TO THE NVM CHIP
For the prototype, the following color wires should be connected to the following pins:
PIN1
PIN2
PIN3
PIN4
PIN5
PIN6
PIN7
PIN8
A0
A1
A2
GND
SDA
SCL
WP
VCC
BLUE/WHITE
BLUE
GROUNDING WIRE FOR RESET PIN
ORANGE/WHITE
BROWN/WHITE
BROWN
GREEN
GREEN/WHITE
Plug in bus connector headshell and select first bus by moving switch in the up position, second bus is selected by
placing switch in the down position. +5 volts and gnd are supplied by the jig for power and signal setting purposes.
xvi
PLEASE NOTE:
Power and GND are provided from the JIG.
The RESET pin on the Microcontroller will need to be tied LOW. A test clip is provided on the connector for this
purpose.
There is a special note at the end of the manual for RA-3 suffix 12 & 13, RA-4 XBR models.
The READ and WRITE should take only a maximum of 12 seconds.
The RA-4 XBR BD Board will take approximately 10 Seconds.
READ
To read from the NVM chip on the original board, clip the test clip to the NVM chip and press
the read key. The NVM JIG will read contents of the original memory and program the JIG
memory with this information, the read (green) LED will then light up until the next key press.
WRITE
To write to the new board, after reading from the original board, clip the test clip to the new
NVM chip and press the write key once. When the JIG has completed the write, the yellow
LED will light.
ERROR INDICATION
If the JIG encounters a problem with communication to the NVM chip (i.e. no
acknowledgement on the line that a chip is there), the power LED will blink.
If there is an error indication ensure that the connector is attached properly.

That the Microprocessor on the board is disabled.
Try added or subtracting the pullup resistors on pins 3 and 4 of the DIP switch.
Turn the unit on and then back off again and try reading again.
When communication has been interrupted between the JIG and NVM
And when the data does not compare properly between the JIG and Target NVM.
AFTER GETTING AN ERROR INDICATION

Press one of the keys once for a duration of approximately second. This will take you out of
the blinking RED LED mode and a solid RED LED will again light. At this point you are back at
the starting point and may press either Write or Read buttons.
POWER DOWN
If the unit is powered for a period of time equal or greater than 5 minutes the JIG will power
down. By turning the unit off and then back on again, you may restart your process.
xvii
This error will occur when the NVM has not acknowledged any of the addresses for our
NVMs. These addresses range from A0 hex to AE hex.
DIP SWITCH
1 AND 2 designated for XBR toggle.
3 AND 4 designated for pull up resistors connected with the I2C lines.
SHIP TO MODE DIP (Regular NVM mode, NO pullups)
1
OFF OFF
OFF
OFF
RA-4 XBR BD board NVM MODE, PULLUPS

1
ON OFF
ON
ON
REGULAR NVM MODE, PULLUPS FOR BOTH SCL AND SDA

This option will be needed for A board and BM board on RA-4 XBR.
As well as for NVMs on earlier models that require pullups.
1
xviii
OFF OFF
3
ON
4
ON
NOTES
If you press either key the software will start the process of either writing or reading.
RA-4 XBR OPTIONS

With the RA4 you will need to ground the WP lines.
BD Board
pin 55 IC1703 PJED-CPU
A Board
pin 55 IC1008 Main CPU
BM Board
Grounding 55 IC1009
Pull ups will be needed with the RA-4 model on all boards. There are no pullups close
to the NVM chip on any of the boards.
On earlier models of Rear Projection you will still need to Ground the RESET
line of the Microcontrollers.
RA-3 suffix 12 & 13 OPTIONS

With the RA3 PJED NVM you will need to ground the WP line pin 55 IC805 PJED-CPU and
supply +5 from the NVM reader/writer to pin 41 and 58 IC805 PJED-CPU.
With the RA3 Main CPU NVM you will need to ground the CPU crystal pin 12 IC002 Main
CPU. Also it will be necessary to use the NVM reader/writer +5 supply for +5 standby pin 41
IC002 Main CPU.
xix
SONY
CONFIDENTIAL

Model:
Service Bulletin
TV Products
KP-53N74, KP-53S70, KP-61S70
Subject: Reference Numbers Are Pointing To The

Wrong Screens
Symptom:
(XXXX)
Solution:
csv-1
No.
451
The reference numbers 102, 103, and 104 on page 103 of the Service Manual are
pointing to the wrong screens.
Please see the table below for the correct screen Ref., Description, and Part Number.
xx
Model
Ref.
Description
Part Number
KP-53N74
102
Contrast Screen
4-071-582-11
KP-53N74
KP-53S70
103
Fresnel Screen
4-070-602-01
KP-61S70
103
Fresnel Screen
4-066-082-01
KP-53N74
104
Lenticular Screen
4-064-343-11
KP-53S70
104
Lenticular Screen
4-063-555-01
KP-61S70
104
Lenticular Screen
4-070-283-01
PRINTED IN USA
SONY
CONFIDENTIAL

Model:
Service Bulletin
TV Products
KP-46C70, KP-48S70, KP-48S72

Wrong Screens
Symptom:
(XXXX)
Solution:
csv-1
No.
453
The reference numbers 52, 53, and 54 on page 102 of the Service Manual are
pointing to the wrong screens.
Model
Ref.
Description
Part Number
52
Contrast Screen
4-064-651-01
KP-46C70
53
Fresnel Screen
4-057-324-02
KP-48S70
KP-48S72
53
Fresnel Screen
4-058-455-02
KP-46C70
54
Lenticular Screen
4-063-603-01
KP-48S70
54
Lenticular Screen
4-063-566-01
KP-48S72
54
Lenticular Screen
4-070-235-01
PRINTED IN USA
xxi
KP-48S72
SONY
CONFIDENTIAL

Model:
Service Bulletin
TV Products
KP-43T70
No.

Wrong Screens
Symptom:
(XXXX)
Solution:
CSV-1
454
The reference numbers 2, 3, and 4 on page 101 of the Service Manual are pointing to
the wrong screens.
Model
Ref.
Description
Part Number
xxii
KP-43T70
Contrast Screen
4-070-286-01
KP-43T70
Fresnel Screen
4-070-285-11
KP-43T70
Lenticular Screen
4-070-284-11
PRINTED IN USA

TVP10 - RA-3 & RA-4A Chassis PDF

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S

Sony Service Company

S is a trademark of Sony Electronics

Prepared by: National Training Department

8-Bit A/D Converter

Picture and Picture (V Models)

RA-3 and RA-2 Similarities

RA-3 and RA-4 Similarities

RA-3 New Circuitry

Main Decoder and YUV Switch

Power Supply Protection

Picture and Picture Controller

+135 Volt Over Voltage

+135 Volt Over Current Protection

Standby Unregulated OVP

Standby +5 Volt OCP

V Model Video Path Block

CRT Drive (CG)

S Model Video Path Block

KP-53V80 Video Switching

KP-53V80 Video 4 and Video 5 Inputs

Composite Video and Y Switching

Comb Filter (V Models)

Switching and Comb Filter (S Models)

Standby Power Supply

Switching and Comb Filter

Picture in Picture (S Model)

Over Current Protection (OCP)

Over Voltage Protection (OVP)

Sub Decoder, PIP Processor and YUV Switch

RA-4 vs. RA-4A

Switching Power Supply

RA-4 and RA-4A Circuit Differences

Video Path Block

DTV Video Processing Block

Component Input Selected

High Voltage Development

RGB Inputs Selected

DTV Video Processing

Auto Focus (Auto Registration)

IC1701 Regi Correction

Appendix 2 - Service Bulletins

The purpose of this manual is to discuss the circuitry in the 1999-2000

The following models use the RA-3 chassis:

Steady Sound Auto Volume

Advanced Picture Stabilizer

Velocity Modulation Scanning

Free Layout PIP

Dynamic Focus Circuitry

3 Line Digital Comb Filter To improve color performance, uses digital

Matrix Surround Sound Adds ambience to stereo programs for home

RA-3 and RA-2 Similarities

RA3 New Circuitry

RA-3 and RA-4 Similarities

Power supply Protection

Power Supply Protection

+135 Volt Over Voltage

Standby Unregulated OVP

Standby +5 Volt OCP

11V Low Voltage Protection and 18V Over Voltage Protection

+135 Volt Over Current Protection

11V LVP/18V OVP

POWER SUPPLY PROTECTION