Вы находитесь на странице: 1из 38

Low Power High Frequency SMPS

Seminar Report 2015

CHAPTER 1
INTRODUCTION
When designing power converters it is always a goal to reduce the price and the
physical size, i.e. increase the power density. The development of switch mode power
supplies has made it possible to increase the power density significantly, but it is limited by
the size of the passive energy storing components (inductors and capacitors). The value and
size of these are however dependent on the switching frequency. By increasing the switching
frequency it will hence be possible to reduce the size of SMPSs further.
Traditional SMPS topologies like Buck and Boost are hard switching, this means the
MOSFET is switching while energy is stored in the output capacitance. The result is that
energy is dissipated in the MOSFET every time it turns on. Although this introduces losses in
the converter, it is not critical for converters switching at 50-400 kHz. But when the
frequency is increased to the very high frequency (VHF) range (30-300 MHz) the dissipated
power get almost 1000 times larger. This amount of energy would ruin the efficiency and
require extreme cooling of the MOSFET. This leads to the development of resonant
converters.
In this paper, the design of a resonant converter is analyzed which avoids the switching
losses and is able to increase the frequency while keeping the efficiency high. In the first part
of this paper, different inverters and rectifiers are analyzed and compared. In the second part ,
three different power stages are implemented. Power stages are one with a large input
inductor, one with a switch with small capacitances, and one with a switch with low on
resistances. The power stages are designed with the same specifications and efficiencies from
(60.7 - 82.9)% are achieved.

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

CHAPTER 2
SWITCH MODE POWER SUPPLY
A Switch Mode Power Supply is an electronic power supply that incorporates a switching
regulator to convert electric power efficiently. Like other power supplies, an SMPS transfers
power from a source, like main power, to a load, such as a personal computer, while converting
voltage and current characteristics. Unlike a linear power supply, the pass transistor of a
switching mode supply continually switches between low-dissipation, full-on and full-o states,
and spends very little time in the high dissipation transitions, which minimizes wasted energy.
Ideally, a switch mode power supply does not dissipate energy. Voltage regulation is achieved
by varying the ratio of on to off time.
Switch mode power supply converts the available unregulated ac or dc input voltage to a
regulated dc output voltage. In case of SMPS with input supply drawn from the ac mains, the
input voltage is rectified and filtered using a capacitor at the rectifier output. The unregulated
dc voltage across the capacitor is then fed to a high frequency dc-to-dc converter. Most of the
dc-to-dc converters used in SMPS have an intermediate high frequency ac conversion stage to
facilitate the use of a high frequency transformer for voltage scaling and isolation. In contrast,
in linear power supplies with input voltage drawn from ac mains, the mains voltage is first
stepped down to the desired magnitude using a mains frequency transformer, followed by
rectification and filtering. The high frequency transformer used in a SMPS is much smaller in
size and weight compared to the low frequency transformer of the linear power supply circuit.
The Switched Mode Power Supply owes its name to the dc-to-dc switching converter for
conversion from unregulated dc input voltage to regulated dc output voltage. The switch
employed is turned ON and OFF at a high frequency. During ON mode, the switch is in
saturation mode with negligible voltage drop across the collector and emitter terminals of the
switch whereas in OFF mode, the switch is in cut-off mode with negligible current through the
collector and emitter terminals. On the contrary, the voltage-regulating switch, in a linear
regulator circuit, always remains in the active region.

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
In a SMPS circuit, the unregulated input dc voltage is fed to a high frequency voltage
chopping circuit such that when the chopping circuit (often called dc to dc chopper) is in ON
state, the unregulated voltage is applied to the output circuit that includes the load and some
filtering circuit. When the chopper is in OFF state, zero magnitude of voltage is applied to the
output side. The ON and OFF durations are suitably controlled such that the average dc voltage
applied to the output circuit equals the desired magnitude of output voltage. The ratio of ON
time to cycle time (ON + OFF time) is known as duty ratio of the chopper circuit. A high
switching frequency (of the order of 100 KHz) and a fast control over the duty ratio results in
application of the desired mean voltage along with ripple voltage of a very high frequency to
the output side, consisting of a low pass filter circuit followed by the load. The high frequency
ripple in voltage is effectively filtered using small values of filter capacitors and inductors.

Figure 2.1: Switched mode dc to dc chopper circuit

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

2.1 THEORY OF OPERATION


An SMPS consists of an input rectifier stage, an inverter stage, a voltage converter and an
output rectifier. The block diagram of SMPS is as shown-

Figure 2.2: Block diagram of SMPS

2.1.1 INPUT RECTIFIER STAGE


If the SMPS has an AC input, then the first stage is to convert the input to DC. This is
called rectification. A SMPS with a DC input does not require this stage. In some power
supplies (mostly computer ATX power supplies), the rectifier circuit can be configured as a
voltage doubler by the addition of a switch operated either manually or automatically. This
feature permits an operation from power sources that are normally at 115V or at 230V. The
rectifier produces an unregulated DC voltage which is then sent to a large filter capacitor. The
current drawn from the mains supply by this rectifier circuit occurs in short pulses around the
AC voltage peaks. These pulses have significant high frequency energy which reduces the
power factor. To correct this, many newer SMPS use of PFC circuit to make the input current
follow the sinusoidal shape of the AC input voltage, correcting the power factor. Power
supplies that use PFC usually are auto-ranging, supporting input voltages from 100 VAC -250V
AC, with no input voltage selector switch.

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
2.1.2 INVERTER STAGE

The inverter stage converts DC, whether directly from the input or from the rectifier
stage described above, to AC by running it through a power oscillator, whose output
transformer is very small with few windings at a frequency of tens or hundreds of Kilohertz.
The frequency is usually chosen to be above 20 kHz, to make it inaudible to humans. The
switching is implemented as a multistage (to achieve high gain) MOSFET amplifier. MOSFETs
are a type of transistors with a low on-resistance and a high current-handling capacity.
2.1.3 VOLTAGE CONVERTER AND OUTPUT RECTIFIER

If the output is required to be isolated from the input, as is usually the case in mains
power supplies, the inverted AC is used to drive the primary winding of a high-frequency
transformer. This converts the voltage up or down to the required output level on its secondary
winding. The output transformer in the block diagram serves this purpose. If a DC output is
required, the AC output from the transformer is recti ed. For output voltages above ten volts or
so, ordinary silicon diodes are commonly used. For lower voltages, Schottky diodes are
commonly used as the rectifier elements; they have the advantages of faster recovery times
than silicon diodes (allowing low-loss operation at higher frequencies) and a lower voltage
drop when conducting. For even lower output voltages, MOSFETs may be used as
synchronous rectifiers; compared to Schottky diodes, these have even lower conducting state
voltage drops.
The rectified output is then smoothed by a filter consisting of inductors and capacitors.
For higher switching frequencies, components with lower capacitance and inductance are
needed. Simpler, non-isolated power supplies contain an inductor instead of a transformer. This
type includes boost, buck and buck-boost converters. These belong to the simplest class of
single input, single output converters which use one inductor and one active switch.
The buck converter reduces the input voltage in direct proportion to the ratio of
conductive time to the total switching period, called the duty cycle. A buck converter with a 10
V input operating at a 50% duty cycle will produce an average output voltage of 5 V. A
feedback control loop is employed to regulate the output voltage by varying the duty cycle to

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
compensate for variations in input voltage. The output voltage of a boost converters is always
greater than the input voltage and the buck-boost output voltage is inverted but can be greater
than, equal to, or less than the magnitude of its input voltage. There are many variations and
extensions to this class of converters but these three form the basis of almost all isolated and
non-isolated DC to DC converters. By adding a second inductor the Cuk and SEPIC converters
can be implemented, or, by adding additional active switches, various bridge converters can be
realized. Other types of SMPSs use a capacitor diode voltage multiplier instead of inductors
and transformers. These are mostly used for generating high voltages at low currents. The low
voltage variant is called charge pump.

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

2.2 ADVANTAGES AND DISADVANTAGES


The advantages of a SMPS are primarily lower weight, smaller size, higher efficiency,
wide AC input voltage range and reduced cost for larger amounts of power being delivered.
Low weight and smaller size come about because operation is at a very high frequency range
and inductive elements are vastly smaller and much cheaper. Higher efficiency occurs because
the power transistor is switched very rapidly between saturation and cut o and there is little
power dissipation and it allows reduced heat sinking requirements. Wider AC input voltage
range results from the flexibility in selecting frequency and the transistor duty cycle which
makes voltage adaption unnecessary. Reduced costs occur owing to the absence of large bulky
power transformers, a huge reduction in volume and power dissipation, smaller material
requirements and also smaller semiconductor devices.
Disadvantages include greater complexity, the generation of high-amplitude, high
frequency energy that the low-pass filter must block to avoid electromagnetic interference
(EMI), a ripple voltage at the switching frequency and the harmonic frequencies thereof.
Very low cost SMPSs may couple electrical switching noise back onto the mains power
line, causing interference with A/V equipment connected to the same phase. Non-power-factor
corrected SMPSs also cause harmonic distortion.

2.3 APPLICATIONS
Switch-mode power supply units (PSUs) are used in domestic products such as personal
computers. They often have universal inputs, meaning that they can accept power from mains
supplies throughout the world, although a manual voltage range switch may be required.
Switch-mode power supplies can tolerate a wide range of power frequencies and voltages and
hence can be used in all such applications.

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

CHAPTER 3
RESONANT CONVERTER
The development of switch mode power supplies (SMPS) has made it possible to increase
the power density significantly, but it is limited by the size of the passive energy storing
components (inductors and capacitors). The value and size of these are however dependent on
the switching frequency. Traditional SMPS topologies like Buck and Boost are hard switching,
this means the MOSFET is switching while energy is stored in the output capacitance. The
result is that energy is dissipated in the MOSFET every time it turns on. This introduces losses
in the converter, when the frequency is increased to the very high frequency (VHF) range (30300 MHz) the dissipated power gets almost 1000 times larger. This amount of energy would
ruin the efficiency and require extreme cooling of the MOSFET. This leads to the development
of resonant converters.

Figure 3 : Block diagram of resonant converter


The resonant converter comprises of a RF amplifiers (inverters) combined with a rectifier
for dc/dc converters. With these type of converters, it is possible to achieve zero voltage
switching (ZVS) and/or zero current switching (ZCS). In this case, the MOSFET turns ON
when the voltage and/or current across/through it is zero. Theoretically, this should eliminate
switching losses if the switching is done instantaneously and at exactly the right time. This is
not practically achievable, but even with slight deviations from the ideal case very high
efficiencies can be achieved.
Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
An increase in frequency will lead to a reduction in size, as long as the size of the passive
scales with the value. This assumption generally holds, but magnetic materials and packaging
introduce some challenges. When the frequency is pushed far into the megahertz range,
magnetic core losses increase rapidly and become unacceptably high for most core materials. At
this point, air core and PCB embedded inductors become a viable solutions, as the inductances
needed at these frequencies can be made in a small physical size and the core losses avoided.
Due to the high switching frequency the converter will reach steady state after just a few
microseconds, this makes it possible to use an array of small converters and switch them on and
off as needed. In this way, each converter is designed to operate with a defined load. This
makes the design much easier as resonant inverters are generally load dependent. Resonant
inverters need large load impedance in ideal situations (having both ZVS and ZCS). This makes
them well suited for boost-type converters, but making a buck type is a bit more challenging.
The most commonly used way to overcome this is to add an autotransformer at the output, so
that the load impedance seen by the inverter is increased. Another way to achieve a low output
voltage is to use an array of converters with input in series and output in parallel.
The efficiency equation of the converter s

VIN2fS 1
Pout

It is problematic to have a high input voltage and switching frequency while having a low
output power and still keeping the efficiency high. The input voltage sets (together with Coss)
the energy stored in the output capacitance of the MOSFET each switching period and f S sets
how many times this has to be done each second. Combined these values are hence
proportional to the circulating energy, that needs to run in the converter in order to ensure ZVS.
The relation states that it is difficult to achieve high efficiency, if the circulating energy that is
needed for ZVS is high compared to the output power.

Dept.of EEE

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
From the previous researches as shown in table 1, it is seen that the converters have
limited gains, with a step down of 6.6 times and a step up of 2 being the largest.

Table1. Results from previous research

Dept.of EEE

10

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
The design specifications for the proposed scheme of resonant converter is

The paper aim showing relation between efficiency and frequency is as plotted below.

Table2. Relation between V 2IN fS /POUT and for the converters

Dept.of EEE

11

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

CHAPTER 4
RESONANT RECTIFIER
The power converter utilizes a MOSFET power transistors switch with its output electrode
coupled to a tuned LC network that operatively limits the voltage waveforms across the power
switch to periodic unipolar pulses. The transistor switch may be operated at a high frequency
so that its drain to gate inter electrode capacitance is sufficient to comprise the sole oscillatory
sustaining feedback path of the converter. A reactive network which is inductive in nature at the
operating frequency couples the gate to source electrodes of the transistor switch. A resonant
rectifier includes a tuned circuit to shape the voltage waveforms across the rectifying diodes as
a time inverse of the power switch waveform. The input resistance of the rectifier is controlled
so that it is invariant to frequency change within the switching frequency range of the
converter.
The rectifier converts the ac current from the inverter to a dc output. Just as the MOSFET
has an output capacitance, the diode has a junction capacitance. In order not to dissipate this
energy in the diode, it is important that the transition is made smoothly, so that the capacitance
is discharged before the diode turns on. The commonly used rectifiers are
1) CLASS E RECTIFIER
2) CLASS DE RECTIFIER

Dept.of EEE

12

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

4.1 CLASS E RECTIFIER


The class E rectifier is a simple circuit, consisting of a diode, two capacitors, and an
inductor. Together, these constitute a resonant rectifier capable of rectifying the ac input current
to a dc output. It is assumed that the output capacitance is infinite, so that the output voltage is
constant. The diode is assumed to be ideal, i.e., it has no forward voltage drop, no junction
capacitance, and no reverse current. The rectifier will appear resistive at the switching
frequency, if the resonance frequency of LR and CR are set to this frequency.

Figure 4 : Schematic of the class E Rectifier


The scaling of the two components will determine the duty cycle of the diode, D D. As the
forward voltage drop of a diode increases with the current running through it, it is desirable to
keep DD as high as possible. However, as the diode is connected to the output through an
inductor, the average voltage across it has to be VOUT. Hence, a high DD will lead to a high peak
voltage across the diode.
In order to select DD, and thereby the scaling of the resonant components, the values of
real components have to be considered. If a DD of 50% is chosen, the peak diode voltage will
be 3.6V and VOUT = 17.8 V. With this DD the value of CR should be
1
C

= 67.5pF
22 f s R L

With this capacitance, the value of LR can be calculated


1__
LR =

(2fS)2CR

= 417Nh

The inductor has, as expected, a dc current of 0.2A (the output current with 1 W and 5 V)
and on top of that an ac current with an amplitude of 120 mA (see Fig. 4). The dc resistance of
the inductor is estimated to 25 m and the ac resistance to 330 m (these values are based on
Dept.of EEE
13
AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015
an air core inductor with a diameter of 6 mm and 8 turns of 0.4 mm wire). The loss caused by
the inductor can then be calculated to 1 mW due to dc losses and 2.4 mW due to ac losses. This
is 0.34% of the output power and these resistances are based on a relatively large air core
inductor. The equivalent series resistance (ESR) of the ceramic capacitor in the sizes used here
will be less than 200 m and the currents running through them are smaller than the current in
the inductor. The loss caused by them will thus not be significant. Furthermore, the parasitic
capacitance of the diode can account for CR. Actually, the parasitic capacitance of the chosen
diode is, according to the datasheet, 65 pF at 5 V reverse voltage fitting almost perfectly with
the calculated value.

Figure5: Class E rectifier waveforms simulated with PLECS

Dept.of EEE

14

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

4.2 CLASS DE RECTIFIER


The class DE rectifier has an extra diode compared to the class E, but it does not have any
inductors and the physical size and price are expected to be more or less the same. As seen in
the schematic in Fig. 5, the output capacitance is split in two. For now, they will both be
assumed to be infinite making the output voltage pure DC. As the diodes are connected directly
to the output, the total voltage across them will always be VOUT. The diode duty cycle can
therefore be chosen freely between 0 and 0.5, a higher duty cycle would require both diodes to
conduct at the same time.

Figure 6: Schematic of the class DE rectifier


If I IN, peak is isolated and is also isolated, CR can be isolated in order to find the capacitances
needed to get a desired diode duty cycle. If a diode duty cycle of 25% is chosen, the needed
capacitance can be calculated as 667 pF.
Output voltage

(4.3)

Dept.of EEE

15

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

As the diodes are coupled directly to the output, also as they provide the only dc path for
the output current. The average current through each of the diodes will therefore be I OUT,
resulting in twice the diode loss as for the class E rectifier. This results in a total loss of more
than 150mW.Though several diodes could be put in parallel to reduce the forward voltage drop
a bit, the diode losses will still be well above 100 mW, i.e., 10% of the output power.

Figure 7 : Class DE rectifier waveforms simulated with


PLECS

Dept.of EEE

16

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

4.3 SELECTION OF RECTIFIER


The following table shows a comparison between the rectifier topologies.

Table 3: Comparison of topologies


Based on the analysis of the two rectifiers, the class E rectifier is found
to be the best choice. The size and prize of the two rectifiers will be similar,
but the loss of the class DE will be significantly higher than for the class E.
For a high voltage output the DE might be better though, as the
voltage across the diodes is lower and smaller diodes might be used. But
for the low output needed for this converter, a class E rectifier is found to
be the best choice. The losses of the class DE rectifier might even be
unacceptable. A way to reduce the losses could be to use a synchronous
rectifier; this will eliminate the forward voltage loss. This will however
require an additional MOSFET, with the following need for gate drive and
control.

Dept.of EEE

17

AWH Engg college

Low Power High Frequency SMPS


Seminar Report 2015

CHAPTER 5
RESONANT INVERTER
Resonant inverters are electrical inverters based on resonant current oscillation. In series
resonant inverters, the resonating components and switching device are placed in series with
the load to form an under damped circuit. This type of inverter produces a sinusoidal waveform
at a high output frequency, ranging from 20 kHz to 100 kHz. a resonant inverter is used in
order to eliminate switching losses. Either ZVS or ZCS can be achieved and in some special
cases both. Generally, ZVS will eliminate losses due to parasitic capacitances and ZCS will
eliminate losses due to parasitic inductance.
For MOSFETs and diodes in power applications the capacitances causes the dominating
loss, ZVS will therefore be the main criteria. If only ZVS can be achieved, the MOSFET needs
to turn ON at exactly the point where the voltage across it hits zero. If it switches just a little
too early, there will be energy stored in the capacitor causing switching losses. If it switches a
little too late, the drain source voltage will go below zero and the body diode will start to
conduct which also gives losses.
The commonly used resonant inverters are:
1)

CLASS E INVERTER

2)

CLASS 2 INVERTER

3)

CLASS DE INVERTER

Dept.of EEE

18

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

5.1 CLASS E INVERTER


The most commonly used resonant inverter is the class E. It consists of a single
MOSFET, two inductors, and two capacitors. In optimum operation LIN is an infinite choke
providing a pure dc input current. The resonant circuit (LR and CR) is inductive at the switching
frequency and the inverter is designed to have both ZVS and ZDS.

Figure 8 : Schematic of the class E inverter


ZVS and ZDS switching can only be achieved if

If the drain source voltage of the MOSFET is assumed to be a half sine


wave when it is off and zero when it is on, the peak voltage across the
MOSFET will be

The rms value of a half wave rectified sine wave is

Dept.of EEE

19

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

The rms value of the output voltage is

The reactance of the resonance circuit can now be determined by

By combining the expression for the needed reactance as function of


input voltage, duty cycle, output power, and load we get

It is desirable to keep the duty cycle low in order to reduce the peak voltage across the
MOSFET. However, due to turn on and off times and delays, it is decided to keep it close
to 50%. Also, from equation for VDS peak , it is found that a duty cycle of 45% will give a peak
voltage of 142.8 V, leaving a little headroom if a 150 V MOSFET is used. Using this value
along with the previous results, the needed reactance is found to be 326 . If a capacitor of 680
pF is used, the value of the inductor can be calculated according to

The next step is to determine the values of LIN and CS. In order to minimize losses , it is
preferable to keep LIN large. Thus large ac currents running in and out of the converter and
thereby causing unnecessary losses are avoided. If the input choke is assumed infinite, the next
step is to calculate the value of CS. In order to ensure ZVS, the voltage across CS needs to rise
to the peak and fall back down to zero within the period where the switch is open. This requires
CS and the resonance circuit to resonate at a frequency with a period equal to two times the
period where the switch is open.

Dept.of EEE

20

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

Hence , time period

If the reactance of CS is the same as the reactance of the resonant tank at fR , the circuit
will resonate at this frequency. However, as the capacitor is only used when the MOSFET is
off, it has to be scaled by 1D.

The output capacitance of the MOSFET is only contributing to the resonance in the part
of the period where the MOSFET is OFF. Hence it has to be scaled by 1D in order to find the
effective capacitance. The effective capacitance of the output capacitor is

Hence the total inductance of the resonance circuit and the input
inductor should be

Knowing the values of XRC, the input inductance can be calculated according to

It has 20 pF output capacitance at 50 V and an on-resistance of 1.2,


this gives a conduction loss in the MOSFET of up to 33 mW. The ac
resistance of the inductors is estimated to be 100 m, thus they will have a
combined loss of 5.37 mW. As for the rectifiers, the losses in the capacitors
are assumed to be negligible. Thus, the total loss in the class E inverter is
estimated to be 38 mW.

Dept.of EEE

21

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

Figure 9 : Class E inverter waveforms with realistic COSS simulated with PLECS

Dept.of EEE

22

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

5.2 CLASS 2 (EF2) INVERTER


The class 2 (or EF2 ) inverter, which is a hybrid between the class E and F2 inverters,
was developed in order to make the voltage across the MOSFET closer to a square wave. The
voltage across the MOSFET should thereby become significantly smaller. This is done by
inserting a LC circuit in parallel with the MOSFET

Figure 10 : Class EF2 Inverter


This circuit is designed to have a resonance frequency at the second
harmonic, which causes the voltage across the MOSFET to become a
trapezoidal wave consisting of the first and
third harmonics. The same benefits can be achieved with the flat-top classE amplifier.
The rms voltage across the MOSFET can be estimated by

The new values can be calculated to LR = 1.2 H and CR = 522 pF. No exact equations for
the calculations of the added LC circuit or the input inductance are given in the literature.
However, the following gives results which are close

Dept.of EEE

23

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

With the MOSFET used for the class E the conduction loss will be up to 51.4 mW. The
current through LR will be the same as for the class E and though the inductance is a bit lower,
the ESR will still be estimated to 100 m giving a loss of 4.3mW. The input inductor and LMR
are noticeably smaller and their ESR will therefore be estimated to 50 m and 25 m,
respectively. With these resistances and the listed rms currents, their loss will be 4.8 and 2.3
mW, respectively. The total loss of the class 2 inverter (ignoring losses in the capacitors) is
estimated to be 62.8 mW.

Dept.of EEE

24

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

Figure 11: Tuned class 2 inverter waveforms simulated with PLECS

5.3

CLASS DE INVERTER
The class DE inverter has the same ZVS properties as the class E

inverter and the low voltage stresses of the class D inverter. It is the
counterpart of the class DE rectifier As the DE
rectifier, the DE inverter has two switches connected directly to the dc
voltage, in this case MOSFETs connected to the input voltage. Both
MOSFETs have capacitors across them which can be tuned to achieve ZVS.
The only additional component is a resonant circuit at the output.

Schematic of the class DE inverter

Dept.of EEE

25

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

As for the class E inverter, ZVS and ZDS switching can be achieved.
However, the values needed are different.

With these equations, the demands for the load impedance and output capacitance
become RL = 126.7 and CS = 6.67 pF.

If the voltage across CS1 and CS2 are assumed to rise linear when
they are charged, the rms value of the voltage at the node between the
MOSFETs will be trapezoidal.If the duty cycle of each MOSFET is set to 25%,
the rms value can be calculated as

This value can be used to find the needed reactance of the resonant
circuit. Finding the value of CR = 680 pF, the value of L R is calculated to be
859 nH. As for the class E inverter, the value of each of CS1 and CS2 can be
found using the reactance of the resonance circuit
and scaling them according to the duty cycle. This gives

As the total voltage across the two MOSFETs always will be VIN, the average voltage
across each of them is 25 V. The output capacitance of the MOSFET, used for the E and 2
inverters, almost fit the capacitance needed at this voltage and it will thus be used for the
efficiency estimates. However, as the peak voltage across the MOSFETs is limited to the input
voltage, several other MOSFETs could be used (or the input voltage could be increased).

Dept.of EEE

26

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

Just as the case were for the two other inverters, it was necessary to adjust L R a bit to give
the desired output power. Adjusting the LR to 550 nH and thus recalculating C S to 21.4 pF gave
the desired output power and the rms currents were extracted.
With these currents, the losses in the MOSFETs and in the inductor are estimated to be
PLR = 2.2 mW (using an ESR of 50 m due to the small inductance) and losses in FETs PFET1
= PFET2 = 5.5 mW. If the losses in the capacitors are assumed negligible, the total
loss will be 13.2 mW.

Dept.of EEE

27

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

Figure 13: Class DE inverter waveforms simulated with


PLECS

5.4 SELECTION OF INVERTER


The following table shows a comparison between the inverter topologies

Table 4: Comparison between Inverter topologies


The class E inverter consists of only one MOSFET, two inductors, and a capacitor. It has
however the largest voltage peak across the MOSFET which will limit the input voltage for a
given MOSFET. Also, the two inductors are both larger than any of the inductors used for the
two other converters. This limits the minimum size of the inverter as inductors are assumed to
be the largest components. The total loss was estimated to be 4% of the output power

Dept.of EEE

28

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

The class 2 inverter was a lot like the class E inverter, the only difference being the
added LC circuit put in to reduce the voltage across the MOSFET. The total loss was estimated
to be 62.8 mW which is a 65% increase compared to the class E inverter.
The class DE inverter was the only inverter with two switches. But, as CS1 and CS2 are
composed by the parasitic capacitance of the MOSFETs, the total component count of the class
DE inverter is the same as for the class E inverter. The peak voltage across the MOSFETs were
by far the lowest seen in any of the inverters and the currents were also the lowest. These
things combined gave the smallest output inductor and the lowest losses of 13.2 mW.
From the above analysis, the class DE inverter seems to be the best solution available.
However, during this analysis the gate drive has not been considered. A good high side gate
drive which is capable of operating in the VHF range has yet to be developed whereas a low
side gate drive can be made with few components. The complexity, price, and losses associated
with the added high side gate drive reduces the benefits of the DE inverter. With the above
considerations in mind, the class E inverter is chosen for the final design.

CHAPTER 6
POWER STAGES
The most commonly used MOSFETS in resonant converters are the IRF5802 (M1)
and FDN86246 (M2). Comparing the two MOSFETs, the IRF5802 has much
higher on-resistance than the FDN86246. However, the output capacitance
is lower and will as mentioned decrease the currents and thus reduce the
drawback of the high on-resistance. Assuming the waveform of the voltage
across the MOSFET is the same using the two MOSFETs, the current using
M2 will be CM 2 CM 1/CM 1 = 142% larger than using M1. The on resistance
will be reduced by RM 1RM 2/RM 1 = 70.1%. Combining this gives a total loss
reduction of 27.4%.
Using the estimated loss, this correspond to 9 mW. Furthermore, the increased current
will also give losses in the input inductor, again using the earlier estimate, the increased loss is
found to be142% of 5.37 mW = 7.63 mW. Hence, the total loss difference using the two
Dept.of EEE

29

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

MOSFETs is estimated to be less than 2 mW. The increased capacitance will however also
make the timing of the switching more important, as a larger amount of energy will be stored in
the capacitor and dissipated in the MOSFET if the switching is just a little wrong. Hence,
based on the analysis above, the MOSFET from IRF are found most suited.
The first power stage is the one with low capacitance, the second power stage is with
the MOSFET with lower RDS (ON) and the last power stage is with a large input inductor and
higher output power, The gate signal is a sine wave which can be generated efficiently using
various types of resonant gate drives. The duty cycle is controlled by adjusting the dc offset of
the sine wave, hence a dc offset equal to the threshold of the MOSFET will lead to a duty cycle
of 50% and a lower offset lead to a lower duty cycle.

6.1 MOSFET WITH LOW COSS


CeramicC0G capacitors were used for the resonating capacitors in order to ensure stable
capacitance with varying voltages and ceramic X7R capacitors were used as input and output
capacitors. Custom made air core solenoids were used in order to enable exact tuning of the
inductances and thereby achieve ZVS. The tuning procedure was first to tune the inductor in
the output filter to make it resistive at the switching frequency. Once that was done, the inverter
was added to the design and a low voltage was applied. In order to get capacitors to discharge
faster, the values of the input and resonant inductors had to be lowered. First, the resonant
inductor was lowered to give the desired output power and then the input inductor was adjusted
to make the converter ZVS. The output capacitance of the MOSFET was 20 pF. The probe
introduces capacitance and also the fact that the converter is not ZVS also introduces the miller
plateau in the gate charge and causes the gate signal to deviate from a sine wave when the
voltage reaches the miller voltage. So for the final fine tuning a thermal camera was used to
Dept.of EEE

30

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

measure the temperature of the MOSFET. The MOSFET was ZVS when the temperature rise
was lowest. As the size of the components is almost equal this indicates that the total diode loss
is almost five times the total MOSFET loss (there are five diodes in parallel). The efficiency
was measured to be 71.5%.

Figure 14: Measurements on the prototype with low COSS

6.2 MOSFET WITH LOW RON


When the MOSFET was selected, the FDN86246 was found to be equally good to the
IRF5802. The biggest difference between the two was on-resistances and parasitic
capacitances. A prototype was implemented using the FDN86246 type in a circuit almost
identical to the one used for the previous converter. A few turns were removed from the input
inductor in order to make the converter ZVS with the increased output capacitance in the new
MOSFET. The MOSFET gets almost 10 C warmer clearly indicating a higher loss. Due to the
higher output capacitance, more energy is stored and if the switch is switched at a few volts
instead of zero, much more energy will be dissipated in the on resistance. Furthermore, the ac
current in the input inductor is larger which also increases the losses. The total efficiency of the
converter was measured to 60.7%.

6.2 MOSFET WITH LOW RON


Dept.of EEE

31

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

A prototype was implemented using the FDN86246 in a circuit almost identical to the
one used for the previous converter. A few turns were removed from the input inductor in order
to make the converter ZVS with the increased output capacitance in the new MOSFET. The
MOSFET gets almost 10 C warmer indicating a higher loss. Due to the higher output
capacitance, more energy is stored and if the switch is switched at a few volts instead of zero,
much more energy will be dissipated in the on resistance. Furthermore, the ac current in the
input inductor is larger which also increases the losses. The total efficiency of the converter
was measured to 60.7%.

6.3 MOSFET WITH LARGE INPUT INDUCTOR


The highest efficiency should be achieved with a large input inductor.
So, a prototype was made with the IRF5802, with a 6.5 H input inductor.
Then, the resonance circuit and the load were adjusted in order to get ZVS
and 5V output. The increased output power made the current through the
MOSFET closer to that seen for the ideal class E inverter. The loss due to
slight deviations in the timing of the switching was smaller. Output voltage
obtained is 5.0 V. When tuned, the output power of the circuit became 1.53
W and the efficiency was measured to 82.9%. This efficiency is without gate
drive, but it is still among the best results achieved.

Dept.of EEE

32

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

Figure 15: Measurements on the 1.53W prototype with


IRF5802

CHAPTER 7
EXPERIMENTAL RESULTS
The efficiencies are achieved for the three power stages. From the
three prototypes, it is seen that good efficiencies can be achieved just by
having ZVS. However, the larger the current through the MOSFET is at the
switching instant, the more important becomes the timing of the switching
and losses increase. It has been shown that VHF converters with a very low

Dept.of EEE

33

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

V2IN .fS / POUT factor can be made with high efficiency, the best even had an
efficiency of 82.9%, which puts it among the best VHF converters. For
comparison, the results achieved for the power stages are shown in figure.
The efficiency is not as high as wanted and the factor is a little higher than
desired for one of the prototypes due to the higher output power. However,
seen next to previously achieved results they are very close.

Figure 16: The achieved V2IN .fS / POUT factor and next to previous results

CHAPTER 8
ADVANTAGES AND DISADVANTAGES
7.1 ADVANTAGES
Dept.of EEE

34

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

1. Both ZVS and ZCS can be achieved minimizing the losses.


2. There is a reduction in the physical size of SMPS.
3. There is a reduction in the manufacturing cost of SMPS.
4. There is a faster transient response when the switching frequency is
raised to VHF range.
5. Use of higher frequency in the VHF range makes the SMPS EMI
compliant.

7.2 DISADVANTAGES
1. It is very difficult to achieve good performance for the SMPS at varying loads as the
resonant inverters are load dependent.
2. The designs of components require extreme care as even a small deviation from the
calculated values could bring about variations in the output voltage and power.

CHAPTER 9
APPLICATIONS

Dept.of EEE

35

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

1. They can be used as low power SMPS in space shuttles.


2. They find widespread application in mobile technology of 4G and above.
3. They can be successfully used for envelope tracking applications.

CHAPTER 10
CONCLUSION

Dept.of EEE

36

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

The theoretical design of the resonant converter was considered. Several different
topologies were considered and based on complexity and efficiency estimates a class E inverter
and rectifier were chosen. The class E inverter was chosen based on complexity, efficiency, and
the fact that it did not require a high side switch. With a simple and efficient high side gate
drive the DE inverter is theoretically better, especially for converters with even higher input
voltages. Such a gate drive was however yet to be invented and this topology was therefore not
used for the practical implementation. For the rectifier part it was again the class E topology
that were chosen, this time due to the forward voltage drop of the diodes. With a low-voltage
output, the forward voltage drop of the diode becomes a significant percentage of the output
voltage and a single diode rectifier was found to be the best choice. For higher output voltages,
the DE rectifier might be better as the loss due to forward voltage drop in the diodes becomes
insignificant and the voltages stress of the devices the major concern. Three different power
stages were made; one with a MOSFET with the lowest available output capacitance, one with
a MOSFET with low on-resistance, and one with increased output power allowing a large input
inductor. All the converters had 50 V input and 5 V output and the achieved efficiencies were
between 60.7% and 82.9%. This shows that it is possible to make low power very high
frequency converters with high step down ratio running at sub nominal condition as long as the
components are chosen carefully.

REFERENCES

Dept.of EEE

37

AWH Engg college

Low Power High Frequency SMPS

Seminar Report 2015

[1] W. C. Bowman, J. F. Balicki, F. T. Dickens, R. M. Honeycutt, W. A. Nitz, W. Strauss, W.


B. Suiter, and N. G. Ziesse, A resonant DC-to-DC converter operating at 22 megahertz,
in Proc. IEEE Third Annu. Appl.Power Electron. Conf. Expo., Feb. 15, 1988, pp. 311.
[2]

Y. Han, G. Cheung, A. Li, C. R. Sullivan, and D. J. Perreault, Evaluation of magnetic


materials for very high frequency power applications, IEEE Trans. Power Electron., vol.
27, no. 1, pp. 425435, Jan. 2012.

[3]

J. Qiu and C. R. Sullivan, Design and fabrication of VHF tapped power inductors using
nano granular magnetic films, IEEE Trans. Power Electron.,vol. 27, no. 12, pp. 4965
4975, Dec. 2012.

[4]

H. B. Kotte, R. Ambatipudi, and K. Bertilsson, High-speed (MHz)series resonant


converter using multi layered coreless printed circuit board (PCB) step-down power
transformer, IEEE Trans. Power Electron.,vol. 28, no. 3, pp. 12531264, Mar. 2013.

[5]

W. Chen and S. Y. Ron Hui, Elimination of an electrolytic capacitor in AC/ DC lightemitting diode (LED) driver with high input power factor and constant output current,
IEEE Trans. Power Electron., vol. 27, no. 3, pp. 15981607, Mar. 2012.

[6]

H. Ma, J.-S. Lai, Q. Feng, W. Yu, C. Zheng, and Z. Zhao, A novel valley-fill SEPICderived power supply without electrolytic capacitor for LED lighting application, IEEE
Trans. Power Electron., vol. 27, no. 6, pp. 30573071, Jun. 2012.

[7]

P. Shamsi and B. Fahimi, Design and development of very high frequency resonant
DC-DC boost converters, IEEE Trans. Power Electron., vol. 27,no. 8, pp. 37253733,
Aug. 2012.

[8]

O. Garcia, M. Vasic, P. Alou, J. Oliver, and J. A. Cobos, An overview of fast DC-DC


converters for envelope, IEEE Trans. Power Electron.,vol. 28, no. 10, pp. 47124722,
Oct. 2013.

[9]

J. J. Alonso, M. S. Perdigao, D. Vaquero, A. J. Calleja, and E. Saraiva,Analysis, design,


and experimentation on constant-frequency DC-DC resonant converters with magnetic
control, IEEE Trans. Power Electron.,vol. 27, no. 3, pp. 13691382, Mar. 2012.

Dept.of EEE

38

AWH Engg college

Вам также может понравиться