Experiment 5: Kirchoffs Node Method

Shaira Labis Betonio

BS Chemical Engineering-4
Xavier University, Ateneo de Cagayan
Corrales Avenue, Cagayan de Oro,
Philippines

Quinn De Luna Jara

BS Chemical Enginerring-4
Xavier University, Ateneo de Cagayan
Corrales Avenue, Cagayan de Oro,
Philippines

John Paulo Rule Tumala

BS Chemical Engineering-4
Xavier University, Ateneo de Cagayan
Corrales Avenue, Cagayan de Oro,
Philippine

Ternary Phase Diagram

Judemae B. Langomes

Felizer N. Caitor II
Carl Michael Jay S. Hallazgo
Xavier University-Ateneo de Cagayan Xavier University-Ateneo de CagayanXavier University-Ateneo de Cagayan
Corrales Avenue, Cagayan de Oro
Corrales Avenue, Cagayan de OroCorrales Avenue, Cagayan de Oro
Philippines
Philippines
Philippines

The objective of this experiment is to verify the

relation given by Ohms Law that the current, I, is
passing through a resistor of resistance, R, to the
potential difference or voltage, V, between the end
terminals. In an end-to-end current flow, series, the
total resistance is measured through the use of the
equation Rseries = R1 + R2, and for the side-by-side
current flow, parallel, the total resistance is obtained by
1/Rparallel = 1/ R1 + 1/R2. Using a digital multimeter, the
resistance of 5 different resistors has been obtained in 7
different configurations. The percent difference for the
7 different configurations was 0.0%, 0.25%, 0.68%,
0.19%, 0.25%, 0.0%, 0.22%, respectively.
Keywords- Resistance, Ohms Law, Parallel, Series

Figure 1. Kirchhoff's circuit law. The current

entering any junction is equal to the current
leaving that junction. i2 + i3 = i1 + i4

In

INTRODUCTION
In electrical engineering, node refers to any point
on a circuit where two or more circuit elements meet. For
two nodes to be different, their voltages must be different.
Without any further knowledge, it is easy to establish how
to find a node by using Ohm's Law: V=IR. When looking
at circuit schematics, ideal wires have a resistance of zero.
Since it can be assumed that there is no change in the
potential across any part of the wire, all of the wire in
between any components in a circuit is considered part of
the same node.
In electric circuit analysis, nodal analysis, nodevoltage analysis, or the branch current method is a method
of determining the voltage (potential difference) between
nodes in an electrical circuit in terms of the branch
currents.

analyzing a circuit using Kirchhoff's circuit laws, which

states that at any node (junction) in an electrical circuit, the
sum of currents flowing into that node is equal to the sum
of currents flowing out of that node; one can either do
nodal analysis using Kirchhoff's current law (KCL) or
mesh analysis using Kirchhoff's voltage law (KVL). Nodal
analysis writes an equation at each electrical node,
requiring that the branch currents incident at a node must
sum to zero. The branch currents are written in terms of
the circuit node voltages.
EXPERIMENTAL SECTION
Five different resistors were used in the experiments and

Ternary Phase Diagram

Judemae B. Langomes

Felizer N. Caitor II
Carl Michael Jay S. Hallazgo
Xavier University-Ateneo de Cagayan Xavier University-Ateneo de CagayanXavier University-Ateneo de Cagayan
Corrales Avenue, Cagayan de Oro
Corrales Avenue, Cagayan de OroCorrales Avenue, Cagayan de Oro
Philippines
Philippines
Philippines

RESULTS AND DISCUSSION

With objective of measuring the voltages that

passes through each nodes in the circuit, Kirchoffs Node
Method was used. This method follows the Kirchoffs
Current Law (KCL) which states that all currents entering
and/or leaving a node must sum up to zero.
Table 1. Resistor Values
Resistor
Resistance
(k)
R1
2.97
R2
3.86
R3
1.00
R4
1.00
R5
1.49
R6
1.98
R7
3.26
R8
2.19
The values in Table 1 were measured from the
circuit using the multimeter. The voltage source E 1
measured between nodes G and J was 10.11 V and having
the ground node at J. Having node J as the reference, its
potential will be then 0.0 V. Applying the nodal analysis at
nodes C, D, E and for the first part, the following
equations were derived:
For Node D: (Eqn 1)
IDJ + IDC + IDE = 0

V D E1 V DV C V D V E
+
+
=0
R3
R1
R6

VD

E
1 1 1
1
1
+ +
V C
V E
= 1
R 3 R1 R6
R1
R 6 R3

For Node E: (Eqn 2)

IED + IEJ + IEC + IEF = 0

) ( ) ( )

V E V D V E V J V E V C V EV F
+
+
+
=0
R6
R8
R5
R7
VE

1 1 1 1
1
1
1
+ + +
V D
V C
V F
=0
R 6 R8 R 5 R 7
R6
R5
R7

) ( ) ( ) ( )

For Node C: (Eqn 3)

ICD + ICE + ICF = 0

V C V D V C V E V C V F
+
+
=0
R1
R5
R2

VC

1 1 1
1
1
1
+ +
V E
V F
V D
=0
R 1 R5 R 2
R5
R2
R1

) ( ) ( ) ( )

For Node F: (Eqn 4)

IFE + IFJ + IFC = 0

V F V E V F V J V F V C
+
+
=0
R7
R4
R2
VF

( R1 + R1 + R1 )V ( R1 )V ( R1 )=0
E

Using the formulated equations, voltages from

each nodes were then calculated. And with the measured
values with the aid of multimeter, the percent difference
were also calculated (See Table 2).
Table 2. Voltage at Nodes
Node
VCJ
VDJ
VEJ
VFJ

Measured
4.28 V
8.14 V
4.07 V
2.13 V

Calculated
4.00 V
7.18 V
3.46 V
1.34 V

% Difference
6.76
12.53
16.20
45.53

Ternary Phase Diagram

Judemae B. Langomes

Felizer N. Caitor II
Carl Michael Jay S. Hallazgo
Xavier University-Ateneo de Cagayan Xavier University-Ateneo de CagayanXavier University-Ateneo de Cagayan
Corrales Avenue, Cagayan de Oro
Corrales Avenue, Cagayan de OroCorrales Avenue, Cagayan de Oro
Philippines
Philippines
Philippines

For part 2, the same circuit board was used, only

now, the voltage source was placed between nodes A and
C and having C as the ground node. With this, the
following equations were derived using the same principle
in part 1:
For Node D: (Eqn 1)
IDA + IDJ + IDE = 0

E
1 1 1
1
1
+ +
V J
V E
= 1
R 3 R1 R6
R3
R6
R1

) ( ) ( )

Solving the equations

following data were obtained.

simultaneously,

the

Measured
4.15 V
1.19 V
1.19 V
1.19 V

Calculated
3.30 V
1.13 V
1.44 V
1.92 V

% Difference
25.85
55.13
32.07
3.58

ERROR ANALYSIS

V E V D V E V J V E V C V EV F
+
+
+
=0
R6
R8
R5
R7

One factor that may have affected the readings is

the connection/links between nodes that probably were not
attached properly. Also, for the values of the manually
calculated values, the number of significant figures used
1
=0can also contribute to a bigger value for the % difference.
R

( R1 + R1 + R1 + R1 )V ( R1 )V ( R1 )V ( )
D

CONCLUSION

For Node J: (Eqn 3)

IJD + IJE + IJF = 0

V J V D V J V E V J V F
+
+
=0
R3
R8
R4

VJ

Nodes
VDC
VEC
VFC
VJC

For Node E: (Eqn 2)

IED + IEJ + IEC + IEF = 0

VE

( R1 + R1 + R1 )V ( R1 )V ( R1 )=0

Table 3. Voltage at Nodes

V D E1 V DV J V D V E
+
+
=0
R1
R3
R6

VD

VF

( R1 + R1 + R1 )V ( R1 )V ( R1 )V ( R1 )=0
E

In summary, we had determined the difference

between the measured values and the calculated values of
the voltages at each nodes in the circuit board. Though the
differences were large because of some factors that
contributed to the errors, the experiment was still a success
having met its objective.

REFERENCES
For Node F: (Eqn 4)
IFE + IFJ + IFC = 0

V F V E V F V J V F V C
+
+
=0
R7
R4
R2

(1) https://en.wikipedia.org/wiki/Resistor
(2) http://www.mikroe.com/old/books/keu/01.htm