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7/7/2015

ReviewQuestions

ReviewQuestions

1. (a) Compare the differences between the Jump and Branch instructions in the 6800
microprocessor. What are the maximum offsets available using the relative address
mode of the 6800 microprocessor?
A branch instruction and offset are situated in programme memory at locations $D020
and $D021 respectively. Calculate the destination address when the branch offsets are:
(i) $FA;
(ii) $B0;
(iii) $6D.

2. (a) The following programme is written in 6800 assembly language.

Org $E200
LDA #$37
LDB #$02
STA $E300
DECA
LOOP ASLA
ANDA $E300
DECB
BNE LOOP
SWI

When the above programme is assembled it produces the following 6800 machine code.

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ReviewQuestions

Address Machine Code


E200 86 37
E202 C6 02
E204 B7 E3 00
E207 4A
E208 48
E209 B4 E3 00
E20C 5A
E20D 26 F9
E20F 3F

Using a trace table show the contents of Accumulator A, in Hex and binary, after each
instruction has been executed.

3. (a) In a digital serial communication system explain the meaning of baud rate, synchronous
and asynchronous transmission.
(b) A 6850 Asynchronous Communications Interface Adaptor (ACIA) is organised such that the
Control, Status, Transmit and Receive data registers exist at addresses $E000, $E000, $E001
and $E001 respectively. The Receive Data Register Full (RDRF) flag is the least significant bit
of the Status register. Draw a flowchart and write a 6800 assembly language subroutine to
receive serial data via this port, and store it in Accumulator B, using a polling method. Assume
the ACIA is already initialised
correctly.

4. (a) Draw a block diagram and briefly describe the Von Neumann computer architecture
system.
(b) Draw a block diagram of the internal structure of the 6800 microprocessor.
(c) Briefly explain the function of each of the internal registers.

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ReviewQuestions

5. (a) Draw a block diagram and explain the operation of a 6821 Peripheral Interface Adaptor
(PIA) connected to drive 6 sevensegment commoncathode displays.

(b) Draw a flowchart and write a 6800 machine code programme to display the letter H, in
each display, by continually sequencing through the six display segments.

6.(a) Describe a method to test a block of Random Access Memory.


(b) A 3line to 8line demultiplexer, whose outputs and a single enable input are active low, is
to be used to decode a single 4kbyte block of RAM and a single 4kblock of ROM to address
ranges $1000 to $1FFF and $7000 to $7FFF respectively. Draw a block diagram to show how
this system could be implemented. Assume that the system has a 16bit address bus and an 8
bit data bus.
(c) Draw the circuit arrangement of a dualemitter bipolar static RAM cell. Briefly describe the
operation of the cell in standby, read and write modes.

7.(a) Describe the operation of the Stack, Stack Pointer (SP) and Push/Pull instructions as used
in a microcomputer system.
(b) If the Stack Pointer contains $A300 and a branch to subroutine instruction is situated in
memory location $0100 with an offset of $50 in location $0101, detail the contents of the
Stack and Programme Counter before and after the subroutine call.

8. (a) Draw a flowchart and write a 6800 machine code programme, starting at address
$E000, that branches to a 1 ms delay subroutine at address location $E050, utilising
Accumulator A, in a decrementing loop. Assume the clock frequency is 1 MHz.
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ReviewQuestions

(b) List the sequence of steps in the fetch/execute cycles for the instruction to clear the
contents of address $E03C using the extended address mode of the 6800
microprocessor.
(c) Describe the operation of the Bit and Compare instructions in the 6800 microprocessor.

9. (a) Draw a diagram showing how blocks of 1 k x 8 RAM and 4 k x 8 ROM can be fully address
decoded to have start addresses of $D400 and $E000 respectively. Assume that the system has
a 16bit address bus and an 8bit data bus.
(b) Describe the response sequence of a microprocessor to an interrupt. Describe three
methods for controlling the priority of interrupts.

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