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History of Intel Microprocessors

4-bit Microprocessors
1971

8086 / 8088
ARCHITECTURE
THE REGISTER

Intel released the 4004 - first


microprocessor
Maximum memory is 4096 4-bit
memory locations (2048 bytes)
Has 45 instructions and was used in
very limited applications such as early
video games and small
microprocessor-based controllers

Engr. Jeniefer Espino, MSMEng


Engr. Bernard Mendiola, MSEE CpEng
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History of Intel Microprocessors

History of Intel Microprocessors

8-bit Microprocessors
Intel released the 8008
capable of addressing
16384 bytes and 48
instructions

16-bit Microprocessors

1972

Intel released the 8080


capable of addressing
65536 bytes

1973

Intel released the 8085


capable of addressing
65536 bytes

1978

1979

Intel released the


8086 capable of
addressing
1,048,576 bytes

Intel released
8088
microprocessor

Both processors
have
multiplication
and division
instructions

1977
3

Basic 8088/8086 Architecture

Logical Memory & Physical Memory

Bus Interface Unit (BUI)


Fetches the instruction, the operand of an
instruction or data from MM
Instruction Pointer

Logical Memory

Physical Memory

The name given to the


memory viewed by the
programmer

Actual organization of
memory that the hardware
designers see

Counts the number of programs processed


by the CPU
Prefetch Queue
Prefetches the succeeding instructions
while executing current one
Execution Unit
Executes the instructions
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Dedicated and General Use Memory


00000H to 00013H

20 memory locations
dedicated

00014H to 0007FH

108 memory locations


reserved

FFFF0H to FFFFBH

12 memory locations
Dedicated for functions such as storage of the
hardware reset jump instruction

FFFFCH to FFFFFH

4 memory locations
Reserved for use with future products

Register Structure of the 8086/8088

THE CONTENTS OF GENERAL PURPOSE


REGISTERS

General Purpose Registers


These are used in any manner that the programmer wishes.

Hexadecimal =

AX

BX

CX

DX

Accumulator
16 bits
AH 8 bits
AL - 8 bits

Base
16 bits
BH 8 bits
BL 8 bits

Count
16 bits
CH 8 bits
CL - 8 bits

Data
16 bits
DH 8 bits
DL 8 bits

This is often used to


hold temporary
result after an
arithmetic and logic
operation

This is often used to


hold the base
address of data
located in the
memory

This holds the count


for certain
instructions such as
shift count, rotates,
Loop instruction

Binary=

1234h

0001 0010 0011 0100 b

This holds the most


significant part of
the product &
quotient after a 16bit multiplication
and division
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10

Pointer and Index Registers

Segment Registers

More often used to the memory location holding the operand data for many instruction.

Hold the segment address of various items. They can only be set by a general register or
special instructions

SP

SI

Stack Pointer

Source Index

This is used to address


data in a LIFO (last-in
first-out) stack
memory

This is used to address


an array of data memory

BP

CS
Contains data referenced
by all instructions and
many addressing modes

Code
Segment

Data
Segment

Contains the program or code

DS

DI

Base Pointer

Destination index

This is often used to


address an array of
data memory.

This is normally used to


address destination data
directly for use with the
string instruction

SS
Holds the string instructions
11

Stack
Segment

Extra
Segment

Holds the physical address for the


LIFO stack

ES
12

Status
Register

Conditional Flags
Interrupt
flag

Direction
flag

b15

b14

b13 b12

b11

b10

Control Flags

Trap
flag

b9

b8

Unused

b7

b6

b5

Sign
flag

Overflow
flag

Reflects the result of the previous operation involving the ALU

Conditional Flags

b4

b3

b2

Auxiliary
Carry flag
Zero
flag

b1

CF

Carry
Flag

PF

Parity
Flag

AF

ZF

Zero
Flag

SF

Sign

OF

Auxiliary
Flag

b0

Carry
flag

Flag

Overflow
Flag

Parity
flag
13

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Example: 56FAH + B206H

Example: 56FAH - B206H

For Addition

For Subtraction

CF

set to 1 if there is carry out


of the MSB

ZF

set to 1 if the result of the


previous operations is zero.
Set to 0 if the result is nonzero.

CF

set to 1 if borrow is needed


by the MSB

ZF

set to 1 if the result of the


previous operations is zero.
Set to 0 if the result is nonzero.

PF

set to 1 if the low order 8


bit of the result has even
number of ones, otherwise,
it is reset to zero

SF

equal to the MSB (most


significant bit) of the result of
the most previous operation,
0 if positive, 1 if negative

PF

set to 1 if the low order 8


bit of the result has even
number of ones, otherwise,
it is reset to zero

SF

equal to the MSB (most


significant bit) of the result of
the most previous operation,
0 if positive, 1 if negative

AF

set to 1 if there is carry out


from bit 3 to bit 4

OF

set to 1 if there is a carry out


of the MSB but no carry into
the MSB or vice versa

AF

set to 1 if there is borrow by


bit 3 from bit 4

OF

set to 1 if when the MSB


needs to borrow but there is
no borrow from the MSB or
vice versa

15

16

Try This
1.
2.
3.
4.

Control Flags

F033H + 6689H
23BBH 00FFH
ABCDH EF01H
2345H + 6789H

b8 (bit 8)
If set, CPU executes
instructions one at a
time

Trap Flag
(TF)

17

Interrupt Flag
(IF)
b9 (bit 9)
If set, a certain type of
interrupt can be
recognized by the CPU

b10 (bit 10)


If clear, the string is
processed from its
beginning with the first
element having the
lowest address

Direction Flag
(DF)

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